./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 53f42b1a Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e0a16588b251f5de7b3febde43795c7086835cc989637b8bd82aa8d6af355c6b --- Real Ultimate output --- This is Ultimate 0.2.1-dev-53f42b1 [2021-11-20 06:24:56,878 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-20 06:24:56,881 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-20 06:24:56,922 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-20 06:24:56,923 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-20 06:24:56,924 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-20 06:24:56,926 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-20 06:24:56,929 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-20 06:24:56,932 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-20 06:24:56,933 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-20 06:24:56,935 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-20 06:24:56,937 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-20 06:24:56,937 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-20 06:24:56,939 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-20 06:24:56,941 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-20 06:24:56,943 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-20 06:24:56,944 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-20 06:24:56,946 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-20 06:24:56,949 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-20 06:24:56,952 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-20 06:24:56,955 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-20 06:24:56,960 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-20 06:24:56,962 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-20 06:24:56,963 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-20 06:24:56,968 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-20 06:24:56,969 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-20 06:24:56,969 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-20 06:24:56,971 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-20 06:24:56,972 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-20 06:24:56,973 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-20 06:24:56,974 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-20 06:24:56,986 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-20 06:24:56,988 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-20 06:24:56,990 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-20 06:24:56,993 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-20 06:24:56,994 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-20 06:24:56,994 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-20 06:24:56,995 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-20 06:24:56,995 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-20 06:24:56,996 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-20 06:24:56,997 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-20 06:24:56,998 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-20 06:24:57,054 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-20 06:24:57,055 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-20 06:24:57,055 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-20 06:24:57,055 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-20 06:24:57,057 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-20 06:24:57,057 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-20 06:24:57,057 INFO L138 SettingsManager]: * Use SBE=true [2021-11-20 06:24:57,057 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-20 06:24:57,058 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-20 06:24:57,058 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-20 06:24:57,058 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-20 06:24:57,058 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-20 06:24:57,059 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-20 06:24:57,059 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-20 06:24:57,059 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-20 06:24:57,059 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-20 06:24:57,059 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-20 06:24:57,060 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-20 06:24:57,060 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-20 06:24:57,060 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-20 06:24:57,060 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-20 06:24:57,061 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-20 06:24:57,061 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-20 06:24:57,061 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-20 06:24:57,061 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-20 06:24:57,061 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-20 06:24:57,062 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-20 06:24:57,062 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-20 06:24:57,065 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-20 06:24:57,066 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-20 06:24:57,066 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-20 06:24:57,066 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-20 06:24:57,068 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-20 06:24:57,068 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e0a16588b251f5de7b3febde43795c7086835cc989637b8bd82aa8d6af355c6b [2021-11-20 06:24:57,453 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-20 06:24:57,499 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-20 06:24:57,504 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-20 06:24:57,506 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-20 06:24:57,507 INFO L275 PluginConnector]: CDTParser initialized [2021-11-20 06:24:57,509 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/../../sv-benchmarks/c/array-examples/sanfoundry_24-1.i [2021-11-20 06:24:57,601 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/data/7f5e2cd8c/26f89112856b46bfac6582f81353e8ce/FLAGa6ce3dbe3 [2021-11-20 06:24:58,228 INFO L306 CDTParser]: Found 1 translation units. [2021-11-20 06:24:58,229 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/sv-benchmarks/c/array-examples/sanfoundry_24-1.i [2021-11-20 06:24:58,235 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/data/7f5e2cd8c/26f89112856b46bfac6582f81353e8ce/FLAGa6ce3dbe3 [2021-11-20 06:24:58,583 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/data/7f5e2cd8c/26f89112856b46bfac6582f81353e8ce [2021-11-20 06:24:58,586 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-20 06:24:58,588 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-20 06:24:58,590 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-20 06:24:58,590 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-20 06:24:58,593 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-20 06:24:58,594 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,595 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1fb000ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58, skipping insertion in model container [2021-11-20 06:24:58,596 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,622 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-20 06:24:58,644 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-20 06:24:58,785 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/sv-benchmarks/c/array-examples/sanfoundry_24-1.i[848,861] [2021-11-20 06:24:58,799 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-20 06:24:58,809 INFO L203 MainTranslator]: Completed pre-run [2021-11-20 06:24:58,825 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/sv-benchmarks/c/array-examples/sanfoundry_24-1.i[848,861] [2021-11-20 06:24:58,833 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-20 06:24:58,849 INFO L208 MainTranslator]: Completed translation [2021-11-20 06:24:58,850 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58 WrapperNode [2021-11-20 06:24:58,850 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-20 06:24:58,851 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-20 06:24:58,852 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-20 06:24:58,852 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-20 06:24:58,861 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,869 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,895 INFO L137 Inliner]: procedures = 18, calls = 18, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 73 [2021-11-20 06:24:58,896 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-20 06:24:58,896 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-20 06:24:58,897 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-20 06:24:58,897 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-20 06:24:58,909 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,909 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,913 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,919 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,936 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,940 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,942 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,945 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-20 06:24:58,946 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-20 06:24:58,946 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-20 06:24:58,946 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-20 06:24:58,947 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (1/1) ... [2021-11-20 06:24:58,956 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:24:58,969 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:24:58,982 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:24:58,987 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-20 06:24:59,037 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-20 06:24:59,037 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-20 06:24:59,037 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-20 06:24:59,037 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-20 06:24:59,037 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-20 06:24:59,038 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-20 06:24:59,038 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-20 06:24:59,038 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-20 06:24:59,154 INFO L236 CfgBuilder]: Building ICFG [2021-11-20 06:24:59,155 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-20 06:24:59,323 INFO L277 CfgBuilder]: Performing block encoding [2021-11-20 06:24:59,329 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-20 06:24:59,329 INFO L301 CfgBuilder]: Removed 3 assume(true) statements. [2021-11-20 06:24:59,332 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:24:59 BoogieIcfgContainer [2021-11-20 06:24:59,332 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-20 06:24:59,333 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-20 06:24:59,333 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-20 06:24:59,337 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-20 06:24:59,338 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:24:59,338 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 20.11 06:24:58" (1/3) ... [2021-11-20 06:24:59,340 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@39429560 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 06:24:59, skipping insertion in model container [2021-11-20 06:24:59,340 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:24:59,340 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:24:58" (2/3) ... [2021-11-20 06:24:59,341 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@39429560 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 06:24:59, skipping insertion in model container [2021-11-20 06:24:59,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:24:59,341 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:24:59" (3/3) ... [2021-11-20 06:24:59,343 INFO L388 chiAutomizerObserver]: Analyzing ICFG sanfoundry_24-1.i [2021-11-20 06:24:59,397 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-20 06:24:59,397 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-20 06:24:59,397 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-20 06:24:59,397 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-20 06:24:59,398 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-20 06:24:59,398 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-20 06:24:59,398 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-20 06:24:59,398 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-20 06:24:59,416 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 24 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:24:59,439 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2021-11-20 06:24:59,439 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:24:59,439 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:24:59,446 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:24:59,446 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-20 06:24:59,447 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-20 06:24:59,447 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 24 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:24:59,451 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2021-11-20 06:24:59,451 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:24:59,452 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:24:59,452 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:24:59,452 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-20 06:24:59,460 INFO L791 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 20#L27-3true [2021-11-20 06:24:59,461 INFO L793 eck$LassoCheckResult]: Loop: 20#L27-3true assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11#L27-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 20#L27-3true [2021-11-20 06:24:59,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:24:59,467 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-11-20 06:24:59,477 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:24:59,478 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524515164] [2021-11-20 06:24:59,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:24:59,479 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:24:59,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,619 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:24:59,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,652 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:24:59,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:24:59,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-11-20 06:24:59,656 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:24:59,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162513996] [2021-11-20 06:24:59,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:24:59,656 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:24:59,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,668 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:24:59,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,698 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:24:59,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:24:59,705 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-11-20 06:24:59,706 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:24:59,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426415579] [2021-11-20 06:24:59,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:24:59,707 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:24:59,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,754 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:24:59,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:24:59,795 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:00,287 INFO L210 LassoAnalysis]: Preferences: [2021-11-20 06:25:00,288 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-20 06:25:00,289 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-20 06:25:00,289 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-20 06:25:00,290 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-20 06:25:00,290 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:00,290 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-20 06:25:00,290 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-20 06:25:00,291 INFO L133 ssoRankerPreferences]: Filename of dumped script: sanfoundry_24-1.i_Iteration1_Lasso [2021-11-20 06:25:00,291 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-20 06:25:00,291 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-20 06:25:00,318 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,324 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,328 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,332 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,337 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,342 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,549 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,554 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,558 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,565 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,569 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,572 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-20 06:25:00,884 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-20 06:25:00,889 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-11-20 06:25:00,892 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:00,892 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:00,894 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:00,907 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:00,919 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:00,919 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:00,919 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:00,920 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:00,920 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:00,922 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-11-20 06:25:00,923 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:00,926 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:00,943 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:00,986 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:00,987 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:00,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:00,988 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:00,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-11-20 06:25:00,995 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,006 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,006 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:01,006 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,007 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,007 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,008 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:01,008 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:01,019 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,058 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,059 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,059 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,061 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-11-20 06:25:01,071 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,082 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,083 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:01,083 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,083 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,083 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,084 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:01,084 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:01,106 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,144 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-11-20 06:25:01,144 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,146 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,166 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,167 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:01,167 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,167 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,167 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,168 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:01,168 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:01,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-11-20 06:25:01,178 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,215 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,215 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,217 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,227 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,237 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,237 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,237 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,237 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,241 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,241 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,246 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-11-20 06:25:01,258 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,298 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,298 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,300 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,306 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,316 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,317 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,317 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,317 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,321 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,321 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-11-20 06:25:01,337 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,370 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,370 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,370 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,375 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,380 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-11-20 06:25:01,390 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,391 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,391 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,391 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,395 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,395 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,414 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,449 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,449 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,451 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,457 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,467 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,467 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:01,467 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,467 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,467 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,468 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:01,468 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:01,470 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-11-20 06:25:01,480 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,521 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,521 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,523 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,529 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,539 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,539 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,540 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,540 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,543 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,543 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,548 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-11-20 06:25:01,566 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,606 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,606 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,607 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-11-20 06:25:01,612 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,623 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,623 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-20 06:25:01,624 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,624 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,624 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,625 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-20 06:25:01,625 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-20 06:25:01,634 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,677 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,677 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,678 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,679 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,688 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,692 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-11-20 06:25:01,700 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,700 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,700 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,700 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,703 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,704 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,726 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,762 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,762 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,768 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,775 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-11-20 06:25:01,775 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,785 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,786 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,786 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,786 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,791 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,791 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,826 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,862 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,862 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,862 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,867 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,874 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-11-20 06:25:01,875 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,883 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,883 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,884 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,884 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,886 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,887 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,891 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,914 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:01,914 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,914 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,915 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:01,916 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2021-11-20 06:25:01,920 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:01,928 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:01,928 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:01,928 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:01,928 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:01,931 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:01,931 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:01,954 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:01,991 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2021-11-20 06:25:01,991 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:01,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:01,992 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:02,003 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:02,003 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2021-11-20 06:25:02,012 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:02,013 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:02,013 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:02,013 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:02,018 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:02,018 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:02,034 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-20 06:25:02,075 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:02,075 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:02,076 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:02,079 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:02,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2021-11-20 06:25:02,083 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-20 06:25:02,093 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-20 06:25:02,094 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-20 06:25:02,094 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-20 06:25:02,094 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-20 06:25:02,100 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-20 06:25:02,101 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-20 06:25:02,122 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-11-20 06:25:02,169 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2021-11-20 06:25:02,169 INFO L444 ModelExtractionUtils]: 6 out of 16 variables were initially zero. Simplification set additionally 7 variables to zero. [2021-11-20 06:25:02,171 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:25:02,171 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:02,174 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:25:02,175 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2021-11-20 06:25:02,195 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-11-20 06:25:02,236 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-11-20 06:25:02,237 INFO L513 LassoAnalysis]: Proved termination. [2021-11-20 06:25:02,237 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~num~0#1, ULTIMATE.start_main_~i~0#1) = 1*ULTIMATE.start_main_~num~0#1 - 1*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2021-11-20 06:25:02,307 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2021-11-20 06:25:02,321 INFO L297 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2021-11-20 06:25:02,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:02,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:02,388 INFO L263 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-20 06:25:02,390 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:02,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:02,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 10 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-20 06:25:02,407 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:02,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:02,515 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2021-11-20 06:25:02,522 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-11-20 06:25:02,524 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 24 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:02,576 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 24 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 47 states and 67 transitions. Complement of second has 8 states. [2021-11-20 06:25:02,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-11-20 06:25:02,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:02,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 33 transitions. [2021-11-20 06:25:02,586 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 2 letters. Loop has 2 letters. [2021-11-20 06:25:02,586 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-20 06:25:02,586 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 4 letters. Loop has 2 letters. [2021-11-20 06:25:02,587 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-20 06:25:02,587 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 2 letters. Loop has 4 letters. [2021-11-20 06:25:02,587 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-20 06:25:02,588 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 67 transitions. [2021-11-20 06:25:02,593 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-11-20 06:25:02,597 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 21 states and 29 transitions. [2021-11-20 06:25:02,598 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-11-20 06:25:02,599 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2021-11-20 06:25:02,600 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 29 transitions. [2021-11-20 06:25:02,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:02,600 INFO L681 BuchiCegarLoop]: Abstraction has 21 states and 29 transitions. [2021-11-20 06:25:02,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 29 transitions. [2021-11-20 06:25:02,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2021-11-20 06:25:02,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.380952380952381) internal successors, (29), 20 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:02,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 29 transitions. [2021-11-20 06:25:02,626 INFO L704 BuchiCegarLoop]: Abstraction has 21 states and 29 transitions. [2021-11-20 06:25:02,626 INFO L587 BuchiCegarLoop]: Abstraction has 21 states and 29 transitions. [2021-11-20 06:25:02,626 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-20 06:25:02,626 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 29 transitions. [2021-11-20 06:25:02,627 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-11-20 06:25:02,628 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:02,628 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:02,628 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2021-11-20 06:25:02,628 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:02,628 INFO L791 eck$LassoCheckResult]: Stem: 133#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 134#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 140#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 144#L27-4 main_~i~0#1 := 0; 145#L32-3 [2021-11-20 06:25:02,629 INFO L793 eck$LassoCheckResult]: Loop: 145#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 150#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 139#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 145#L32-3 [2021-11-20 06:25:02,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:02,629 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2021-11-20 06:25:02,630 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:02,630 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805911398] [2021-11-20 06:25:02,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:02,630 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:02,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:02,638 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:02,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:02,648 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:02,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:02,649 INFO L85 PathProgramCache]: Analyzing trace with hash 54137, now seen corresponding path program 1 times [2021-11-20 06:25:02,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:02,649 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145098041] [2021-11-20 06:25:02,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:02,649 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:02,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:02,659 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:02,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:02,669 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:02,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:02,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1807957807, now seen corresponding path program 1 times [2021-11-20 06:25:02,671 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:02,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892857684] [2021-11-20 06:25:02,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:02,671 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:02,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:02,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:02,752 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:02,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892857684] [2021-11-20 06:25:02,759 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892857684] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-20 06:25:02,759 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-20 06:25:02,759 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-20 06:25:02,760 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107402696] [2021-11-20 06:25:02,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-20 06:25:02,872 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:02,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-20 06:25:02,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-20 06:25:02,877 INFO L87 Difference]: Start difference. First operand 21 states and 29 transitions. cyclomatic complexity: 11 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:02,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:02,980 INFO L93 Difference]: Finished difference Result 40 states and 47 transitions. [2021-11-20 06:25:02,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-20 06:25:02,981 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 47 transitions. [2021-11-20 06:25:02,993 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:02,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 32 states and 38 transitions. [2021-11-20 06:25:02,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-11-20 06:25:02,994 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-11-20 06:25:02,995 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 38 transitions. [2021-11-20 06:25:02,995 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:02,995 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 38 transitions. [2021-11-20 06:25:02,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 38 transitions. [2021-11-20 06:25:02,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 20. [2021-11-20 06:25:02,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.2) internal successors, (24), 19 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:02,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2021-11-20 06:25:02,998 INFO L704 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2021-11-20 06:25:02,998 INFO L587 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2021-11-20 06:25:02,999 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-20 06:25:02,999 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 24 transitions. [2021-11-20 06:25:03,000 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:03,000 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:03,000 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:03,000 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-20 06:25:03,001 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:03,001 INFO L791 eck$LassoCheckResult]: Stem: 204#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 205#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 210#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 213#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 214#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 215#L27-4 main_~i~0#1 := 0; 216#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 220#L34 [2021-11-20 06:25:03,001 INFO L793 eck$LassoCheckResult]: Loop: 220#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 209#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 217#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 220#L34 [2021-11-20 06:25:03,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,002 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2021-11-20 06:25:03,002 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,006 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471671228] [2021-11-20 06:25:03,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,006 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,039 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:03,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,083 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:03,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,084 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 2 times [2021-11-20 06:25:03,084 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,084 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692876678] [2021-11-20 06:25:03,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,084 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,100 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:03,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,115 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:03,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1436015051, now seen corresponding path program 1 times [2021-11-20 06:25:03,116 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,116 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169499559] [2021-11-20 06:25:03,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,116 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:03,202 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:03,202 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:03,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169499559] [2021-11-20 06:25:03,203 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169499559] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:03,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [284673428] [2021-11-20 06:25:03,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,203 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:03,204 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:03,205 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:03,210 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-11-20 06:25:03,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:03,246 INFO L263 TraceCheckSpWp]: Trace formula consists of 59 conjuncts, 6 conjunts are in the unsatisfiable core [2021-11-20 06:25:03,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:03,327 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:03,327 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:03,371 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:03,371 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [284673428] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:03,371 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:03,371 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2021-11-20 06:25:03,372 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75950070] [2021-11-20 06:25:03,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:03,424 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:03,425 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-11-20 06:25:03,425 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2021-11-20 06:25:03,426 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. cyclomatic complexity: 7 Second operand has 11 states, 10 states have (on average 2.2) internal successors, (22), 11 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:03,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:03,570 INFO L93 Difference]: Finished difference Result 63 states and 74 transitions. [2021-11-20 06:25:03,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-11-20 06:25:03,572 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 74 transitions. [2021-11-20 06:25:03,575 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:03,576 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 46 states and 54 transitions. [2021-11-20 06:25:03,576 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2021-11-20 06:25:03,577 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2021-11-20 06:25:03,577 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 54 transitions. [2021-11-20 06:25:03,577 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:03,577 INFO L681 BuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2021-11-20 06:25:03,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 54 transitions. [2021-11-20 06:25:03,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 28. [2021-11-20 06:25:03,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1785714285714286) internal successors, (33), 27 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:03,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2021-11-20 06:25:03,581 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 33 transitions. [2021-11-20 06:25:03,581 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 33 transitions. [2021-11-20 06:25:03,581 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-20 06:25:03,581 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 33 transitions. [2021-11-20 06:25:03,582 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:03,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:03,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:03,583 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2021-11-20 06:25:03,583 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:03,584 INFO L791 eck$LassoCheckResult]: Stem: 361#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 362#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 367#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 381#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 382#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 370#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 371#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 372#L27-4 main_~i~0#1 := 0; 373#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 378#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 366#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 375#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 380#L34 [2021-11-20 06:25:03,584 INFO L793 eck$LassoCheckResult]: Loop: 380#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 385#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 384#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 380#L34 [2021-11-20 06:25:03,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,584 INFO L85 PathProgramCache]: Analyzing trace with hash 780817485, now seen corresponding path program 2 times [2021-11-20 06:25:03,585 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,585 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083338590] [2021-11-20 06:25:03,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,585 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,604 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:03,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,633 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:03,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,634 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 3 times [2021-11-20 06:25:03,634 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,634 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222343151] [2021-11-20 06:25:03,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,635 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,641 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:03,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:03,648 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:03,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:03,649 INFO L85 PathProgramCache]: Analyzing trace with hash -209139735, now seen corresponding path program 3 times [2021-11-20 06:25:03,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:03,649 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964953102] [2021-11-20 06:25:03,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:03,650 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:03,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:03,754 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:03,755 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:03,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964953102] [2021-11-20 06:25:03,755 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964953102] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:03,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1322056019] [2021-11-20 06:25:03,756 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:03,756 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:03,756 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:03,763 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:03,786 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-11-20 06:25:03,820 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-11-20 06:25:03,820 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:03,821 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 8 conjunts are in the unsatisfiable core [2021-11-20 06:25:03,823 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:03,976 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:03,976 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:04,051 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:04,051 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1322056019] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:04,051 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:04,051 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2021-11-20 06:25:04,052 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293830663] [2021-11-20 06:25:04,052 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:04,104 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:04,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-11-20 06:25:04,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2021-11-20 06:25:04,107 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. cyclomatic complexity: 8 Second operand has 14 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 14 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:04,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:04,294 INFO L93 Difference]: Finished difference Result 89 states and 104 transitions. [2021-11-20 06:25:04,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-11-20 06:25:04,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 104 transitions. [2021-11-20 06:25:04,301 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:04,305 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 60 states and 70 transitions. [2021-11-20 06:25:04,305 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 53 [2021-11-20 06:25:04,305 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 53 [2021-11-20 06:25:04,305 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 70 transitions. [2021-11-20 06:25:04,306 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:04,307 INFO L681 BuchiCegarLoop]: Abstraction has 60 states and 70 transitions. [2021-11-20 06:25:04,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 70 transitions. [2021-11-20 06:25:04,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 36. [2021-11-20 06:25:04,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.1666666666666667) internal successors, (42), 35 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:04,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 42 transitions. [2021-11-20 06:25:04,316 INFO L704 BuchiCegarLoop]: Abstraction has 36 states and 42 transitions. [2021-11-20 06:25:04,316 INFO L587 BuchiCegarLoop]: Abstraction has 36 states and 42 transitions. [2021-11-20 06:25:04,316 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-20 06:25:04,316 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 42 transitions. [2021-11-20 06:25:04,321 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:04,321 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:04,321 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:04,322 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1] [2021-11-20 06:25:04,322 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:04,322 INFO L791 eck$LassoCheckResult]: Stem: 587#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 588#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 593#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 604#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 605#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 596#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 597#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 608#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 607#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 598#L27-4 main_~i~0#1 := 0; 599#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 603#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 592#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 600#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 618#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 616#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 615#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 610#L34 [2021-11-20 06:25:04,322 INFO L793 eck$LassoCheckResult]: Loop: 610#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 609#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 610#L34 [2021-11-20 06:25:04,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:04,322 INFO L85 PathProgramCache]: Analyzing trace with hash -286749017, now seen corresponding path program 4 times [2021-11-20 06:25:04,323 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:04,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455006404] [2021-11-20 06:25:04,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:04,323 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:04,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:04,379 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:04,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:04,441 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:04,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:04,441 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 4 times [2021-11-20 06:25:04,442 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:04,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731340428] [2021-11-20 06:25:04,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:04,449 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:04,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:04,456 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:04,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:04,462 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:04,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:04,469 INFO L85 PathProgramCache]: Analyzing trace with hash 150026063, now seen corresponding path program 5 times [2021-11-20 06:25:04,469 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:04,470 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845162231] [2021-11-20 06:25:04,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:04,470 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:04,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:04,620 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:04,620 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:04,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845162231] [2021-11-20 06:25:04,621 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1845162231] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:04,621 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1335830539] [2021-11-20 06:25:04,621 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:04,621 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:04,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:04,623 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:04,647 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2021-11-20 06:25:04,691 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2021-11-20 06:25:04,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:04,693 INFO L263 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 10 conjunts are in the unsatisfiable core [2021-11-20 06:25:04,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:04,880 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:04,881 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:04,968 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 12 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:04,973 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1335830539] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:04,974 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:04,974 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2021-11-20 06:25:04,977 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1124913793] [2021-11-20 06:25:04,977 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:05,049 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:05,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-11-20 06:25:05,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=197, Unknown=0, NotChecked=0, Total=272 [2021-11-20 06:25:05,051 INFO L87 Difference]: Start difference. First operand 36 states and 42 transitions. cyclomatic complexity: 9 Second operand has 17 states, 16 states have (on average 2.375) internal successors, (38), 17 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:05,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:05,307 INFO L93 Difference]: Finished difference Result 115 states and 134 transitions. [2021-11-20 06:25:05,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-20 06:25:05,308 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 115 states and 134 transitions. [2021-11-20 06:25:05,310 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:05,311 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 115 states to 74 states and 86 transitions. [2021-11-20 06:25:05,312 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2021-11-20 06:25:05,312 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2021-11-20 06:25:05,312 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 86 transitions. [2021-11-20 06:25:05,313 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:05,313 INFO L681 BuchiCegarLoop]: Abstraction has 74 states and 86 transitions. [2021-11-20 06:25:05,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 86 transitions. [2021-11-20 06:25:05,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 44. [2021-11-20 06:25:05,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.1590909090909092) internal successors, (51), 43 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:05,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2021-11-20 06:25:05,317 INFO L704 BuchiCegarLoop]: Abstraction has 44 states and 51 transitions. [2021-11-20 06:25:05,317 INFO L587 BuchiCegarLoop]: Abstraction has 44 states and 51 transitions. [2021-11-20 06:25:05,317 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-20 06:25:05,317 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 51 transitions. [2021-11-20 06:25:05,318 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:05,322 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:05,323 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:05,324 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2021-11-20 06:25:05,324 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:05,325 INFO L791 eck$LassoCheckResult]: Stem: 882#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 883#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 888#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 902#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 903#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 891#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 892#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 906#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 905#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 893#L27-4 main_~i~0#1 := 0; 894#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 922#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 920#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 919#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 887#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 896#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 901#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 916#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 915#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 908#L34 [2021-11-20 06:25:05,325 INFO L793 eck$LassoCheckResult]: Loop: 908#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 909#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 907#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 908#L34 [2021-11-20 06:25:05,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:05,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1958082385, now seen corresponding path program 6 times [2021-11-20 06:25:05,326 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:05,327 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277589813] [2021-11-20 06:25:05,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:05,327 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:05,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:05,389 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:05,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:05,463 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:05,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:05,464 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 5 times [2021-11-20 06:25:05,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:05,464 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091784480] [2021-11-20 06:25:05,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:05,464 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:05,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:05,470 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:05,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:05,483 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:05,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:05,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1013442971, now seen corresponding path program 7 times [2021-11-20 06:25:05,484 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:05,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977140105] [2021-11-20 06:25:05,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:05,485 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:05,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:05,656 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:05,656 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:05,656 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977140105] [2021-11-20 06:25:05,657 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977140105] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:05,657 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1829383541] [2021-11-20 06:25:05,657 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:05,657 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:05,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:05,659 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:05,663 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2021-11-20 06:25:05,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:05,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 12 conjunts are in the unsatisfiable core [2021-11-20 06:25:05,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:05,893 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 22 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:05,893 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:05,977 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 22 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:05,977 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1829383541] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:05,977 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:05,978 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 19 [2021-11-20 06:25:05,978 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [823746340] [2021-11-20 06:25:05,978 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:06,029 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:06,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2021-11-20 06:25:06,031 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=279, Unknown=0, NotChecked=0, Total=380 [2021-11-20 06:25:06,031 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. cyclomatic complexity: 10 Second operand has 20 states, 19 states have (on average 2.4210526315789473) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:06,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:06,316 INFO L93 Difference]: Finished difference Result 141 states and 164 transitions. [2021-11-20 06:25:06,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-11-20 06:25:06,318 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 164 transitions. [2021-11-20 06:25:06,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:06,320 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 88 states and 102 transitions. [2021-11-20 06:25:06,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2021-11-20 06:25:06,321 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2021-11-20 06:25:06,321 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 102 transitions. [2021-11-20 06:25:06,322 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:06,322 INFO L681 BuchiCegarLoop]: Abstraction has 88 states and 102 transitions. [2021-11-20 06:25:06,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 102 transitions. [2021-11-20 06:25:06,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 52. [2021-11-20 06:25:06,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.1538461538461537) internal successors, (60), 51 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:06,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 60 transitions. [2021-11-20 06:25:06,326 INFO L704 BuchiCegarLoop]: Abstraction has 52 states and 60 transitions. [2021-11-20 06:25:06,327 INFO L587 BuchiCegarLoop]: Abstraction has 52 states and 60 transitions. [2021-11-20 06:25:06,327 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-11-20 06:25:06,327 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 60 transitions. [2021-11-20 06:25:06,327 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:06,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:06,327 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:06,328 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 4, 1, 1, 1, 1] [2021-11-20 06:25:06,328 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:06,328 INFO L791 eck$LassoCheckResult]: Stem: 1246#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 1247#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 1252#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1266#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1267#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1255#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1256#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1277#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1276#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1275#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1274#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1270#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1269#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 1257#L27-4 main_~i~0#1 := 0; 1258#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1290#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1287#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1285#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1286#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1294#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1293#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1263#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1251#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1260#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1265#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1282#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1281#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1272#L34 [2021-11-20 06:25:06,329 INFO L793 eck$LassoCheckResult]: Loop: 1272#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1273#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1271#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1272#L34 [2021-11-20 06:25:06,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:06,329 INFO L85 PathProgramCache]: Analyzing trace with hash -1204484189, now seen corresponding path program 8 times [2021-11-20 06:25:06,329 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:06,329 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317403756] [2021-11-20 06:25:06,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:06,329 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:06,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:06,380 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:06,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:06,416 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:06,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:06,417 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 6 times [2021-11-20 06:25:06,417 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:06,417 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339432767] [2021-11-20 06:25:06,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:06,418 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:06,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:06,422 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:06,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:06,427 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:06,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:06,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1663323347, now seen corresponding path program 9 times [2021-11-20 06:25:06,428 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:06,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240550463] [2021-11-20 06:25:06,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:06,428 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:06,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:06,579 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 22 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:06,580 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:06,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240550463] [2021-11-20 06:25:06,580 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240550463] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:06,580 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1570792586] [2021-11-20 06:25:06,580 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:06,581 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:06,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:06,582 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:06,583 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2021-11-20 06:25:06,656 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-11-20 06:25:06,656 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:06,658 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 14 conjunts are in the unsatisfiable core [2021-11-20 06:25:06,660 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:06,895 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:06,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:07,004 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 35 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:07,005 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1570792586] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:07,005 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:07,005 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2021-11-20 06:25:07,007 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814308489] [2021-11-20 06:25:07,007 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:07,058 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:07,058 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-11-20 06:25:07,059 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=375, Unknown=0, NotChecked=0, Total=506 [2021-11-20 06:25:07,061 INFO L87 Difference]: Start difference. First operand 52 states and 60 transitions. cyclomatic complexity: 11 Second operand has 23 states, 22 states have (on average 2.4545454545454546) internal successors, (54), 23 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:07,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:07,397 INFO L93 Difference]: Finished difference Result 167 states and 194 transitions. [2021-11-20 06:25:07,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-20 06:25:07,398 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 194 transitions. [2021-11-20 06:25:07,400 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:07,402 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 102 states and 118 transitions. [2021-11-20 06:25:07,402 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2021-11-20 06:25:07,402 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2021-11-20 06:25:07,403 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 118 transitions. [2021-11-20 06:25:07,403 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:07,404 INFO L681 BuchiCegarLoop]: Abstraction has 102 states and 118 transitions. [2021-11-20 06:25:07,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 118 transitions. [2021-11-20 06:25:07,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 60. [2021-11-20 06:25:07,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.15) internal successors, (69), 59 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:07,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 69 transitions. [2021-11-20 06:25:07,410 INFO L704 BuchiCegarLoop]: Abstraction has 60 states and 69 transitions. [2021-11-20 06:25:07,410 INFO L587 BuchiCegarLoop]: Abstraction has 60 states and 69 transitions. [2021-11-20 06:25:07,410 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-11-20 06:25:07,410 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 69 transitions. [2021-11-20 06:25:07,411 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:07,411 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:07,411 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:07,412 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 1, 1, 1, 1] [2021-11-20 06:25:07,412 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:07,413 INFO L791 eck$LassoCheckResult]: Stem: 1679#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 1680#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 1685#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1699#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1700#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1688#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1689#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1712#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1711#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1710#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1709#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1708#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1707#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1703#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1702#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 1690#L27-4 main_~i~0#1 := 0; 1691#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1733#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1722#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1720#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1721#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1725#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1731#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1730#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1729#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1728#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1696#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1684#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1693#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1705#L34 [2021-11-20 06:25:07,413 INFO L793 eck$LassoCheckResult]: Loop: 1705#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 1706#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1704#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 1705#L34 [2021-11-20 06:25:07,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:07,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1715309995, now seen corresponding path program 10 times [2021-11-20 06:25:07,414 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:07,414 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828183502] [2021-11-20 06:25:07,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:07,414 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:07,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:07,448 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:07,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:07,488 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:07,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:07,489 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 7 times [2021-11-20 06:25:07,489 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:07,489 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484431712] [2021-11-20 06:25:07,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:07,490 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:07,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:07,494 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:07,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:07,498 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:07,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:07,499 INFO L85 PathProgramCache]: Analyzing trace with hash 720866529, now seen corresponding path program 11 times [2021-11-20 06:25:07,499 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:07,499 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1373076719] [2021-11-20 06:25:07,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:07,499 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:07,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:07,680 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 35 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:07,680 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:07,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1373076719] [2021-11-20 06:25:07,680 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1373076719] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:07,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [786327672] [2021-11-20 06:25:07,681 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:07,681 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:07,681 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:07,685 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:07,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-11-20 06:25:07,779 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-11-20 06:25:07,780 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:07,781 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-20 06:25:07,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:08,107 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:08,107 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:08,248 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:08,248 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [786327672] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:08,248 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:08,248 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2021-11-20 06:25:08,251 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084696971] [2021-11-20 06:25:08,251 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:08,312 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:08,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-11-20 06:25:08,313 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=485, Unknown=0, NotChecked=0, Total=650 [2021-11-20 06:25:08,313 INFO L87 Difference]: Start difference. First operand 60 states and 69 transitions. cyclomatic complexity: 12 Second operand has 26 states, 25 states have (on average 2.48) internal successors, (62), 26 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:08,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:08,682 INFO L93 Difference]: Finished difference Result 193 states and 224 transitions. [2021-11-20 06:25:08,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-11-20 06:25:08,685 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 224 transitions. [2021-11-20 06:25:08,687 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:08,688 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 116 states and 134 transitions. [2021-11-20 06:25:08,688 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-20 06:25:08,689 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-20 06:25:08,689 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 134 transitions. [2021-11-20 06:25:08,689 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:08,689 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 134 transitions. [2021-11-20 06:25:08,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 134 transitions. [2021-11-20 06:25:08,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 68. [2021-11-20 06:25:08,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1470588235294117) internal successors, (78), 67 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:08,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 78 transitions. [2021-11-20 06:25:08,704 INFO L704 BuchiCegarLoop]: Abstraction has 68 states and 78 transitions. [2021-11-20 06:25:08,704 INFO L587 BuchiCegarLoop]: Abstraction has 68 states and 78 transitions. [2021-11-20 06:25:08,704 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-11-20 06:25:08,704 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 78 transitions. [2021-11-20 06:25:08,705 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:08,705 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:08,705 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:08,706 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 6, 1, 1, 1, 1] [2021-11-20 06:25:08,707 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:08,707 INFO L791 eck$LassoCheckResult]: Stem: 2181#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 2182#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 2187#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2202#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2203#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2190#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2191#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2217#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2216#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2215#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2214#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2213#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2212#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2211#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2210#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2206#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2205#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 2192#L27-4 main_~i~0#1 := 0; 2193#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2225#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2226#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2227#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2231#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2230#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2243#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2240#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2238#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2237#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2235#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2234#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2233#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2199#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2186#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2196#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2201#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2222#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2221#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2208#L34 [2021-11-20 06:25:08,708 INFO L793 eck$LassoCheckResult]: Loop: 2208#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2209#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2207#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2208#L34 [2021-11-20 06:25:08,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:08,708 INFO L85 PathProgramCache]: Analyzing trace with hash 1748928671, now seen corresponding path program 12 times [2021-11-20 06:25:08,708 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:08,709 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115988174] [2021-11-20 06:25:08,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:08,709 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:08,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:08,763 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:08,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:08,846 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:08,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:08,848 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 8 times [2021-11-20 06:25:08,849 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:08,849 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266234079] [2021-11-20 06:25:08,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:08,849 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:08,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:08,853 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:08,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:08,864 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:08,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:08,865 INFO L85 PathProgramCache]: Analyzing trace with hash 85809751, now seen corresponding path program 13 times [2021-11-20 06:25:08,865 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:08,865 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879100371] [2021-11-20 06:25:08,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:08,866 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:08,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:09,090 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 51 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:09,091 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:09,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879100371] [2021-11-20 06:25:09,091 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [879100371] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:09,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [352542496] [2021-11-20 06:25:09,091 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:09,091 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:09,091 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:09,093 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:09,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-11-20 06:25:09,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:09,153 INFO L263 TraceCheckSpWp]: Trace formula consists of 167 conjuncts, 18 conjunts are in the unsatisfiable core [2021-11-20 06:25:09,155 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:09,575 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:09,575 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:09,709 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 70 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:09,710 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [352542496] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:09,710 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:09,711 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 28 [2021-11-20 06:25:09,711 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391281464] [2021-11-20 06:25:09,711 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:09,760 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:09,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-11-20 06:25:09,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=609, Unknown=0, NotChecked=0, Total=812 [2021-11-20 06:25:09,762 INFO L87 Difference]: Start difference. First operand 68 states and 78 transitions. cyclomatic complexity: 13 Second operand has 29 states, 28 states have (on average 2.5) internal successors, (70), 29 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:10,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:10,180 INFO L93 Difference]: Finished difference Result 219 states and 254 transitions. [2021-11-20 06:25:10,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-11-20 06:25:10,182 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 219 states and 254 transitions. [2021-11-20 06:25:10,184 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:10,185 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 219 states to 130 states and 150 transitions. [2021-11-20 06:25:10,186 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 113 [2021-11-20 06:25:10,186 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 113 [2021-11-20 06:25:10,186 INFO L73 IsDeterministic]: Start isDeterministic. Operand 130 states and 150 transitions. [2021-11-20 06:25:10,186 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:10,187 INFO L681 BuchiCegarLoop]: Abstraction has 130 states and 150 transitions. [2021-11-20 06:25:10,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states and 150 transitions. [2021-11-20 06:25:10,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 76. [2021-11-20 06:25:10,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.144736842105263) internal successors, (87), 75 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:10,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 87 transitions. [2021-11-20 06:25:10,196 INFO L704 BuchiCegarLoop]: Abstraction has 76 states and 87 transitions. [2021-11-20 06:25:10,196 INFO L587 BuchiCegarLoop]: Abstraction has 76 states and 87 transitions. [2021-11-20 06:25:10,197 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-11-20 06:25:10,197 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 87 transitions. [2021-11-20 06:25:10,197 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:10,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:10,198 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:10,201 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 8, 7, 7, 1, 1, 1, 1] [2021-11-20 06:25:10,201 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:10,201 INFO L791 eck$LassoCheckResult]: Stem: 2752#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 2753#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 2758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2772#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2773#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2789#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2788#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2787#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2786#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2785#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2784#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2783#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2782#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2781#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2780#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2776#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2775#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 2763#L27-4 main_~i~0#1 := 0; 2764#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2823#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2799#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2797#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2798#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2802#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2822#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2819#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2817#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2816#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2813#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2811#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2810#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2808#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2806#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2805#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2769#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2757#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2771#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2794#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2793#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2778#L34 [2021-11-20 06:25:10,201 INFO L793 eck$LassoCheckResult]: Loop: 2778#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 2779#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2777#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 2778#L34 [2021-11-20 06:25:10,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:10,202 INFO L85 PathProgramCache]: Analyzing trace with hash -1204550311, now seen corresponding path program 14 times [2021-11-20 06:25:10,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:10,203 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250352826] [2021-11-20 06:25:10,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:10,203 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:10,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:10,264 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:10,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:10,354 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:10,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:10,355 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 9 times [2021-11-20 06:25:10,355 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:10,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747488767] [2021-11-20 06:25:10,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:10,356 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:10,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:10,364 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:10,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:10,369 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:10,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:10,371 INFO L85 PathProgramCache]: Analyzing trace with hash -306517155, now seen corresponding path program 15 times [2021-11-20 06:25:10,371 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:10,371 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684962213] [2021-11-20 06:25:10,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:10,372 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:10,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:10,626 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 70 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:10,627 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:10,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684962213] [2021-11-20 06:25:10,627 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1684962213] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:10,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1200331926] [2021-11-20 06:25:10,627 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:10,627 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:10,627 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:10,632 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:10,646 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-11-20 06:25:10,746 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2021-11-20 06:25:10,746 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:10,748 INFO L263 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 20 conjunts are in the unsatisfiable core [2021-11-20 06:25:10,750 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:11,168 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:11,168 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:11,333 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 92 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:11,334 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1200331926] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:11,334 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:11,334 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 31 [2021-11-20 06:25:11,334 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571929345] [2021-11-20 06:25:11,335 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:11,390 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:11,391 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-11-20 06:25:11,392 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=747, Unknown=0, NotChecked=0, Total=992 [2021-11-20 06:25:11,392 INFO L87 Difference]: Start difference. First operand 76 states and 87 transitions. cyclomatic complexity: 14 Second operand has 32 states, 31 states have (on average 2.5161290322580645) internal successors, (78), 32 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:11,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:11,877 INFO L93 Difference]: Finished difference Result 245 states and 284 transitions. [2021-11-20 06:25:11,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-11-20 06:25:11,878 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 245 states and 284 transitions. [2021-11-20 06:25:11,881 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:11,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 245 states to 144 states and 166 transitions. [2021-11-20 06:25:11,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2021-11-20 06:25:11,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2021-11-20 06:25:11,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 144 states and 166 transitions. [2021-11-20 06:25:11,883 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:11,883 INFO L681 BuchiCegarLoop]: Abstraction has 144 states and 166 transitions. [2021-11-20 06:25:11,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states and 166 transitions. [2021-11-20 06:25:11,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 84. [2021-11-20 06:25:11,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 84 states have (on average 1.1428571428571428) internal successors, (96), 83 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:11,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 96 transitions. [2021-11-20 06:25:11,889 INFO L704 BuchiCegarLoop]: Abstraction has 84 states and 96 transitions. [2021-11-20 06:25:11,889 INFO L587 BuchiCegarLoop]: Abstraction has 84 states and 96 transitions. [2021-11-20 06:25:11,889 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-11-20 06:25:11,889 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 96 transitions. [2021-11-20 06:25:11,890 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:11,890 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:11,890 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:11,891 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 9, 8, 8, 1, 1, 1, 1] [2021-11-20 06:25:11,892 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:11,892 INFO L791 eck$LassoCheckResult]: Stem: 3392#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 3393#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 3398#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3413#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3414#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3401#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3402#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3432#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3431#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3430#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3429#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3428#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3427#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3426#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3425#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3424#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3423#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3421#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 3417#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3416#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 3403#L27-4 main_~i~0#1 := 0; 3404#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3441#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3442#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3446#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3445#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3470#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3465#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3464#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3459#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3458#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3453#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3452#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3450#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3449#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3448#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3410#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3397#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3407#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3412#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3437#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3436#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3419#L34 [2021-11-20 06:25:11,892 INFO L793 eck$LassoCheckResult]: Loop: 3419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 3420#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 3419#L34 [2021-11-20 06:25:11,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:11,893 INFO L85 PathProgramCache]: Analyzing trace with hash -2004823653, now seen corresponding path program 16 times [2021-11-20 06:25:11,893 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:11,893 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995588699] [2021-11-20 06:25:11,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:11,894 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:11,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:11,934 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:11,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:11,984 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:11,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:11,985 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 10 times [2021-11-20 06:25:11,985 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:11,985 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712424972] [2021-11-20 06:25:11,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:11,985 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:11,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:11,989 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:11,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:11,992 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:11,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:11,993 INFO L85 PathProgramCache]: Analyzing trace with hash 113811419, now seen corresponding path program 17 times [2021-11-20 06:25:11,993 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:11,993 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200062193] [2021-11-20 06:25:11,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:11,993 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:12,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:12,257 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 92 proven. 106 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:12,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:12,258 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1200062193] [2021-11-20 06:25:12,258 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1200062193] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:12,258 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589604688] [2021-11-20 06:25:12,258 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:12,258 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:12,258 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:12,259 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:12,260 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-11-20 06:25:12,418 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2021-11-20 06:25:12,419 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:12,421 INFO L263 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 22 conjunts are in the unsatisfiable core [2021-11-20 06:25:12,423 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:12,933 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:12,933 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:13,133 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 117 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:13,133 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589604688] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:13,133 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:13,134 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 34 [2021-11-20 06:25:13,134 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305478391] [2021-11-20 06:25:13,134 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:13,186 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:13,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2021-11-20 06:25:13,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=899, Unknown=0, NotChecked=0, Total=1190 [2021-11-20 06:25:13,188 INFO L87 Difference]: Start difference. First operand 84 states and 96 transitions. cyclomatic complexity: 15 Second operand has 35 states, 34 states have (on average 2.5294117647058822) internal successors, (86), 35 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:13,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:13,695 INFO L93 Difference]: Finished difference Result 271 states and 314 transitions. [2021-11-20 06:25:13,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-11-20 06:25:13,707 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 271 states and 314 transitions. [2021-11-20 06:25:13,710 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:13,712 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 271 states to 158 states and 182 transitions. [2021-11-20 06:25:13,712 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 137 [2021-11-20 06:25:13,713 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 137 [2021-11-20 06:25:13,713 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 182 transitions. [2021-11-20 06:25:13,713 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:13,713 INFO L681 BuchiCegarLoop]: Abstraction has 158 states and 182 transitions. [2021-11-20 06:25:13,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 182 transitions. [2021-11-20 06:25:13,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 92. [2021-11-20 06:25:13,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.141304347826087) internal successors, (105), 91 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:13,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 105 transitions. [2021-11-20 06:25:13,718 INFO L704 BuchiCegarLoop]: Abstraction has 92 states and 105 transitions. [2021-11-20 06:25:13,719 INFO L587 BuchiCegarLoop]: Abstraction has 92 states and 105 transitions. [2021-11-20 06:25:13,719 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-11-20 06:25:13,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 105 transitions. [2021-11-20 06:25:13,720 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:13,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:13,720 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:13,721 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2021-11-20 06:25:13,721 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:13,721 INFO L791 eck$LassoCheckResult]: Stem: 4101#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 4102#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 4107#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4121#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4122#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4110#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4111#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4142#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4141#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4140#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4139#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4138#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4137#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4136#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4135#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4134#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4133#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4132#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4131#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4130#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4129#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4125#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4124#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 4112#L27-4 main_~i~0#1 := 0; 4113#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4187#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4152#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4150#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4151#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4155#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4185#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4182#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4180#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4179#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4176#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4174#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4173#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4170#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4168#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4167#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4164#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4162#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4161#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4160#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4159#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4158#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4118#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4115#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4120#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4147#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4146#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4127#L34 [2021-11-20 06:25:13,722 INFO L793 eck$LassoCheckResult]: Loop: 4127#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4128#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4126#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4127#L34 [2021-11-20 06:25:13,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:13,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1133441117, now seen corresponding path program 18 times [2021-11-20 06:25:13,722 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:13,723 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887729273] [2021-11-20 06:25:13,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:13,723 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:13,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:13,774 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:13,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:13,831 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:13,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:13,832 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 11 times [2021-11-20 06:25:13,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:13,833 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972415106] [2021-11-20 06:25:13,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:13,833 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:13,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:13,837 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:13,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:13,840 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:13,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:13,841 INFO L85 PathProgramCache]: Analyzing trace with hash -688524839, now seen corresponding path program 19 times [2021-11-20 06:25:13,841 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:13,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796155463] [2021-11-20 06:25:13,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:13,842 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:13,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:14,144 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 117 proven. 128 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:14,144 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:14,144 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796155463] [2021-11-20 06:25:14,144 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1796155463] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:14,144 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [887298325] [2021-11-20 06:25:14,144 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:14,144 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:14,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:14,148 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:14,164 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-11-20 06:25:14,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:14,219 INFO L263 TraceCheckSpWp]: Trace formula consists of 221 conjuncts, 24 conjunts are in the unsatisfiable core [2021-11-20 06:25:14,222 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:14,778 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 145 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:14,778 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:14,948 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 145 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:14,949 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [887298325] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:14,949 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:14,949 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 37 [2021-11-20 06:25:14,949 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336552086] [2021-11-20 06:25:14,950 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:14,997 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:14,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2021-11-20 06:25:14,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=341, Invalid=1065, Unknown=0, NotChecked=0, Total=1406 [2021-11-20 06:25:14,999 INFO L87 Difference]: Start difference. First operand 92 states and 105 transitions. cyclomatic complexity: 16 Second operand has 38 states, 37 states have (on average 2.5405405405405403) internal successors, (94), 38 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:15,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:15,554 INFO L93 Difference]: Finished difference Result 297 states and 344 transitions. [2021-11-20 06:25:15,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-11-20 06:25:15,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 297 states and 344 transitions. [2021-11-20 06:25:15,558 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:15,560 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 297 states to 172 states and 198 transitions. [2021-11-20 06:25:15,560 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 149 [2021-11-20 06:25:15,560 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 149 [2021-11-20 06:25:15,561 INFO L73 IsDeterministic]: Start isDeterministic. Operand 172 states and 198 transitions. [2021-11-20 06:25:15,561 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:15,561 INFO L681 BuchiCegarLoop]: Abstraction has 172 states and 198 transitions. [2021-11-20 06:25:15,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states and 198 transitions. [2021-11-20 06:25:15,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 100. [2021-11-20 06:25:15,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.14) internal successors, (114), 99 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:15,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 114 transitions. [2021-11-20 06:25:15,575 INFO L704 BuchiCegarLoop]: Abstraction has 100 states and 114 transitions. [2021-11-20 06:25:15,575 INFO L587 BuchiCegarLoop]: Abstraction has 100 states and 114 transitions. [2021-11-20 06:25:15,575 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-11-20 06:25:15,575 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 114 transitions. [2021-11-20 06:25:15,576 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:15,576 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:15,576 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:15,577 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 11, 10, 10, 1, 1, 1, 1] [2021-11-20 06:25:15,577 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:15,578 INFO L791 eck$LassoCheckResult]: Stem: 4879#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 4880#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 4885#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4900#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4901#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4888#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4889#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4923#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4922#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4921#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4920#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4919#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4918#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4917#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4914#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4913#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4912#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4909#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4908#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 4904#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4903#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 4890#L27-4 main_~i~0#1 := 0; 4891#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4931#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4933#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4937#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4936#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4970#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4964#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4958#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4952#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4946#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4941#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4940#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4939#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4897#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4884#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4894#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4928#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4927#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4906#L34 [2021-11-20 06:25:15,578 INFO L793 eck$LassoCheckResult]: Loop: 4906#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 4907#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4905#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 4906#L34 [2021-11-20 06:25:15,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:15,579 INFO L85 PathProgramCache]: Analyzing trace with hash 125280919, now seen corresponding path program 20 times [2021-11-20 06:25:15,579 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:15,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476735381] [2021-11-20 06:25:15,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:15,580 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:15,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:15,670 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:15,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:15,757 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:15,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:15,758 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 12 times [2021-11-20 06:25:15,758 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:15,758 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030681254] [2021-11-20 06:25:15,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:15,759 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:15,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:15,763 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:15,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:15,768 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:15,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:15,769 INFO L85 PathProgramCache]: Analyzing trace with hash -82682529, now seen corresponding path program 21 times [2021-11-20 06:25:15,770 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:15,770 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185057799] [2021-11-20 06:25:15,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:15,770 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:15,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:16,104 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 145 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:16,105 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:16,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185057799] [2021-11-20 06:25:16,105 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185057799] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:16,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1959553938] [2021-11-20 06:25:16,106 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:16,106 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:16,106 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:16,116 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:16,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-11-20 06:25:16,282 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2021-11-20 06:25:16,282 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:16,284 INFO L263 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 26 conjunts are in the unsatisfiable core [2021-11-20 06:25:16,286 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:16,845 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:16,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:17,041 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 176 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:17,041 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1959553938] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:17,041 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:17,041 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26] total 40 [2021-11-20 06:25:17,042 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679250304] [2021-11-20 06:25:17,042 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:17,082 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:17,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-11-20 06:25:17,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=395, Invalid=1245, Unknown=0, NotChecked=0, Total=1640 [2021-11-20 06:25:17,084 INFO L87 Difference]: Start difference. First operand 100 states and 114 transitions. cyclomatic complexity: 17 Second operand has 41 states, 40 states have (on average 2.55) internal successors, (102), 41 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:17,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:17,698 INFO L93 Difference]: Finished difference Result 323 states and 374 transitions. [2021-11-20 06:25:17,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-11-20 06:25:17,710 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 374 transitions. [2021-11-20 06:25:17,713 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:17,715 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 186 states and 214 transitions. [2021-11-20 06:25:17,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 161 [2021-11-20 06:25:17,715 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 161 [2021-11-20 06:25:17,715 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 214 transitions. [2021-11-20 06:25:17,716 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:17,716 INFO L681 BuchiCegarLoop]: Abstraction has 186 states and 214 transitions. [2021-11-20 06:25:17,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 214 transitions. [2021-11-20 06:25:17,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 108. [2021-11-20 06:25:17,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.1388888888888888) internal successors, (123), 107 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:17,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 123 transitions. [2021-11-20 06:25:17,720 INFO L704 BuchiCegarLoop]: Abstraction has 108 states and 123 transitions. [2021-11-20 06:25:17,720 INFO L587 BuchiCegarLoop]: Abstraction has 108 states and 123 transitions. [2021-11-20 06:25:17,720 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-11-20 06:25:17,720 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 123 transitions. [2021-11-20 06:25:17,721 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:17,721 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:17,722 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:17,723 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 12, 11, 11, 1, 1, 1, 1] [2021-11-20 06:25:17,723 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:17,723 INFO L791 eck$LassoCheckResult]: Stem: 5726#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 5727#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 5732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5746#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5747#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5735#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5736#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5771#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5770#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5769#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5768#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5767#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5766#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5765#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5759#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5757#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5756#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5755#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5754#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 5750#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5749#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 5737#L27-4 main_~i~0#1 := 0; 5738#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5829#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5781#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5779#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5780#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5784#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5828#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5825#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5823#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5822#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5819#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5817#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5816#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5813#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5811#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5810#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5807#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5805#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5804#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5801#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5799#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5798#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5795#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5793#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5792#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5790#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5788#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5787#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5731#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5740#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5776#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5775#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5752#L34 [2021-11-20 06:25:17,723 INFO L793 eck$LassoCheckResult]: Loop: 5752#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 5753#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 5751#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 5752#L34 [2021-11-20 06:25:17,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:17,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1940425887, now seen corresponding path program 22 times [2021-11-20 06:25:17,724 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:17,725 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263966829] [2021-11-20 06:25:17,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:17,725 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:17,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:17,783 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:17,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:17,850 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:17,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:17,851 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 13 times [2021-11-20 06:25:17,851 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:17,851 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445451511] [2021-11-20 06:25:17,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:17,851 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:17,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:17,855 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:17,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:17,858 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:17,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:17,859 INFO L85 PathProgramCache]: Analyzing trace with hash -1262722987, now seen corresponding path program 23 times [2021-11-20 06:25:17,859 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:17,859 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496662850] [2021-11-20 06:25:17,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:17,860 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:17,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:18,290 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 176 proven. 178 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:18,290 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:18,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496662850] [2021-11-20 06:25:18,291 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [496662850] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:18,291 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [362762376] [2021-11-20 06:25:18,291 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:18,291 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:18,291 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:18,299 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:18,300 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-11-20 06:25:18,612 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2021-11-20 06:25:18,612 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:18,616 INFO L263 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 28 conjunts are in the unsatisfiable core [2021-11-20 06:25:18,618 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:19,290 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 210 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:19,291 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:19,508 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 210 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:19,508 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [362762376] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:19,508 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:19,508 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28] total 43 [2021-11-20 06:25:19,508 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151057511] [2021-11-20 06:25:19,508 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:19,562 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:19,563 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-11-20 06:25:19,564 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=453, Invalid=1439, Unknown=0, NotChecked=0, Total=1892 [2021-11-20 06:25:19,564 INFO L87 Difference]: Start difference. First operand 108 states and 123 transitions. cyclomatic complexity: 18 Second operand has 44 states, 43 states have (on average 2.558139534883721) internal successors, (110), 44 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:20,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:20,232 INFO L93 Difference]: Finished difference Result 349 states and 404 transitions. [2021-11-20 06:25:20,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-11-20 06:25:20,234 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 349 states and 404 transitions. [2021-11-20 06:25:20,237 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:20,240 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 349 states to 200 states and 230 transitions. [2021-11-20 06:25:20,240 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 173 [2021-11-20 06:25:20,240 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 173 [2021-11-20 06:25:20,241 INFO L73 IsDeterministic]: Start isDeterministic. Operand 200 states and 230 transitions. [2021-11-20 06:25:20,241 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:20,241 INFO L681 BuchiCegarLoop]: Abstraction has 200 states and 230 transitions. [2021-11-20 06:25:20,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states and 230 transitions. [2021-11-20 06:25:20,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 116. [2021-11-20 06:25:20,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.1379310344827587) internal successors, (132), 115 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:20,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 132 transitions. [2021-11-20 06:25:20,246 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 132 transitions. [2021-11-20 06:25:20,246 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 132 transitions. [2021-11-20 06:25:20,246 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-11-20 06:25:20,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 132 transitions. [2021-11-20 06:25:20,247 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:20,248 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:20,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:20,249 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 13, 12, 12, 1, 1, 1, 1] [2021-11-20 06:25:20,249 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:20,249 INFO L791 eck$LassoCheckResult]: Stem: 6642#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 6643#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 6648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6664#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6652#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6690#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6689#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6688#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6687#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6686#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6685#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6684#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6683#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6682#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6681#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6680#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6679#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6678#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6677#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6676#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6675#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6674#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6673#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6672#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6671#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 6667#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6666#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 6653#L27-4 main_~i~0#1 := 0; 6654#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6699#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6703#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6752#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6749#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6747#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6746#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6741#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6740#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6737#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6735#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6734#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6731#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6729#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6728#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6725#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6723#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6722#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6711#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6708#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6707#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6706#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6660#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6647#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6657#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6662#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6695#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6669#L34 [2021-11-20 06:25:20,249 INFO L793 eck$LassoCheckResult]: Loop: 6669#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 6670#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6668#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 6669#L34 [2021-11-20 06:25:20,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:20,250 INFO L85 PathProgramCache]: Analyzing trace with hash -1264665709, now seen corresponding path program 24 times [2021-11-20 06:25:20,250 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:20,251 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420646444] [2021-11-20 06:25:20,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:20,251 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:20,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:20,320 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:20,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:20,392 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:20,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:20,393 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 14 times [2021-11-20 06:25:20,393 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:20,393 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883134042] [2021-11-20 06:25:20,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:20,393 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:20,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:20,398 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:20,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:20,401 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:20,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:20,402 INFO L85 PathProgramCache]: Analyzing trace with hash -202976541, now seen corresponding path program 25 times [2021-11-20 06:25:20,402 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:20,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043068716] [2021-11-20 06:25:20,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:20,402 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:20,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:20,798 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 210 proven. 206 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:20,798 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:20,798 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043068716] [2021-11-20 06:25:20,798 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2043068716] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:20,798 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [282088098] [2021-11-20 06:25:20,799 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:20,799 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:20,799 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:20,800 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:20,801 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-11-20 06:25:20,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:20,869 INFO L263 TraceCheckSpWp]: Trace formula consists of 275 conjuncts, 30 conjunts are in the unsatisfiable core [2021-11-20 06:25:20,872 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:21,485 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 247 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:21,485 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:21,707 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 247 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:21,707 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [282088098] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:21,707 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:21,708 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30] total 46 [2021-11-20 06:25:21,708 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472047318] [2021-11-20 06:25:21,708 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:21,749 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:21,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-11-20 06:25:21,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=515, Invalid=1647, Unknown=0, NotChecked=0, Total=2162 [2021-11-20 06:25:21,751 INFO L87 Difference]: Start difference. First operand 116 states and 132 transitions. cyclomatic complexity: 19 Second operand has 47 states, 46 states have (on average 2.5652173913043477) internal successors, (118), 47 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:22,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:22,413 INFO L93 Difference]: Finished difference Result 375 states and 434 transitions. [2021-11-20 06:25:22,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2021-11-20 06:25:22,414 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 375 states and 434 transitions. [2021-11-20 06:25:22,416 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:22,419 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 375 states to 214 states and 246 transitions. [2021-11-20 06:25:22,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 185 [2021-11-20 06:25:22,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 185 [2021-11-20 06:25:22,419 INFO L73 IsDeterministic]: Start isDeterministic. Operand 214 states and 246 transitions. [2021-11-20 06:25:22,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:22,420 INFO L681 BuchiCegarLoop]: Abstraction has 214 states and 246 transitions. [2021-11-20 06:25:22,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states and 246 transitions. [2021-11-20 06:25:22,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 124. [2021-11-20 06:25:22,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 124 states have (on average 1.1370967741935485) internal successors, (141), 123 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:22,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 141 transitions. [2021-11-20 06:25:22,424 INFO L704 BuchiCegarLoop]: Abstraction has 124 states and 141 transitions. [2021-11-20 06:25:22,424 INFO L587 BuchiCegarLoop]: Abstraction has 124 states and 141 transitions. [2021-11-20 06:25:22,424 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-11-20 06:25:22,425 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 124 states and 141 transitions. [2021-11-20 06:25:22,426 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:22,426 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:22,426 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:22,427 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [14, 14, 14, 13, 13, 1, 1, 1, 1] [2021-11-20 06:25:22,427 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:22,427 INFO L791 eck$LassoCheckResult]: Stem: 7627#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 7628#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 7633#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7636#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7637#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7676#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7675#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7674#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7673#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7672#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7671#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7670#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7669#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7668#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7667#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7666#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7665#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7664#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7663#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7662#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7661#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7660#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7659#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7658#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7657#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7656#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7655#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7650#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 7638#L27-4 main_~i~0#1 := 0; 7639#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7745#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7686#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7684#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7685#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7743#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7740#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7738#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7737#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7734#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7732#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7731#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7728#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7726#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7725#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7722#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7720#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7719#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7716#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7714#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7713#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7708#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7707#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7702#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7701#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7698#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7696#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7695#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7694#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7693#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7692#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7644#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7632#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7641#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7646#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7681#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7680#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7653#L34 [2021-11-20 06:25:22,428 INFO L793 eck$LassoCheckResult]: Loop: 7653#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 7654#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 7652#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 7653#L34 [2021-11-20 06:25:22,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:22,428 INFO L85 PathProgramCache]: Analyzing trace with hash 1142017637, now seen corresponding path program 26 times [2021-11-20 06:25:22,429 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:22,429 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494454314] [2021-11-20 06:25:22,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:22,429 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:22,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:22,513 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:22,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:22,603 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:22,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:22,604 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 15 times [2021-11-20 06:25:22,604 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:22,604 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662805679] [2021-11-20 06:25:22,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:22,605 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:22,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:22,608 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:22,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:22,611 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:22,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:22,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1411512017, now seen corresponding path program 27 times [2021-11-20 06:25:22,612 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:22,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626475914] [2021-11-20 06:25:22,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:22,612 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:22,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:23,070 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 247 proven. 236 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:23,070 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:23,070 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626475914] [2021-11-20 06:25:23,070 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [626475914] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:23,070 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [572923895] [2021-11-20 06:25:23,070 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:23,071 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:23,071 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:23,072 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:23,073 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-11-20 06:25:23,352 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2021-11-20 06:25:23,353 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:23,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 32 conjunts are in the unsatisfiable core [2021-11-20 06:25:23,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:24,047 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 287 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:24,047 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:24,344 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 287 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:24,344 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [572923895] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:24,344 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:24,345 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32] total 49 [2021-11-20 06:25:24,345 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731373269] [2021-11-20 06:25:24,345 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:24,393 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:24,394 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2021-11-20 06:25:24,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=581, Invalid=1869, Unknown=0, NotChecked=0, Total=2450 [2021-11-20 06:25:24,396 INFO L87 Difference]: Start difference. First operand 124 states and 141 transitions. cyclomatic complexity: 20 Second operand has 50 states, 49 states have (on average 2.5714285714285716) internal successors, (126), 50 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:25,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:25,135 INFO L93 Difference]: Finished difference Result 401 states and 464 transitions. [2021-11-20 06:25:25,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-11-20 06:25:25,136 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 401 states and 464 transitions. [2021-11-20 06:25:25,152 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:25,155 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 401 states to 228 states and 262 transitions. [2021-11-20 06:25:25,156 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 197 [2021-11-20 06:25:25,156 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 197 [2021-11-20 06:25:25,156 INFO L73 IsDeterministic]: Start isDeterministic. Operand 228 states and 262 transitions. [2021-11-20 06:25:25,157 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:25,157 INFO L681 BuchiCegarLoop]: Abstraction has 228 states and 262 transitions. [2021-11-20 06:25:25,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states and 262 transitions. [2021-11-20 06:25:25,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 132. [2021-11-20 06:25:25,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.1363636363636365) internal successors, (150), 131 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:25,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 150 transitions. [2021-11-20 06:25:25,162 INFO L704 BuchiCegarLoop]: Abstraction has 132 states and 150 transitions. [2021-11-20 06:25:25,162 INFO L587 BuchiCegarLoop]: Abstraction has 132 states and 150 transitions. [2021-11-20 06:25:25,162 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-11-20 06:25:25,162 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 150 transitions. [2021-11-20 06:25:25,163 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:25,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:25,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:25,165 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [15, 15, 15, 14, 14, 1, 1, 1, 1] [2021-11-20 06:25:25,165 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:25,165 INFO L791 eck$LassoCheckResult]: Stem: 8681#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 8682#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 8687#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8702#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8703#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8690#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8691#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8733#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8731#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8730#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8725#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8724#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8723#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8722#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8721#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8720#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8719#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8718#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8717#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8716#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8715#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8714#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8713#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8712#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8711#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8710#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 8706#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 8705#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 8692#L27-4 main_~i~0#1 := 0; 8693#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8741#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8743#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8747#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8746#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8807#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8804#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8802#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8801#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8798#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8796#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8795#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8792#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8790#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8789#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8786#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8784#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8783#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8780#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8778#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8777#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8774#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8772#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8771#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8768#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8766#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8765#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8762#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8760#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8759#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8756#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8753#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8751#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8750#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8749#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8699#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8686#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8696#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8701#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8738#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8737#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8708#L34 [2021-11-20 06:25:25,165 INFO L793 eck$LassoCheckResult]: Loop: 8708#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 8709#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 8707#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 8708#L34 [2021-11-20 06:25:25,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:25,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1133388657, now seen corresponding path program 28 times [2021-11-20 06:25:25,166 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:25,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003899126] [2021-11-20 06:25:25,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:25,167 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:25,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:25,249 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:25,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:25,338 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:25,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:25,339 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 16 times [2021-11-20 06:25:25,339 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:25,339 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115160072] [2021-11-20 06:25:25,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:25,339 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:25,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:25,343 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:25,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:25,346 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:25,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:25,346 INFO L85 PathProgramCache]: Analyzing trace with hash -2043527065, now seen corresponding path program 29 times [2021-11-20 06:25:25,347 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:25,347 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694410802] [2021-11-20 06:25:25,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:25,347 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:25,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:25,887 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 287 proven. 268 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:25,887 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:25,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694410802] [2021-11-20 06:25:25,888 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [694410802] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:25,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1415377846] [2021-11-20 06:25:25,888 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:25,888 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:25,888 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:25,894 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:25,914 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2021-11-20 06:25:26,456 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2021-11-20 06:25:26,456 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:26,460 INFO L263 TraceCheckSpWp]: Trace formula consists of 311 conjuncts, 34 conjunts are in the unsatisfiable core [2021-11-20 06:25:26,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:27,394 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 330 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:27,394 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:27,658 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 330 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:27,658 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1415377846] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:27,658 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:27,658 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34] total 52 [2021-11-20 06:25:27,659 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144145412] [2021-11-20 06:25:27,659 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:27,711 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:27,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2021-11-20 06:25:27,713 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=651, Invalid=2105, Unknown=0, NotChecked=0, Total=2756 [2021-11-20 06:25:27,714 INFO L87 Difference]: Start difference. First operand 132 states and 150 transitions. cyclomatic complexity: 21 Second operand has 53 states, 52 states have (on average 2.576923076923077) internal successors, (134), 53 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:28,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:28,495 INFO L93 Difference]: Finished difference Result 427 states and 494 transitions. [2021-11-20 06:25:28,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2021-11-20 06:25:28,495 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 494 transitions. [2021-11-20 06:25:28,499 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:28,501 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 242 states and 278 transitions. [2021-11-20 06:25:28,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 209 [2021-11-20 06:25:28,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 209 [2021-11-20 06:25:28,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 242 states and 278 transitions. [2021-11-20 06:25:28,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:28,503 INFO L681 BuchiCegarLoop]: Abstraction has 242 states and 278 transitions. [2021-11-20 06:25:28,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states and 278 transitions. [2021-11-20 06:25:28,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 140. [2021-11-20 06:25:28,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 140 states have (on average 1.1357142857142857) internal successors, (159), 139 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:28,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 159 transitions. [2021-11-20 06:25:28,508 INFO L704 BuchiCegarLoop]: Abstraction has 140 states and 159 transitions. [2021-11-20 06:25:28,508 INFO L587 BuchiCegarLoop]: Abstraction has 140 states and 159 transitions. [2021-11-20 06:25:28,508 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-11-20 06:25:28,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 140 states and 159 transitions. [2021-11-20 06:25:28,509 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:28,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:28,510 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:28,510 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [16, 16, 16, 15, 15, 1, 1, 1, 1] [2021-11-20 06:25:28,511 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:28,511 INFO L791 eck$LassoCheckResult]: Stem: 9804#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 9805#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 9810#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9824#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9825#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9813#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9814#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9857#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9856#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9855#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9854#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9853#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9852#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9851#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9850#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9849#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9848#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9847#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9846#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9845#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9844#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9843#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9842#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9841#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9840#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9839#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9838#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9837#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9836#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9835#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9834#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9833#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9832#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 9828#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9827#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 9815#L27-4 main_~i~0#1 := 0; 9816#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9939#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9867#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9865#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9866#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9870#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9938#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9935#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9933#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9932#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9929#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9927#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9926#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9923#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9921#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9920#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9917#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9915#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9914#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9909#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9908#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9905#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9903#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9902#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9897#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9896#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9893#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9891#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9890#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9887#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9885#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9884#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9881#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9879#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9878#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9876#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9874#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9873#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9821#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9809#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9818#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9823#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9862#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9861#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9830#L34 [2021-11-20 06:25:28,511 INFO L793 eck$LassoCheckResult]: Loop: 9830#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 9831#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 9829#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 9830#L34 [2021-11-20 06:25:28,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:28,512 INFO L85 PathProgramCache]: Analyzing trace with hash 21119337, now seen corresponding path program 30 times [2021-11-20 06:25:28,512 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:28,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272245568] [2021-11-20 06:25:28,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:28,512 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:28,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:28,593 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:28,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:28,711 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:28,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:28,712 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 17 times [2021-11-20 06:25:28,712 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:28,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6854669] [2021-11-20 06:25:28,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:28,713 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:28,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:28,716 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:28,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:28,718 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:28,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:28,719 INFO L85 PathProgramCache]: Analyzing trace with hash 2100983117, now seen corresponding path program 31 times [2021-11-20 06:25:28,719 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:28,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475243350] [2021-11-20 06:25:28,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:28,720 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:28,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:29,316 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 330 proven. 302 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:29,316 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:29,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475243350] [2021-11-20 06:25:29,317 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475243350] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:29,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623378257] [2021-11-20 06:25:29,317 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:29,317 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:29,317 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:29,319 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:29,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2021-11-20 06:25:29,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:29,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 329 conjuncts, 36 conjunts are in the unsatisfiable core [2021-11-20 06:25:29,410 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:30,415 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 376 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:30,415 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:30,663 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 376 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:30,664 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1623378257] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:30,664 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:30,665 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36] total 55 [2021-11-20 06:25:30,665 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1538504865] [2021-11-20 06:25:30,665 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:30,722 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:30,723 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2021-11-20 06:25:30,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=725, Invalid=2355, Unknown=0, NotChecked=0, Total=3080 [2021-11-20 06:25:30,724 INFO L87 Difference]: Start difference. First operand 140 states and 159 transitions. cyclomatic complexity: 22 Second operand has 56 states, 55 states have (on average 2.581818181818182) internal successors, (142), 56 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:31,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:31,561 INFO L93 Difference]: Finished difference Result 453 states and 524 transitions. [2021-11-20 06:25:31,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-11-20 06:25:31,562 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 453 states and 524 transitions. [2021-11-20 06:25:31,565 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:31,568 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 453 states to 256 states and 294 transitions. [2021-11-20 06:25:31,568 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 221 [2021-11-20 06:25:31,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 221 [2021-11-20 06:25:31,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 256 states and 294 transitions. [2021-11-20 06:25:31,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:31,570 INFO L681 BuchiCegarLoop]: Abstraction has 256 states and 294 transitions. [2021-11-20 06:25:31,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states and 294 transitions. [2021-11-20 06:25:31,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 148. [2021-11-20 06:25:31,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 148 states have (on average 1.135135135135135) internal successors, (168), 147 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:31,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 168 transitions. [2021-11-20 06:25:31,574 INFO L704 BuchiCegarLoop]: Abstraction has 148 states and 168 transitions. [2021-11-20 06:25:31,574 INFO L587 BuchiCegarLoop]: Abstraction has 148 states and 168 transitions. [2021-11-20 06:25:31,574 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-11-20 06:25:31,575 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 148 states and 168 transitions. [2021-11-20 06:25:31,576 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:31,576 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:31,576 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:31,577 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [17, 17, 17, 16, 16, 1, 1, 1, 1] [2021-11-20 06:25:31,577 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:31,578 INFO L791 eck$LassoCheckResult]: Stem: 10996#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 10997#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 11002#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11017#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11018#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11005#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11006#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11044#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11043#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11042#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11041#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11040#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11039#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11038#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11037#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11036#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11035#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11034#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11033#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11032#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11031#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11030#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11029#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11028#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11027#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11026#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11025#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 11021#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 11020#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 11007#L27-4 main_~i~0#1 := 0; 11008#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11060#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11061#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11062#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11066#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11065#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11138#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11135#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11133#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11132#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11129#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11127#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11126#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11123#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11121#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11120#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11117#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11115#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11114#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11111#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11109#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11108#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11105#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11103#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11102#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11099#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11097#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11096#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11093#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11091#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11090#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11087#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11085#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11084#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11081#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11079#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11078#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11075#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11073#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11072#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11070#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11069#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11068#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11014#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11001#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11011#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11016#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11057#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11056#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11023#L34 [2021-11-20 06:25:31,578 INFO L793 eck$LassoCheckResult]: Loop: 11023#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 11024#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 11022#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 11023#L34 [2021-11-20 06:25:31,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:31,578 INFO L85 PathProgramCache]: Analyzing trace with hash 611108235, now seen corresponding path program 32 times [2021-11-20 06:25:31,579 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:31,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576109646] [2021-11-20 06:25:31,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:31,579 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:31,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:31,689 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:31,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:31,793 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:31,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:31,794 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 18 times [2021-11-20 06:25:31,794 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:31,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065985280] [2021-11-20 06:25:31,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:31,795 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:31,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:31,798 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:31,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:31,801 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:31,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:31,802 INFO L85 PathProgramCache]: Analyzing trace with hash -840899093, now seen corresponding path program 33 times [2021-11-20 06:25:31,802 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:31,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1053761583] [2021-11-20 06:25:31,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:31,803 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:31,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:32,455 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 376 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:32,455 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:32,455 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1053761583] [2021-11-20 06:25:32,456 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1053761583] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:32,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [632016941] [2021-11-20 06:25:32,456 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:32,456 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:32,456 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:32,462 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:32,483 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2021-11-20 06:25:33,297 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2021-11-20 06:25:33,297 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:33,302 INFO L263 TraceCheckSpWp]: Trace formula consists of 347 conjuncts, 38 conjunts are in the unsatisfiable core [2021-11-20 06:25:33,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:34,391 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 425 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:34,391 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:34,672 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 425 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:34,672 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [632016941] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:34,672 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:34,673 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38] total 58 [2021-11-20 06:25:34,673 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242458292] [2021-11-20 06:25:34,673 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:34,725 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:34,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2021-11-20 06:25:34,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=803, Invalid=2619, Unknown=0, NotChecked=0, Total=3422 [2021-11-20 06:25:34,727 INFO L87 Difference]: Start difference. First operand 148 states and 168 transitions. cyclomatic complexity: 23 Second operand has 59 states, 58 states have (on average 2.586206896551724) internal successors, (150), 59 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:35,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:35,738 INFO L93 Difference]: Finished difference Result 479 states and 554 transitions. [2021-11-20 06:25:35,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2021-11-20 06:25:35,739 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 479 states and 554 transitions. [2021-11-20 06:25:35,743 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:35,745 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 479 states to 270 states and 310 transitions. [2021-11-20 06:25:35,745 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 233 [2021-11-20 06:25:35,746 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 233 [2021-11-20 06:25:35,746 INFO L73 IsDeterministic]: Start isDeterministic. Operand 270 states and 310 transitions. [2021-11-20 06:25:35,746 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:35,746 INFO L681 BuchiCegarLoop]: Abstraction has 270 states and 310 transitions. [2021-11-20 06:25:35,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states and 310 transitions. [2021-11-20 06:25:35,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 156. [2021-11-20 06:25:35,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 156 states have (on average 1.1346153846153846) internal successors, (177), 155 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:35,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 177 transitions. [2021-11-20 06:25:35,751 INFO L704 BuchiCegarLoop]: Abstraction has 156 states and 177 transitions. [2021-11-20 06:25:35,751 INFO L587 BuchiCegarLoop]: Abstraction has 156 states and 177 transitions. [2021-11-20 06:25:35,751 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-11-20 06:25:35,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 156 states and 177 transitions. [2021-11-20 06:25:35,752 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:35,752 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:35,753 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:35,753 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [18, 18, 18, 17, 17, 1, 1, 1, 1] [2021-11-20 06:25:35,754 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:35,754 INFO L791 eck$LassoCheckResult]: Stem: 12257#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 12258#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 12263#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12277#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12278#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12266#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12267#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12314#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12313#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12312#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12311#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12310#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12309#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12308#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12307#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12306#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12305#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12304#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12303#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12302#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12301#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12300#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12299#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12298#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12297#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12296#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12295#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12294#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12293#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12292#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12291#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12290#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12289#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12288#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12287#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12286#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12285#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 12281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 12280#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 12268#L27-4 main_~i~0#1 := 0; 12269#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12324#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12322#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12323#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12327#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12405#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12402#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12400#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12399#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12396#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12394#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12393#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12390#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12388#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12387#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12384#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12382#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12381#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12378#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12376#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12375#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12372#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12370#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12369#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12366#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12364#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12363#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12360#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12358#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12357#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12354#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12352#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12351#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12348#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12346#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12345#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12342#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12340#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12339#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12336#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12334#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12333#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12332#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12331#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12330#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12274#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12262#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12271#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12276#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12319#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12318#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12283#L34 [2021-11-20 06:25:35,754 INFO L793 eck$LassoCheckResult]: Loop: 12283#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 12284#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 12282#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 12283#L34 [2021-11-20 06:25:35,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:35,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1016263571, now seen corresponding path program 34 times [2021-11-20 06:25:35,755 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:35,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044974997] [2021-11-20 06:25:35,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:35,756 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:35,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:35,880 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:36,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:36,012 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:36,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:36,013 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 19 times [2021-11-20 06:25:36,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:36,013 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140322672] [2021-11-20 06:25:36,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:36,013 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:36,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:36,017 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:36,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:36,019 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:36,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:36,020 INFO L85 PathProgramCache]: Analyzing trace with hash -283534391, now seen corresponding path program 35 times [2021-11-20 06:25:36,020 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:36,021 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291110130] [2021-11-20 06:25:36,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:36,021 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:36,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:36,791 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 425 proven. 376 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:36,791 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:36,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291110130] [2021-11-20 06:25:36,792 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1291110130] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:36,792 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1632427371] [2021-11-20 06:25:36,792 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:36,792 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:36,792 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:36,798 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:36,818 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2021-11-20 06:25:37,904 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2021-11-20 06:25:37,904 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:37,910 INFO L263 TraceCheckSpWp]: Trace formula consists of 365 conjuncts, 40 conjunts are in the unsatisfiable core [2021-11-20 06:25:37,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:38,974 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 477 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:38,974 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:39,260 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 477 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:39,260 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1632427371] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:39,260 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:39,261 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40] total 61 [2021-11-20 06:25:39,261 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531570589] [2021-11-20 06:25:39,261 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:39,302 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:39,303 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2021-11-20 06:25:39,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=885, Invalid=2897, Unknown=0, NotChecked=0, Total=3782 [2021-11-20 06:25:39,304 INFO L87 Difference]: Start difference. First operand 156 states and 177 transitions. cyclomatic complexity: 24 Second operand has 62 states, 61 states have (on average 2.5901639344262297) internal successors, (158), 62 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:40,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:40,237 INFO L93 Difference]: Finished difference Result 505 states and 584 transitions. [2021-11-20 06:25:40,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2021-11-20 06:25:40,238 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 584 transitions. [2021-11-20 06:25:40,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:40,245 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 284 states and 326 transitions. [2021-11-20 06:25:40,245 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 245 [2021-11-20 06:25:40,245 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 245 [2021-11-20 06:25:40,246 INFO L73 IsDeterministic]: Start isDeterministic. Operand 284 states and 326 transitions. [2021-11-20 06:25:40,246 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:40,246 INFO L681 BuchiCegarLoop]: Abstraction has 284 states and 326 transitions. [2021-11-20 06:25:40,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states and 326 transitions. [2021-11-20 06:25:40,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 164. [2021-11-20 06:25:40,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 164 states, 164 states have (on average 1.1341463414634145) internal successors, (186), 163 states have internal predecessors, (186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:40,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 186 transitions. [2021-11-20 06:25:40,251 INFO L704 BuchiCegarLoop]: Abstraction has 164 states and 186 transitions. [2021-11-20 06:25:40,252 INFO L587 BuchiCegarLoop]: Abstraction has 164 states and 186 transitions. [2021-11-20 06:25:40,252 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-11-20 06:25:40,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 164 states and 186 transitions. [2021-11-20 06:25:40,253 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:40,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:40,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:40,254 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [19, 19, 19, 18, 18, 1, 1, 1, 1] [2021-11-20 06:25:40,255 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:40,255 INFO L791 eck$LassoCheckResult]: Stem: 13587#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 13588#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 13593#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13608#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13609#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13596#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13597#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13646#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13645#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13644#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13643#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13642#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13641#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13640#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13639#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13638#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13637#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13636#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13635#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13634#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13633#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13632#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13631#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13630#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13629#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13628#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13627#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13626#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13625#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13624#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13623#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13622#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13621#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13620#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13619#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13618#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13617#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13616#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 13612#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 13611#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 13598#L27-4 main_~i~0#1 := 0; 13599#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13655#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13656#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13657#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13661#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13660#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13745#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13742#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13740#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13739#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13736#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13734#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13733#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13730#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13728#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13727#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13724#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13722#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13721#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13718#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13716#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13715#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13712#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13710#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13709#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13706#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13704#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13703#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13700#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13698#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13697#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13694#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13692#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13691#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13688#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13686#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13685#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13682#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13680#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13679#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13676#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13674#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13673#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13670#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13668#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13667#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13665#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13664#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13663#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13592#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13607#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13652#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13651#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13614#L34 [2021-11-20 06:25:40,255 INFO L793 eck$LassoCheckResult]: Loop: 13614#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 13615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 13613#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 13614#L34 [2021-11-20 06:25:40,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:40,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1191917191, now seen corresponding path program 36 times [2021-11-20 06:25:40,256 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:40,256 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087053724] [2021-11-20 06:25:40,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:40,257 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:40,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:40,420 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:40,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:40,533 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:40,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:40,533 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 20 times [2021-11-20 06:25:40,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:40,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701424055] [2021-11-20 06:25:40,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:40,534 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:40,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:40,537 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:40,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:40,540 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:40,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:40,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1910440815, now seen corresponding path program 37 times [2021-11-20 06:25:40,540 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:40,541 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970950533] [2021-11-20 06:25:40,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:40,541 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:40,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:41,183 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 477 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:41,183 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:41,184 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970950533] [2021-11-20 06:25:41,184 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [970950533] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:41,184 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1156784024] [2021-11-20 06:25:41,184 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:41,184 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:41,184 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:41,186 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:41,187 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-11-20 06:25:41,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:41,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 383 conjuncts, 42 conjunts are in the unsatisfiable core [2021-11-20 06:25:41,271 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:42,328 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 532 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:42,328 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:42,605 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 532 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:42,605 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1156784024] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:42,606 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:42,606 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42] total 64 [2021-11-20 06:25:42,606 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459520396] [2021-11-20 06:25:42,606 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:42,647 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:42,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2021-11-20 06:25:42,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=971, Invalid=3189, Unknown=0, NotChecked=0, Total=4160 [2021-11-20 06:25:42,649 INFO L87 Difference]: Start difference. First operand 164 states and 186 transitions. cyclomatic complexity: 25 Second operand has 65 states, 64 states have (on average 2.59375) internal successors, (166), 65 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:43,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:43,639 INFO L93 Difference]: Finished difference Result 531 states and 614 transitions. [2021-11-20 06:25:43,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2021-11-20 06:25:43,641 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 531 states and 614 transitions. [2021-11-20 06:25:43,646 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:43,649 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 531 states to 298 states and 342 transitions. [2021-11-20 06:25:43,649 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 257 [2021-11-20 06:25:43,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 257 [2021-11-20 06:25:43,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 298 states and 342 transitions. [2021-11-20 06:25:43,650 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:43,650 INFO L681 BuchiCegarLoop]: Abstraction has 298 states and 342 transitions. [2021-11-20 06:25:43,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states and 342 transitions. [2021-11-20 06:25:43,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 172. [2021-11-20 06:25:43,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.1337209302325582) internal successors, (195), 171 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:43,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 195 transitions. [2021-11-20 06:25:43,655 INFO L704 BuchiCegarLoop]: Abstraction has 172 states and 195 transitions. [2021-11-20 06:25:43,656 INFO L587 BuchiCegarLoop]: Abstraction has 172 states and 195 transitions. [2021-11-20 06:25:43,656 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-11-20 06:25:43,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 195 transitions. [2021-11-20 06:25:43,657 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:43,657 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:43,657 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:43,659 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [20, 20, 20, 19, 19, 1, 1, 1, 1] [2021-11-20 06:25:43,659 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:43,659 INFO L791 eck$LassoCheckResult]: Stem: 14986#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 14987#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 14992#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15006#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15007#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 14995#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14996#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15047#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15046#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15045#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15044#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15043#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15042#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15041#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15040#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15039#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15038#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15037#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15036#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15035#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15034#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15033#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15032#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15031#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15030#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15029#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15028#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15027#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15026#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15025#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15024#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15023#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15022#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15021#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15020#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15019#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15018#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15017#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15016#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15015#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15014#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 15010#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 15009#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 14997#L27-4 main_~i~0#1 := 0; 14998#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15153#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15057#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15055#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15056#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15060#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15152#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15149#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15147#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15146#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15143#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15141#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15140#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15137#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15135#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15134#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15131#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15129#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15128#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15125#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15123#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15122#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15119#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15117#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15116#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15113#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15111#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15110#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15107#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15105#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15104#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15101#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15099#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15098#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15095#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15093#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15092#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15089#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15087#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15086#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15083#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15081#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15080#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15077#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15075#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15074#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15071#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15069#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15068#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15066#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15064#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15063#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15003#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 14991#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15000#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15005#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15052#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15051#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15012#L34 [2021-11-20 06:25:43,659 INFO L793 eck$LassoCheckResult]: Loop: 15012#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 15013#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 15011#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 15012#L34 [2021-11-20 06:25:43,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:43,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1997959025, now seen corresponding path program 38 times [2021-11-20 06:25:43,660 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:43,660 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940879032] [2021-11-20 06:25:43,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:43,661 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:43,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:43,805 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:44,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:44,043 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:44,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:44,044 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 21 times [2021-11-20 06:25:44,044 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:44,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145535746] [2021-11-20 06:25:44,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:44,045 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:44,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:44,048 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:44,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:44,051 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:44,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:44,052 INFO L85 PathProgramCache]: Analyzing trace with hash 1540565573, now seen corresponding path program 39 times [2021-11-20 06:25:44,052 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:44,052 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4905254] [2021-11-20 06:25:44,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:44,052 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:44,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:44,793 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 532 proven. 458 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:44,793 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:44,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4905254] [2021-11-20 06:25:44,793 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [4905254] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:44,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1155517475] [2021-11-20 06:25:44,793 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:44,793 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:44,793 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:44,795 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:44,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2021-11-20 06:25:45,905 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2021-11-20 06:25:45,905 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:45,911 INFO L263 TraceCheckSpWp]: Trace formula consists of 401 conjuncts, 44 conjunts are in the unsatisfiable core [2021-11-20 06:25:45,914 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:46,998 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 590 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:46,998 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:47,323 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 590 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:47,323 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1155517475] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:47,323 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:47,324 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44] total 67 [2021-11-20 06:25:47,324 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [407613902] [2021-11-20 06:25:47,324 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:47,388 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:47,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2021-11-20 06:25:47,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1061, Invalid=3495, Unknown=0, NotChecked=0, Total=4556 [2021-11-20 06:25:47,391 INFO L87 Difference]: Start difference. First operand 172 states and 195 transitions. cyclomatic complexity: 26 Second operand has 68 states, 67 states have (on average 2.5970149253731343) internal successors, (174), 68 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:48,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:48,584 INFO L93 Difference]: Finished difference Result 557 states and 644 transitions. [2021-11-20 06:25:48,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-11-20 06:25:48,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 557 states and 644 transitions. [2021-11-20 06:25:48,591 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:48,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 557 states to 312 states and 358 transitions. [2021-11-20 06:25:48,594 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 269 [2021-11-20 06:25:48,595 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 269 [2021-11-20 06:25:48,595 INFO L73 IsDeterministic]: Start isDeterministic. Operand 312 states and 358 transitions. [2021-11-20 06:25:48,596 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:48,596 INFO L681 BuchiCegarLoop]: Abstraction has 312 states and 358 transitions. [2021-11-20 06:25:48,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states and 358 transitions. [2021-11-20 06:25:48,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 180. [2021-11-20 06:25:48,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.1333333333333333) internal successors, (204), 179 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:48,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 204 transitions. [2021-11-20 06:25:48,603 INFO L704 BuchiCegarLoop]: Abstraction has 180 states and 204 transitions. [2021-11-20 06:25:48,603 INFO L587 BuchiCegarLoop]: Abstraction has 180 states and 204 transitions. [2021-11-20 06:25:48,603 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-11-20 06:25:48,603 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 204 transitions. [2021-11-20 06:25:48,605 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:48,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:48,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:48,606 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 21, 20, 20, 1, 1, 1, 1] [2021-11-20 06:25:48,606 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:48,607 INFO L791 eck$LassoCheckResult]: Stem: 16454#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 16455#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 16460#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16475#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16476#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16463#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16464#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16518#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16517#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16516#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16515#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16500#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16499#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16497#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16496#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16495#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16494#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16493#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16492#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16491#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16490#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16489#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16488#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16487#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16486#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16485#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16484#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16483#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 16479#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 16478#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 16465#L27-4 main_~i~0#1 := 0; 16466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16526#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16527#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16528#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16532#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16531#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16625#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16619#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16613#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16607#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16601#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16595#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16589#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16583#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16577#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16571#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16565#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16563#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16562#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16559#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16553#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16551#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16547#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16541#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16539#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16538#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16536#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16535#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16534#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16472#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16459#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16469#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16474#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16523#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16522#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16481#L34 [2021-11-20 06:25:48,607 INFO L793 eck$LassoCheckResult]: Loop: 16481#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 16482#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 16480#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 16481#L34 [2021-11-20 06:25:48,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:48,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1338568579, now seen corresponding path program 40 times [2021-11-20 06:25:48,608 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:48,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050974202] [2021-11-20 06:25:48,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:48,609 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:48,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:48,755 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:48,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:48,991 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:48,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:48,992 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 22 times [2021-11-20 06:25:48,992 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:48,993 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656711136] [2021-11-20 06:25:48,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:48,993 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:48,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:48,996 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:48,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:48,999 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:49,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:49,000 INFO L85 PathProgramCache]: Analyzing trace with hash -1474766605, now seen corresponding path program 41 times [2021-11-20 06:25:49,000 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:49,000 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022702825] [2021-11-20 06:25:49,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:49,001 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:49,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:49,906 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 590 proven. 502 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:49,906 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:49,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022702825] [2021-11-20 06:25:49,907 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022702825] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:49,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1784338392] [2021-11-20 06:25:49,907 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:25:49,907 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:49,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:49,909 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:49,926 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2021-11-20 06:25:50,960 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2021-11-20 06:25:50,960 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:25:50,970 INFO L263 TraceCheckSpWp]: Trace formula consists of 419 conjuncts, 46 conjunts are in the unsatisfiable core [2021-11-20 06:25:50,973 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:52,126 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 651 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:52,126 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:52,401 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 651 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:52,402 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1784338392] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:52,402 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:52,403 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46, 46] total 70 [2021-11-20 06:25:52,403 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383402016] [2021-11-20 06:25:52,403 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:52,443 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:52,444 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2021-11-20 06:25:52,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1155, Invalid=3815, Unknown=0, NotChecked=0, Total=4970 [2021-11-20 06:25:52,446 INFO L87 Difference]: Start difference. First operand 180 states and 204 transitions. cyclomatic complexity: 27 Second operand has 71 states, 70 states have (on average 2.6) internal successors, (182), 71 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:53,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:53,713 INFO L93 Difference]: Finished difference Result 583 states and 674 transitions. [2021-11-20 06:25:53,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-11-20 06:25:53,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 583 states and 674 transitions. [2021-11-20 06:25:53,719 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:53,722 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 583 states to 326 states and 374 transitions. [2021-11-20 06:25:53,722 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 281 [2021-11-20 06:25:53,723 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 281 [2021-11-20 06:25:53,723 INFO L73 IsDeterministic]: Start isDeterministic. Operand 326 states and 374 transitions. [2021-11-20 06:25:53,724 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:53,724 INFO L681 BuchiCegarLoop]: Abstraction has 326 states and 374 transitions. [2021-11-20 06:25:53,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states and 374 transitions. [2021-11-20 06:25:53,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 188. [2021-11-20 06:25:53,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 188 states, 188 states have (on average 1.1329787234042554) internal successors, (213), 187 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:53,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 213 transitions. [2021-11-20 06:25:53,729 INFO L704 BuchiCegarLoop]: Abstraction has 188 states and 213 transitions. [2021-11-20 06:25:53,730 INFO L587 BuchiCegarLoop]: Abstraction has 188 states and 213 transitions. [2021-11-20 06:25:53,730 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-11-20 06:25:53,730 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 188 states and 213 transitions. [2021-11-20 06:25:53,731 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:53,731 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:53,732 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:53,733 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2021-11-20 06:25:53,733 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:53,734 INFO L791 eck$LassoCheckResult]: Stem: 17991#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 17992#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 17997#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18011#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18012#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18000#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18001#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18056#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18055#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18054#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18044#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18043#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18042#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18041#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18040#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18039#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18038#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18037#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18036#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18035#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18034#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18033#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18032#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18031#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18030#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18029#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18028#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18027#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18026#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18025#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18024#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18023#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18022#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18021#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18020#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18019#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 18015#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 18014#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 18002#L27-4 main_~i~0#1 := 0; 18003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18173#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18066#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18064#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18065#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18069#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18171#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18168#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18166#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18165#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18162#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18160#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18159#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18156#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18154#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18153#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18150#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18148#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18147#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18144#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18142#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18141#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18138#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18136#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18135#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18132#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18130#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18129#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18126#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18124#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18123#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18120#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18118#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18117#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18114#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18112#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18111#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18108#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18105#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18102#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18100#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18099#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18096#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18094#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18093#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18090#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18088#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18087#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18084#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18082#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18081#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18078#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18076#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18075#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18074#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18073#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18072#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18008#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 17996#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18005#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18010#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18061#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18060#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18017#L34 [2021-11-20 06:25:53,734 INFO L793 eck$LassoCheckResult]: Loop: 18017#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 18018#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 18016#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 18017#L34 [2021-11-20 06:25:53,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:53,734 INFO L85 PathProgramCache]: Analyzing trace with hash 2042800757, now seen corresponding path program 42 times [2021-11-20 06:25:53,735 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:53,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196498276] [2021-11-20 06:25:53,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:53,735 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:53,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:53,912 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:54,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:54,119 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:54,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:54,119 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 23 times [2021-11-20 06:25:54,119 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:54,120 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455918532] [2021-11-20 06:25:54,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:54,120 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:54,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:54,123 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:54,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:54,126 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:54,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:54,126 INFO L85 PathProgramCache]: Analyzing trace with hash 1685774529, now seen corresponding path program 43 times [2021-11-20 06:25:54,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:54,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848411997] [2021-11-20 06:25:54,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:54,127 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:54,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:55,000 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 651 proven. 548 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:55,001 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:55,001 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1848411997] [2021-11-20 06:25:55,001 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1848411997] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:55,001 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [813773047] [2021-11-20 06:25:55,002 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:25:55,002 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:55,002 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:55,004 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:55,006 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2021-11-20 06:25:55,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:55,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 437 conjuncts, 48 conjunts are in the unsatisfiable core [2021-11-20 06:25:55,122 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:25:56,444 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 715 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:56,444 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:25:56,729 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 715 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:56,729 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [813773047] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:25:56,729 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:25:56,729 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 73 [2021-11-20 06:25:56,729 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334572680] [2021-11-20 06:25:56,729 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:25:56,772 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:25:56,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2021-11-20 06:25:56,774 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1253, Invalid=4149, Unknown=0, NotChecked=0, Total=5402 [2021-11-20 06:25:56,775 INFO L87 Difference]: Start difference. First operand 188 states and 213 transitions. cyclomatic complexity: 28 Second operand has 74 states, 73 states have (on average 2.6027397260273974) internal successors, (190), 74 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:58,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:25:58,006 INFO L93 Difference]: Finished difference Result 609 states and 704 transitions. [2021-11-20 06:25:58,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2021-11-20 06:25:58,007 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 609 states and 704 transitions. [2021-11-20 06:25:58,013 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:58,016 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 609 states to 340 states and 390 transitions. [2021-11-20 06:25:58,016 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 293 [2021-11-20 06:25:58,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 293 [2021-11-20 06:25:58,017 INFO L73 IsDeterministic]: Start isDeterministic. Operand 340 states and 390 transitions. [2021-11-20 06:25:58,018 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:25:58,018 INFO L681 BuchiCegarLoop]: Abstraction has 340 states and 390 transitions. [2021-11-20 06:25:58,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states and 390 transitions. [2021-11-20 06:25:58,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 196. [2021-11-20 06:25:58,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.1326530612244898) internal successors, (222), 195 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:25:58,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 222 transitions. [2021-11-20 06:25:58,024 INFO L704 BuchiCegarLoop]: Abstraction has 196 states and 222 transitions. [2021-11-20 06:25:58,024 INFO L587 BuchiCegarLoop]: Abstraction has 196 states and 222 transitions. [2021-11-20 06:25:58,024 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-11-20 06:25:58,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 222 transitions. [2021-11-20 06:25:58,026 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:25:58,026 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:25:58,026 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:25:58,028 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [23, 23, 23, 22, 22, 1, 1, 1, 1] [2021-11-20 06:25:58,028 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:25:58,028 INFO L791 eck$LassoCheckResult]: Stem: 19597#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 19598#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 19603#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19618#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19619#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19606#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19607#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19665#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19664#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19663#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19662#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19661#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19660#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19659#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19658#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19657#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19656#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19655#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19654#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19653#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19652#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19651#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19650#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19649#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19648#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19647#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19646#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19645#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19644#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19643#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19642#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19641#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19640#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19639#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19638#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19637#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19636#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19635#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19634#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19633#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19632#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19631#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19630#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19629#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19628#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19627#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19626#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 19622#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 19621#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 19608#L27-4 main_~i~0#1 := 0; 19609#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19673#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19674#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19675#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19679#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19678#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19787#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19784#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19782#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19781#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19778#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19776#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19775#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19772#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19770#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19769#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19766#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19764#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19763#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19760#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19758#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19757#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19754#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19752#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19751#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19748#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19746#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19745#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19742#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19740#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19739#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19736#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19734#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19733#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19730#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19728#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19727#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19724#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19722#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19721#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19718#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19716#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19715#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19712#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19710#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19709#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19706#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19704#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19703#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19700#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19698#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19697#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19694#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19692#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19691#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19688#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19686#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19685#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19683#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19682#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19681#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19615#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19602#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19612#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19670#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19669#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19624#L34 [2021-11-20 06:25:58,029 INFO L793 eck$LassoCheckResult]: Loop: 19624#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 19625#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 19623#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 19624#L34 [2021-11-20 06:25:58,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:58,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1222528897, now seen corresponding path program 44 times [2021-11-20 06:25:58,029 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:58,030 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094536345] [2021-11-20 06:25:58,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:58,030 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:58,234 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:58,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:58,442 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:58,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:58,442 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 24 times [2021-11-20 06:25:58,443 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:58,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578424912] [2021-11-20 06:25:58,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:58,443 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:58,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:58,446 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:25:58,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:25:58,449 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:25:58,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:25:58,450 INFO L85 PathProgramCache]: Analyzing trace with hash 964339319, now seen corresponding path program 45 times [2021-11-20 06:25:58,450 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:25:58,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126918556] [2021-11-20 06:25:58,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:25:58,451 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:25:58,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:25:59,574 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 715 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:25:59,575 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:25:59,575 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126918556] [2021-11-20 06:25:59,575 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126918556] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:25:59,575 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1857492444] [2021-11-20 06:25:59,575 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:25:59,575 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:25:59,575 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:25:59,577 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:25:59,595 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2021-11-20 06:26:01,180 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2021-11-20 06:26:01,180 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:26:01,188 INFO L263 TraceCheckSpWp]: Trace formula consists of 455 conjuncts, 50 conjunts are in the unsatisfiable core [2021-11-20 06:26:01,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:02,539 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 782 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:02,539 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:02,867 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 782 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:02,868 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1857492444] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:02,868 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:02,868 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50] total 76 [2021-11-20 06:26:02,868 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596710400] [2021-11-20 06:26:02,868 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:02,908 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:02,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2021-11-20 06:26:02,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1355, Invalid=4497, Unknown=0, NotChecked=0, Total=5852 [2021-11-20 06:26:02,911 INFO L87 Difference]: Start difference. First operand 196 states and 222 transitions. cyclomatic complexity: 29 Second operand has 77 states, 76 states have (on average 2.6052631578947367) internal successors, (198), 77 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:04,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:04,273 INFO L93 Difference]: Finished difference Result 635 states and 734 transitions. [2021-11-20 06:26:04,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2021-11-20 06:26:04,274 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 635 states and 734 transitions. [2021-11-20 06:26:04,280 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:04,283 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 635 states to 354 states and 406 transitions. [2021-11-20 06:26:04,284 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 305 [2021-11-20 06:26:04,284 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 305 [2021-11-20 06:26:04,284 INFO L73 IsDeterministic]: Start isDeterministic. Operand 354 states and 406 transitions. [2021-11-20 06:26:04,285 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:04,285 INFO L681 BuchiCegarLoop]: Abstraction has 354 states and 406 transitions. [2021-11-20 06:26:04,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states and 406 transitions. [2021-11-20 06:26:04,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 204. [2021-11-20 06:26:04,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 204 states, 204 states have (on average 1.1323529411764706) internal successors, (231), 203 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:04,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 231 transitions. [2021-11-20 06:26:04,292 INFO L704 BuchiCegarLoop]: Abstraction has 204 states and 231 transitions. [2021-11-20 06:26:04,292 INFO L587 BuchiCegarLoop]: Abstraction has 204 states and 231 transitions. [2021-11-20 06:26:04,292 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-11-20 06:26:04,292 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 204 states and 231 transitions. [2021-11-20 06:26:04,294 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:04,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:04,294 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:04,296 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 24, 24, 23, 23, 1, 1, 1, 1] [2021-11-20 06:26:04,296 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:04,297 INFO L791 eck$LassoCheckResult]: Stem: 21272#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 21273#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 21278#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21292#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21293#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21341#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21340#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21339#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21338#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21337#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21334#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21333#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 21296#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 21295#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 21283#L27-4 main_~i~0#1 := 0; 21284#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21471#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21351#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21349#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21350#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21354#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21470#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21465#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21464#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21459#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21458#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21453#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21452#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21449#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21447#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21446#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21443#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21441#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21440#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21437#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21435#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21434#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21431#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21429#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21428#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21425#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21423#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21422#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21417#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21416#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21411#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21410#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21405#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21404#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21401#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21399#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21398#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21395#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21393#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21392#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21389#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21387#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21386#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21383#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21381#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21380#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21377#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21375#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21374#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21371#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21369#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21368#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21365#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21363#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21362#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21360#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21358#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21357#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21289#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21277#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21286#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21291#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21346#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21345#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21298#L34 [2021-11-20 06:26:04,297 INFO L793 eck$LassoCheckResult]: Loop: 21298#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 21299#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 21297#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 21298#L34 [2021-11-20 06:26:04,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:04,298 INFO L85 PathProgramCache]: Analyzing trace with hash 502660473, now seen corresponding path program 46 times [2021-11-20 06:26:04,298 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:04,298 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162004969] [2021-11-20 06:26:04,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:04,299 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:04,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:04,521 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:04,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:04,720 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:04,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:04,721 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 25 times [2021-11-20 06:26:04,721 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:04,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907105603] [2021-11-20 06:26:04,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:04,721 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:04,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:04,724 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:04,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:04,727 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:04,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:04,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1792770243, now seen corresponding path program 47 times [2021-11-20 06:26:04,728 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:04,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303466401] [2021-11-20 06:26:04,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:04,729 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:04,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:05,873 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 782 proven. 646 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:05,873 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:05,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303466401] [2021-11-20 06:26:05,874 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1303466401] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:05,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [199616053] [2021-11-20 06:26:05,874 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:26:05,874 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:05,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:05,875 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:05,876 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-11-20 06:26:07,586 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2021-11-20 06:26:07,586 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:26:07,595 INFO L263 TraceCheckSpWp]: Trace formula consists of 473 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-20 06:26:07,599 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:09,025 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 852 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:09,025 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:09,344 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 852 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:09,344 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [199616053] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:09,344 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:09,344 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52, 52] total 79 [2021-11-20 06:26:09,345 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282582756] [2021-11-20 06:26:09,345 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:09,386 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:09,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2021-11-20 06:26:09,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1461, Invalid=4859, Unknown=0, NotChecked=0, Total=6320 [2021-11-20 06:26:09,389 INFO L87 Difference]: Start difference. First operand 204 states and 231 transitions. cyclomatic complexity: 30 Second operand has 80 states, 79 states have (on average 2.607594936708861) internal successors, (206), 80 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:10,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:10,810 INFO L93 Difference]: Finished difference Result 661 states and 764 transitions. [2021-11-20 06:26:10,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2021-11-20 06:26:10,811 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 661 states and 764 transitions. [2021-11-20 06:26:10,816 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:10,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 661 states to 368 states and 422 transitions. [2021-11-20 06:26:10,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 317 [2021-11-20 06:26:10,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 317 [2021-11-20 06:26:10,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 368 states and 422 transitions. [2021-11-20 06:26:10,820 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:10,820 INFO L681 BuchiCegarLoop]: Abstraction has 368 states and 422 transitions. [2021-11-20 06:26:10,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states and 422 transitions. [2021-11-20 06:26:10,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 212. [2021-11-20 06:26:10,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 212 states, 212 states have (on average 1.1320754716981132) internal successors, (240), 211 states have internal predecessors, (240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:10,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 240 transitions. [2021-11-20 06:26:10,827 INFO L704 BuchiCegarLoop]: Abstraction has 212 states and 240 transitions. [2021-11-20 06:26:10,827 INFO L587 BuchiCegarLoop]: Abstraction has 212 states and 240 transitions. [2021-11-20 06:26:10,827 INFO L425 BuchiCegarLoop]: ======== Iteration 27============ [2021-11-20 06:26:10,827 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 212 states and 240 transitions. [2021-11-20 06:26:10,828 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:10,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:10,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:10,830 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [25, 25, 25, 24, 24, 1, 1, 1, 1] [2021-11-20 06:26:10,831 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:10,831 INFO L791 eck$LassoCheckResult]: Stem: 23016#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 23017#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 23022#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23037#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23038#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23025#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23026#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23088#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23087#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23086#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23085#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23084#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23083#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23082#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23081#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23080#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23079#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23078#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23077#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23076#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23075#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23074#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23073#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23072#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23071#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23070#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23069#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23068#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23067#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23066#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23065#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23064#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23063#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23062#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23061#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23060#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23059#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23058#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23057#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23056#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23055#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23054#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 23041#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 23040#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 23027#L27-4 main_~i~0#1 := 0; 23028#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23096#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23097#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23098#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23102#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23101#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23222#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23219#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23217#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23216#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23213#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23211#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23210#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23207#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23205#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23204#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23201#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23199#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23198#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23195#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23193#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23192#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23189#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23187#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23186#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23183#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23181#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23180#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23177#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23175#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23174#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23171#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23169#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23168#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23165#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23163#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23162#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23159#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23157#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23156#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23153#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23151#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23150#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23147#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23145#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23144#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23141#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23139#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23138#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23135#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23133#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23132#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23129#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23127#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23126#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23123#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23121#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23120#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23117#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23115#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23114#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23111#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23109#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23108#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23106#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23105#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23104#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23034#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23021#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23031#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23036#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23093#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23092#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23043#L34 [2021-11-20 06:26:10,831 INFO L793 eck$LassoCheckResult]: Loop: 23043#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 23044#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 23042#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 23043#L34 [2021-11-20 06:26:10,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:10,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1097778821, now seen corresponding path program 48 times [2021-11-20 06:26:10,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:10,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024574516] [2021-11-20 06:26:10,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:10,833 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:11,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:11,038 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:11,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:11,296 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:11,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:11,297 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 26 times [2021-11-20 06:26:11,297 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:11,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113275375] [2021-11-20 06:26:11,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:11,298 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:11,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:11,301 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:11,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:11,304 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:11,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:11,304 INFO L85 PathProgramCache]: Analyzing trace with hash -2047824901, now seen corresponding path program 49 times [2021-11-20 06:26:11,304 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:11,305 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110654440] [2021-11-20 06:26:11,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:11,305 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:11,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:12,563 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 852 proven. 698 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:12,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:12,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110654440] [2021-11-20 06:26:12,563 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2110654440] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:12,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1632639524] [2021-11-20 06:26:12,563 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:26:12,564 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:12,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:12,570 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:12,589 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-11-20 06:26:12,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:12,693 INFO L263 TraceCheckSpWp]: Trace formula consists of 491 conjuncts, 54 conjunts are in the unsatisfiable core [2021-11-20 06:26:12,697 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:14,475 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 925 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:14,475 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:14,792 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 925 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:14,793 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1632639524] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:14,793 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:14,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54, 54] total 82 [2021-11-20 06:26:14,793 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121544483] [2021-11-20 06:26:14,793 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:14,833 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:14,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2021-11-20 06:26:14,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1571, Invalid=5235, Unknown=0, NotChecked=0, Total=6806 [2021-11-20 06:26:14,836 INFO L87 Difference]: Start difference. First operand 212 states and 240 transitions. cyclomatic complexity: 31 Second operand has 83 states, 82 states have (on average 2.6097560975609757) internal successors, (214), 83 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:16,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:16,197 INFO L93 Difference]: Finished difference Result 687 states and 794 transitions. [2021-11-20 06:26:16,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2021-11-20 06:26:16,198 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 687 states and 794 transitions. [2021-11-20 06:26:16,202 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:16,204 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 687 states to 382 states and 438 transitions. [2021-11-20 06:26:16,205 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 329 [2021-11-20 06:26:16,205 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 329 [2021-11-20 06:26:16,205 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 438 transitions. [2021-11-20 06:26:16,206 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:16,206 INFO L681 BuchiCegarLoop]: Abstraction has 382 states and 438 transitions. [2021-11-20 06:26:16,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 438 transitions. [2021-11-20 06:26:16,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 220. [2021-11-20 06:26:16,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 220 states, 220 states have (on average 1.1318181818181818) internal successors, (249), 219 states have internal predecessors, (249), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:16,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 249 transitions. [2021-11-20 06:26:16,212 INFO L704 BuchiCegarLoop]: Abstraction has 220 states and 249 transitions. [2021-11-20 06:26:16,212 INFO L587 BuchiCegarLoop]: Abstraction has 220 states and 249 transitions. [2021-11-20 06:26:16,212 INFO L425 BuchiCegarLoop]: ======== Iteration 28============ [2021-11-20 06:26:16,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 220 states and 249 transitions. [2021-11-20 06:26:16,214 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:16,214 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:16,214 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:16,216 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [26, 26, 26, 25, 25, 1, 1, 1, 1] [2021-11-20 06:26:16,216 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:16,216 INFO L791 eck$LassoCheckResult]: Stem: 24829#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 24830#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 24835#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24849#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24850#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24838#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24839#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24902#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24901#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24900#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24899#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24898#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24897#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24896#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24895#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24894#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24893#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24892#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24891#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24890#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24889#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24888#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24887#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24886#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24885#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24884#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24883#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24882#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24881#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24880#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24879#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24878#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24877#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24876#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24875#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24874#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24873#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24872#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24871#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24870#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24869#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24868#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24867#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24866#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24865#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24864#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24863#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24862#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24861#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24860#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24859#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24858#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24857#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 24853#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 24852#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 24840#L27-4 main_~i~0#1 := 0; 24841#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25043#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24912#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24915#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25041#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25038#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25036#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25035#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25032#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25030#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25029#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25026#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25024#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25023#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25020#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25018#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25017#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25014#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25012#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25011#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25008#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25006#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 25005#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 25002#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 25000#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24999#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24996#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24994#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24993#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24990#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24988#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24987#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24984#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24982#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24981#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24978#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24976#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24975#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24972#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24970#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24969#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24966#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24964#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24963#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24960#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24958#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24957#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24954#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24952#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24951#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24948#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24946#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24945#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24942#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24940#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24939#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24936#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24934#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24933#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24930#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24928#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24927#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24924#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24922#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24921#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24920#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24919#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24918#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24846#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24834#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24843#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24848#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24907#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24906#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24855#L34 [2021-11-20 06:26:16,217 INFO L793 eck$LassoCheckResult]: Loop: 24855#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 24856#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 24854#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 24855#L34 [2021-11-20 06:26:16,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:16,217 INFO L85 PathProgramCache]: Analyzing trace with hash 791980157, now seen corresponding path program 50 times [2021-11-20 06:26:16,217 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:16,218 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529570721] [2021-11-20 06:26:16,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:16,218 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:16,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:16,515 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:16,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:16,820 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:16,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:16,821 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 27 times [2021-11-20 06:26:16,821 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:16,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877498540] [2021-11-20 06:26:16,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:16,822 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:16,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:16,825 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:16,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:16,828 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:16,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:16,829 INFO L85 PathProgramCache]: Analyzing trace with hash 1625540025, now seen corresponding path program 51 times [2021-11-20 06:26:16,829 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:16,830 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169651104] [2021-11-20 06:26:16,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:16,830 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:16,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:18,192 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 925 proven. 752 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:18,192 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:18,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169651104] [2021-11-20 06:26:18,192 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [169651104] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:18,193 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1704069115] [2021-11-20 06:26:18,193 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:26:18,193 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:18,193 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:18,196 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:18,210 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2021-11-20 06:26:21,966 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 27 check-sat command(s) [2021-11-20 06:26:21,966 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:26:21,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 509 conjuncts, 56 conjunts are in the unsatisfiable core [2021-11-20 06:26:21,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:23,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 1001 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:23,569 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:23,904 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 1001 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:23,904 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1704069115] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:23,904 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:23,905 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56, 56] total 85 [2021-11-20 06:26:23,905 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368565076] [2021-11-20 06:26:23,905 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:23,953 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:23,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2021-11-20 06:26:23,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1685, Invalid=5625, Unknown=0, NotChecked=0, Total=7310 [2021-11-20 06:26:23,955 INFO L87 Difference]: Start difference. First operand 220 states and 249 transitions. cyclomatic complexity: 32 Second operand has 86 states, 85 states have (on average 2.611764705882353) internal successors, (222), 86 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:25,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:25,440 INFO L93 Difference]: Finished difference Result 713 states and 824 transitions. [2021-11-20 06:26:25,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2021-11-20 06:26:25,441 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 713 states and 824 transitions. [2021-11-20 06:26:25,447 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:25,450 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 713 states to 396 states and 454 transitions. [2021-11-20 06:26:25,450 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 341 [2021-11-20 06:26:25,451 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 341 [2021-11-20 06:26:25,451 INFO L73 IsDeterministic]: Start isDeterministic. Operand 396 states and 454 transitions. [2021-11-20 06:26:25,452 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:25,452 INFO L681 BuchiCegarLoop]: Abstraction has 396 states and 454 transitions. [2021-11-20 06:26:25,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states and 454 transitions. [2021-11-20 06:26:25,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 228. [2021-11-20 06:26:25,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 228 states have (on average 1.131578947368421) internal successors, (258), 227 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:25,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 258 transitions. [2021-11-20 06:26:25,458 INFO L704 BuchiCegarLoop]: Abstraction has 228 states and 258 transitions. [2021-11-20 06:26:25,458 INFO L587 BuchiCegarLoop]: Abstraction has 228 states and 258 transitions. [2021-11-20 06:26:25,459 INFO L425 BuchiCegarLoop]: ======== Iteration 29============ [2021-11-20 06:26:25,459 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 228 states and 258 transitions. [2021-11-20 06:26:25,460 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:25,460 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:25,460 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:25,462 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [27, 27, 27, 26, 26, 1, 1, 1, 1] [2021-11-20 06:26:25,462 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:25,463 INFO L791 eck$LassoCheckResult]: Stem: 26711#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 26712#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 26717#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26732#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26733#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26720#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26721#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26787#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26786#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26785#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26784#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26783#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26782#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26781#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26780#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26779#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26778#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26777#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26776#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26775#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26774#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26773#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26772#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26771#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26770#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26769#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26768#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26767#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26766#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26765#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26759#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26757#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26756#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26755#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26754#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26753#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26752#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26751#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26750#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26749#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26748#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26747#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26746#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26745#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26744#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26743#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26742#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26741#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26740#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 26736#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 26735#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 26722#L27-4 main_~i~0#1 := 0; 26723#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26795#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26796#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26797#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26801#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26800#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26933#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26930#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26928#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26927#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26924#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26922#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26921#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26918#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26916#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26915#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26912#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26910#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26909#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26906#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26904#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26903#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26900#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26898#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26897#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26894#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26892#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26891#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26888#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26886#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26885#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26882#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26880#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26879#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26876#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26874#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26873#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26870#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26868#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26867#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26864#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26862#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26861#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26858#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26856#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26855#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26852#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26850#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26849#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26846#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26844#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26843#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26840#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26838#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26837#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26834#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26832#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26831#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26828#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26826#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26825#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26822#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26820#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26819#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26816#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26814#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26813#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26810#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26808#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26807#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26805#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26804#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26803#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26729#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26716#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26726#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26731#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26792#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26791#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26738#L34 [2021-11-20 06:26:25,463 INFO L793 eck$LassoCheckResult]: Loop: 26738#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 26739#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 26737#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 26738#L34 [2021-11-20 06:26:25,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:25,464 INFO L85 PathProgramCache]: Analyzing trace with hash -325891465, now seen corresponding path program 52 times [2021-11-20 06:26:25,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:25,464 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890359548] [2021-11-20 06:26:25,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:25,465 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:25,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:25,686 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:25,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:25,935 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:25,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:25,935 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 28 times [2021-11-20 06:26:25,936 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:25,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392348200] [2021-11-20 06:26:25,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:25,936 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:25,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:25,939 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:25,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:25,944 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:25,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:25,946 INFO L85 PathProgramCache]: Analyzing trace with hash -2006505089, now seen corresponding path program 53 times [2021-11-20 06:26:25,946 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:25,946 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044649864] [2021-11-20 06:26:25,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:25,946 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:26,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:27,232 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1001 proven. 808 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:27,233 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:27,233 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044649864] [2021-11-20 06:26:27,233 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044649864] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:27,233 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1449714164] [2021-11-20 06:26:27,233 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:26:27,233 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:27,233 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:27,235 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:27,235 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2021-11-20 06:26:31,540 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 28 check-sat command(s) [2021-11-20 06:26:31,540 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:26:31,555 INFO L263 TraceCheckSpWp]: Trace formula consists of 527 conjuncts, 58 conjunts are in the unsatisfiable core [2021-11-20 06:26:31,558 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:33,169 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1080 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:33,169 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:33,477 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 1080 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:33,477 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1449714164] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:33,477 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:33,478 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58, 58] total 88 [2021-11-20 06:26:33,478 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105974475] [2021-11-20 06:26:33,478 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:33,545 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:33,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2021-11-20 06:26:33,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1803, Invalid=6029, Unknown=0, NotChecked=0, Total=7832 [2021-11-20 06:26:33,548 INFO L87 Difference]: Start difference. First operand 228 states and 258 transitions. cyclomatic complexity: 33 Second operand has 89 states, 88 states have (on average 2.6136363636363638) internal successors, (230), 89 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:34,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:34,969 INFO L93 Difference]: Finished difference Result 739 states and 854 transitions. [2021-11-20 06:26:34,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2021-11-20 06:26:34,970 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 739 states and 854 transitions. [2021-11-20 06:26:34,976 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:34,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 739 states to 410 states and 470 transitions. [2021-11-20 06:26:34,979 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 353 [2021-11-20 06:26:34,979 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 353 [2021-11-20 06:26:34,980 INFO L73 IsDeterministic]: Start isDeterministic. Operand 410 states and 470 transitions. [2021-11-20 06:26:34,980 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:34,981 INFO L681 BuchiCegarLoop]: Abstraction has 410 states and 470 transitions. [2021-11-20 06:26:34,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states and 470 transitions. [2021-11-20 06:26:34,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 236. [2021-11-20 06:26:34,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 236 states, 236 states have (on average 1.13135593220339) internal successors, (267), 235 states have internal predecessors, (267), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:34,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 267 transitions. [2021-11-20 06:26:34,987 INFO L704 BuchiCegarLoop]: Abstraction has 236 states and 267 transitions. [2021-11-20 06:26:34,987 INFO L587 BuchiCegarLoop]: Abstraction has 236 states and 267 transitions. [2021-11-20 06:26:34,987 INFO L425 BuchiCegarLoop]: ======== Iteration 30============ [2021-11-20 06:26:34,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 236 states and 267 transitions. [2021-11-20 06:26:34,988 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:34,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:34,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:34,991 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [28, 28, 28, 27, 27, 1, 1, 1, 1] [2021-11-20 06:26:34,991 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:34,991 INFO L791 eck$LassoCheckResult]: Stem: 28662#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 28663#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 28668#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28682#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28683#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28671#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28672#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28739#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28738#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28737#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28736#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28735#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28734#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28733#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28731#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28730#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28725#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28724#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28723#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28722#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28721#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28720#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28719#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28718#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28717#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28716#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28715#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28714#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28713#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28712#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28711#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28710#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28709#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28708#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28707#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28706#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28705#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28704#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28703#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28702#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28701#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28700#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28699#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28698#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28697#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28696#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28695#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28694#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28693#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28692#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28691#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28690#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 28686#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 28685#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 28673#L27-4 main_~i~0#1 := 0; 28674#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28893#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28749#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28748#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28752#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28892#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28889#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28887#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28886#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28883#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28881#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28880#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28877#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28875#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28874#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28871#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28869#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28868#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28865#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28863#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28862#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28859#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28857#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28856#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28853#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28851#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28850#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28847#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28845#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28844#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28841#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28839#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28838#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28835#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28833#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28832#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28829#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28827#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28826#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28823#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28821#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28820#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28817#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28815#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28814#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28811#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28809#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28808#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28805#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28803#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28802#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28799#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28797#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28796#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28793#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28791#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28790#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28787#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28785#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28784#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28781#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28779#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28778#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28775#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28773#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28772#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28769#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28767#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28763#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28761#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28760#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28758#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28756#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28755#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28679#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28667#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28676#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28681#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28744#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28743#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28688#L34 [2021-11-20 06:26:34,992 INFO L793 eck$LassoCheckResult]: Loop: 28688#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 28689#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 28687#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 28688#L34 [2021-11-20 06:26:34,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:34,992 INFO L85 PathProgramCache]: Analyzing trace with hash 1979902849, now seen corresponding path program 54 times [2021-11-20 06:26:34,992 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:34,992 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020706625] [2021-11-20 06:26:34,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:34,993 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:35,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:35,187 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:35,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:35,489 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:35,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:35,490 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 29 times [2021-11-20 06:26:35,490 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:35,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655170452] [2021-11-20 06:26:35,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:35,490 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:35,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:35,493 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:35,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:35,503 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:35,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:35,503 INFO L85 PathProgramCache]: Analyzing trace with hash 499938357, now seen corresponding path program 55 times [2021-11-20 06:26:35,504 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:35,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033604959] [2021-11-20 06:26:35,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:35,504 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:35,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:36,687 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1080 proven. 866 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:36,687 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:36,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033604959] [2021-11-20 06:26:36,688 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033604959] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:36,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2101434398] [2021-11-20 06:26:36,688 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:26:36,688 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:36,688 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:36,691 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:36,692 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2021-11-20 06:26:36,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:36,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 60 conjunts are in the unsatisfiable core [2021-11-20 06:26:36,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:38,598 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1162 proven. 784 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:38,599 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:38,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 1162 proven. 784 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:38,911 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2101434398] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:38,911 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:38,912 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60] total 91 [2021-11-20 06:26:38,912 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363693065] [2021-11-20 06:26:38,912 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:38,951 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:38,951 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2021-11-20 06:26:38,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1925, Invalid=6447, Unknown=0, NotChecked=0, Total=8372 [2021-11-20 06:26:38,952 INFO L87 Difference]: Start difference. First operand 236 states and 267 transitions. cyclomatic complexity: 34 Second operand has 92 states, 91 states have (on average 2.6153846153846154) internal successors, (238), 92 states have internal predecessors, (238), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:40,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:40,664 INFO L93 Difference]: Finished difference Result 765 states and 884 transitions. [2021-11-20 06:26:40,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2021-11-20 06:26:40,665 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 765 states and 884 transitions. [2021-11-20 06:26:40,668 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:40,671 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 765 states to 424 states and 486 transitions. [2021-11-20 06:26:40,671 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2021-11-20 06:26:40,672 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2021-11-20 06:26:40,672 INFO L73 IsDeterministic]: Start isDeterministic. Operand 424 states and 486 transitions. [2021-11-20 06:26:40,673 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:40,673 INFO L681 BuchiCegarLoop]: Abstraction has 424 states and 486 transitions. [2021-11-20 06:26:40,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states and 486 transitions. [2021-11-20 06:26:40,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 244. [2021-11-20 06:26:40,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 244 states have (on average 1.1311475409836065) internal successors, (276), 243 states have internal predecessors, (276), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:40,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 276 transitions. [2021-11-20 06:26:40,679 INFO L704 BuchiCegarLoop]: Abstraction has 244 states and 276 transitions. [2021-11-20 06:26:40,679 INFO L587 BuchiCegarLoop]: Abstraction has 244 states and 276 transitions. [2021-11-20 06:26:40,679 INFO L425 BuchiCegarLoop]: ======== Iteration 31============ [2021-11-20 06:26:40,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 244 states and 276 transitions. [2021-11-20 06:26:40,681 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:40,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:40,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:40,683 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [29, 29, 29, 28, 28, 1, 1, 1, 1] [2021-11-20 06:26:40,683 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:40,683 INFO L791 eck$LassoCheckResult]: Stem: 30682#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 30683#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 30688#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30703#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30704#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30691#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30692#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30762#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30761#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30760#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30759#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30758#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30757#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30756#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30755#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30754#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30753#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30752#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30751#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30750#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30749#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30748#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30747#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30746#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30745#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30744#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30743#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30742#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30741#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30740#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30739#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30738#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30737#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30736#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30735#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30734#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30733#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30732#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30731#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30730#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30729#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30728#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30727#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30726#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30725#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30724#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30723#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30722#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30721#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30720#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30719#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30718#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30717#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30716#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30715#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30714#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30713#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30712#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30711#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 30707#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 30706#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 30693#L27-4 main_~i~0#1 := 0; 30694#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30770#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30771#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30772#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30776#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30775#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30920#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30917#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30915#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30914#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30911#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30909#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30908#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30905#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30903#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30902#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30899#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30897#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30896#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30893#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30891#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30890#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30887#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30885#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30884#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30881#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30879#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30878#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30875#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30873#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30872#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30869#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30867#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30866#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30863#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30861#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30860#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30857#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30855#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30854#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30851#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30849#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30848#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30845#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30843#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30842#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30839#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30837#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30836#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30833#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30831#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30830#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30827#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30825#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30824#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30821#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30819#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30818#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30815#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30813#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30812#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30809#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30807#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30806#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30803#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30801#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30800#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30797#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30795#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30794#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30791#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30789#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30788#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30785#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30783#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30782#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30780#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30779#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30778#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30700#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30687#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30697#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30702#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30767#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30709#L34 [2021-11-20 06:26:40,684 INFO L793 eck$LassoCheckResult]: Loop: 30709#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 30710#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 30708#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 30709#L34 [2021-11-20 06:26:40,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:40,684 INFO L85 PathProgramCache]: Analyzing trace with hash -2002541709, now seen corresponding path program 56 times [2021-11-20 06:26:40,684 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:40,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188742962] [2021-11-20 06:26:40,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:40,685 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:40,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:40,975 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:41,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:41,246 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:41,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:41,246 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 30 times [2021-11-20 06:26:41,247 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:41,247 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437893957] [2021-11-20 06:26:41,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:41,247 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:41,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:41,249 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:41,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:41,251 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:41,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:41,252 INFO L85 PathProgramCache]: Analyzing trace with hash -624271613, now seen corresponding path program 57 times [2021-11-20 06:26:41,252 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:41,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115934090] [2021-11-20 06:26:41,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:41,252 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:41,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:42,612 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1162 proven. 926 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:42,612 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:42,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115934090] [2021-11-20 06:26:42,613 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1115934090] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:42,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042510369] [2021-11-20 06:26:42,613 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:26:42,613 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:42,613 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:42,614 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:42,616 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2021-11-20 06:26:47,460 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2021-11-20 06:26:47,460 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:26:47,473 INFO L263 TraceCheckSpWp]: Trace formula consists of 563 conjuncts, 62 conjunts are in the unsatisfiable core [2021-11-20 06:26:47,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:26:49,339 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1247 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:49,340 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:26:49,803 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 1247 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:49,804 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042510369] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:26:49,804 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:26:49,804 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62, 62] total 94 [2021-11-20 06:26:49,804 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974170924] [2021-11-20 06:26:49,804 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:26:49,857 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:26:49,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2021-11-20 06:26:49,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2051, Invalid=6879, Unknown=0, NotChecked=0, Total=8930 [2021-11-20 06:26:49,859 INFO L87 Difference]: Start difference. First operand 244 states and 276 transitions. cyclomatic complexity: 35 Second operand has 95 states, 94 states have (on average 2.617021276595745) internal successors, (246), 95 states have internal predecessors, (246), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:52,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:26:52,152 INFO L93 Difference]: Finished difference Result 791 states and 914 transitions. [2021-11-20 06:26:52,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2021-11-20 06:26:52,153 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 791 states and 914 transitions. [2021-11-20 06:26:52,157 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:52,160 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 791 states to 438 states and 502 transitions. [2021-11-20 06:26:52,160 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 377 [2021-11-20 06:26:52,161 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 377 [2021-11-20 06:26:52,161 INFO L73 IsDeterministic]: Start isDeterministic. Operand 438 states and 502 transitions. [2021-11-20 06:26:52,162 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:26:52,162 INFO L681 BuchiCegarLoop]: Abstraction has 438 states and 502 transitions. [2021-11-20 06:26:52,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states and 502 transitions. [2021-11-20 06:26:52,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 252. [2021-11-20 06:26:52,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 252 states, 252 states have (on average 1.130952380952381) internal successors, (285), 251 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:26:52,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 285 transitions. [2021-11-20 06:26:52,168 INFO L704 BuchiCegarLoop]: Abstraction has 252 states and 285 transitions. [2021-11-20 06:26:52,168 INFO L587 BuchiCegarLoop]: Abstraction has 252 states and 285 transitions. [2021-11-20 06:26:52,169 INFO L425 BuchiCegarLoop]: ======== Iteration 32============ [2021-11-20 06:26:52,169 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 252 states and 285 transitions. [2021-11-20 06:26:52,170 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:26:52,170 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:26:52,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:26:52,172 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [30, 30, 30, 29, 29, 1, 1, 1, 1] [2021-11-20 06:26:52,172 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:26:52,173 INFO L791 eck$LassoCheckResult]: Stem: 32771#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 32772#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 32777#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32791#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32792#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32780#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32781#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32852#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32851#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32850#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32849#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32848#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32847#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32846#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32845#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32844#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32843#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32842#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32841#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32840#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32839#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32838#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32837#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32836#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32835#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32834#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32833#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32832#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32831#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32830#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32829#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32828#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32827#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32826#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32825#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32824#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32823#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32822#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32821#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32820#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32819#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32818#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32817#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32816#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32815#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32814#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32813#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32812#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32811#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32810#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32809#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32808#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32807#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32806#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32805#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32804#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32803#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32802#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32801#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32800#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32799#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 32795#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 32794#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 32782#L27-4 main_~i~0#1 := 0; 32783#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33017#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32862#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32860#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32861#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32865#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33015#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33012#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33009#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33006#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 33004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 33003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 33000#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32998#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32997#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32994#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32992#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32991#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32988#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32986#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32985#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32982#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32980#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32979#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32976#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32974#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32970#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32964#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32958#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32952#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32946#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32940#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32938#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32937#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32934#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32931#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32928#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32926#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32925#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32922#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32920#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32919#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32916#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32914#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32913#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32910#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32908#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32907#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32904#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32902#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32901#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32898#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32896#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32895#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32892#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32890#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32889#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32886#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32884#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32883#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32880#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32878#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32877#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32874#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32872#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32871#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32870#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32869#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32868#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32788#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32776#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32785#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32790#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32857#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32856#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32797#L34 [2021-11-20 06:26:52,173 INFO L793 eck$LassoCheckResult]: Loop: 32797#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 32798#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 32796#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 32797#L34 [2021-11-20 06:26:52,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:52,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1004865157, now seen corresponding path program 58 times [2021-11-20 06:26:52,173 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:52,173 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351704655] [2021-11-20 06:26:52,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:52,174 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:52,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:52,524 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:52,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:52,891 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:52,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:52,891 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 31 times [2021-11-20 06:26:52,891 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:52,892 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285164068] [2021-11-20 06:26:52,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:52,892 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:52,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:52,894 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:26:52,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:26:52,897 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:26:52,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:26:52,897 INFO L85 PathProgramCache]: Analyzing trace with hash 15878833, now seen corresponding path program 59 times [2021-11-20 06:26:52,897 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:26:52,898 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503865375] [2021-11-20 06:26:52,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:26:52,898 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:26:52,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:26:54,190 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1247 proven. 988 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:26:54,190 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:26:54,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503865375] [2021-11-20 06:26:54,192 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503865375] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:26:54,192 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1722886009] [2021-11-20 06:26:54,192 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:26:54,192 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:26:54,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:26:54,194 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:26:54,195 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2021-11-20 06:27:00,030 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2021-11-20 06:27:00,030 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:27:00,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 581 conjuncts, 64 conjunts are in the unsatisfiable core [2021-11-20 06:27:00,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:27:01,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1335 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:01,946 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:27:02,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 1335 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:02,326 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1722886009] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:27:02,327 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:27:02,327 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64, 64] total 97 [2021-11-20 06:27:02,327 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1097641745] [2021-11-20 06:27:02,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:27:02,386 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:27:02,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2021-11-20 06:27:02,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=7325, Unknown=0, NotChecked=0, Total=9506 [2021-11-20 06:27:02,388 INFO L87 Difference]: Start difference. First operand 252 states and 285 transitions. cyclomatic complexity: 36 Second operand has 98 states, 97 states have (on average 2.618556701030928) internal successors, (254), 98 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:04,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:27:04,328 INFO L93 Difference]: Finished difference Result 817 states and 944 transitions. [2021-11-20 06:27:04,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2021-11-20 06:27:04,329 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 817 states and 944 transitions. [2021-11-20 06:27:04,335 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:04,338 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 817 states to 452 states and 518 transitions. [2021-11-20 06:27:04,338 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 389 [2021-11-20 06:27:04,338 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 389 [2021-11-20 06:27:04,339 INFO L73 IsDeterministic]: Start isDeterministic. Operand 452 states and 518 transitions. [2021-11-20 06:27:04,339 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:27:04,340 INFO L681 BuchiCegarLoop]: Abstraction has 452 states and 518 transitions. [2021-11-20 06:27:04,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states and 518 transitions. [2021-11-20 06:27:04,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 260. [2021-11-20 06:27:04,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 260 states, 260 states have (on average 1.1307692307692307) internal successors, (294), 259 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:04,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 294 transitions. [2021-11-20 06:27:04,347 INFO L704 BuchiCegarLoop]: Abstraction has 260 states and 294 transitions. [2021-11-20 06:27:04,347 INFO L587 BuchiCegarLoop]: Abstraction has 260 states and 294 transitions. [2021-11-20 06:27:04,347 INFO L425 BuchiCegarLoop]: ======== Iteration 33============ [2021-11-20 06:27:04,347 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 260 states and 294 transitions. [2021-11-20 06:27:04,348 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:04,348 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:27:04,348 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:27:04,351 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [31, 31, 31, 30, 30, 1, 1, 1, 1] [2021-11-20 06:27:04,351 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:27:04,351 INFO L791 eck$LassoCheckResult]: Stem: 34929#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 34930#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 34935#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34950#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34951#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34938#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34939#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35013#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35012#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35011#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35010#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35009#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35008#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35007#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35006#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35005#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35004#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35003#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35002#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 35001#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 35000#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34999#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34998#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34997#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34996#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34995#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34994#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34993#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34992#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34991#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34990#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34989#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34988#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34987#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34986#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34985#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34984#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34983#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34982#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34981#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34980#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34979#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34978#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34977#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34976#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34975#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34974#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34973#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34972#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34971#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34970#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34969#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34968#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34967#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34966#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34965#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34964#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34963#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34962#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34961#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34960#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34959#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34958#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 34954#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 34953#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 34940#L27-4 main_~i~0#1 := 0; 34941#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35021#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35022#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35023#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35027#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35026#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35183#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35180#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35178#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35177#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35174#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35172#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35171#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35168#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35166#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35165#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35162#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35160#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35159#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35156#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35154#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35153#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35150#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35148#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35147#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35144#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35142#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35141#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35138#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35136#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35135#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35132#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35130#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35129#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35126#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35124#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35123#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35120#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35118#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35117#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35114#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35112#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35111#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35108#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35106#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35105#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35102#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35100#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35099#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35096#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35094#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35093#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35090#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35088#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35087#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35084#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35082#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35081#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35078#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35076#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35075#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35072#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35070#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35069#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35066#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35064#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35063#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35060#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35058#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35057#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35054#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35052#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35051#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35048#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35046#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35045#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35042#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35040#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35039#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35036#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35033#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 35031#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35030#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35029#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34947#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 34934#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 34944#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34949#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 35018#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 35017#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34956#L34 [2021-11-20 06:27:04,351 INFO L793 eck$LassoCheckResult]: Loop: 34956#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 34957#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 34955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 34956#L34 [2021-11-20 06:27:04,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:04,352 INFO L85 PathProgramCache]: Analyzing trace with hash 389940335, now seen corresponding path program 60 times [2021-11-20 06:27:04,352 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:04,352 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119852552] [2021-11-20 06:27:04,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:04,352 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:04,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:04,625 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:05,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:05,059 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:05,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:05,060 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 32 times [2021-11-20 06:27:05,060 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:05,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442526787] [2021-11-20 06:27:05,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:05,064 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:05,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:05,068 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:05,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:05,070 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:05,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:05,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1173975929, now seen corresponding path program 61 times [2021-11-20 06:27:05,072 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:05,072 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076992015] [2021-11-20 06:27:05,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:05,072 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:05,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:06,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1335 proven. 1052 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:06,746 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:27:06,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076992015] [2021-11-20 06:27:06,746 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1076992015] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:27:06,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1748421007] [2021-11-20 06:27:06,747 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:27:06,747 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:27:06,747 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:27:06,748 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:27:06,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2021-11-20 06:27:06,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:06,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 599 conjuncts, 66 conjunts are in the unsatisfiable core [2021-11-20 06:27:06,858 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:27:08,985 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1426 proven. 961 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:08,985 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:27:09,364 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 1426 proven. 961 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:09,364 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1748421007] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:27:09,364 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:27:09,364 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66, 66] total 100 [2021-11-20 06:27:09,364 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658992337] [2021-11-20 06:27:09,365 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:27:09,403 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:27:09,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2021-11-20 06:27:09,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2315, Invalid=7785, Unknown=0, NotChecked=0, Total=10100 [2021-11-20 06:27:09,406 INFO L87 Difference]: Start difference. First operand 260 states and 294 transitions. cyclomatic complexity: 37 Second operand has 101 states, 100 states have (on average 2.62) internal successors, (262), 101 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:11,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:27:11,380 INFO L93 Difference]: Finished difference Result 843 states and 974 transitions. [2021-11-20 06:27:11,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2021-11-20 06:27:11,381 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 843 states and 974 transitions. [2021-11-20 06:27:11,385 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:11,388 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 843 states to 466 states and 534 transitions. [2021-11-20 06:27:11,388 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 401 [2021-11-20 06:27:11,388 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 401 [2021-11-20 06:27:11,389 INFO L73 IsDeterministic]: Start isDeterministic. Operand 466 states and 534 transitions. [2021-11-20 06:27:11,389 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:27:11,390 INFO L681 BuchiCegarLoop]: Abstraction has 466 states and 534 transitions. [2021-11-20 06:27:11,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states and 534 transitions. [2021-11-20 06:27:11,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 268. [2021-11-20 06:27:11,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 268 states have (on average 1.1305970149253732) internal successors, (303), 267 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:11,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 303 transitions. [2021-11-20 06:27:11,396 INFO L704 BuchiCegarLoop]: Abstraction has 268 states and 303 transitions. [2021-11-20 06:27:11,397 INFO L587 BuchiCegarLoop]: Abstraction has 268 states and 303 transitions. [2021-11-20 06:27:11,397 INFO L425 BuchiCegarLoop]: ======== Iteration 34============ [2021-11-20 06:27:11,397 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 303 transitions. [2021-11-20 06:27:11,398 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:11,398 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:27:11,399 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:27:11,401 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [32, 32, 32, 31, 31, 1, 1, 1, 1] [2021-11-20 06:27:11,401 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:27:11,401 INFO L791 eck$LassoCheckResult]: Stem: 37156#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 37157#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 37162#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37176#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37177#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37165#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37166#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37241#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37240#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37239#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37238#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37237#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37236#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37235#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37234#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37233#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37232#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37231#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37230#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37229#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37228#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37227#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37226#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37225#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37224#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37223#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37222#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37221#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37220#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37219#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37218#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37217#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37216#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37215#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37214#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37213#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37212#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37211#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37210#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37209#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37208#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37207#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37206#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37205#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37204#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37203#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37202#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37201#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37200#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37199#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37198#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37197#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37196#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37195#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37194#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37193#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37192#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37191#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37190#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37189#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37188#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37187#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37186#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37185#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37184#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 37180#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 37179#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 37167#L27-4 main_~i~0#1 := 0; 37168#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37251#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37249#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37250#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37254#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37415#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37413#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37409#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37407#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37406#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37403#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37401#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37400#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37397#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37395#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37394#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37391#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37389#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37388#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37385#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37383#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37382#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37379#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37377#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37376#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37373#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37371#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37370#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37367#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37365#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37364#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37361#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37359#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37358#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37355#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37353#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37352#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37349#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37347#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37346#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37343#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37341#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37340#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37337#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37335#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37334#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37331#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37329#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37328#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37325#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37323#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37322#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37319#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37317#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37316#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37313#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37311#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37310#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37307#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37305#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37304#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37301#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37299#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37298#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37295#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37293#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37292#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37289#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37287#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37286#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37283#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37281#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37280#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37277#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37275#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37274#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37271#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37269#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37268#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37265#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37263#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37262#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37260#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37258#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37257#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37173#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37161#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37170#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37175#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37246#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37245#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37182#L34 [2021-11-20 06:27:11,402 INFO L793 eck$LassoCheckResult]: Loop: 37182#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 37183#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 37181#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 37182#L34 [2021-11-20 06:27:11,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:11,402 INFO L85 PathProgramCache]: Analyzing trace with hash -815842935, now seen corresponding path program 62 times [2021-11-20 06:27:11,402 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:11,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765099890] [2021-11-20 06:27:11,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:11,403 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:11,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:11,765 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:12,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:12,139 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:12,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:12,140 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 33 times [2021-11-20 06:27:12,140 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:12,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398907097] [2021-11-20 06:27:12,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:12,141 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:12,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:12,143 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:12,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:12,146 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:12,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:12,146 INFO L85 PathProgramCache]: Analyzing trace with hash 443091245, now seen corresponding path program 63 times [2021-11-20 06:27:12,147 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:12,147 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119485708] [2021-11-20 06:27:12,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:12,147 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:12,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:13,563 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1426 proven. 1118 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:13,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:27:13,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2119485708] [2021-11-20 06:27:13,563 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2119485708] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:27:13,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [933215899] [2021-11-20 06:27:13,563 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:27:13,563 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:27:13,563 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:27:13,565 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:27:13,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2021-11-20 06:27:23,803 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2021-11-20 06:27:23,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:27:23,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 617 conjuncts, 68 conjunts are in the unsatisfiable core [2021-11-20 06:27:23,828 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:27:25,968 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1520 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:25,968 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:27:26,421 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 1520 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:26,423 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [933215899] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:27:26,423 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:27:26,424 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68, 68] total 103 [2021-11-20 06:27:26,427 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407605599] [2021-11-20 06:27:26,428 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:27:26,479 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:27:26,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2021-11-20 06:27:26,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2453, Invalid=8259, Unknown=0, NotChecked=0, Total=10712 [2021-11-20 06:27:26,482 INFO L87 Difference]: Start difference. First operand 268 states and 303 transitions. cyclomatic complexity: 38 Second operand has 104 states, 103 states have (on average 2.621359223300971) internal successors, (270), 104 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:28,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:27:28,459 INFO L93 Difference]: Finished difference Result 869 states and 1004 transitions. [2021-11-20 06:27:28,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2021-11-20 06:27:28,466 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 869 states and 1004 transitions. [2021-11-20 06:27:28,471 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:28,473 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 869 states to 480 states and 550 transitions. [2021-11-20 06:27:28,474 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2021-11-20 06:27:28,474 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2021-11-20 06:27:28,474 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 550 transitions. [2021-11-20 06:27:28,475 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:27:28,475 INFO L681 BuchiCegarLoop]: Abstraction has 480 states and 550 transitions. [2021-11-20 06:27:28,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 550 transitions. [2021-11-20 06:27:28,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 276. [2021-11-20 06:27:28,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 276 states have (on average 1.1304347826086956) internal successors, (312), 275 states have internal predecessors, (312), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:28,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 312 transitions. [2021-11-20 06:27:28,483 INFO L704 BuchiCegarLoop]: Abstraction has 276 states and 312 transitions. [2021-11-20 06:27:28,483 INFO L587 BuchiCegarLoop]: Abstraction has 276 states and 312 transitions. [2021-11-20 06:27:28,483 INFO L425 BuchiCegarLoop]: ======== Iteration 35============ [2021-11-20 06:27:28,483 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 276 states and 312 transitions. [2021-11-20 06:27:28,484 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:28,484 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:27:28,484 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:27:28,486 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [33, 33, 33, 32, 32, 1, 1, 1, 1] [2021-11-20 06:27:28,486 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:27:28,486 INFO L791 eck$LassoCheckResult]: Stem: 39452#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 39453#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 39458#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39473#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39474#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39461#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39462#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39540#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39539#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39538#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39537#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39536#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39535#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39534#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39533#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39532#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39531#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39530#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39529#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39528#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39527#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39526#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39525#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39524#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39523#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39522#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39521#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39520#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39519#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39518#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39517#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39516#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39515#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39514#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39513#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39512#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39511#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39510#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39509#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39508#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39507#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39506#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39505#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39504#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39503#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39502#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39501#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39500#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39499#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39497#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39496#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39495#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39494#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39493#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39492#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39491#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39490#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39489#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39488#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39487#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39486#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39485#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39484#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39483#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39482#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39481#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 39477#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 39476#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 39463#L27-4 main_~i~0#1 := 0; 39464#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39548#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39549#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39554#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39553#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39722#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39711#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39707#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39704#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39701#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39699#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39698#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39695#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39693#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39692#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39689#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39687#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39686#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39683#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39681#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39680#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39677#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39675#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39674#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39671#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39669#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39668#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39665#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39663#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39662#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39659#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39657#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39656#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39653#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39651#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39650#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39647#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39645#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39644#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39641#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39639#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39638#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39635#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39633#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39632#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39629#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39627#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39623#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39621#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39620#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39614#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39609#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39603#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39599#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39596#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39593#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39591#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39590#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39587#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39585#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39584#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39581#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39579#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39578#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39575#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39573#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39572#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39567#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39566#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39561#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39560#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39558#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39457#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39467#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39472#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39479#L34 [2021-11-20 06:27:28,487 INFO L793 eck$LassoCheckResult]: Loop: 39479#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 39480#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 39478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 39479#L34 [2021-11-20 06:27:28,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:28,487 INFO L85 PathProgramCache]: Analyzing trace with hash -706859669, now seen corresponding path program 64 times [2021-11-20 06:27:28,488 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:28,488 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833739371] [2021-11-20 06:27:28,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:28,488 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:28,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:28,823 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:29,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:29,182 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:29,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:29,183 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 34 times [2021-11-20 06:27:29,183 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:29,183 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1727423711] [2021-11-20 06:27:29,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:29,184 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:29,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:29,186 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:29,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:29,189 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:29,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:29,189 INFO L85 PathProgramCache]: Analyzing trace with hash 168292875, now seen corresponding path program 65 times [2021-11-20 06:27:29,189 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:29,190 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912834486] [2021-11-20 06:27:29,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:29,190 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:29,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:30,822 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1520 proven. 1186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:30,822 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:27:30,822 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912834486] [2021-11-20 06:27:30,823 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1912834486] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:27:30,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833811794] [2021-11-20 06:27:30,823 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:27:30,823 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:27:30,823 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:27:30,833 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:27:30,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2021-11-20 06:27:34,551 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 34 check-sat command(s) [2021-11-20 06:27:34,551 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:27:34,567 INFO L263 TraceCheckSpWp]: Trace formula consists of 635 conjuncts, 70 conjunts are in the unsatisfiable core [2021-11-20 06:27:34,569 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:27:36,793 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1617 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:36,794 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:27:37,148 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 1617 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:37,148 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833811794] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:27:37,148 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:27:37,149 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70, 70] total 106 [2021-11-20 06:27:37,149 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584846612] [2021-11-20 06:27:37,149 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:27:37,221 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:27:37,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2021-11-20 06:27:37,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2595, Invalid=8747, Unknown=0, NotChecked=0, Total=11342 [2021-11-20 06:27:37,223 INFO L87 Difference]: Start difference. First operand 276 states and 312 transitions. cyclomatic complexity: 39 Second operand has 107 states, 106 states have (on average 2.6226415094339623) internal successors, (278), 107 states have internal predecessors, (278), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:39,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:27:39,331 INFO L93 Difference]: Finished difference Result 895 states and 1034 transitions. [2021-11-20 06:27:39,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2021-11-20 06:27:39,332 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 895 states and 1034 transitions. [2021-11-20 06:27:39,335 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:39,337 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 895 states to 494 states and 566 transitions. [2021-11-20 06:27:39,338 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 425 [2021-11-20 06:27:39,338 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 425 [2021-11-20 06:27:39,338 INFO L73 IsDeterministic]: Start isDeterministic. Operand 494 states and 566 transitions. [2021-11-20 06:27:39,339 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:27:39,340 INFO L681 BuchiCegarLoop]: Abstraction has 494 states and 566 transitions. [2021-11-20 06:27:39,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states and 566 transitions. [2021-11-20 06:27:39,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 284. [2021-11-20 06:27:39,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 284 states, 284 states have (on average 1.130281690140845) internal successors, (321), 283 states have internal predecessors, (321), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:39,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 321 transitions. [2021-11-20 06:27:39,347 INFO L704 BuchiCegarLoop]: Abstraction has 284 states and 321 transitions. [2021-11-20 06:27:39,347 INFO L587 BuchiCegarLoop]: Abstraction has 284 states and 321 transitions. [2021-11-20 06:27:39,347 INFO L425 BuchiCegarLoop]: ======== Iteration 36============ [2021-11-20 06:27:39,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 284 states and 321 transitions. [2021-11-20 06:27:39,349 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:39,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:27:39,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:27:39,350 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [34, 34, 34, 33, 33, 1, 1, 1, 1] [2021-11-20 06:27:39,350 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:27:39,351 INFO L791 eck$LassoCheckResult]: Stem: 41817#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 41818#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 41823#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41837#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41838#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41826#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41827#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41906#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41905#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41904#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41903#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41902#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41901#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41900#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41899#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41898#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41897#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41896#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41895#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41894#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41893#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41892#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41891#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41890#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41889#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41888#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41887#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41886#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41885#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41884#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41883#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41882#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41881#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41880#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41879#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41878#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41877#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41876#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41875#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41874#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41873#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41872#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41871#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41870#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41869#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41868#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41867#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41866#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41865#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41864#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41863#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41862#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41861#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41860#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41859#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41858#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41857#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41856#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41855#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41854#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41853#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41852#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41851#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41850#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41849#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41848#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41847#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41846#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41845#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 41841#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 41840#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 41828#L27-4 main_~i~0#1 := 0; 41829#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42095#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41916#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41914#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41915#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41919#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42093#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42090#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42088#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42087#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42084#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42082#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42081#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42078#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42076#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42075#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42072#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42070#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42069#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42066#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42064#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42063#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42060#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42058#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42057#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42054#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42052#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42051#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42048#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42046#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42045#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42042#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42040#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42039#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42036#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42034#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42033#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42030#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42028#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42027#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42024#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42022#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42021#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42018#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42016#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42015#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42012#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42010#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42009#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42006#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 42004#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 42003#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 42000#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41998#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41997#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41994#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41992#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41991#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41988#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41986#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41985#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41982#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41980#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41979#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41976#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41974#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41970#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41968#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41964#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41958#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41956#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41955#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41952#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41950#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41949#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41946#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41944#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41943#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41940#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41938#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41937#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41934#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41932#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41931#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41928#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41926#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41925#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41924#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41923#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41922#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41834#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41822#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41831#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41836#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41911#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41843#L34 [2021-11-20 06:27:39,351 INFO L793 eck$LassoCheckResult]: Loop: 41843#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 41844#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 41842#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 41843#L34 [2021-11-20 06:27:39,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:39,352 INFO L85 PathProgramCache]: Analyzing trace with hash 133547149, now seen corresponding path program 66 times [2021-11-20 06:27:39,352 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:39,352 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195761679] [2021-11-20 06:27:39,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:39,353 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:39,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:39,568 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:39,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:39,869 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:39,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:39,870 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 35 times [2021-11-20 06:27:39,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:39,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838545694] [2021-11-20 06:27:39,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:39,871 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:39,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:39,874 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:39,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:39,876 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:39,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:39,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1363439529, now seen corresponding path program 67 times [2021-11-20 06:27:39,877 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:39,877 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425000110] [2021-11-20 06:27:39,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:39,877 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:39,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:41,515 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1617 proven. 1256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:41,515 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:27:41,515 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425000110] [2021-11-20 06:27:41,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [425000110] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:27:41,515 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1690779724] [2021-11-20 06:27:41,515 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:27:41,515 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:27:41,515 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:27:41,517 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:27:41,517 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2021-11-20 06:27:41,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:41,633 INFO L263 TraceCheckSpWp]: Trace formula consists of 653 conjuncts, 72 conjunts are in the unsatisfiable core [2021-11-20 06:27:41,635 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:27:43,952 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1717 proven. 1156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:43,952 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:27:44,411 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 1717 proven. 1156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:44,412 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1690779724] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:27:44,412 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:27:44,413 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72, 72] total 109 [2021-11-20 06:27:44,414 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43655320] [2021-11-20 06:27:44,414 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:27:44,465 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:27:44,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 110 interpolants. [2021-11-20 06:27:44,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2741, Invalid=9249, Unknown=0, NotChecked=0, Total=11990 [2021-11-20 06:27:44,468 INFO L87 Difference]: Start difference. First operand 284 states and 321 transitions. cyclomatic complexity: 40 Second operand has 110 states, 109 states have (on average 2.623853211009174) internal successors, (286), 110 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:46,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:27:46,691 INFO L93 Difference]: Finished difference Result 921 states and 1064 transitions. [2021-11-20 06:27:46,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2021-11-20 06:27:46,692 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 921 states and 1064 transitions. [2021-11-20 06:27:46,694 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:46,697 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 921 states to 508 states and 582 transitions. [2021-11-20 06:27:46,697 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 437 [2021-11-20 06:27:46,697 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 437 [2021-11-20 06:27:46,697 INFO L73 IsDeterministic]: Start isDeterministic. Operand 508 states and 582 transitions. [2021-11-20 06:27:46,698 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:27:46,698 INFO L681 BuchiCegarLoop]: Abstraction has 508 states and 582 transitions. [2021-11-20 06:27:46,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states and 582 transitions. [2021-11-20 06:27:46,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 292. [2021-11-20 06:27:46,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 292 states have (on average 1.13013698630137) internal successors, (330), 291 states have internal predecessors, (330), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:27:46,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 330 transitions. [2021-11-20 06:27:46,705 INFO L704 BuchiCegarLoop]: Abstraction has 292 states and 330 transitions. [2021-11-20 06:27:46,705 INFO L587 BuchiCegarLoop]: Abstraction has 292 states and 330 transitions. [2021-11-20 06:27:46,705 INFO L425 BuchiCegarLoop]: ======== Iteration 37============ [2021-11-20 06:27:46,706 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 292 states and 330 transitions. [2021-11-20 06:27:46,707 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:27:46,707 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:27:46,707 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:27:46,708 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [35, 35, 35, 34, 34, 1, 1, 1, 1] [2021-11-20 06:27:46,708 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:27:46,709 INFO L791 eck$LassoCheckResult]: Stem: 44251#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 44252#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 44257#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44272#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44273#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44260#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44261#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44343#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44342#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44341#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44340#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44339#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44338#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44337#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44334#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44333#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44294#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44289#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44288#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44286#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44285#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44284#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44283#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44280#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 44276#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 44275#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 44262#L27-4 main_~i~0#1 := 0; 44263#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44351#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44352#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44353#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44357#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44356#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44537#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44534#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44532#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44531#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44528#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44526#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44525#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44522#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44520#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44519#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44516#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44514#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44513#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44510#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44508#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44507#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44504#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44502#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44501#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44498#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44496#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44495#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44492#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44490#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44489#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44486#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44484#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44483#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44480#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44478#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44477#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44474#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44472#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44471#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44468#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44466#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44465#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44462#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44460#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44459#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44456#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44454#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44453#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44450#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44448#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44447#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44444#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44442#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44441#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44438#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44436#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44435#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44432#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44430#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44429#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44426#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44424#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44423#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44420#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44418#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44417#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44414#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44412#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44411#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44408#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44406#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44405#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44402#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44400#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44399#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44396#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44394#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44393#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44390#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44388#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44387#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44384#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44382#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44381#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44378#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44376#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44375#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44372#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44370#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44369#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44366#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44364#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44363#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44361#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44360#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44359#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44269#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44256#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44266#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44271#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44348#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44347#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44278#L34 [2021-11-20 06:27:46,709 INFO L793 eck$LassoCheckResult]: Loop: 44278#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 44279#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 44277#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 44278#L34 [2021-11-20 06:27:46,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:46,710 INFO L85 PathProgramCache]: Analyzing trace with hash 922738279, now seen corresponding path program 68 times [2021-11-20 06:27:46,710 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:46,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766416306] [2021-11-20 06:27:46,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:46,711 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:46,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:46,954 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:47,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:47,343 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:47,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:47,343 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 36 times [2021-11-20 06:27:47,343 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:47,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811211677] [2021-11-20 06:27:47,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:47,344 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:47,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:47,346 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:27:47,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:27:47,349 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:27:47,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:27:47,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1505415055, now seen corresponding path program 69 times [2021-11-20 06:27:47,349 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:27:47,350 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1779610757] [2021-11-20 06:27:47,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:27:47,350 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:27:47,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:27:49,056 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1717 proven. 1328 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:27:49,056 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:27:49,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1779610757] [2021-11-20 06:27:49,056 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1779610757] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:27:49,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [28886969] [2021-11-20 06:27:49,056 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:27:49,058 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:27:49,058 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:27:49,060 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:27:49,064 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2021-11-20 06:28:09,317 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2021-11-20 06:28:09,318 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:28:09,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 671 conjuncts, 74 conjunts are in the unsatisfiable core [2021-11-20 06:28:09,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:28:11,635 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1820 proven. 1225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:11,636 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:28:12,043 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 1820 proven. 1225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:12,043 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [28886969] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:28:12,043 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:28:12,043 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 74, 74] total 112 [2021-11-20 06:28:12,043 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756738525] [2021-11-20 06:28:12,043 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:28:12,080 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:28:12,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2021-11-20 06:28:12,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2891, Invalid=9765, Unknown=0, NotChecked=0, Total=12656 [2021-11-20 06:28:12,082 INFO L87 Difference]: Start difference. First operand 292 states and 330 transitions. cyclomatic complexity: 41 Second operand has 113 states, 112 states have (on average 2.625) internal successors, (294), 113 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:14,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:28:14,359 INFO L93 Difference]: Finished difference Result 947 states and 1094 transitions. [2021-11-20 06:28:14,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2021-11-20 06:28:14,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 947 states and 1094 transitions. [2021-11-20 06:28:14,363 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:14,365 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 947 states to 522 states and 598 transitions. [2021-11-20 06:28:14,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 449 [2021-11-20 06:28:14,366 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 449 [2021-11-20 06:28:14,366 INFO L73 IsDeterministic]: Start isDeterministic. Operand 522 states and 598 transitions. [2021-11-20 06:28:14,367 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:28:14,367 INFO L681 BuchiCegarLoop]: Abstraction has 522 states and 598 transitions. [2021-11-20 06:28:14,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 522 states and 598 transitions. [2021-11-20 06:28:14,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 522 to 300. [2021-11-20 06:28:14,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 300 states have (on average 1.13) internal successors, (339), 299 states have internal predecessors, (339), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:14,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 339 transitions. [2021-11-20 06:28:14,374 INFO L704 BuchiCegarLoop]: Abstraction has 300 states and 339 transitions. [2021-11-20 06:28:14,374 INFO L587 BuchiCegarLoop]: Abstraction has 300 states and 339 transitions. [2021-11-20 06:28:14,374 INFO L425 BuchiCegarLoop]: ======== Iteration 38============ [2021-11-20 06:28:14,374 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 300 states and 339 transitions. [2021-11-20 06:28:14,375 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:14,375 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:28:14,375 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:28:14,376 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [36, 36, 36, 35, 35, 1, 1, 1, 1] [2021-11-20 06:28:14,376 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:28:14,377 INFO L791 eck$LassoCheckResult]: Stem: 46754#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 46755#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 46760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46774#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46775#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46847#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46846#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46845#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46844#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46843#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46842#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46841#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46840#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46839#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46838#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46837#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46836#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46835#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46834#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46833#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46832#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46831#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46830#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46829#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46828#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46827#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46826#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46825#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46824#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46823#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46822#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46821#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46820#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46819#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46818#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46817#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46816#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46815#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46814#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46813#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46812#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46811#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46810#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46809#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46808#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46807#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46806#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46805#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46804#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46803#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46802#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46801#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46800#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46799#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46798#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46797#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46796#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46795#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46794#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46793#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46792#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46791#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46790#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46789#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46788#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46787#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46786#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46785#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46784#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46783#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46782#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 46778#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 46777#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 46765#L27-4 main_~i~0#1 := 0; 46766#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47049#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46857#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46855#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46856#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46860#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47048#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47045#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47043#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47042#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47039#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47037#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47036#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47033#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47031#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47030#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47027#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47025#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47024#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47021#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47019#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47018#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47015#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47013#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47012#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47009#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47007#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47006#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 47003#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 47001#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 47000#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46997#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46995#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46994#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46991#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46989#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46988#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46985#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46983#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46982#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46979#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46977#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46976#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46973#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46971#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46970#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46967#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46965#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46964#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46961#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46959#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46958#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46955#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46953#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46952#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46949#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46947#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46946#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46943#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46941#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46940#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46937#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46935#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46934#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46931#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46929#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46928#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46925#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46923#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46922#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46919#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46917#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46916#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46913#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46911#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46910#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46907#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46905#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46904#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46901#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46899#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46898#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46895#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46893#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46892#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46889#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46887#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46886#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46883#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46881#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46880#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46877#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46875#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46874#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46871#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46869#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46868#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46866#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46864#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46863#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46771#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46759#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46768#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46773#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46852#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46851#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46780#L34 [2021-11-20 06:28:14,377 INFO L793 eck$LassoCheckResult]: Loop: 46780#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 46781#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 46779#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 46780#L34 [2021-11-20 06:28:14,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:14,377 INFO L85 PathProgramCache]: Analyzing trace with hash -903026799, now seen corresponding path program 70 times [2021-11-20 06:28:14,377 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:14,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201430914] [2021-11-20 06:28:14,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:14,378 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:14,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:14,703 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:15,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:15,051 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:15,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:15,051 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 37 times [2021-11-20 06:28:15,051 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:15,052 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749698837] [2021-11-20 06:28:15,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:15,052 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:15,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:15,054 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:15,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:15,057 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:15,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:15,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1603812901, now seen corresponding path program 71 times [2021-11-20 06:28:15,057 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:15,057 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520314331] [2021-11-20 06:28:15,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:15,058 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:15,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:28:16,842 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1820 proven. 1402 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:16,842 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:28:16,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520314331] [2021-11-20 06:28:16,842 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1520314331] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:28:16,842 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [250109390] [2021-11-20 06:28:16,842 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:28:16,842 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:28:16,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:28:16,844 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:28:16,845 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2021-11-20 06:28:26,296 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 37 check-sat command(s) [2021-11-20 06:28:26,296 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:28:26,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 689 conjuncts, 76 conjunts are in the unsatisfiable core [2021-11-20 06:28:26,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:28:28,715 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1926 proven. 1296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:28,716 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:28:29,184 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 1926 proven. 1296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:29,184 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [250109390] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:28:29,184 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:28:29,185 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [76, 76, 76] total 115 [2021-11-20 06:28:29,185 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400708005] [2021-11-20 06:28:29,185 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:28:29,234 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:28:29,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2021-11-20 06:28:29,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3045, Invalid=10295, Unknown=0, NotChecked=0, Total=13340 [2021-11-20 06:28:29,237 INFO L87 Difference]: Start difference. First operand 300 states and 339 transitions. cyclomatic complexity: 42 Second operand has 116 states, 115 states have (on average 2.626086956521739) internal successors, (302), 116 states have internal predecessors, (302), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:31,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:28:31,609 INFO L93 Difference]: Finished difference Result 973 states and 1124 transitions. [2021-11-20 06:28:31,609 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2021-11-20 06:28:31,610 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 973 states and 1124 transitions. [2021-11-20 06:28:31,612 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:31,615 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 973 states to 536 states and 614 transitions. [2021-11-20 06:28:31,615 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2021-11-20 06:28:31,615 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2021-11-20 06:28:31,615 INFO L73 IsDeterministic]: Start isDeterministic. Operand 536 states and 614 transitions. [2021-11-20 06:28:31,616 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:28:31,616 INFO L681 BuchiCegarLoop]: Abstraction has 536 states and 614 transitions. [2021-11-20 06:28:31,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 536 states and 614 transitions. [2021-11-20 06:28:31,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 536 to 308. [2021-11-20 06:28:31,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 308 states have (on average 1.12987012987013) internal successors, (348), 307 states have internal predecessors, (348), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:31,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 348 transitions. [2021-11-20 06:28:31,623 INFO L704 BuchiCegarLoop]: Abstraction has 308 states and 348 transitions. [2021-11-20 06:28:31,623 INFO L587 BuchiCegarLoop]: Abstraction has 308 states and 348 transitions. [2021-11-20 06:28:31,623 INFO L425 BuchiCegarLoop]: ======== Iteration 39============ [2021-11-20 06:28:31,623 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 308 states and 348 transitions. [2021-11-20 06:28:31,624 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:31,624 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:28:31,624 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:28:31,625 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [37, 37, 37, 36, 36, 1, 1, 1, 1] [2021-11-20 06:28:31,625 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:28:31,626 INFO L791 eck$LassoCheckResult]: Stem: 49326#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 49327#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 49332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49347#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49348#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49421#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49420#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49419#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49418#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49417#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49416#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49415#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49414#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49413#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49412#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49411#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49410#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49409#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49408#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49407#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49406#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49405#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49404#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49403#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49402#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49401#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49400#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49399#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49398#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49397#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49396#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49395#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49394#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49393#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49392#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49391#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49390#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49389#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49388#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49387#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49386#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49385#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49383#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49382#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49380#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49379#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49378#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49377#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49376#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49375#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49374#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49373#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49372#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49371#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49370#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49369#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49368#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49367#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49366#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49365#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49364#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49363#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49362#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49361#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49360#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49359#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49358#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49357#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49356#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49355#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 49351#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 49350#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 49337#L27-4 main_~i~0#1 := 0; 49338#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49430#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49431#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49432#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49436#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49435#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49628#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49625#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49623#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49622#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49619#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49617#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49616#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49613#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49611#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49610#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49607#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49605#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49601#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49599#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49598#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49595#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49593#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49592#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49589#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49587#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49586#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49583#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49581#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49580#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49577#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49575#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49574#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49571#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49569#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49568#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49565#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49563#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49562#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49559#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49557#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49556#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49553#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49551#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49550#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49547#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49545#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49544#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49541#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49539#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49538#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49535#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49533#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49532#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49529#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49527#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49526#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49523#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49521#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49520#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49517#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49515#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49514#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49511#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49509#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49508#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49505#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49503#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49502#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49499#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49497#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49496#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49493#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49491#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49490#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49487#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49485#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49484#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49481#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49479#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49478#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49475#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49473#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49472#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49469#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49467#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49466#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49463#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49460#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49457#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49455#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49454#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49451#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49449#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49448#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49445#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49443#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49442#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49439#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49438#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49344#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49331#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49341#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49346#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49427#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49426#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49353#L34 [2021-11-20 06:28:31,626 INFO L793 eck$LassoCheckResult]: Loop: 49353#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 49354#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 49352#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 49353#L34 [2021-11-20 06:28:31,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:31,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1579079523, now seen corresponding path program 72 times [2021-11-20 06:28:31,626 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:31,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517168327] [2021-11-20 06:28:31,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:31,627 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:32,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:32,023 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:32,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:32,455 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:32,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:32,455 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 38 times [2021-11-20 06:28:32,455 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:32,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117110875] [2021-11-20 06:28:32,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:32,456 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:32,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:32,458 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:32,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:32,462 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:32,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:32,462 INFO L85 PathProgramCache]: Analyzing trace with hash -418683629, now seen corresponding path program 73 times [2021-11-20 06:28:32,462 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:32,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686865896] [2021-11-20 06:28:32,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:32,463 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:32,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:28:34,502 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 1926 proven. 1478 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:34,502 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:28:34,502 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686865896] [2021-11-20 06:28:34,503 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [686865896] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:28:34,503 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1575660491] [2021-11-20 06:28:34,503 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:28:34,503 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:28:34,503 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:28:34,512 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:28:34,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2021-11-20 06:28:34,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:28:34,630 INFO L263 TraceCheckSpWp]: Trace formula consists of 707 conjuncts, 78 conjunts are in the unsatisfiable core [2021-11-20 06:28:34,632 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:28:37,149 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 2035 proven. 1369 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:37,149 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:28:37,646 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 2035 proven. 1369 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:37,646 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1575660491] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:28:37,647 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:28:37,647 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [78, 78, 78] total 118 [2021-11-20 06:28:37,647 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736927319] [2021-11-20 06:28:37,647 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:28:37,680 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:28:37,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 119 interpolants. [2021-11-20 06:28:37,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3203, Invalid=10839, Unknown=0, NotChecked=0, Total=14042 [2021-11-20 06:28:37,682 INFO L87 Difference]: Start difference. First operand 308 states and 348 transitions. cyclomatic complexity: 43 Second operand has 119 states, 118 states have (on average 2.6271186440677967) internal successors, (310), 119 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:40,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:28:40,386 INFO L93 Difference]: Finished difference Result 999 states and 1154 transitions. [2021-11-20 06:28:40,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2021-11-20 06:28:40,387 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 999 states and 1154 transitions. [2021-11-20 06:28:40,390 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:40,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 999 states to 550 states and 630 transitions. [2021-11-20 06:28:40,393 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 473 [2021-11-20 06:28:40,393 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 473 [2021-11-20 06:28:40,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 550 states and 630 transitions. [2021-11-20 06:28:40,394 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:28:40,394 INFO L681 BuchiCegarLoop]: Abstraction has 550 states and 630 transitions. [2021-11-20 06:28:40,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states and 630 transitions. [2021-11-20 06:28:40,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 316. [2021-11-20 06:28:40,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 316 states have (on average 1.129746835443038) internal successors, (357), 315 states have internal predecessors, (357), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:28:40,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 357 transitions. [2021-11-20 06:28:40,401 INFO L704 BuchiCegarLoop]: Abstraction has 316 states and 357 transitions. [2021-11-20 06:28:40,401 INFO L587 BuchiCegarLoop]: Abstraction has 316 states and 357 transitions. [2021-11-20 06:28:40,401 INFO L425 BuchiCegarLoop]: ======== Iteration 40============ [2021-11-20 06:28:40,401 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 357 transitions. [2021-11-20 06:28:40,403 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:28:40,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:28:40,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:28:40,404 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [38, 38, 38, 37, 37, 1, 1, 1, 1] [2021-11-20 06:28:40,404 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:28:40,405 INFO L791 eck$LassoCheckResult]: Stem: 51967#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 51968#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 51973#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51987#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51988#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51976#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51977#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52064#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52063#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52062#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52061#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52060#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52059#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52058#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52057#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52056#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52055#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52054#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52053#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52052#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52051#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52050#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52049#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52048#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52047#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52046#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52045#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52044#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52043#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52042#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52041#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52040#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52039#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52038#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52037#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52036#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52035#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52034#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52033#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52032#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52031#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52030#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52029#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52028#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52027#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52026#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52025#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52024#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52023#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52022#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52021#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52020#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52019#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52018#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52017#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52016#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52015#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52014#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52013#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52012#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52011#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52010#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52009#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52008#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52007#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52006#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52005#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52004#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52003#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52002#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 52001#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 52000#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51999#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51998#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51997#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51996#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51995#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 51991#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 51990#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 51978#L27-4 main_~i~0#1 := 0; 51979#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52277#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52074#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52072#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52073#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52077#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52275#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52272#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52270#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52269#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52266#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52264#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52263#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52260#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52258#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52257#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52254#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52252#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52251#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52248#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52246#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52245#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52242#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52240#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52239#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52236#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52234#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52233#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52230#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52228#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52227#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52224#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52222#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52221#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52218#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52216#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52215#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52212#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52210#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52209#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52206#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52204#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52203#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52200#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52198#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52197#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52194#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52192#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52191#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52188#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52186#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52185#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52182#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52180#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52179#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52176#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52174#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52173#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52170#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52168#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52167#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52164#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52162#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52161#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52158#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52156#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52155#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52152#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52150#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52149#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52146#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52144#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52143#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52140#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52138#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52137#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52134#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52132#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52131#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52128#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52126#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52125#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52122#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52120#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52119#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52116#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52114#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52113#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52110#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52108#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52107#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52104#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52102#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52101#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52098#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52096#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52095#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52092#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52090#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52089#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52086#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52084#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52083#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 52082#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52081#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52080#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 51984#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 51972#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 51981#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 51986#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 52069#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 52068#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 51993#L34 [2021-11-20 06:28:40,405 INFO L793 eck$LassoCheckResult]: Loop: 51993#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 51994#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 51992#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 51993#L34 [2021-11-20 06:28:40,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:40,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1953963371, now seen corresponding path program 74 times [2021-11-20 06:28:40,406 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:40,406 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312633826] [2021-11-20 06:28:40,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:40,406 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:40,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:40,800 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:41,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:41,184 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:41,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:41,185 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 39 times [2021-11-20 06:28:41,185 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:41,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346234834] [2021-11-20 06:28:41,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:41,186 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:41,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:41,188 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:28:41,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:28:41,191 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:28:41,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:28:41,191 INFO L85 PathProgramCache]: Analyzing trace with hash -830983007, now seen corresponding path program 75 times [2021-11-20 06:28:41,191 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:28:41,191 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696643924] [2021-11-20 06:28:41,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:28:41,192 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:28:41,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:28:43,052 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2035 proven. 1556 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:28:43,052 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:28:43,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696643924] [2021-11-20 06:28:43,054 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696643924] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:28:43,054 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [176166632] [2021-11-20 06:28:43,054 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:28:43,054 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:28:43,054 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:28:43,055 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:28:43,113 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2021-11-20 06:29:19,893 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 39 check-sat command(s) [2021-11-20 06:29:19,893 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:29:19,932 INFO L263 TraceCheckSpWp]: Trace formula consists of 725 conjuncts, 80 conjunts are in the unsatisfiable core [2021-11-20 06:29:19,935 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:29:22,444 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2147 proven. 1444 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:29:22,445 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:29:22,845 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 2147 proven. 1444 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:29:22,845 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [176166632] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:29:22,845 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:29:22,845 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [80, 80, 80] total 121 [2021-11-20 06:29:22,845 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414034956] [2021-11-20 06:29:22,845 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:29:22,881 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:29:22,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2021-11-20 06:29:22,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3365, Invalid=11397, Unknown=0, NotChecked=0, Total=14762 [2021-11-20 06:29:22,883 INFO L87 Difference]: Start difference. First operand 316 states and 357 transitions. cyclomatic complexity: 44 Second operand has 122 states, 121 states have (on average 2.628099173553719) internal successors, (318), 122 states have internal predecessors, (318), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:29:25,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:29:25,251 INFO L93 Difference]: Finished difference Result 1025 states and 1184 transitions. [2021-11-20 06:29:25,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2021-11-20 06:29:25,251 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1025 states and 1184 transitions. [2021-11-20 06:29:25,254 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:29:25,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1025 states to 564 states and 646 transitions. [2021-11-20 06:29:25,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 485 [2021-11-20 06:29:25,257 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 485 [2021-11-20 06:29:25,257 INFO L73 IsDeterministic]: Start isDeterministic. Operand 564 states and 646 transitions. [2021-11-20 06:29:25,258 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:29:25,258 INFO L681 BuchiCegarLoop]: Abstraction has 564 states and 646 transitions. [2021-11-20 06:29:25,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states and 646 transitions. [2021-11-20 06:29:25,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 324. [2021-11-20 06:29:25,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.1296296296296295) internal successors, (366), 323 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:29:25,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 366 transitions. [2021-11-20 06:29:25,265 INFO L704 BuchiCegarLoop]: Abstraction has 324 states and 366 transitions. [2021-11-20 06:29:25,265 INFO L587 BuchiCegarLoop]: Abstraction has 324 states and 366 transitions. [2021-11-20 06:29:25,265 INFO L425 BuchiCegarLoop]: ======== Iteration 41============ [2021-11-20 06:29:25,265 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 366 transitions. [2021-11-20 06:29:25,266 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:29:25,266 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:29:25,266 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:29:25,268 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [39, 39, 39, 38, 38, 1, 1, 1, 1] [2021-11-20 06:29:25,268 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:29:25,268 INFO L791 eck$LassoCheckResult]: Stem: 54677#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 54678#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 54683#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54698#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54699#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54686#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54687#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54777#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54776#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54775#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54774#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54773#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54772#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54771#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54770#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54769#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54768#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54767#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54766#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54765#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54764#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54763#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54762#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54761#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54760#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54759#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54758#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54757#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54756#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54755#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54754#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54753#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54752#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54751#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54750#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54749#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54748#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54747#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54746#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54745#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54744#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54743#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54742#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54741#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54740#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54739#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54738#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54737#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54736#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54735#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54734#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54733#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54732#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54731#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54730#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54729#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54728#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54727#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54726#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54725#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54724#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54723#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54722#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54721#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54720#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54719#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54718#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54717#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54716#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54715#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54714#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54713#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54712#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54711#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54710#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54709#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54708#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54707#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54706#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 54702#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 54701#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 54688#L27-4 main_~i~0#1 := 0; 54689#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54785#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54786#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54787#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54791#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54790#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54995#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54992#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54990#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54989#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54986#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54984#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54983#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54980#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54978#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54977#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54974#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54972#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54971#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54968#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54966#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54965#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54962#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54960#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54959#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54956#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54954#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54953#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54950#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54948#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54947#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54944#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54942#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54941#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54938#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54936#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54935#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54932#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54930#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54929#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54926#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54924#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54923#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54920#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54918#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54917#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54914#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54912#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54911#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54908#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54906#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54905#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54902#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54900#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54899#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54896#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54894#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54893#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54890#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54888#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54887#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54884#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54882#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54881#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54878#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54876#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54875#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54872#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54870#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54869#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54866#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54864#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54863#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54860#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54858#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54857#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54854#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54852#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54851#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54848#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54846#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54845#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54842#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54840#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54839#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54836#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54834#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54833#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54830#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54828#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54827#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54824#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54822#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54821#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54818#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54816#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54815#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54812#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54810#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54809#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54806#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54804#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54803#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54800#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54798#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54797#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54795#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54794#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54793#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54695#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54682#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54692#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54697#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54782#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54781#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54704#L34 [2021-11-20 06:29:25,269 INFO L793 eck$LassoCheckResult]: Loop: 54704#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 54705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 54703#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 54704#L34 [2021-11-20 06:29:25,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:29:25,269 INFO L85 PathProgramCache]: Analyzing trace with hash -1682515873, now seen corresponding path program 76 times [2021-11-20 06:29:25,270 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:29:25,270 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1736563668] [2021-11-20 06:29:25,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:29:25,270 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:29:25,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:29:25,626 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:29:25,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:29:25,938 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:29:25,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:29:25,939 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 40 times [2021-11-20 06:29:25,939 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:29:25,939 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214281144] [2021-11-20 06:29:25,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:29:25,939 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:29:25,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:29:25,941 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:29:25,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:29:25,944 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:29:25,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:29:25,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1561988457, now seen corresponding path program 77 times [2021-11-20 06:29:25,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:29:25,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974012315] [2021-11-20 06:29:25,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:29:25,945 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:29:25,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:29:27,856 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2147 proven. 1636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:29:27,857 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:29:27,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974012315] [2021-11-20 06:29:27,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1974012315] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:29:27,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [486256091] [2021-11-20 06:29:27,857 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:29:27,857 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:29:27,857 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:29:27,858 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:29:27,859 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2021-11-20 06:29:54,618 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 40 check-sat command(s) [2021-11-20 06:29:54,618 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:29:54,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 743 conjuncts, 82 conjunts are in the unsatisfiable core [2021-11-20 06:29:54,648 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:29:57,445 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2262 proven. 1521 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:29:57,445 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:29:57,897 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 2262 proven. 1521 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:29:57,898 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [486256091] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:29:57,898 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:29:57,898 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [82, 82, 82] total 124 [2021-11-20 06:29:57,898 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367112825] [2021-11-20 06:29:57,898 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:29:57,934 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:29:57,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 125 interpolants. [2021-11-20 06:29:57,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3531, Invalid=11969, Unknown=0, NotChecked=0, Total=15500 [2021-11-20 06:29:57,937 INFO L87 Difference]: Start difference. First operand 324 states and 366 transitions. cyclomatic complexity: 45 Second operand has 125 states, 124 states have (on average 2.629032258064516) internal successors, (326), 125 states have internal predecessors, (326), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:00,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:30:00,745 INFO L93 Difference]: Finished difference Result 1051 states and 1214 transitions. [2021-11-20 06:30:00,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2021-11-20 06:30:00,746 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1051 states and 1214 transitions. [2021-11-20 06:30:00,749 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:00,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1051 states to 578 states and 662 transitions. [2021-11-20 06:30:00,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 497 [2021-11-20 06:30:00,752 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 497 [2021-11-20 06:30:00,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 578 states and 662 transitions. [2021-11-20 06:30:00,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:30:00,752 INFO L681 BuchiCegarLoop]: Abstraction has 578 states and 662 transitions. [2021-11-20 06:30:00,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states and 662 transitions. [2021-11-20 06:30:00,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 332. [2021-11-20 06:30:00,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 332 states, 332 states have (on average 1.1295180722891567) internal successors, (375), 331 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:00,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 375 transitions. [2021-11-20 06:30:00,759 INFO L704 BuchiCegarLoop]: Abstraction has 332 states and 375 transitions. [2021-11-20 06:30:00,759 INFO L587 BuchiCegarLoop]: Abstraction has 332 states and 375 transitions. [2021-11-20 06:30:00,759 INFO L425 BuchiCegarLoop]: ======== Iteration 42============ [2021-11-20 06:30:00,759 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 332 states and 375 transitions. [2021-11-20 06:30:00,760 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:00,761 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:30:00,761 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:30:00,762 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [40, 40, 40, 39, 39, 1, 1, 1, 1] [2021-11-20 06:30:00,762 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:30:00,763 INFO L791 eck$LassoCheckResult]: Stem: 57456#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 57457#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 57462#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57476#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57477#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57465#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57466#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57557#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57556#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57555#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57554#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57553#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57552#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57551#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57550#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57549#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57548#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57547#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57546#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57545#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57544#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57543#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57542#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57541#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57540#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57539#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57538#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57537#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57536#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57535#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57534#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57533#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57532#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57531#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57530#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57529#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57528#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57527#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57526#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57525#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57524#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57523#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57522#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57521#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57520#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57519#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57518#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57517#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57516#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57515#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57514#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57513#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57512#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57511#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57510#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57509#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57508#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57507#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57506#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57505#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57504#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57503#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57502#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57501#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57500#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57499#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57498#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57497#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57496#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57495#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57494#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57493#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57492#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57491#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57490#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57489#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57488#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57487#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57486#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57485#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57484#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 57480#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 57479#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 57467#L27-4 main_~i~0#1 := 0; 57468#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57783#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57567#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57565#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57566#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57570#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57782#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57779#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57777#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57776#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57773#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57771#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57770#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57767#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57765#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57764#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57761#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57759#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57758#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57755#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57753#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57752#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57749#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57747#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57746#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57741#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57740#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57737#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57735#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57734#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57731#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57729#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57728#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57725#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57723#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57722#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57711#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57707#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57704#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57701#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57699#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57698#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57695#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57693#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57692#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57689#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57687#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57686#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57683#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57681#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57680#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57677#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57675#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57674#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57671#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57669#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57668#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57665#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57663#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57662#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57659#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57657#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57656#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57653#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57651#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57650#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57647#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57645#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57644#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57641#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57639#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57638#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57635#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57633#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57632#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57629#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57627#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57623#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57621#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57620#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57614#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57609#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57603#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57599#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57596#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57593#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57591#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57590#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57587#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57585#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57584#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57581#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57579#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57578#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57576#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57574#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57573#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57473#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57461#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57470#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57475#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57562#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57561#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57482#L34 [2021-11-20 06:30:00,763 INFO L793 eck$LassoCheckResult]: Loop: 57482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 57483#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 57481#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 57482#L34 [2021-11-20 06:30:00,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:00,764 INFO L85 PathProgramCache]: Analyzing trace with hash -695339623, now seen corresponding path program 78 times [2021-11-20 06:30:00,764 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:00,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946683179] [2021-11-20 06:30:00,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:00,764 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:01,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:01,138 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:01,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:01,610 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:01,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:01,611 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 41 times [2021-11-20 06:30:01,611 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:01,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411669593] [2021-11-20 06:30:01,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:01,611 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:01,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:01,613 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:01,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:01,615 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:01,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:01,616 INFO L85 PathProgramCache]: Analyzing trace with hash -235400419, now seen corresponding path program 79 times [2021-11-20 06:30:01,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:01,616 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742887632] [2021-11-20 06:30:01,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:01,617 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:01,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:30:03,669 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2262 proven. 1718 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:03,669 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:30:03,669 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742887632] [2021-11-20 06:30:03,669 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742887632] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:30:03,669 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [796888568] [2021-11-20 06:30:03,670 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:30:03,670 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:30:03,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:30:03,671 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:30:03,672 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2021-11-20 06:30:03,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:30:03,799 INFO L263 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 84 conjunts are in the unsatisfiable core [2021-11-20 06:30:03,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:30:07,096 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2380 proven. 1600 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:07,096 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:30:07,580 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 2380 proven. 1600 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:07,580 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [796888568] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:30:07,580 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:30:07,580 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 84, 84] total 127 [2021-11-20 06:30:07,580 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438032181] [2021-11-20 06:30:07,580 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:30:07,617 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:30:07,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2021-11-20 06:30:07,619 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3701, Invalid=12555, Unknown=0, NotChecked=0, Total=16256 [2021-11-20 06:30:07,620 INFO L87 Difference]: Start difference. First operand 332 states and 375 transitions. cyclomatic complexity: 46 Second operand has 128 states, 127 states have (on average 2.62992125984252) internal successors, (334), 128 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:10,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:30:10,533 INFO L93 Difference]: Finished difference Result 1077 states and 1244 transitions. [2021-11-20 06:30:10,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2021-11-20 06:30:10,534 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1077 states and 1244 transitions. [2021-11-20 06:30:10,537 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:10,540 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1077 states to 592 states and 678 transitions. [2021-11-20 06:30:10,540 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 509 [2021-11-20 06:30:10,540 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 509 [2021-11-20 06:30:10,540 INFO L73 IsDeterministic]: Start isDeterministic. Operand 592 states and 678 transitions. [2021-11-20 06:30:10,541 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:30:10,541 INFO L681 BuchiCegarLoop]: Abstraction has 592 states and 678 transitions. [2021-11-20 06:30:10,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states and 678 transitions. [2021-11-20 06:30:10,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 340. [2021-11-20 06:30:10,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 340 states, 340 states have (on average 1.1294117647058823) internal successors, (384), 339 states have internal predecessors, (384), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:10,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 384 transitions. [2021-11-20 06:30:10,548 INFO L704 BuchiCegarLoop]: Abstraction has 340 states and 384 transitions. [2021-11-20 06:30:10,548 INFO L587 BuchiCegarLoop]: Abstraction has 340 states and 384 transitions. [2021-11-20 06:30:10,549 INFO L425 BuchiCegarLoop]: ======== Iteration 43============ [2021-11-20 06:30:10,549 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 340 states and 384 transitions. [2021-11-20 06:30:10,550 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:10,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:30:10,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:30:10,551 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [41, 41, 41, 40, 40, 1, 1, 1, 1] [2021-11-20 06:30:10,552 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:30:10,552 INFO L791 eck$LassoCheckResult]: Stem: 60304#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 60305#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 60310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60408#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60407#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60406#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60405#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60404#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60403#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60402#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60401#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60400#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60399#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60398#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60397#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60396#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60395#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60394#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60393#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60392#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60391#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60390#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60389#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60388#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60387#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60386#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60385#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60384#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60383#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60382#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60381#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60380#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60379#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60378#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60377#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60376#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60375#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60374#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60373#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60372#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60371#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60370#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60369#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60368#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60367#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60366#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60365#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60364#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60363#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60362#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60361#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60360#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60359#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60358#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60357#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60356#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60355#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60354#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60353#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60352#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60351#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60350#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60349#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60348#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60347#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60346#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60345#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60344#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60343#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60342#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60341#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60340#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60339#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60338#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60337#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60336#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60335#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60334#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60333#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 60329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 60328#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 60315#L27-4 main_~i~0#1 := 0; 60316#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60416#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60417#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60418#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60422#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60421#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60638#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60635#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60633#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60632#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60629#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60627#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60623#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60621#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60620#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60614#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60609#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60603#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60599#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60596#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60593#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60591#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60590#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60587#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60585#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60584#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60581#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60579#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60578#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60575#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60573#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60572#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60567#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60566#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60561#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60560#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60557#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60555#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60554#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60551#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60549#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60548#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60545#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60543#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60542#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60539#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60537#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60536#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60533#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60531#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60530#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60527#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60525#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60524#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60521#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60519#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60518#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60515#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60513#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60512#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60509#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60507#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60506#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60503#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60501#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60500#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60497#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60495#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60494#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60491#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60489#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60488#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60485#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60483#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60482#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60479#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60477#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60476#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60473#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60471#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60470#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60465#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60464#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60459#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60458#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60453#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60452#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60449#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60447#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60446#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60443#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60441#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60440#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60437#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60435#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60434#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60431#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60429#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60428#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60426#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60425#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60424#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60322#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60309#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60319#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60324#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60413#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60331#L34 [2021-11-20 06:30:10,553 INFO L793 eck$LassoCheckResult]: Loop: 60331#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 60332#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 60330#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 60331#L34 [2021-11-20 06:30:10,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:10,553 INFO L85 PathProgramCache]: Analyzing trace with hash -381443749, now seen corresponding path program 80 times [2021-11-20 06:30:10,553 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:10,553 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865628181] [2021-11-20 06:30:10,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:10,554 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:11,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:11,015 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:11,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:11,463 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:11,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:11,463 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 42 times [2021-11-20 06:30:11,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:11,464 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965300835] [2021-11-20 06:30:11,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:11,464 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:11,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:11,467 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:11,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:11,469 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:11,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:11,470 INFO L85 PathProgramCache]: Analyzing trace with hash 892778523, now seen corresponding path program 81 times [2021-11-20 06:30:11,470 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:11,470 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723501252] [2021-11-20 06:30:11,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:11,471 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:11,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:30:13,899 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2380 proven. 1802 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:13,899 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:30:13,899 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723501252] [2021-11-20 06:30:13,899 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1723501252] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:30:13,899 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098028711] [2021-11-20 06:30:13,899 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:30:13,900 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:30:13,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:30:13,901 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:30:13,902 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2021-11-20 06:30:43,636 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2021-11-20 06:30:43,637 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:30:43,679 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 86 conjunts are in the unsatisfiable core [2021-11-20 06:30:43,683 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:30:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2501 proven. 1681 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:46,933 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:30:47,366 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 2501 proven. 1681 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:47,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098028711] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:30:47,366 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:30:47,367 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86, 86] total 130 [2021-11-20 06:30:47,367 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446255861] [2021-11-20 06:30:47,367 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:30:47,402 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:30:47,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2021-11-20 06:30:47,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3875, Invalid=13155, Unknown=0, NotChecked=0, Total=17030 [2021-11-20 06:30:47,404 INFO L87 Difference]: Start difference. First operand 340 states and 384 transitions. cyclomatic complexity: 47 Second operand has 131 states, 130 states have (on average 2.6307692307692307) internal successors, (342), 131 states have internal predecessors, (342), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:50,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:30:50,516 INFO L93 Difference]: Finished difference Result 1103 states and 1274 transitions. [2021-11-20 06:30:50,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2021-11-20 06:30:50,517 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1103 states and 1274 transitions. [2021-11-20 06:30:50,521 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:50,524 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1103 states to 606 states and 694 transitions. [2021-11-20 06:30:50,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 521 [2021-11-20 06:30:50,524 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 521 [2021-11-20 06:30:50,524 INFO L73 IsDeterministic]: Start isDeterministic. Operand 606 states and 694 transitions. [2021-11-20 06:30:50,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:30:50,525 INFO L681 BuchiCegarLoop]: Abstraction has 606 states and 694 transitions. [2021-11-20 06:30:50,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 606 states and 694 transitions. [2021-11-20 06:30:50,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 606 to 348. [2021-11-20 06:30:50,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 348 states, 348 states have (on average 1.1293103448275863) internal successors, (393), 347 states have internal predecessors, (393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:30:50,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 393 transitions. [2021-11-20 06:30:50,532 INFO L704 BuchiCegarLoop]: Abstraction has 348 states and 393 transitions. [2021-11-20 06:30:50,532 INFO L587 BuchiCegarLoop]: Abstraction has 348 states and 393 transitions. [2021-11-20 06:30:50,532 INFO L425 BuchiCegarLoop]: ======== Iteration 44============ [2021-11-20 06:30:50,532 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 348 states and 393 transitions. [2021-11-20 06:30:50,533 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:30:50,534 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:30:50,534 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:30:50,535 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [42, 42, 42, 41, 41, 1, 1, 1, 1] [2021-11-20 06:30:50,536 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:30:50,536 INFO L791 eck$LassoCheckResult]: Stem: 63221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 63222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 63227#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63241#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63242#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63230#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63231#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63326#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63325#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63324#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63323#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63322#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63321#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63320#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63319#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63318#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63317#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63316#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63315#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63314#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63313#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63312#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63311#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63310#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63309#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63308#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63307#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63306#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63305#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63304#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63303#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63302#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63301#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63300#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63299#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63298#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63297#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63296#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63295#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63294#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63293#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63292#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63291#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63290#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63289#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63288#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63287#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63286#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63285#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63284#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63283#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63282#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63281#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63280#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63279#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63278#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63277#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63276#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63275#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63274#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63273#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63272#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63271#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63270#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63269#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63268#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63267#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63266#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63265#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63264#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63263#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63262#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63261#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63260#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63259#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63258#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63257#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63256#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63255#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63254#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63253#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63252#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63251#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63250#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63249#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 63245#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 63244#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 63232#L27-4 main_~i~0#1 := 0; 63233#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63336#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63334#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63335#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63339#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63561#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63558#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63556#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63555#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63552#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63550#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63549#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63546#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63544#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63543#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63540#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63538#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63537#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63534#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63532#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63531#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63528#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63526#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63525#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63522#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63520#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63519#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63516#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63514#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63513#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63510#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63508#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63507#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63504#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63502#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63501#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63498#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63496#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63495#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63492#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63490#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63489#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63486#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63484#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63483#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63480#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63478#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63477#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63474#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63472#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63471#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63468#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63466#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63465#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63462#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63460#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63459#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63456#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63454#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63453#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63450#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63448#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63447#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63444#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63442#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63441#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63438#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63436#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63435#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63432#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63430#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63429#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63426#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63424#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63423#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63420#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63418#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63417#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63414#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63412#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63411#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63408#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63406#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63405#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63402#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63400#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63399#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63396#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63394#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63393#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63390#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63388#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63387#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63384#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63382#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63381#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63378#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63376#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63375#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63372#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63370#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63369#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63366#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63364#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63363#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63360#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63358#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63357#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63354#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63352#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63351#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63348#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63346#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63345#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63344#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63343#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63342#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63238#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63226#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63235#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63240#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63331#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63330#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63247#L34 [2021-11-20 06:30:50,537 INFO L793 eck$LassoCheckResult]: Loop: 63247#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 63248#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 63246#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 63247#L34 [2021-11-20 06:30:50,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:50,537 INFO L85 PathProgramCache]: Analyzing trace with hash -826253155, now seen corresponding path program 82 times [2021-11-20 06:30:50,537 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:50,538 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820077942] [2021-11-20 06:30:50,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:50,538 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:50,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:50,965 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:51,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:51,418 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:51,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:51,419 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 43 times [2021-11-20 06:30:51,419 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:51,419 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522293965] [2021-11-20 06:30:51,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:51,419 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:51,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:51,421 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:30:51,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:30:51,423 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:30:51,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:30:51,423 INFO L85 PathProgramCache]: Analyzing trace with hash -450127463, now seen corresponding path program 83 times [2021-11-20 06:30:51,424 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:30:51,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334086005] [2021-11-20 06:30:51,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:30:51,424 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:30:51,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:30:54,155 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2501 proven. 1888 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:30:54,155 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:30:54,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334086005] [2021-11-20 06:30:54,156 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [334086005] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:30:54,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [845427641] [2021-11-20 06:30:54,156 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:30:54,156 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:30:54,156 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:30:54,158 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:30:54,178 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2021-11-20 06:31:32,011 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 43 check-sat command(s) [2021-11-20 06:31:32,011 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:31:32,055 INFO L263 TraceCheckSpWp]: Trace formula consists of 797 conjuncts, 88 conjunts are in the unsatisfiable core [2021-11-20 06:31:32,057 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:31:35,324 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2625 proven. 1764 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:35,324 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:31:35,791 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 2625 proven. 1764 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:35,791 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [845427641] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:31:35,791 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:31:35,791 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 88, 88] total 133 [2021-11-20 06:31:35,791 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066146002] [2021-11-20 06:31:35,791 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:31:35,826 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:31:35,828 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2021-11-20 06:31:35,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4053, Invalid=13769, Unknown=0, NotChecked=0, Total=17822 [2021-11-20 06:31:35,829 INFO L87 Difference]: Start difference. First operand 348 states and 393 transitions. cyclomatic complexity: 48 Second operand has 134 states, 133 states have (on average 2.6315789473684212) internal successors, (350), 134 states have internal predecessors, (350), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:31:38,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:31:38,900 INFO L93 Difference]: Finished difference Result 1129 states and 1304 transitions. [2021-11-20 06:31:38,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2021-11-20 06:31:38,900 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1129 states and 1304 transitions. [2021-11-20 06:31:38,905 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:31:38,910 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1129 states to 620 states and 710 transitions. [2021-11-20 06:31:38,910 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 533 [2021-11-20 06:31:38,910 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 533 [2021-11-20 06:31:38,910 INFO L73 IsDeterministic]: Start isDeterministic. Operand 620 states and 710 transitions. [2021-11-20 06:31:38,911 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:31:38,911 INFO L681 BuchiCegarLoop]: Abstraction has 620 states and 710 transitions. [2021-11-20 06:31:38,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 620 states and 710 transitions. [2021-11-20 06:31:38,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 620 to 356. [2021-11-20 06:31:38,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 356 states, 356 states have (on average 1.1292134831460674) internal successors, (402), 355 states have internal predecessors, (402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:31:38,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 402 transitions. [2021-11-20 06:31:38,920 INFO L704 BuchiCegarLoop]: Abstraction has 356 states and 402 transitions. [2021-11-20 06:31:38,920 INFO L587 BuchiCegarLoop]: Abstraction has 356 states and 402 transitions. [2021-11-20 06:31:38,920 INFO L425 BuchiCegarLoop]: ======== Iteration 45============ [2021-11-20 06:31:38,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 356 states and 402 transitions. [2021-11-20 06:31:38,921 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:31:38,922 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:31:38,922 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:31:38,923 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [43, 43, 43, 42, 42, 1, 1, 1, 1] [2021-11-20 06:31:38,923 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:31:38,924 INFO L791 eck$LassoCheckResult]: Stem: 66207#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 66208#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 66213#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66228#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66229#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66216#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66217#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66294#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66289#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66288#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66287#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66286#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66285#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66284#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66283#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66282#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66281#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66280#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66279#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66278#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66277#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66276#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66275#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66274#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66273#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66272#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66271#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66270#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66269#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66268#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66267#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66266#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66265#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66264#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66263#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66262#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66261#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66260#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66259#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66258#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66257#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66256#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66255#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66254#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66253#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66252#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66251#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66250#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66249#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66248#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66247#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66246#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66245#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66244#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66243#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66242#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66241#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66240#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66239#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66238#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66237#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66236#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 66232#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 66231#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 66218#L27-4 main_~i~0#1 := 0; 66219#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66323#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66324#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66325#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66329#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66328#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66557#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66554#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66552#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66551#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66548#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66546#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66545#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66542#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66540#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66539#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66536#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66534#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66533#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66530#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66528#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66527#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66524#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66522#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66521#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66518#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66516#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66515#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66512#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66510#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66509#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66506#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66504#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66503#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66500#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66498#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66497#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66494#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66492#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66491#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66488#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66486#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66485#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66482#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66480#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66479#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66476#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66474#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66473#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66470#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66468#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66467#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66464#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66462#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66461#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66458#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66456#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66455#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66452#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66450#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66449#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66446#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66444#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66443#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66440#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66438#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66437#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66434#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66432#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66431#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66428#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66426#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66425#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66422#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66420#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66419#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66416#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66414#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66413#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66410#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66408#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66407#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66404#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66402#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66401#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66398#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66396#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66395#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66392#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66390#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66389#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66386#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66384#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66383#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66380#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66378#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66377#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66374#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66372#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66371#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66368#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66366#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66365#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66362#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66360#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66359#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66356#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66354#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66353#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66350#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66348#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66347#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66344#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66342#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66341#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66338#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66336#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66335#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66333#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66332#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66331#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66225#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66212#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66222#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66227#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66320#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66319#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66234#L34 [2021-11-20 06:31:38,924 INFO L793 eck$LassoCheckResult]: Loop: 66234#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 66235#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 66233#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 66234#L34 [2021-11-20 06:31:38,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:38,924 INFO L85 PathProgramCache]: Analyzing trace with hash 1698755159, now seen corresponding path program 84 times [2021-11-20 06:31:38,925 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:38,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609527051] [2021-11-20 06:31:38,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:38,925 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:39,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:39,293 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:31:39,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:39,880 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:31:39,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:39,880 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 44 times [2021-11-20 06:31:39,880 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:39,880 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612464445] [2021-11-20 06:31:39,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:39,881 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:39,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:39,883 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:31:39,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:39,884 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:31:39,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:39,884 INFO L85 PathProgramCache]: Analyzing trace with hash 15332767, now seen corresponding path program 85 times [2021-11-20 06:31:39,885 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:39,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072165556] [2021-11-20 06:31:39,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:39,885 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:39,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:31:42,313 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2625 proven. 1976 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:42,314 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:31:42,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072165556] [2021-11-20 06:31:42,314 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2072165556] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:31:42,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1486682518] [2021-11-20 06:31:42,314 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:31:42,314 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:31:42,314 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:31:42,316 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:31:42,317 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2021-11-20 06:31:42,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:31:42,443 INFO L263 TraceCheckSpWp]: Trace formula consists of 815 conjuncts, 90 conjunts are in the unsatisfiable core [2021-11-20 06:31:42,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:31:45,874 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2752 proven. 1849 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:45,875 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:31:46,343 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 2752 proven. 1849 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:46,343 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1486682518] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:31:46,343 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:31:46,344 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 90, 90] total 136 [2021-11-20 06:31:46,344 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605703816] [2021-11-20 06:31:46,344 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:31:46,386 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:31:46,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 137 interpolants. [2021-11-20 06:31:46,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4235, Invalid=14397, Unknown=0, NotChecked=0, Total=18632 [2021-11-20 06:31:46,389 INFO L87 Difference]: Start difference. First operand 356 states and 402 transitions. cyclomatic complexity: 49 Second operand has 137 states, 136 states have (on average 2.6323529411764706) internal successors, (358), 137 states have internal predecessors, (358), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:31:49,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:31:49,404 INFO L93 Difference]: Finished difference Result 1155 states and 1334 transitions. [2021-11-20 06:31:49,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2021-11-20 06:31:49,404 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1155 states and 1334 transitions. [2021-11-20 06:31:49,408 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:31:49,411 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1155 states to 634 states and 726 transitions. [2021-11-20 06:31:49,411 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2021-11-20 06:31:49,412 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2021-11-20 06:31:49,412 INFO L73 IsDeterministic]: Start isDeterministic. Operand 634 states and 726 transitions. [2021-11-20 06:31:49,412 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:31:49,412 INFO L681 BuchiCegarLoop]: Abstraction has 634 states and 726 transitions. [2021-11-20 06:31:49,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states and 726 transitions. [2021-11-20 06:31:49,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 364. [2021-11-20 06:31:49,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 364 states have (on average 1.129120879120879) internal successors, (411), 363 states have internal predecessors, (411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:31:49,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 411 transitions. [2021-11-20 06:31:49,421 INFO L704 BuchiCegarLoop]: Abstraction has 364 states and 411 transitions. [2021-11-20 06:31:49,421 INFO L587 BuchiCegarLoop]: Abstraction has 364 states and 411 transitions. [2021-11-20 06:31:49,421 INFO L425 BuchiCegarLoop]: ======== Iteration 46============ [2021-11-20 06:31:49,421 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 411 transitions. [2021-11-20 06:31:49,422 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:31:49,422 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:31:49,422 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:31:49,424 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [44, 44, 44, 43, 43, 1, 1, 1, 1] [2021-11-20 06:31:49,424 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:31:49,425 INFO L791 eck$LassoCheckResult]: Stem: 69262#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 69263#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 69268#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69282#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69283#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69271#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69272#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69371#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69370#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69369#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69368#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69367#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69366#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69365#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69364#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69363#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69362#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69361#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69360#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69359#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69358#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69357#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69356#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69355#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69354#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69353#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69352#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69351#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69350#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69349#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69348#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69347#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69346#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69345#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69344#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69343#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69342#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69341#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69340#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69339#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69338#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69337#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69336#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69335#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69334#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69333#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69332#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69331#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69330#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69329#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69328#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69327#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69326#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69325#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69324#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69323#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69322#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69321#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69320#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69319#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69318#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69317#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69316#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69315#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69314#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69313#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69312#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69311#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69310#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69309#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69308#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69307#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69306#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69305#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69304#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69303#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69302#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69301#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69300#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69299#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69298#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69297#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69296#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69295#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69294#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69293#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69292#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69291#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69290#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 69286#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 69285#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 69273#L27-4 main_~i~0#1 := 0; 69274#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69621#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69381#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69379#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69380#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69384#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69620#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69614#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69609#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69603#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69599#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69596#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69593#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69591#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69590#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69587#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69585#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69584#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69581#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69579#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69578#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69575#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69573#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69572#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69567#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69566#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69561#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69560#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69557#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69555#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69554#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69551#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69549#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69548#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69545#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69543#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69542#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69539#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69537#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69536#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69533#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69531#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69530#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69527#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69525#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69524#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69521#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69519#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69518#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69515#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69513#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69512#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69509#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69507#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69506#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69503#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69501#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69500#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69497#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69495#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69494#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69491#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69489#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69488#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69485#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69483#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69482#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69479#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69477#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69476#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69473#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69471#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69470#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69467#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69465#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69464#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69461#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69459#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69458#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69455#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69453#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69452#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69449#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69447#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69446#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69443#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69441#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69440#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69437#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69435#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69434#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69431#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69429#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69428#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69425#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69423#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69422#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69419#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69417#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69416#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69411#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69410#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69407#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69405#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69404#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69401#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69399#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69398#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69395#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69393#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69392#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69390#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69388#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69387#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69279#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69267#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69276#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69281#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69376#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69375#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69288#L34 [2021-11-20 06:31:49,425 INFO L793 eck$LassoCheckResult]: Loop: 69288#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 69289#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 69287#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 69288#L34 [2021-11-20 06:31:49,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:49,425 INFO L85 PathProgramCache]: Analyzing trace with hash -1264295007, now seen corresponding path program 86 times [2021-11-20 06:31:49,425 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:49,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169509844] [2021-11-20 06:31:49,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:49,426 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:49,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:49,873 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:31:50,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:50,335 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:31:50,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:50,335 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 45 times [2021-11-20 06:31:50,335 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:50,335 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682127897] [2021-11-20 06:31:50,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:50,336 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:50,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:50,337 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:31:50,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:31:50,339 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:31:50,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:31:50,339 INFO L85 PathProgramCache]: Analyzing trace with hash -2044295147, now seen corresponding path program 87 times [2021-11-20 06:31:50,339 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:31:50,339 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840310649] [2021-11-20 06:31:50,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:31:50,339 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:31:50,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:31:52,819 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2752 proven. 2066 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:31:52,819 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:31:52,819 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840310649] [2021-11-20 06:31:52,819 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840310649] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:31:52,819 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [620645610] [2021-11-20 06:31:52,820 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:31:52,820 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:31:52,820 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:31:52,821 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:31:52,822 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2021-11-20 06:32:59,154 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 45 check-sat command(s) [2021-11-20 06:32:59,154 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:32:59,210 INFO L263 TraceCheckSpWp]: Trace formula consists of 833 conjuncts, 92 conjunts are in the unsatisfiable core [2021-11-20 06:32:59,213 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:33:02,751 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2882 proven. 1936 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:33:02,751 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:33:03,281 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 2882 proven. 1936 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:33:03,281 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [620645610] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:33:03,281 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:33:03,281 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [92, 92, 92] total 139 [2021-11-20 06:33:03,281 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86856732] [2021-11-20 06:33:03,281 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:33:03,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:33:03,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 140 interpolants. [2021-11-20 06:33:03,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4421, Invalid=15039, Unknown=0, NotChecked=0, Total=19460 [2021-11-20 06:33:03,322 INFO L87 Difference]: Start difference. First operand 364 states and 411 transitions. cyclomatic complexity: 50 Second operand has 140 states, 139 states have (on average 2.633093525179856) internal successors, (366), 140 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:33:06,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:33:06,629 INFO L93 Difference]: Finished difference Result 1181 states and 1364 transitions. [2021-11-20 06:33:06,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2021-11-20 06:33:06,630 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1181 states and 1364 transitions. [2021-11-20 06:33:06,635 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:33:06,639 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1181 states to 648 states and 742 transitions. [2021-11-20 06:33:06,640 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 557 [2021-11-20 06:33:06,640 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 557 [2021-11-20 06:33:06,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 648 states and 742 transitions. [2021-11-20 06:33:06,641 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:33:06,641 INFO L681 BuchiCegarLoop]: Abstraction has 648 states and 742 transitions. [2021-11-20 06:33:06,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 648 states and 742 transitions. [2021-11-20 06:33:06,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 648 to 372. [2021-11-20 06:33:06,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 372 states have (on average 1.1290322580645162) internal successors, (420), 371 states have internal predecessors, (420), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:33:06,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 420 transitions. [2021-11-20 06:33:06,650 INFO L704 BuchiCegarLoop]: Abstraction has 372 states and 420 transitions. [2021-11-20 06:33:06,650 INFO L587 BuchiCegarLoop]: Abstraction has 372 states and 420 transitions. [2021-11-20 06:33:06,650 INFO L425 BuchiCegarLoop]: ======== Iteration 47============ [2021-11-20 06:33:06,650 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 372 states and 420 transitions. [2021-11-20 06:33:06,651 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:33:06,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:33:06,652 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:33:06,653 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [45, 45, 45, 44, 44, 1, 1, 1, 1] [2021-11-20 06:33:06,653 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:33:06,654 INFO L791 eck$LassoCheckResult]: Stem: 72386#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 72387#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 72392#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72407#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72408#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72395#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72396#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72498#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72497#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72496#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72495#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72494#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72493#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72492#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72491#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72490#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72489#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72488#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72487#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72486#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72485#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72484#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72483#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72482#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72481#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72480#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72479#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72478#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72477#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72476#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72475#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72474#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72473#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72472#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72471#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72470#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72469#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72468#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72467#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72466#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72465#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72464#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72463#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72462#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72461#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72460#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72459#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72458#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72457#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72456#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72455#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72454#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72453#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72452#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72451#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72450#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72449#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72448#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72447#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72446#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72445#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72444#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72443#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72442#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72441#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72440#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72439#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72438#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72437#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72436#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72435#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72434#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72433#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72432#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72431#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72430#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72429#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72428#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72427#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72426#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72425#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72424#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72423#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72422#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72421#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72420#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72419#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72418#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72417#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72416#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72415#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 72411#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 72410#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 72397#L27-4 main_~i~0#1 := 0; 72398#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72506#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72507#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72508#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72512#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72511#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72752#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72749#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72747#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72746#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72743#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72741#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72740#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72737#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72735#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72734#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72731#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72729#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72728#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72725#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72723#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72722#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72719#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72717#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72716#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72713#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72711#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72710#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72707#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72704#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72701#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72699#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72698#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72695#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72693#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72692#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72689#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72687#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72686#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72683#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72681#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72680#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72677#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72675#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72674#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72671#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72669#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72668#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72665#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72663#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72662#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72659#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72657#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72656#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72653#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72651#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72650#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72647#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72645#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72644#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72641#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72639#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72638#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72635#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72633#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72632#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72629#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72627#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72626#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72623#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72621#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72620#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72617#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72615#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72614#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72611#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72609#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72608#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72603#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72602#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72599#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72597#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72596#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72593#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72591#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72590#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72587#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72585#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72584#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72581#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72579#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72578#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72575#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72573#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72572#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72569#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72567#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72566#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72563#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72561#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72560#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72557#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72555#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72554#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72551#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72549#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72548#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72545#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72543#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72542#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72539#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72537#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72536#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72533#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72531#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72530#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72527#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72525#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72524#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72521#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72519#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72518#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72516#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72515#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72514#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72404#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72391#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72401#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72406#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72503#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72502#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72413#L34 [2021-11-20 06:33:06,654 INFO L793 eck$LassoCheckResult]: Loop: 72413#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 72414#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 72412#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 72413#L34 [2021-11-20 06:33:06,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:33:06,655 INFO L85 PathProgramCache]: Analyzing trace with hash -819295405, now seen corresponding path program 88 times [2021-11-20 06:33:06,655 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:33:06,655 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673322917] [2021-11-20 06:33:06,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:33:06,655 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:33:07,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:33:07,333 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:33:07,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:33:07,807 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:33:07,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:33:07,808 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 46 times [2021-11-20 06:33:07,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:33:07,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850736437] [2021-11-20 06:33:07,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:33:07,809 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:33:07,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:33:07,811 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:33:07,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:33:07,813 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:33:07,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:33:07,814 INFO L85 PathProgramCache]: Analyzing trace with hash 669772579, now seen corresponding path program 89 times [2021-11-20 06:33:07,814 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:33:07,814 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921080325] [2021-11-20 06:33:07,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:33:07,814 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:33:07,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:33:10,423 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 2882 proven. 2158 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:33:10,423 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:33:10,423 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921080325] [2021-11-20 06:33:10,423 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1921080325] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:33:10,424 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098547777] [2021-11-20 06:33:10,424 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-20 06:33:10,424 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:33:10,424 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:33:10,440 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:33:10,441 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2021-11-20 06:36:17,389 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 46 check-sat command(s) [2021-11-20 06:36:17,390 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-20 06:36:17,440 INFO L263 TraceCheckSpWp]: Trace formula consists of 851 conjuncts, 94 conjunts are in the unsatisfiable core [2021-11-20 06:36:17,443 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:36:21,179 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 3015 proven. 2025 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:21,179 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:36:21,730 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 3015 proven. 2025 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:21,730 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098547777] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:36:21,730 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:36:21,731 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [94, 94, 94] total 142 [2021-11-20 06:36:21,731 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038175557] [2021-11-20 06:36:21,731 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:36:21,768 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:36:21,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 143 interpolants. [2021-11-20 06:36:21,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4611, Invalid=15695, Unknown=0, NotChecked=0, Total=20306 [2021-11-20 06:36:21,772 INFO L87 Difference]: Start difference. First operand 372 states and 420 transitions. cyclomatic complexity: 51 Second operand has 143 states, 142 states have (on average 2.6338028169014085) internal successors, (374), 143 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:36:25,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:36:25,309 INFO L93 Difference]: Finished difference Result 1207 states and 1394 transitions. [2021-11-20 06:36:25,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2021-11-20 06:36:25,310 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1207 states and 1394 transitions. [2021-11-20 06:36:25,313 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:36:25,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1207 states to 662 states and 758 transitions. [2021-11-20 06:36:25,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 569 [2021-11-20 06:36:25,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 569 [2021-11-20 06:36:25,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 662 states and 758 transitions. [2021-11-20 06:36:25,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:36:25,318 INFO L681 BuchiCegarLoop]: Abstraction has 662 states and 758 transitions. [2021-11-20 06:36:25,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states and 758 transitions. [2021-11-20 06:36:25,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 380. [2021-11-20 06:36:25,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 380 states, 380 states have (on average 1.1289473684210527) internal successors, (429), 379 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:36:25,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 429 transitions. [2021-11-20 06:36:25,325 INFO L704 BuchiCegarLoop]: Abstraction has 380 states and 429 transitions. [2021-11-20 06:36:25,325 INFO L587 BuchiCegarLoop]: Abstraction has 380 states and 429 transitions. [2021-11-20 06:36:25,325 INFO L425 BuchiCegarLoop]: ======== Iteration 48============ [2021-11-20 06:36:25,325 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 380 states and 429 transitions. [2021-11-20 06:36:25,327 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:36:25,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:36:25,327 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:36:25,329 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2021-11-20 06:36:25,329 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:36:25,330 INFO L791 eck$LassoCheckResult]: Stem: 75579#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 75580#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 75585#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75599#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75600#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75588#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75589#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75692#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75691#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75690#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75689#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75688#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75687#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75686#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75685#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75684#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75683#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75682#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75681#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75680#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75679#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75678#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75677#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75676#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75675#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75674#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75673#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75672#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75671#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75670#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75669#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75668#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75667#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75666#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75665#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75664#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75663#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75662#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75661#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75660#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75659#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75658#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75657#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75656#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75655#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75654#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75653#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75652#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75651#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75650#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75649#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75648#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75647#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75646#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75645#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75644#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75643#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75642#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75641#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75640#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75639#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75638#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75637#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75636#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75635#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75634#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75633#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75632#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75631#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75630#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75629#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75628#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75627#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75626#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75625#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75624#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75623#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75622#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75621#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75620#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75619#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75618#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75617#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75616#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75615#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75614#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75613#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75612#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75611#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75610#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75609#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75608#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75607#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 75603#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 75602#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 75590#L27-4 main_~i~0#1 := 0; 75591#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75953#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75702#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75700#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75701#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75705#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75951#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75948#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75946#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75945#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75942#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75940#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75939#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75936#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75934#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75933#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75930#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75928#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75927#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75924#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75922#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75921#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75918#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75916#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75915#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75912#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75910#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75909#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75906#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75904#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75903#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75900#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75898#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75897#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75894#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75892#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75891#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75888#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75886#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75885#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75882#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75880#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75879#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75876#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75874#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75873#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75870#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75868#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75867#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75864#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75862#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75861#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75858#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75856#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75855#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75852#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75850#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75849#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75846#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75844#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75843#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75840#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75838#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75837#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75834#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75832#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75831#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75828#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75826#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75825#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75822#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75820#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75819#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75816#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75814#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75813#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75810#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75808#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75807#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75804#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75802#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75801#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75798#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75796#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75795#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75792#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75790#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75789#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75786#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75784#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75783#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75780#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75778#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75777#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75774#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75772#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75771#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75768#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75766#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75765#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75762#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75760#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75759#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75756#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75754#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75753#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75750#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75748#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75747#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75744#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75742#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75741#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75738#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75736#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75735#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75732#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75730#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75729#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75726#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75724#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75723#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75720#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75718#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75717#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75714#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75712#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75711#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75710#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75709#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75708#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75596#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75584#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75593#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75598#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75697#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75696#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75605#L34 [2021-11-20 06:36:25,330 INFO L793 eck$LassoCheckResult]: Loop: 75605#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 75606#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 75604#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 75605#L34 [2021-11-20 06:36:25,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:25,331 INFO L85 PathProgramCache]: Analyzing trace with hash 1774075557, now seen corresponding path program 90 times [2021-11-20 06:36:25,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:25,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179615166] [2021-11-20 06:36:25,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:25,332 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:25,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:25,891 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:36:26,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:26,411 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:36:26,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:26,411 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 47 times [2021-11-20 06:36:26,411 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:26,411 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735169980] [2021-11-20 06:36:26,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:26,411 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:26,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:26,414 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:36:26,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:26,416 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:36:26,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:26,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1912381073, now seen corresponding path program 91 times [2021-11-20 06:36:26,416 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:26,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317727114] [2021-11-20 06:36:26,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:26,417 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:26,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:36:29,151 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3015 proven. 2252 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:29,152 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:36:29,152 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317727114] [2021-11-20 06:36:29,152 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [317727114] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:36:29,152 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1266988361] [2021-11-20 06:36:29,152 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-20 06:36:29,153 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:36:29,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:36:29,154 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:36:29,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2021-11-20 06:36:29,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:36:29,299 INFO L263 TraceCheckSpWp]: Trace formula consists of 869 conjuncts, 96 conjunts are in the unsatisfiable core [2021-11-20 06:36:29,302 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:36:33,238 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3151 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:33,238 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-20 06:36:33,828 INFO L134 CoverageAnalysis]: Checked inductivity of 5267 backedges. 3151 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:33,829 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1266988361] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-20 06:36:33,829 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-20 06:36:33,829 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 145 [2021-11-20 06:36:33,829 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1538144969] [2021-11-20 06:36:33,829 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-20 06:36:33,868 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:36:33,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 146 interpolants. [2021-11-20 06:36:33,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4805, Invalid=16365, Unknown=0, NotChecked=0, Total=21170 [2021-11-20 06:36:33,871 INFO L87 Difference]: Start difference. First operand 380 states and 429 transitions. cyclomatic complexity: 52 Second operand has 146 states, 145 states have (on average 2.6344827586206896) internal successors, (382), 146 states have internal predecessors, (382), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:36:37,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:36:37,521 INFO L93 Difference]: Finished difference Result 1233 states and 1424 transitions. [2021-11-20 06:36:37,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2021-11-20 06:36:37,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1233 states and 1424 transitions. [2021-11-20 06:36:37,525 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:36:37,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1233 states to 676 states and 774 transitions. [2021-11-20 06:36:37,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 581 [2021-11-20 06:36:37,529 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 581 [2021-11-20 06:36:37,529 INFO L73 IsDeterministic]: Start isDeterministic. Operand 676 states and 774 transitions. [2021-11-20 06:36:37,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:36:37,530 INFO L681 BuchiCegarLoop]: Abstraction has 676 states and 774 transitions. [2021-11-20 06:36:37,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 676 states and 774 transitions. [2021-11-20 06:36:37,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 676 to 388. [2021-11-20 06:36:37,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 388 states, 388 states have (on average 1.1288659793814433) internal successors, (438), 387 states have internal predecessors, (438), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:36:37,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 438 transitions. [2021-11-20 06:36:37,537 INFO L704 BuchiCegarLoop]: Abstraction has 388 states and 438 transitions. [2021-11-20 06:36:37,538 INFO L587 BuchiCegarLoop]: Abstraction has 388 states and 438 transitions. [2021-11-20 06:36:37,538 INFO L425 BuchiCegarLoop]: ======== Iteration 49============ [2021-11-20 06:36:37,538 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 388 states and 438 transitions. [2021-11-20 06:36:37,539 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-11-20 06:36:37,539 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:36:37,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:36:37,541 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [47, 47, 47, 46, 46, 1, 1, 1, 1] [2021-11-20 06:36:37,542 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-11-20 06:36:37,542 INFO L791 eck$LassoCheckResult]: Stem: 78841#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2); 78842#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~post4#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~post7#1, main_~#array~0#1.base, main_~#array~0#1.offset, main_~i~0#1, main_~num~0#1;call main_~#array~0#1.base, main_~#array~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~i~0#1;main_~num~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;main_~i~0#1 := 0; 78847#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78862#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78863#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78850#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78851#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78957#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78956#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78955#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78954#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78953#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78952#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78951#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78950#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78949#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78948#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78947#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78946#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78945#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78944#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78943#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78942#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78941#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78940#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78939#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78938#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78937#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78936#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78935#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78934#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78933#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78932#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78931#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78930#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78929#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78928#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78927#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78926#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78925#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78924#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78923#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78922#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78921#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78920#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78919#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78918#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78917#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78916#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78915#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78914#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78913#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78912#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78911#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78910#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78909#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78908#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78907#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78906#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78905#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78904#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78903#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78902#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78901#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78900#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78899#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78898#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78897#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78896#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78895#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78894#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78893#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78892#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78891#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78890#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78889#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78888#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78887#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78886#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78885#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78884#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78883#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78882#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78881#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78880#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78879#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78878#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78877#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78876#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78875#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78874#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78873#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78872#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78871#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78870#L27-3 assume !!(main_~i~0#1 < main_~num~0#1);call write~int(main_#t~nondet3#1, main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 78866#L27-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 78865#L27-3 assume !(main_~i~0#1 < main_~num~0#1); 78852#L27-4 main_~i~0#1 := 0; 78853#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78965#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78966#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78967#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78971#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78970#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79223#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79220#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79218#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79217#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79214#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79212#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79211#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79208#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79206#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79205#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79202#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79200#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79199#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79196#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79194#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79193#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79190#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79188#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79187#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79184#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79182#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79181#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79178#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79176#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79175#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79172#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79170#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79169#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79166#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79164#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79163#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79160#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79158#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79157#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79154#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79152#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79151#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79148#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79146#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79145#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79142#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79140#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79139#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79136#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79134#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79133#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79130#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79128#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79127#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79124#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79122#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79121#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79118#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79116#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79115#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79112#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79110#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79109#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79106#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79104#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79103#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79100#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79098#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79097#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79094#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79092#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79091#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79088#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79086#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79085#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79082#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79080#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79079#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79076#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79074#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79073#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79070#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79068#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79067#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79064#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79062#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79061#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79058#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79056#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79055#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79052#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79050#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79049#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79046#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79044#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79043#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79040#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79038#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79037#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79034#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79032#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79031#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79028#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79026#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79025#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79022#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79020#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79019#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79016#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79014#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79013#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79010#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79008#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79007#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 79004#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 79002#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 79001#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78998#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78996#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78995#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78992#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78990#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78989#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78986#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78984#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78983#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78980#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78978#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78977#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78975#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78974#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78973#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78859#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78846#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78856#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78861#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78962#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78961#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78868#L34 [2021-11-20 06:36:37,543 INFO L793 eck$LassoCheckResult]: Loop: 78868#L34 assume !(0 == (if main_#t~mem5#1 < 0 && 0 != main_#t~mem5#1 % 2 then main_#t~mem5#1 % 2 - 2 else main_#t~mem5#1 % 2));havoc main_#t~mem5#1; 78869#L32-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 78867#L32-3 assume !!(main_~i~0#1 < main_~num~0#1);call main_#t~mem5#1 := read~int(main_~#array~0#1.base, main_~#array~0#1.offset + 4 * main_~i~0#1, 4); 78868#L34 [2021-11-20 06:36:37,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:37,543 INFO L85 PathProgramCache]: Analyzing trace with hash 58469455, now seen corresponding path program 92 times [2021-11-20 06:36:37,543 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:37,544 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882939516] [2021-11-20 06:36:37,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:37,544 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:38,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:38,207 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:36:38,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:38,914 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:36:38,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:38,915 INFO L85 PathProgramCache]: Analyzing trace with hash 69557, now seen corresponding path program 48 times [2021-11-20 06:36:38,915 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:38,915 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099070505] [2021-11-20 06:36:38,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:38,915 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:38,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:38,918 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:36:38,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:36:38,920 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:36:38,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:36:38,921 INFO L85 PathProgramCache]: Analyzing trace with hash -1893148505, now seen corresponding path program 93 times [2021-11-20 06:36:38,921 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:36:38,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458005577] [2021-11-20 06:36:38,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:36:38,921 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:36:38,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:36:41,638 INFO L134 CoverageAnalysis]: Checked inductivity of 5499 backedges. 3151 proven. 2348 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:36:41,638 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:36:41,638 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458005577] [2021-11-20 06:36:41,639 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1458005577] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-20 06:36:41,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [32858330] [2021-11-20 06:36:41,639 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-20 06:36:41,639 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:36:41,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:36:41,640 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:36:41,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0e3d162a-cc26-430f-b3ab-c1948a4adb3a/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process