./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 53f42b1a Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 69d24e9affd7540aafb8052ecd737d7732ca2a63c7e8e16adc4217413d1d99a5 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-53f42b1 [2021-11-20 06:52:14,961 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-20 06:52:14,963 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-20 06:52:15,001 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-20 06:52:15,002 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-20 06:52:15,007 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-20 06:52:15,011 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-20 06:52:15,017 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-20 06:52:15,022 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-20 06:52:15,025 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-20 06:52:15,026 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-20 06:52:15,030 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-20 06:52:15,031 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-20 06:52:15,041 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-20 06:52:15,043 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-20 06:52:15,046 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-20 06:52:15,051 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-20 06:52:15,056 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-20 06:52:15,059 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-20 06:52:15,062 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-20 06:52:15,072 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-20 06:52:15,076 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-20 06:52:15,078 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-20 06:52:15,081 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-20 06:52:15,086 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-20 06:52:15,092 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-20 06:52:15,092 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-20 06:52:15,094 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-20 06:52:15,095 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-20 06:52:15,097 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-20 06:52:15,098 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-20 06:52:15,100 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-20 06:52:15,102 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-20 06:52:15,104 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-20 06:52:15,106 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-20 06:52:15,106 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-20 06:52:15,107 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-20 06:52:15,108 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-20 06:52:15,108 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-20 06:52:15,110 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-20 06:52:15,111 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-20 06:52:15,112 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-20 06:52:15,178 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-20 06:52:15,180 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-20 06:52:15,180 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-20 06:52:15,181 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-20 06:52:15,182 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-20 06:52:15,183 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-20 06:52:15,183 INFO L138 SettingsManager]: * Use SBE=true [2021-11-20 06:52:15,183 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-20 06:52:15,184 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-20 06:52:15,184 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-20 06:52:15,185 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-20 06:52:15,186 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-20 06:52:15,186 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-20 06:52:15,186 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-20 06:52:15,187 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-20 06:52:15,187 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-20 06:52:15,187 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-20 06:52:15,187 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-20 06:52:15,188 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-20 06:52:15,188 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-20 06:52:15,188 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-20 06:52:15,188 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-20 06:52:15,189 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-20 06:52:15,189 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-20 06:52:15,189 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-20 06:52:15,189 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-20 06:52:15,190 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-20 06:52:15,190 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-20 06:52:15,190 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-20 06:52:15,191 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-20 06:52:15,191 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-20 06:52:15,192 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-20 06:52:15,193 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-20 06:52:15,193 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 69d24e9affd7540aafb8052ecd737d7732ca2a63c7e8e16adc4217413d1d99a5 [2021-11-20 06:52:15,528 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-20 06:52:15,563 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-20 06:52:15,567 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-20 06:52:15,568 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-20 06:52:15,569 INFO L275 PluginConnector]: CDTParser initialized [2021-11-20 06:52:15,570 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i [2021-11-20 06:52:15,641 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/data/59e76ce9d/a0887cd75db348b58b4b9ee53dd3b85e/FLAGa196ec681 [2021-11-20 06:52:16,446 INFO L306 CDTParser]: Found 1 translation units. [2021-11-20 06:52:16,447 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i [2021-11-20 06:52:16,480 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/data/59e76ce9d/a0887cd75db348b58b4b9ee53dd3b85e/FLAGa196ec681 [2021-11-20 06:52:16,605 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/data/59e76ce9d/a0887cd75db348b58b4b9ee53dd3b85e [2021-11-20 06:52:16,607 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-20 06:52:16,609 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-20 06:52:16,611 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-20 06:52:16,611 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-20 06:52:16,621 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-20 06:52:16,622 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:52:16" (1/1) ... [2021-11-20 06:52:16,626 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5b3718ca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:16, skipping insertion in model container [2021-11-20 06:52:16,627 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 06:52:16" (1/1) ... [2021-11-20 06:52:16,637 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-20 06:52:16,717 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-20 06:52:17,274 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i[37019,37032] [2021-11-20 06:52:17,434 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i[47352,47365] [2021-11-20 06:52:17,443 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-20 06:52:17,457 INFO L203 MainTranslator]: Completed pre-run [2021-11-20 06:52:17,492 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i[37019,37032] [2021-11-20 06:52:17,563 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test2-1.i[47352,47365] [2021-11-20 06:52:17,568 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-20 06:52:17,621 INFO L208 MainTranslator]: Completed translation [2021-11-20 06:52:17,622 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17 WrapperNode [2021-11-20 06:52:17,622 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-20 06:52:17,624 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-20 06:52:17,624 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-20 06:52:17,624 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-20 06:52:17,632 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,665 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,733 INFO L137 Inliner]: procedures = 208, calls = 235, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 899 [2021-11-20 06:52:17,734 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-20 06:52:17,735 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-20 06:52:17,735 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-20 06:52:17,735 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-20 06:52:17,746 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,746 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,785 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,785 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,878 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,908 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,927 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,938 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-20 06:52:17,939 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-20 06:52:17,940 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-20 06:52:17,940 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-20 06:52:17,941 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (1/1) ... [2021-11-20 06:52:17,966 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-20 06:52:17,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:52:17,995 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-20 06:52:18,035 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-20 06:52:18,071 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-20 06:52:18,071 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-20 06:52:18,071 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-20 06:52:18,072 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-20 06:52:18,072 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-20 06:52:18,074 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-20 06:52:18,074 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-20 06:52:18,075 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-20 06:52:18,076 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-20 06:52:18,077 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-20 06:52:18,077 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-20 06:52:18,077 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-20 06:52:18,077 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-20 06:52:18,077 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-20 06:52:18,299 INFO L236 CfgBuilder]: Building ICFG [2021-11-20 06:52:18,301 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-20 06:52:18,305 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-20 06:52:19,604 INFO L277 CfgBuilder]: Performing block encoding [2021-11-20 06:52:19,618 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-20 06:52:19,619 INFO L301 CfgBuilder]: Removed 54 assume(true) statements. [2021-11-20 06:52:19,621 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:52:19 BoogieIcfgContainer [2021-11-20 06:52:19,621 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-20 06:52:19,622 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-20 06:52:19,623 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-20 06:52:19,629 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-20 06:52:19,630 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:52:19,631 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 20.11 06:52:16" (1/3) ... [2021-11-20 06:52:19,632 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@508a8c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 06:52:19, skipping insertion in model container [2021-11-20 06:52:19,632 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:52:19,632 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 06:52:17" (2/3) ... [2021-11-20 06:52:19,633 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@508a8c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 06:52:19, skipping insertion in model container [2021-11-20 06:52:19,634 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-20 06:52:19,634 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 06:52:19" (3/3) ... [2021-11-20 06:52:19,636 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test2-1.i [2021-11-20 06:52:19,694 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-20 06:52:19,694 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-20 06:52:19,694 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-20 06:52:19,694 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-20 06:52:19,694 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-20 06:52:19,694 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-20 06:52:19,694 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-20 06:52:19,695 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-20 06:52:19,714 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-20 06:52:19,747 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-20 06:52:19,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:52:19,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:52:19,755 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:52:19,755 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-20 06:52:19,755 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-20 06:52:19,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-20 06:52:19,769 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-20 06:52:19,769 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:52:19,769 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:52:19,770 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:52:19,770 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-20 06:52:19,777 INFO L791 eck$LassoCheckResult]: Stem: 154#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 46#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem144#1, main_#t~mem145#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 135#L814-4true [2021-11-20 06:52:19,778 INFO L793 eck$LassoCheckResult]: Loop: 135#L814-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 98#L814-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 81#L816true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 82#L816-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 165#L821-124true assume !true; 58#L814-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 135#L814-4true [2021-11-20 06:52:19,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:19,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-20 06:52:19,796 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:19,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804755898] [2021-11-20 06:52:19,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:19,799 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:19,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:19,975 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:52:20,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:20,060 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:52:20,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:20,063 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-20 06:52:20,064 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:20,066 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616958715] [2021-11-20 06:52:20,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:20,067 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:20,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:52:20,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:52:20,172 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:52:20,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1616958715] [2021-11-20 06:52:20,173 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1616958715] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-20 06:52:20,173 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-20 06:52:20,174 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-20 06:52:20,174 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555243844] [2021-11-20 06:52:20,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-20 06:52:20,180 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-20 06:52:20,181 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:52:20,218 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-20 06:52:20,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-20 06:52:20,222 INFO L87 Difference]: Start difference. First operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:52:20,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:52:20,248 INFO L93 Difference]: Finished difference Result 175 states and 227 transitions. [2021-11-20 06:52:20,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-20 06:52:20,255 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 175 states and 227 transitions. [2021-11-20 06:52:20,263 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-20 06:52:20,272 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 175 states to 171 states and 223 transitions. [2021-11-20 06:52:20,274 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 171 [2021-11-20 06:52:20,275 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 171 [2021-11-20 06:52:20,276 INFO L73 IsDeterministic]: Start isDeterministic. Operand 171 states and 223 transitions. [2021-11-20 06:52:20,279 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:52:20,280 INFO L681 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-20 06:52:20,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states and 223 transitions. [2021-11-20 06:52:20,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2021-11-20 06:52:20,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 167 states have (on average 1.2994011976047903) internal successors, (217), 166 states have internal predecessors, (217), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-20 06:52:20,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 223 transitions. [2021-11-20 06:52:20,330 INFO L704 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-20 06:52:20,330 INFO L587 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-20 06:52:20,331 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-20 06:52:20,331 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 171 states and 223 transitions. [2021-11-20 06:52:20,334 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-20 06:52:20,335 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:52:20,335 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:52:20,337 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:52:20,337 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-20 06:52:20,337 INFO L791 eck$LassoCheckResult]: Stem: 525#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 438#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem144#1, main_#t~mem145#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 439#L814-4 [2021-11-20 06:52:20,340 INFO L793 eck$LassoCheckResult]: Loop: 439#L814-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 496#L814-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 481#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 482#L816-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 485#L821-124 havoc main_~_ha_hashv~0#1; 444#L821-49 goto; 445#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 410#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 411#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 402#L821-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 403#L821-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 436#L821-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 437#L821-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 510#L821-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 519#L821-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 360#L821-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 361#L821-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 450#L821-22 assume !main_#t~switch24#1; 451#L821-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 494#L821-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 495#L821-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 415#L821-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 416#L821-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 493#L821-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 470#L821-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 441#L821-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 390#L821-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 391#L821-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 477#L821-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 383#L821-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 384#L821-42 havoc main_#t~switch24#1; 417#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 362#L821-44 goto; 363#L821-46 goto; 448#L821-48 goto; 449#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 364#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 365#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 378#L821-66 goto; 489#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 376#L821-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 377#L821-70 goto; 504#L821-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 388#L821-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 389#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 483#L821-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 484#L821-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 379#L821-117 goto; 380#L821-119 goto; 433#L821-121 goto; 497#L821-123 goto; 455#L814-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 439#L814-4 [2021-11-20 06:52:20,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:20,341 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-20 06:52:20,341 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:20,341 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620167412] [2021-11-20 06:52:20,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:20,342 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:20,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:20,361 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:52:20,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:20,404 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:52:20,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:20,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-20 06:52:20,405 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:20,406 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623772149] [2021-11-20 06:52:20,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:20,407 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:20,425 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-20 06:52:20,425 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [877234020] [2021-11-20 06:52:20,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:20,426 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:52:20,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:52:20,429 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:52:20,450 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-20 06:52:20,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:52:20,633 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-20 06:52:20,638 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:52:20,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:52:20,850 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-20 06:52:20,850 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:52:20,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [623772149] [2021-11-20 06:52:20,852 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2021-11-20 06:52:20,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [877234020] [2021-11-20 06:52:20,853 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [877234020] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-20 06:52:20,854 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-20 06:52:20,854 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-20 06:52:20,855 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258119788] [2021-11-20 06:52:20,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-20 06:52:20,857 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-20 06:52:20,858 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:52:20,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-20 06:52:20,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-20 06:52:20,860 INFO L87 Difference]: Start difference. First operand 171 states and 223 transitions. cyclomatic complexity: 55 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:52:21,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:52:21,024 INFO L93 Difference]: Finished difference Result 192 states and 244 transitions. [2021-11-20 06:52:21,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-20 06:52:21,026 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 192 states and 244 transitions. [2021-11-20 06:52:21,037 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 185 [2021-11-20 06:52:21,043 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 192 states to 192 states and 244 transitions. [2021-11-20 06:52:21,043 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 192 [2021-11-20 06:52:21,044 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 192 [2021-11-20 06:52:21,044 INFO L73 IsDeterministic]: Start isDeterministic. Operand 192 states and 244 transitions. [2021-11-20 06:52:21,046 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:52:21,046 INFO L681 BuchiCegarLoop]: Abstraction has 192 states and 244 transitions. [2021-11-20 06:52:21,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states and 244 transitions. [2021-11-20 06:52:21,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 191. [2021-11-20 06:52:21,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 187 states have (on average 1.267379679144385) internal successors, (237), 186 states have internal predecessors, (237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-20 06:52:21,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 243 transitions. [2021-11-20 06:52:21,070 INFO L704 BuchiCegarLoop]: Abstraction has 191 states and 243 transitions. [2021-11-20 06:52:21,070 INFO L587 BuchiCegarLoop]: Abstraction has 191 states and 243 transitions. [2021-11-20 06:52:21,070 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-20 06:52:21,071 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 243 transitions. [2021-11-20 06:52:21,073 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 184 [2021-11-20 06:52:21,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:52:21,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:52:21,078 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:52:21,078 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-20 06:52:21,079 INFO L791 eck$LassoCheckResult]: Stem: 1054#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 961#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem144#1, main_#t~mem145#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 962#L814-4 [2021-11-20 06:52:21,079 INFO L793 eck$LassoCheckResult]: Loop: 962#L814-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1023#L814-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1007#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1008#L816-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1011#L821-124 havoc main_~_ha_hashv~0#1; 968#L821-49 goto; 969#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 933#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 934#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 924#L821-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 925#L821-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 959#L821-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 960#L821-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 1037#L821-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1048#L821-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 882#L821-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 883#L821-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 974#L821-22 assume main_#t~switch24#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 975#L821-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 1021#L821-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 1022#L821-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 938#L821-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 939#L821-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 1019#L821-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1020#L821-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 964#L821-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 965#L821-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 1002#L821-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1003#L821-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 905#L821-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 906#L821-42 havoc main_#t~switch24#1; 940#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 884#L821-44 goto; 885#L821-46 goto; 972#L821-48 goto; 973#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 886#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 887#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 900#L821-66 goto; 1015#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 898#L821-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 899#L821-70 goto; 1031#L821-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 910#L821-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 911#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 1009#L821-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 1010#L821-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 901#L821-117 goto; 902#L821-119 goto; 956#L821-121 goto; 1024#L821-123 goto; 979#L814-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 962#L814-4 [2021-11-20 06:52:21,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:21,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-20 06:52:21,081 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:21,082 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10355944] [2021-11-20 06:52:21,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,082 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:21,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:21,112 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:52:21,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:21,137 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:52:21,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:21,137 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-20 06:52:21,138 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:21,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316783940] [2021-11-20 06:52:21,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,139 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:21,156 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-20 06:52:21,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [982093330] [2021-11-20 06:52:21,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,159 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:52:21,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:52:21,160 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:52:21,181 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-20 06:52:21,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-20 06:52:21,352 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-20 06:52:21,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-20 06:52:21,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-20 06:52:21,595 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-20 06:52:21,595 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-20 06:52:21,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316783940] [2021-11-20 06:52:21,596 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2021-11-20 06:52:21,596 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [982093330] [2021-11-20 06:52:21,596 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [982093330] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-20 06:52:21,596 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-20 06:52:21,596 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-20 06:52:21,597 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307426895] [2021-11-20 06:52:21,597 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-20 06:52:21,597 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-20 06:52:21,598 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-20 06:52:21,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-20 06:52:21,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-20 06:52:21,598 INFO L87 Difference]: Start difference. First operand 191 states and 243 transitions. cyclomatic complexity: 55 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-20 06:52:21,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-20 06:52:21,725 INFO L93 Difference]: Finished difference Result 261 states and 331 transitions. [2021-11-20 06:52:21,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-20 06:52:21,726 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 261 states and 331 transitions. [2021-11-20 06:52:21,730 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 246 [2021-11-20 06:52:21,733 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 261 states to 261 states and 331 transitions. [2021-11-20 06:52:21,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 261 [2021-11-20 06:52:21,735 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 261 [2021-11-20 06:52:21,735 INFO L73 IsDeterministic]: Start isDeterministic. Operand 261 states and 331 transitions. [2021-11-20 06:52:21,737 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-20 06:52:21,737 INFO L681 BuchiCegarLoop]: Abstraction has 261 states and 331 transitions. [2021-11-20 06:52:21,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states and 331 transitions. [2021-11-20 06:52:21,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 177. [2021-11-20 06:52:21,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 173 states have (on average 1.2485549132947977) internal successors, (216), 172 states have internal predecessors, (216), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-20 06:52:21,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 222 transitions. [2021-11-20 06:52:21,748 INFO L704 BuchiCegarLoop]: Abstraction has 177 states and 222 transitions. [2021-11-20 06:52:21,748 INFO L587 BuchiCegarLoop]: Abstraction has 177 states and 222 transitions. [2021-11-20 06:52:21,749 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-20 06:52:21,749 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 222 transitions. [2021-11-20 06:52:21,750 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 170 [2021-11-20 06:52:21,750 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-20 06:52:21,750 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-20 06:52:21,751 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-20 06:52:21,751 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-20 06:52:21,752 INFO L791 eck$LassoCheckResult]: Stem: 1665#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem144#1, main_#t~mem145#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1575#L814-4 [2021-11-20 06:52:21,752 INFO L793 eck$LassoCheckResult]: Loop: 1575#L814-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1636#L814-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1620#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1621#L816-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1622#L821-124 havoc main_~_ha_hashv~0#1; 1581#L821-49 goto; 1582#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1546#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1547#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 1538#L821-10 assume !main_#t~switch24#1; 1539#L821-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 1572#L821-13 assume !main_#t~switch24#1; 1573#L821-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 1650#L821-16 assume !main_#t~switch24#1; 1659#L821-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 1494#L821-19 assume !main_#t~switch24#1; 1495#L821-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 1587#L821-22 assume !main_#t~switch24#1; 1588#L821-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 1634#L821-25 assume !main_#t~switch24#1; 1635#L821-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 1551#L821-28 assume !main_#t~switch24#1; 1552#L821-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 1631#L821-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1632#L821-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 1577#L821-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 1578#L821-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 1615#L821-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1616#L821-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 1519#L821-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 1520#L821-42 havoc main_#t~switch24#1; 1553#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 1498#L821-44 goto; 1499#L821-46 goto; 1585#L821-48 goto; 1586#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1500#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 1501#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 1514#L821-66 goto; 1630#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 1512#L821-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 1513#L821-70 goto; 1644#L821-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1526#L821-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 1527#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 1623#L821-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 1624#L821-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 1517#L821-117 goto; 1518#L821-119 goto; 1571#L821-121 goto; 1639#L821-123 goto; 1593#L814-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1575#L814-4 [2021-11-20 06:52:21,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:21,753 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-20 06:52:21,753 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:21,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212160702] [2021-11-20 06:52:21,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,754 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:21,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:21,767 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-20 06:52:21,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-20 06:52:21,785 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-20 06:52:21,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-20 06:52:21,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-20 06:52:21,786 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-20 06:52:21,786 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040820837] [2021-11-20 06:52:21,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,787 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-20 06:52:21,798 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-20 06:52:21,806 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1909046607] [2021-11-20 06:52:21,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-20 06:52:21,807 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-20 06:52:21,807 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 [2021-11-20 06:52:21,836 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-20 06:52:21,850 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_47e6a385-ea22-429b-b11a-73d423f063d4/bin/uautomizer-DQz5hQGWxF/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process