./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version fcb8e130 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4bcb37c4379f8eccb740fb6c6359bb8950e56f103e832e8f7687e811a6b9e6cf --- Real Ultimate output --- This is Ultimate 0.2.1-dev-fcb8e13 [2021-11-23 03:40:03,490 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-23 03:40:03,491 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-23 03:40:03,526 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-23 03:40:03,527 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-23 03:40:03,530 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-23 03:40:03,531 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-23 03:40:03,536 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-23 03:40:03,537 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-23 03:40:03,540 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-23 03:40:03,541 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-23 03:40:03,542 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-23 03:40:03,542 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-23 03:40:03,544 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-23 03:40:03,545 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-23 03:40:03,548 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-23 03:40:03,549 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-23 03:40:03,550 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-23 03:40:03,553 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-23 03:40:03,557 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-23 03:40:03,558 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-23 03:40:03,558 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-23 03:40:03,560 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-23 03:40:03,560 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-23 03:40:03,565 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-23 03:40:03,565 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-23 03:40:03,565 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-23 03:40:03,566 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-23 03:40:03,567 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-23 03:40:03,567 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-23 03:40:03,568 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-23 03:40:03,568 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-23 03:40:03,570 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-23 03:40:03,570 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-23 03:40:03,571 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-23 03:40:03,571 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-23 03:40:03,572 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-23 03:40:03,572 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-23 03:40:03,572 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-23 03:40:03,573 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-23 03:40:03,573 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-23 03:40:03,575 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-11-23 03:40:03,596 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-23 03:40:03,599 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-23 03:40:03,600 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-23 03:40:03,600 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-23 03:40:03,601 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-23 03:40:03,601 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-23 03:40:03,601 INFO L138 SettingsManager]: * Use SBE=true [2021-11-23 03:40:03,601 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-23 03:40:03,602 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-23 03:40:03,602 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-23 03:40:03,602 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-23 03:40:03,602 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-23 03:40:03,603 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-23 03:40:03,603 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 03:40:03,604 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-23 03:40:03,604 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-11-23 03:40:03,605 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-11-23 03:40:03,606 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-23 03:40:03,606 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-23 03:40:03,606 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4bcb37c4379f8eccb740fb6c6359bb8950e56f103e832e8f7687e811a6b9e6cf [2021-11-23 03:40:03,800 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-23 03:40:03,819 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-23 03:40:03,821 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-23 03:40:03,822 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-23 03:40:03,822 INFO L275 PluginConnector]: CDTParser initialized [2021-11-23 03:40:03,823 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i [2021-11-23 03:40:03,859 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/379a99726/1c583bc3870c431d83884d0394b5f889/FLAGaf7672c36 [2021-11-23 03:40:04,485 INFO L306 CDTParser]: Found 1 translation units. [2021-11-23 03:40:04,486 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i [2021-11-23 03:40:04,523 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/379a99726/1c583bc3870c431d83884d0394b5f889/FLAGaf7672c36 [2021-11-23 03:40:04,648 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/379a99726/1c583bc3870c431d83884d0394b5f889 [2021-11-23 03:40:04,650 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-23 03:40:04,651 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-23 03:40:04,654 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-23 03:40:04,654 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-23 03:40:04,656 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-23 03:40:04,657 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:40:04" (1/1) ... [2021-11-23 03:40:04,658 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50094bf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:04, skipping insertion in model container [2021-11-23 03:40:04,658 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:40:04" (1/1) ... [2021-11-23 03:40:04,662 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-23 03:40:04,755 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-23 03:40:06,599 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i[345848,345861] [2021-11-23 03:40:06,602 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i[345993,346006] [2021-11-23 03:40:06,616 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 03:40:06,636 INFO L203 MainTranslator]: Completed pre-run [2021-11-23 03:40:06,904 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i[345848,345861] [2021-11-23 03:40:06,905 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-challenges/linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i[345993,346006] [2021-11-23 03:40:06,908 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 03:40:07,028 INFO L208 MainTranslator]: Completed translation [2021-11-23 03:40:07,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07 WrapperNode [2021-11-23 03:40:07,029 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-23 03:40:07,030 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-23 03:40:07,030 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-23 03:40:07,030 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-23 03:40:07,035 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:07,114 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:07,635 INFO L137 Inliner]: procedures = 442, calls = 2346, calls flagged for inlining = 819, calls inlined = 2380, statements flattened = 26400 [2021-11-23 03:40:07,635 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-23 03:40:07,636 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-23 03:40:07,636 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-23 03:40:07,636 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-23 03:40:07,642 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:07,655 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:07,892 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:07,892 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:08,262 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:08,329 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:08,389 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:08,487 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-23 03:40:08,488 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-23 03:40:08,488 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-23 03:40:08,488 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-23 03:40:08,490 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (1/1) ... [2021-11-23 03:40:08,495 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 03:40:08,502 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-11-23 03:40:08,541 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-23 03:40:08,560 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-23 03:40:08,576 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_mii_write_reg [2021-11-23 03:40:08,577 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_mii_write_reg [2021-11-23 03:40:08,577 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_mii_sync [2021-11-23 03:40:08,577 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_mii_sync [2021-11-23 03:40:08,577 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-23 03:40:08,577 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_close [2021-11-23 03:40:08,577 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_close [2021-11-23 03:40:08,578 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_unregister_netdev [2021-11-23 03:40:08,578 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_unregister_netdev [2021-11-23 03:40:08,578 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-23 03:40:08,578 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_stop [2021-11-23 03:40:08,578 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_stop [2021-11-23 03:40:08,578 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-23 03:40:08,578 INFO L130 BoogieDeclarations]: Found specification of procedure inb_p [2021-11-23 03:40:08,578 INFO L138 BoogieDeclarations]: Found implementation of procedure inb_p [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~TO~VOID [2021-11-23 03:40:08,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~TO~VOID [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_unregister_netdev_stop_11_2 [2021-11-23 03:40:08,579 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_unregister_netdev_stop_11_2 [2021-11-23 03:40:08,579 INFO L130 BoogieDeclarations]: Found specification of procedure outb_p [2021-11-23 03:40:08,580 INFO L138 BoogieDeclarations]: Found implementation of procedure outb_p [2021-11-23 03:40:08,580 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_phy_detect [2021-11-23 03:40:08,580 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_phy_detect [2021-11-23 03:40:08,580 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-23 03:40:08,580 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-23 03:40:08,580 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_exit [2021-11-23 03:40:08,580 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_exit [2021-11-23 03:40:08,580 INFO L130 BoogieDeclarations]: Found specification of procedure slow_down_io [2021-11-23 03:40:08,581 INFO L138 BoogieDeclarations]: Found implementation of procedure slow_down_io [2021-11-23 03:40:08,581 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-23 03:40:08,581 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-23 03:40:08,581 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_eisa_cleanup [2021-11-23 03:40:08,581 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_eisa_cleanup [2021-11-23 03:40:08,581 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-11-23 03:40:08,582 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_finish_reset [2021-11-23 03:40:08,582 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_finish_reset [2021-11-23 03:40:08,582 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-23 03:40:08,582 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_phy_power_down [2021-11-23 03:40:08,582 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_phy_power_down [2021-11-23 03:40:08,582 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_reset_adapter [2021-11-23 03:40:08,582 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_reset_adapter [2021-11-23 03:40:08,582 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_mii_send_data [2021-11-23 03:40:08,583 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_mii_send_data [2021-11-23 03:40:08,583 INFO L130 BoogieDeclarations]: Found specification of procedure tlan_mii_read_reg [2021-11-23 03:40:08,583 INFO L138 BoogieDeclarations]: Found implementation of procedure tlan_mii_read_reg [2021-11-23 03:40:08,583 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_unregister_netdev_97 [2021-11-23 03:40:08,583 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_unregister_netdev_97 [2021-11-23 03:40:08,583 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-23 03:40:08,583 INFO L130 BoogieDeclarations]: Found specification of procedure __request_region [2021-11-23 03:40:09,325 INFO L236 CfgBuilder]: Building ICFG [2021-11-23 03:40:09,326 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-23 03:40:16,461 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9483: tlan_ee_receive_byte_~tmp___9~3#1 := tlan_ee_receive_byte_#t~ret975#1;havoc tlan_ee_receive_byte_#t~ret975#1; [2021-11-23 03:40:16,461 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9484: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp___9~3#1 % 256, 191), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,461 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9484-1: SUMMARY for call tlan_ee_receive_byte_#t~ret976#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,462 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9485: tlan_ee_receive_byte_~tmp___10~3#1 := tlan_ee_receive_byte_#t~ret976#1;havoc tlan_ee_receive_byte_#t~ret976#1; [2021-11-23 03:40:16,462 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9486-1: SUMMARY for call tlan_ee_receive_byte_#t~ret977#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9486: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp___10~3#1 % 256, 239), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9487: tlan_ee_receive_byte_~tmp___11~2#1 := tlan_ee_receive_byte_#t~ret977#1;havoc tlan_ee_receive_byte_#t~ret977#1; [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9488: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___11~2#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___11~2#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___11~2#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9488-1: SUMMARY for call tlan_ee_receive_byte_#t~ret978#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9489: tlan_ee_receive_byte_~tmp___12~2#1 := tlan_ee_receive_byte_#t~ret978#1;havoc tlan_ee_receive_byte_#t~ret978#1; [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13189: ldv_register_netdev_#t~ret1057#1 := ldv_pre_register_netdev_#res#1;assume { :end_inline_ldv_pre_register_netdev } true;assume -2147483648 <= ldv_register_netdev_#t~ret1057#1 && ldv_register_netdev_#t~ret1057#1 <= 2147483647;ldv_register_netdev_~ldv_9_ret_default~0#1 := ldv_register_netdev_#t~ret1057#1;havoc ldv_register_netdev_#t~ret1057#1;ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset := ldv_register_netdev_~arg1#1.base, ldv_register_netdev_~arg1#1.offset;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,463 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9490: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___12~2#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___12~2#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___12~2#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9490-1: assume { :end_inline_tlan_ee_receive_byte } true;havoc tlan_ee_read_byte_#t~mem988#1; [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5792-2: assume { :begin_inline_is_device_dma_capable } true;is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc is_device_dma_capable_#res#1;havoc is_device_dma_capable_#t~mem50#1.base, is_device_dma_capable_#t~mem50#1.offset, is_device_dma_capable_#t~mem51#1.base, is_device_dma_capable_#t~mem51#1.offset, is_device_dma_capable_#t~mem52#1, is_device_dma_capable_#t~short53#1, is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset;is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset := is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset;call is_device_dma_capable_#t~mem50#1.base, is_device_dma_capable_#t~mem50#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1130 + is_device_dma_capable_~dev#1.offset, 8);is_device_dma_capable_#t~short53#1 := 0 != (is_device_dma_capable_#t~mem50#1.base + is_device_dma_capable_#t~mem50#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5792: assume 0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := ~#x86_dma_fallback_dev~0.base, ~#x86_dma_fallback_dev~0.offset; [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5792: assume !(0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616); [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-13: ldv_register_netdev_#t~ret1062#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_register_netdev_#t~ret1062#1 && ldv_register_netdev_#t~ret1062#1 <= 2147483647;ldv_register_netdev_~tmp~83#1 := ldv_register_netdev_#t~ret1062#1;havoc ldv_register_netdev_#t~ret1062#1; [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-12: ldv_malloc_#t~ret1111#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_malloc_#t~ret1111#1 && ldv_malloc_#t~ret1111#1 <= 2147483647;ldv_malloc_~tmp___1~16#1 := ldv_malloc_#t~ret1111#1;havoc ldv_malloc_#t~ret1111#1; [2021-11-23 03:40:16,464 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-9: ldv_alloc_etherdev_mqs_#t~ret991#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_alloc_etherdev_mqs_#t~ret991#1 && ldv_alloc_etherdev_mqs_#t~ret991#1 <= 2147483647;ldv_alloc_etherdev_mqs_~tmp___0~29#1 := ldv_alloc_etherdev_mqs_#t~ret991#1;havoc ldv_alloc_etherdev_mqs_#t~ret991#1; [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-8: ldv_malloc_#t~ret1111#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_malloc_#t~ret1111#1 && ldv_malloc_#t~ret1111#1 <= 2147483647;ldv_malloc_~tmp___1~16#1 := ldv_malloc_#t~ret1111#1;havoc ldv_malloc_#t~ret1111#1; [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-11: ldv_request_irq_#t~ret1064#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_request_irq_#t~ret1064#1 && ldv_request_irq_#t~ret1064#1 <= 2147483647;ldv_request_irq_~tmp~85#1 := ldv_request_irq_#t~ret1064#1;havoc ldv_request_irq_#t~ret1064#1; [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11609-10: ldv_register_netdev_#t~ret1058#1 := ldv_undef_int_#res#1;assume { :end_inline_ldv_undef_int } true;assume -2147483648 <= ldv_register_netdev_#t~ret1058#1 && ldv_register_netdev_#t~ret1058#1 <= 2147483647;ldv_register_netdev_~tmp___0~32#1 := ldv_register_netdev_#t~ret1058#1;havoc ldv_register_netdev_#t~ret1058#1; [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13198: assume { :end_inline_lockdep_init_map } true;assume { :begin_inline_INIT_LIST_HEAD } true;INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset := tlan_probe1_~priv~3#1.base, 399 + tlan_probe1_~priv~3#1.offset;havoc INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset;INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset := INIT_LIST_HEAD_#in~list#1.base, INIT_LIST_HEAD_#in~list#1.offset;call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, 8);call write~$Pointer$(INIT_LIST_HEAD_~list#1.base, INIT_LIST_HEAD_~list#1.offset, INIT_LIST_HEAD_~list#1.base, 8 + INIT_LIST_HEAD_~list#1.offset, 8); [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5799: assume 0 == dma_alloc_attrs_~tmp___0~2#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5799: assume !(0 == dma_alloc_attrs_~tmp___0~2#1);call dma_alloc_attrs_#t~mem110#1.base, dma_alloc_attrs_#t~mem110#1.offset := read~$Pointer$(dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, 8); [2021-11-23 03:40:16,465 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5803: assume 0 == (dma_alloc_attrs_#t~mem110#1.base + dma_alloc_attrs_#t~mem110#1.offset) % 18446744073709551616;havoc dma_alloc_attrs_#t~mem110#1.base, dma_alloc_attrs_#t~mem110#1.offset;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5803: assume !(0 == (dma_alloc_attrs_#t~mem110#1.base + dma_alloc_attrs_#t~mem110#1.offset) % 18446744073709551616);havoc dma_alloc_attrs_#t~mem110#1.base, dma_alloc_attrs_#t~mem110#1.offset;assume { :begin_inline_dma_alloc_coherent_gfp_flags } true;dma_alloc_coherent_gfp_flags_#in~dev#1.base, dma_alloc_coherent_gfp_flags_#in~dev#1.offset, dma_alloc_coherent_gfp_flags_#in~gfp#1 := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~gfp#1;havoc dma_alloc_coherent_gfp_flags_#res#1;havoc dma_alloc_coherent_gfp_flags_#t~ret107#1, dma_alloc_coherent_gfp_flags_~dev#1.base, dma_alloc_coherent_gfp_flags_~dev#1.offset, dma_alloc_coherent_gfp_flags_~gfp#1, dma_alloc_coherent_gfp_flags_~dma_mask~1#1, dma_alloc_coherent_gfp_flags_~tmp~7#1;dma_alloc_coherent_gfp_flags_~dev#1.base, dma_alloc_coherent_gfp_flags_~dev#1.offset := dma_alloc_coherent_gfp_flags_#in~dev#1.base, dma_alloc_coherent_gfp_flags_#in~dev#1.offset;dma_alloc_coherent_gfp_flags_~gfp#1 := dma_alloc_coherent_gfp_flags_#in~gfp#1;havoc dma_alloc_coherent_gfp_flags_~dma_mask~1#1;havoc dma_alloc_coherent_gfp_flags_~tmp~7#1;assume { :begin_inline_dma_alloc_coherent_mask } true;dma_alloc_coherent_mask_#in~dev#1.base, dma_alloc_coherent_mask_#in~dev#1.offset, dma_alloc_coherent_mask_#in~gfp#1 := dma_alloc_coherent_gfp_flags_~dev#1.base, dma_alloc_coherent_gfp_flags_~dev#1.offset, dma_alloc_coherent_gfp_flags_~gfp#1;havoc dma_alloc_coherent_mask_#res#1;havoc dma_alloc_coherent_mask_#t~mem105#1, dma_alloc_coherent_mask_#t~ite106#1, dma_alloc_coherent_mask_~dev#1.base, dma_alloc_coherent_mask_~dev#1.offset, dma_alloc_coherent_mask_~gfp#1, dma_alloc_coherent_mask_~dma_mask~0#1;dma_alloc_coherent_mask_~dev#1.base, dma_alloc_coherent_mask_~dev#1.offset := dma_alloc_coherent_mask_#in~dev#1.base, dma_alloc_coherent_mask_#in~dev#1.offset;dma_alloc_coherent_mask_~gfp#1 := dma_alloc_coherent_mask_#in~gfp#1;havoc dma_alloc_coherent_mask_~dma_mask~0#1;dma_alloc_coherent_mask_~dma_mask~0#1 := 0;call dma_alloc_coherent_mask_#t~mem105#1 := read~int(dma_alloc_coherent_mask_~dev#1.base, 1138 + dma_alloc_coherent_mask_~dev#1.offset, 8);dma_alloc_coherent_mask_~dma_mask~0#1 := dma_alloc_coherent_mask_#t~mem105#1;havoc dma_alloc_coherent_mask_#t~mem105#1; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_1_switch_break#2: ldv_switch_1_#res#1 := 0; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_1_switch_break#3: ldv_switch_1_#res#1 := 0; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_1_switch_break#1: ldv_switch_1_#res#1 := 0; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-1: assume { :end_inline_#Ultimate.meminit } true;ldv_xzalloc_~tmp~109#1.base, ldv_xzalloc_~tmp~109#1.offset := ldv_xzalloc_#t~malloc1120#1.base, ldv_xzalloc_#t~malloc1120#1.offset;ldv_xzalloc_~res~4#1.base, ldv_xzalloc_~res~4#1.offset := ldv_xzalloc_~tmp~109#1.base, ldv_xzalloc_~tmp~109#1.offset;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != (ldv_xzalloc_~res~4#1.base + ldv_xzalloc_~res~4#1.offset) % 18446744073709551616 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,466 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-2: dma_alloc_attrs_#t~ret119#1.base, dma_alloc_attrs_#t~ret119#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#res#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#res#1.offset;assume { :end_inline_##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ } true;dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset := dma_alloc_attrs_#t~ret119#1.base, dma_alloc_attrs_#t~ret119#1.offset;havoc dma_alloc_attrs_#t~mem118#1.base, dma_alloc_attrs_#t~mem118#1.offset;havoc dma_alloc_attrs_#t~ret119#1.base, dma_alloc_attrs_#t~ret119#1.offset;call dma_alloc_attrs_#t~mem120#1 := read~int(dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, 8);assume { :begin_inline_debug_dma_alloc_coherent } true;debug_dma_alloc_coherent_#in~arg0#1.base, debug_dma_alloc_coherent_#in~arg0#1.offset, debug_dma_alloc_coherent_#in~arg1#1, debug_dma_alloc_coherent_#in~arg2#1, debug_dma_alloc_coherent_#in~arg3#1.base, debug_dma_alloc_coherent_#in~arg3#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_#t~mem120#1, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc debug_dma_alloc_coherent_~arg0#1.base, debug_dma_alloc_coherent_~arg0#1.offset, debug_dma_alloc_coherent_~arg1#1, debug_dma_alloc_coherent_~arg2#1, debug_dma_alloc_coherent_~arg3#1.base, debug_dma_alloc_coherent_~arg3#1.offset;debug_dma_alloc_coherent_~arg0#1.base, debug_dma_alloc_coherent_~arg0#1.offset := debug_dma_alloc_coherent_#in~arg0#1.base, debug_dma_alloc_coherent_#in~arg0#1.offset;debug_dma_alloc_coherent_~arg1#1 := debug_dma_alloc_coherent_#in~arg1#1;debug_dma_alloc_coherent_~arg2#1 := debug_dma_alloc_coherent_#in~arg2#1;debug_dma_alloc_coherent_~arg3#1.base, debug_dma_alloc_coherent_~arg3#1.offset := debug_dma_alloc_coherent_#in~arg3#1.base, debug_dma_alloc_coherent_#in~arg3#1.offset; [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-4: assume #Ultimate.C_memset_#t~loopctr1235#1 % 18446744073709551616 < #Ultimate.C_memset_#amount#1 % 18446744073709551616;#memory_int := #memory_int[#Ultimate.C_memset_#ptr#1.base,#Ultimate.C_memset_#ptr#1.offset + #Ultimate.C_memset_#t~loopctr1235#1 := #Ultimate.C_memset_#value#1];#memory_$Pointer$.base, #memory_$Pointer$.offset := #memory_$Pointer$.base[#Ultimate.C_memset_#ptr#1.base,#Ultimate.C_memset_#ptr#1.offset + #Ultimate.C_memset_#t~loopctr1235#1 := 0], #memory_$Pointer$.offset[#Ultimate.C_memset_#ptr#1.base,#Ultimate.C_memset_#ptr#1.offset + #Ultimate.C_memset_#t~loopctr1235#1 := #Ultimate.C_memset_#value#1 % 256];#Ultimate.C_memset_#t~loopctr1235#1 := 1 + #Ultimate.C_memset_#t~loopctr1235#1; [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-4: assume !(#Ultimate.C_memset_#t~loopctr1235#1 % 18446744073709551616 < #Ultimate.C_memset_#amount#1 % 18446744073709551616); [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-5: assume #Ultimate.C_memset_#res#1.base == #Ultimate.C_memset_#ptr#1.base && #Ultimate.C_memset_#res#1.offset == #Ultimate.C_memset_#ptr#1.offset;tlan_init_#t~memset~res351#1.base, tlan_init_#t~memset~res351#1.offset := #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;assume { :end_inline_#Ultimate.C_memset } true;havoc tlan_init_#t~mem350#1.base, tlan_init_#t~mem350#1.offset;havoc tlan_init_#t~memset~res351#1.base, tlan_init_#t~memset~res351#1.offset;call tlan_init_#t~mem352#1.base, tlan_init_#t~mem352#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 24 + tlan_init_~priv~5#1.offset, 8);call write~$Pointer$(0, (if ~bitwiseAnd(7 + (tlan_init_#t~mem352#1.base + tlan_init_#t~mem352#1.offset), 18446744073709551608) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~bitwiseAnd(7 + (tlan_init_#t~mem352#1.base + tlan_init_#t~mem352#1.offset), 18446744073709551608) % 18446744073709551616 % 18446744073709551616 else ~bitwiseAnd(7 + (tlan_init_#t~mem352#1.base + tlan_init_#t~mem352#1.offset), 18446744073709551608) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), tlan_init_~priv~5#1.base, 52 + tlan_init_~priv~5#1.offset, 8);havoc tlan_init_#t~mem352#1.base, tlan_init_#t~mem352#1.offset;call tlan_init_#t~mem353#1 := read~int(tlan_init_~priv~5#1.base, 32 + tlan_init_~priv~5#1.offset, 8);call write~int(~bitwiseAnd(7 + tlan_init_#t~mem353#1, 18446744073709551608), tlan_init_~priv~5#1.base, 60 + tlan_init_~priv~5#1.offset, 8);havoc tlan_init_#t~mem353#1;call tlan_init_#t~mem354#1.base, tlan_init_#t~mem354#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 52 + tlan_init_~priv~5#1.offset, 8);call write~$Pointer$(tlan_init_#t~mem354#1.base, 2816 + tlan_init_#t~mem354#1.offset, tlan_init_~priv~5#1.base, 96 + tlan_init_~priv~5#1.offset, 8);havoc tlan_init_#t~mem354#1.base, tlan_init_#t~mem354#1.offset;call tlan_init_#t~mem355#1 := read~int(tlan_init_~priv~5#1.base, 60 + tlan_init_~priv~5#1.offset, 8);call write~int(2816 + tlan_init_#t~mem355#1, tlan_init_~priv~5#1.base, 104 + tlan_init_~priv~5#1.offset, 8);havoc tlan_init_#t~mem355#1;tlan_init_~err~0#1 := 0;tlan_init_~i~0#1 := 0; [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-6: dma_map_single_attrs_#t~ret90#1 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#res#1;assume { :end_inline_##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 } true;dma_map_single_attrs_~addr~0#1 := dma_map_single_attrs_#t~ret90#1;havoc dma_map_single_attrs_#t~mem89#1.base, dma_map_single_attrs_#t~mem89#1.offset;havoc dma_map_single_attrs_#t~ret90#1;assume { :begin_inline___phys_addr } true;__phys_addr_#in~arg0#1 := dma_map_single_attrs_~ptr#1.base + dma_map_single_attrs_~ptr#1.offset;havoc __phys_addr_#res#1;havoc __phys_addr_#t~nondet1192#1, __phys_addr_~arg0#1;__phys_addr_~arg0#1 := __phys_addr_#in~arg0#1;__phys_addr_#res#1 := __phys_addr_#t~nondet1192#1;havoc __phys_addr_#t~nondet1192#1; [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L-1-7: assume { :end_inline_##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID } true;havoc dma_free_attrs_#t~mem133#1.base, dma_free_attrs_#t~mem133#1.offset; [2021-11-23 03:40:16,467 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9513: assume 0 != tlan_ee_read_byte_~err~4#1;tlan_ee_read_byte_~ret~0#1 := 1; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9513: assume !(0 != tlan_ee_read_byte_~err~4#1);call tlan_ee_read_byte_#t~mem983#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_send_byte } true;tlan_ee_send_byte_#in~io_base#1, tlan_ee_send_byte_#in~data#1, tlan_ee_send_byte_#in~stop#1 := tlan_ee_read_byte_#t~mem983#1 % 65536, tlan_ee_read_byte_~ee_addr#1 % 256, 0;havoc tlan_ee_send_byte_#res#1;havoc tlan_ee_send_byte_#t~ret952#1, tlan_ee_send_byte_#t~ret953#1, tlan_ee_send_byte_#t~ret954#1, tlan_ee_send_byte_#t~ret955#1, tlan_ee_send_byte_#t~ret956#1, tlan_ee_send_byte_#t~ret957#1, tlan_ee_send_byte_#t~ret958#1, tlan_ee_send_byte_#t~ret959#1, tlan_ee_send_byte_#t~ret960#1, tlan_ee_send_byte_#t~ret961#1, tlan_ee_send_byte_#t~ret962#1, tlan_ee_send_byte_#t~ret963#1, tlan_ee_send_byte_~io_base#1, tlan_ee_send_byte_~data#1, tlan_ee_send_byte_~stop#1, tlan_ee_send_byte_~err~3#1, tlan_ee_send_byte_~place~0#1, tlan_ee_send_byte_~sio~6#1, tlan_ee_send_byte_~tmp~67#1, tlan_ee_send_byte_~tmp___0~27#1, tlan_ee_send_byte_~tmp___1~13#1, tlan_ee_send_byte_~tmp___2~8#1, tlan_ee_send_byte_~tmp___3~7#1, tlan_ee_send_byte_~tmp___4~5#1, tlan_ee_send_byte_~tmp___5~4#1, tlan_ee_send_byte_~tmp___6~3#1, tlan_ee_send_byte_~tmp___7~2#1, tlan_ee_send_byte_~tmp___8~2#1, tlan_ee_send_byte_~tmp___9~2#1, tlan_ee_send_byte_~tmp___10~2#1;tlan_ee_send_byte_~io_base#1 := tlan_ee_send_byte_#in~io_base#1;tlan_ee_send_byte_~data#1 := tlan_ee_send_byte_#in~data#1;tlan_ee_send_byte_~stop#1 := tlan_ee_send_byte_#in~stop#1;havoc tlan_ee_send_byte_~err~3#1;havoc tlan_ee_send_byte_~place~0#1;havoc tlan_ee_send_byte_~sio~6#1;havoc tlan_ee_send_byte_~tmp~67#1;havoc tlan_ee_send_byte_~tmp___0~27#1;havoc tlan_ee_send_byte_~tmp___1~13#1;havoc tlan_ee_send_byte_~tmp___2~8#1;havoc tlan_ee_send_byte_~tmp___3~7#1;havoc tlan_ee_send_byte_~tmp___4~5#1;havoc tlan_ee_send_byte_~tmp___5~4#1;havoc tlan_ee_send_byte_~tmp___6~3#1;havoc tlan_ee_send_byte_~tmp___7~2#1;havoc tlan_ee_send_byte_~tmp___8~2#1;havoc tlan_ee_send_byte_~tmp___9~2#1;havoc tlan_ee_send_byte_~tmp___10~2#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_send_byte_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13213: assume { :end_inline_netif_carrier_off } true;call write~$Pointer$(~#tlan_netdev_ops~0.base, ~#tlan_netdev_ops~0.offset, tlan_init_~dev#1.base, 468 + tlan_init_~dev#1.offset, 8);call write~int(2500, tlan_init_~dev#1.base, 995 + tlan_init_~dev#1.offset, 4);tlan_init_#res#1 := 0; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5814: pci_alloc_consistent_#t~ret191#1.base, pci_alloc_consistent_#t~ret191#1.offset := dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;assume { :end_inline_dma_alloc_attrs } true;pci_alloc_consistent_~tmp~20#1.base, pci_alloc_consistent_~tmp~20#1.offset := pci_alloc_consistent_#t~ret191#1.base, pci_alloc_consistent_#t~ret191#1.offset;havoc pci_alloc_consistent_#t~ite190#1.base, pci_alloc_consistent_#t~ite190#1.offset;havoc pci_alloc_consistent_#t~ret191#1.base, pci_alloc_consistent_#t~ret191#1.offset;pci_alloc_consistent_#res#1.base, pci_alloc_consistent_#res#1.offset := pci_alloc_consistent_~tmp~20#1.base, pci_alloc_consistent_~tmp~20#1.offset; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9521: assume 0 != tlan_ee_read_byte_~err~4#1;tlan_ee_read_byte_~ret~0#1 := 2; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9521: assume !(0 != tlan_ee_read_byte_~err~4#1);call tlan_ee_read_byte_#t~mem985#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_send_start } true;tlan_ee_send_start_#in~io_base#1 := tlan_ee_read_byte_#t~mem985#1 % 65536;havoc tlan_ee_send_start_#t~ret947#1, tlan_ee_send_start_#t~ret948#1, tlan_ee_send_start_#t~ret949#1, tlan_ee_send_start_#t~ret950#1, tlan_ee_send_start_#t~ret951#1, tlan_ee_send_start_~io_base#1, tlan_ee_send_start_~sio~5#1, tlan_ee_send_start_~tmp~66#1, tlan_ee_send_start_~tmp___0~26#1, tlan_ee_send_start_~tmp___1~12#1, tlan_ee_send_start_~tmp___2~7#1, tlan_ee_send_start_~tmp___3~6#1;tlan_ee_send_start_~io_base#1 := tlan_ee_send_start_#in~io_base#1;havoc tlan_ee_send_start_~sio~5#1;havoc tlan_ee_send_start_~tmp~66#1;havoc tlan_ee_send_start_~tmp___0~26#1;havoc tlan_ee_send_start_~tmp___1~12#1;havoc tlan_ee_send_start_~tmp___2~7#1;havoc tlan_ee_send_start_~tmp___3~6#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_send_start_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9530: assume 0 != tlan_ee_read_byte_~err~4#1;tlan_ee_read_byte_~ret~0#1 := 3; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9530: assume !(0 != tlan_ee_read_byte_~err~4#1);call tlan_ee_read_byte_#t~mem988#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_receive_byte } true;tlan_ee_receive_byte_#in~io_base#1, tlan_ee_receive_byte_#in~data#1.base, tlan_ee_receive_byte_#in~data#1.offset, tlan_ee_receive_byte_#in~stop#1 := tlan_ee_read_byte_#t~mem988#1 % 65536, tlan_ee_read_byte_~data#1.base, tlan_ee_read_byte_~data#1.offset, 1;havoc tlan_ee_receive_byte_#t~ret964#1, tlan_ee_receive_byte_#t~ret965#1, tlan_ee_receive_byte_#t~ret966#1, tlan_ee_receive_byte_#t~mem967#1, tlan_ee_receive_byte_#t~ret968#1, tlan_ee_receive_byte_#t~ret969#1, tlan_ee_receive_byte_#t~ret970#1, tlan_ee_receive_byte_#t~ret971#1, tlan_ee_receive_byte_#t~ret972#1, tlan_ee_receive_byte_#t~ret973#1, tlan_ee_receive_byte_#t~ret974#1, tlan_ee_receive_byte_#t~ret975#1, tlan_ee_receive_byte_#t~ret976#1, tlan_ee_receive_byte_#t~ret977#1, tlan_ee_receive_byte_#t~ret978#1, tlan_ee_receive_byte_~io_base#1, tlan_ee_receive_byte_~data#1.base, tlan_ee_receive_byte_~data#1.offset, tlan_ee_receive_byte_~stop#1, tlan_ee_receive_byte_~place~1#1, tlan_ee_receive_byte_~sio~7#1, tlan_ee_receive_byte_~tmp~68#1, tlan_ee_receive_byte_~tmp___0~28#1, tlan_ee_receive_byte_~tmp___1~14#1, tlan_ee_receive_byte_~tmp___2~9#1, tlan_ee_receive_byte_~tmp___3~8#1, tlan_ee_receive_byte_~tmp___4~6#1, tlan_ee_receive_byte_~tmp___5~5#1, tlan_ee_receive_byte_~tmp___6~4#1, tlan_ee_receive_byte_~tmp___7~3#1, tlan_ee_receive_byte_~tmp___8~3#1, tlan_ee_receive_byte_~tmp___9~3#1, tlan_ee_receive_byte_~tmp___10~3#1, tlan_ee_receive_byte_~tmp___11~2#1, tlan_ee_receive_byte_~tmp___12~2#1;tlan_ee_receive_byte_~io_base#1 := tlan_ee_receive_byte_#in~io_base#1;tlan_ee_receive_byte_~data#1.base, tlan_ee_receive_byte_~data#1.offset := tlan_ee_receive_byte_#in~data#1.base, tlan_ee_receive_byte_#in~data#1.offset;tlan_ee_receive_byte_~stop#1 := tlan_ee_receive_byte_#in~stop#1;havoc tlan_ee_receive_byte_~place~1#1;havoc tlan_ee_receive_byte_~sio~7#1;havoc tlan_ee_receive_byte_~tmp~68#1;havoc tlan_ee_receive_byte_~tmp___0~28#1;havoc tlan_ee_receive_byte_~tmp___1~14#1;havoc tlan_ee_receive_byte_~tmp___2~9#1;havoc tlan_ee_receive_byte_~tmp___3~8#1;havoc tlan_ee_receive_byte_~tmp___4~6#1;havoc tlan_ee_receive_byte_~tmp___5~5#1;havoc tlan_ee_receive_byte_~tmp___6~4#1;havoc tlan_ee_receive_byte_~tmp___7~3#1;havoc tlan_ee_receive_byte_~tmp___8~3#1;havoc tlan_ee_receive_byte_~tmp___9~3#1;havoc tlan_ee_receive_byte_~tmp___10~3#1;havoc tlan_ee_receive_byte_~tmp___11~2#1;havoc tlan_ee_receive_byte_~tmp___12~2#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_receive_byte_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13230: netif_tx_wake_queue_#t~ret147#1 := netpoll_trap_#res#1;assume { :end_inline_netpoll_trap } true;assume -2147483648 <= netif_tx_wake_queue_#t~ret147#1 && netif_tx_wake_queue_#t~ret147#1 <= 2147483647;netif_tx_wake_queue_~tmp~14#1 := netif_tx_wake_queue_#t~ret147#1;havoc netif_tx_wake_queue_#t~ret147#1; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13233: assume { :end_inline_pci_disable_device } true; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5835: assume 0 != dma_free_attrs_~tmp___1~3#1;assume { :begin_inline_warn_slowpath_null } true;warn_slowpath_null_#in~arg0#1.base, warn_slowpath_null_#in~arg0#1.offset, warn_slowpath_null_#in~arg1#1 := 1, 0, 166;havoc warn_slowpath_null_~arg0#1.base, warn_slowpath_null_~arg0#1.offset, warn_slowpath_null_~arg1#1;warn_slowpath_null_~arg0#1.base, warn_slowpath_null_~arg0#1.offset := warn_slowpath_null_#in~arg0#1.base, warn_slowpath_null_#in~arg0#1.offset;warn_slowpath_null_~arg1#1 := warn_slowpath_null_#in~arg1#1; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5835: assume !(0 != dma_free_attrs_~tmp___1~3#1); [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5835-2: assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 != dma_free_attrs_~__ret_warn_on~0#1 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6365-1: assume { :end_inline_tlan_store_skb } true;havoc tlan_reset_lists_#t~mem595#1.base, tlan_reset_lists_#t~mem595#1.offset;tlan_reset_lists_~i~3#1 := 1 + tlan_reset_lists_~i~3#1; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6365: assume { :end_inline_tlan_store_skb } true;call write~int(0, tlan_reset_lists_~list~0#1.base, 16 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(0, tlan_reset_lists_~list~0#1.base, 20 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(88 + tlan_reset_lists_~list_phys~0#1, tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset, 4);tlan_reset_lists_~i~3#1 := 1 + tlan_reset_lists_~i~3#1; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13237: tlan_probe1_#t~ret273#1 := pci_enable_device_#res#1;assume { :end_inline_pci_enable_device } true;assume -2147483648 <= tlan_probe1_#t~ret273#1 && tlan_probe1_#t~ret273#1 <= 2147483647;tlan_probe1_~rc~1#1 := tlan_probe1_#t~ret273#1;havoc tlan_probe1_#t~ret273#1; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9538: assume { :begin_inline_ldv_spin_unlock_irqrestore_86 } true;ldv_spin_unlock_irqrestore_86_#in~lock#1.base, ldv_spin_unlock_irqrestore_86_#in~lock#1.offset, ldv_spin_unlock_irqrestore_86_#in~flags#1 := tlan_ee_read_byte_~priv~32#1.base, 322 + tlan_ee_read_byte_~priv~32#1.offset, tlan_ee_read_byte_~flags~5#1;havoc ldv_spin_unlock_irqrestore_86_~lock#1.base, ldv_spin_unlock_irqrestore_86_~lock#1.offset, ldv_spin_unlock_irqrestore_86_~flags#1;ldv_spin_unlock_irqrestore_86_~lock#1.base, ldv_spin_unlock_irqrestore_86_~lock#1.offset := ldv_spin_unlock_irqrestore_86_#in~lock#1.base, ldv_spin_unlock_irqrestore_86_#in~lock#1.offset;ldv_spin_unlock_irqrestore_86_~flags#1 := ldv_spin_unlock_irqrestore_86_#in~flags#1;assume { :begin_inline_ldv_spin_unlock_lock_of_tlan_priv } true;assume { :begin_inline_ldv_assert } true;ldv_assert_#in~arg0#1.base, ldv_assert_#in~arg0#1.offset, ldv_assert_#in~arg1#1 := 146, 0, (if 2 == ~ldv_spin_lock_of_tlan_priv~0 then 1 else 0);havoc ldv_assert_~arg0#1.base, ldv_assert_~arg0#1.offset, ldv_assert_~arg1#1;ldv_assert_~arg0#1.base, ldv_assert_~arg0#1.offset := ldv_assert_#in~arg0#1.base, ldv_assert_#in~arg0#1.offset;ldv_assert_~arg1#1 := ldv_assert_#in~arg1#1; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13240: assume { :end_inline_pci_release_regions } true; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6898-1: assume 0 != ~bitwiseAnd(~debug~0, 16);assume { :begin_inline_inw } true;inw_#in~port#1 := (if (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inw_#res#1;havoc inw_~port#1, inw_~value~2#1;inw_~port#1 := inw_#in~port#1;havoc inw_~value~2#1;inw_#res#1 := inw_~value~2#1; [2021-11-23 03:40:16,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6898-1: assume !(0 != ~bitwiseAnd(~debug~0, 16)); [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9542: tlan_init_#t~ret359#1 := tlan_ee_read_byte_#res#1;assume { :end_inline_tlan_ee_read_byte } true;assume -2147483648 <= tlan_init_#t~ret359#1 && tlan_init_#t~ret359#1 <= 2147483647;tlan_init_~tmp___0~13#1 := tlan_init_#t~ret359#1;havoc tlan_init_#t~mem356#1.base, tlan_init_#t~mem356#1.offset;havoc tlan_init_#t~mem357#1;havoc tlan_init_#t~mem358#1.base, tlan_init_#t~mem358#1.offset;havoc tlan_init_#t~ret359#1;tlan_init_~err~0#1 := ~bitwiseOr(tlan_init_~err~0#1, tlan_init_~tmp___0~13#1);tlan_init_~i~0#1 := 1 + tlan_init_~i~0#1; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13244: tlan_probe1_#t~ret274#1 := pci_request_regions_#res#1;assume { :end_inline_pci_request_regions } true;assume -2147483648 <= tlan_probe1_#t~ret274#1 && tlan_probe1_#t~ret274#1 <= 2147483647;tlan_probe1_~rc~1#1 := tlan_probe1_#t~ret274#1;havoc tlan_probe1_#t~ret274#1; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5846: assume 0 != (dma_free_attrs_#t~mem126#1.base + dma_free_attrs_#t~mem126#1.offset) % 18446744073709551616;havoc dma_free_attrs_#t~mem126#1.base, dma_free_attrs_#t~mem126#1.offset;call dma_free_attrs_#t~mem133#1.base, dma_free_attrs_#t~mem133#1.offset := read~$Pointer$(dma_free_attrs_~ops~3#1.base, 8 + dma_free_attrs_~ops~3#1.offset, 8);assume { :begin_inline_##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID } true;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~128#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~128#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~129#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~130#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~130#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~131#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~132#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~132#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~#fp#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~#fp#1.offset := dma_free_attrs_~dev#1.base, dma_free_attrs_~dev#1.offset, dma_free_attrs_~size#1, dma_free_attrs_~vaddr#1.base, dma_free_attrs_~vaddr#1.offset, dma_free_attrs_~bus#1, dma_free_attrs_~attrs#1.base, dma_free_attrs_~attrs#1.offset, dma_free_attrs_#t~mem133#1.base, dma_free_attrs_#t~mem133#1.offset;havoc ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~128#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~128#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~129#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~130#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~130#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~131#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~132#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~132#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~128#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~128#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~128#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~128#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~129#1 := ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~129#1;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~130#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~130#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~130#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~130#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~131#1 := ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~131#1;##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~132#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#~132#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~132#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~dma_addr_t~0~X~$Pointer$~TO~VOID_#in~132#1.offset; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5846: assume !(0 != (dma_free_attrs_#t~mem126#1.base + dma_free_attrs_#t~mem126#1.offset) % 18446744073709551616);havoc dma_free_attrs_#t~mem126#1.base, dma_free_attrs_#t~mem126#1.offset; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5846-2: assume { :end_inline_dma_free_attrs } true;havoc pci_free_consistent_#t~ite192#1.base, pci_free_consistent_#t~ite192#1.offset; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6905-1: assume 0 != ~bitwiseAnd(~debug~0, 16);havoc tlan_eisa_probe_#t~nondet331#1; [2021-11-23 03:40:16,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6905-1: assume !(0 != ~bitwiseAnd(~debug~0, 16)); [2021-11-23 03:40:16,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13254: assume { :end_inline_pci_set_master } true;assume { :begin_inline_pci_set_drvdata } true;pci_set_drvdata_#in~pdev#1.base, pci_set_drvdata_#in~pdev#1.offset, pci_set_drvdata_#in~data#1.base, pci_set_drvdata_#in~data#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset, tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc pci_set_drvdata_#t~ret198#1, pci_set_drvdata_~pdev#1.base, pci_set_drvdata_~pdev#1.offset, pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset;pci_set_drvdata_~pdev#1.base, pci_set_drvdata_~pdev#1.offset := pci_set_drvdata_#in~pdev#1.base, pci_set_drvdata_#in~pdev#1.offset;pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset := pci_set_drvdata_#in~data#1.base, pci_set_drvdata_#in~data#1.offset;assume { :begin_inline_ldv_dev_set_drvdata_82 } true;ldv_dev_set_drvdata_82_#in~dev#1.base, ldv_dev_set_drvdata_82_#in~dev#1.offset, ldv_dev_set_drvdata_82_#in~data#1.base, ldv_dev_set_drvdata_82_#in~data#1.offset := pci_set_drvdata_~pdev#1.base, 179 + pci_set_drvdata_~pdev#1.offset, pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset;havoc ldv_dev_set_drvdata_82_#res#1;havoc ldv_dev_set_drvdata_82_#t~ret1076#1, ldv_dev_set_drvdata_82_~dev#1.base, ldv_dev_set_drvdata_82_~dev#1.offset, ldv_dev_set_drvdata_82_~data#1.base, ldv_dev_set_drvdata_82_~data#1.offset, ldv_dev_set_drvdata_82_~tmp~90#1;ldv_dev_set_drvdata_82_~dev#1.base, ldv_dev_set_drvdata_82_~dev#1.offset := ldv_dev_set_drvdata_82_#in~dev#1.base, ldv_dev_set_drvdata_82_#in~dev#1.offset;ldv_dev_set_drvdata_82_~data#1.base, ldv_dev_set_drvdata_82_~data#1.offset := ldv_dev_set_drvdata_82_#in~data#1.base, ldv_dev_set_drvdata_82_#in~data#1.offset;havoc ldv_dev_set_drvdata_82_~tmp~90#1;assume { :begin_inline_ldv_dev_set_drvdata } true;ldv_dev_set_drvdata_#in~dev#1.base, ldv_dev_set_drvdata_#in~dev#1.offset, ldv_dev_set_drvdata_#in~data#1.base, ldv_dev_set_drvdata_#in~data#1.offset := ldv_dev_set_drvdata_82_~dev#1.base, ldv_dev_set_drvdata_82_~dev#1.offset, ldv_dev_set_drvdata_82_~data#1.base, ldv_dev_set_drvdata_82_~data#1.offset;havoc ldv_dev_set_drvdata_#res#1;havoc ldv_dev_set_drvdata_#t~ret1095#1.base, ldv_dev_set_drvdata_#t~ret1095#1.offset, ldv_dev_set_drvdata_#t~mem1096#1.base, ldv_dev_set_drvdata_#t~mem1096#1.offset, ldv_dev_set_drvdata_~dev#1.base, ldv_dev_set_drvdata_~dev#1.offset, ldv_dev_set_drvdata_~data#1.base, ldv_dev_set_drvdata_~data#1.offset, ldv_dev_set_drvdata_~tmp~99#1.base, ldv_dev_set_drvdata_~tmp~99#1.offset;ldv_dev_set_drvdata_~dev#1.base, ldv_dev_set_drvdata_~dev#1.offset := ldv_dev_set_drvdata_#in~dev#1.base, ldv_dev_set_drvdata_#in~dev#1.offset;ldv_dev_set_drvdata_~data#1.base, ldv_dev_set_drvdata_~data#1.offset := ldv_dev_set_drvdata_#in~data#1.base, ldv_dev_set_drvdata_#in~data#1.offset;havoc ldv_dev_set_drvdata_~tmp~99#1.base, ldv_dev_set_drvdata_~tmp~99#1.offset;assume { :begin_inline_ldv_xzalloc } true;ldv_xzalloc_#in~size#1 := 8;havoc ldv_xzalloc_#res#1.base, ldv_xzalloc_#res#1.offset;havoc ldv_xzalloc_#t~malloc1120#1.base, ldv_xzalloc_#t~malloc1120#1.offset, ldv_xzalloc_#t~ret1121#1, ldv_xzalloc_~size#1, ldv_xzalloc_~res~4#1.base, ldv_xzalloc_~res~4#1.offset, ldv_xzalloc_~tmp~109#1.base, ldv_xzalloc_~tmp~109#1.offset, ldv_xzalloc_~tmp___0~43#1;ldv_xzalloc_~size#1 := ldv_xzalloc_#in~size#1;havoc ldv_xzalloc_~res~4#1.base, ldv_xzalloc_~res~4#1.offset;havoc ldv_xzalloc_~tmp~109#1.base, ldv_xzalloc_~tmp~109#1.offset;havoc ldv_xzalloc_~tmp___0~43#1;call ldv_xzalloc_#t~malloc1120#1.base, ldv_xzalloc_#t~malloc1120#1.offset := #Ultimate.allocOnHeap(ldv_xzalloc_~size#1);assume { :begin_inline_#Ultimate.meminit } true;#Ultimate.meminit_#ptr#1.base, #Ultimate.meminit_#ptr#1.offset, #Ultimate.meminit_#amountOfFields#1, #Ultimate.meminit_#sizeOfFields#1, #Ultimate.meminit_#product#1 := ldv_xzalloc_#t~malloc1120#1.base, ldv_xzalloc_#t~malloc1120#1.offset, 1, ldv_xzalloc_~size#1, ldv_xzalloc_~size#1;#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #Ultimate.meminit_#ptr#1.base); [2021-11-23 03:40:16,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6912-1: call tlan_eisa_probe_#t~ret332#1.base, tlan_eisa_probe_#t~ret332#1.offset := __request_region(~#ioport_resource~0.base, ~#ioport_resource~0.offset, tlan_eisa_probe_~ioaddr~0#1, 16, ~#tlan_signature~0.base, ~#tlan_signature~0.offset, 0);tlan_eisa_probe_~tmp___1~5#1.base, tlan_eisa_probe_~tmp___1~5#1.offset := tlan_eisa_probe_#t~ret332#1.base, tlan_eisa_probe_#t~ret332#1.offset;havoc tlan_eisa_probe_#t~ret332#1.base, tlan_eisa_probe_#t~ret332#1.offset; [2021-11-23 03:40:16,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11141: tlan_probe1_#t~ret276#1.base, tlan_probe1_#t~ret276#1.offset := ldv_alloc_etherdev_mqs_94_#res#1.base, ldv_alloc_etherdev_mqs_94_#res#1.offset;assume { :end_inline_ldv_alloc_etherdev_mqs_94 } true;tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset := tlan_probe1_#t~ret276#1.base, tlan_probe1_#t~ret276#1.offset;havoc tlan_probe1_#t~ret276#1.base, tlan_probe1_#t~ret276#1.offset; [2021-11-23 03:40:16,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5329: assume { :end_inline_INIT_LIST_HEAD } true;call write~$Pointer$(#funAddr~tlan_tx_timeout_work.base, #funAddr~tlan_tx_timeout_work.offset, tlan_probe1_~priv~3#1.base, 415 + tlan_probe1_~priv~3#1.offset, 8);assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := tlan_probe1_~priv~3#1.base, 322 + tlan_probe1_~priv~3#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; [2021-11-23 03:40:16,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6922: assume 0 == (tlan_eisa_probe_~tmp___1~5#1.base + tlan_eisa_probe_~tmp___1~5#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6922: assume !(0 == (tlan_eisa_probe_~tmp___1~5#1.base + tlan_eisa_probe_~tmp___1~5#1.offset) % 18446744073709551616);assume { :begin_inline_inw } true;inw_#in~port#1 := (if (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inw_#res#1;havoc inw_~port#1, inw_~value~2#1;inw_~port#1 := inw_#in~port#1;havoc inw_~value~2#1;inw_#res#1 := inw_~value~2#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11156: tlan_probe1_#t~ret306#1 := ldv_register_netdev_95_#res#1;assume { :end_inline_ldv_register_netdev_95 } true;assume -2147483648 <= tlan_probe1_#t~ret306#1 && tlan_probe1_#t~ret306#1 <= 2147483647;tlan_probe1_~rc~1#1 := tlan_probe1_#t~ret306#1;havoc tlan_probe1_#t~ret306#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10100: assume { :end_inline_ldv_free_netdev } true; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6929: assume 4366 != tlan_eisa_probe_~tmp___2~2#1 % 65536 % 4294967296;assume { :begin_inline___release_region } true;__release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset, __release_region_#in~arg1#1, __release_region_#in~arg2#1 := ~#ioport_resource~0.base, ~#ioport_resource~0.offset, tlan_eisa_probe_~ioaddr~0#1, 16;havoc __release_region_~arg0#1.base, __release_region_~arg0#1.offset, __release_region_~arg1#1, __release_region_~arg2#1;__release_region_~arg0#1.base, __release_region_~arg0#1.offset := __release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset;__release_region_~arg1#1 := __release_region_#in~arg1#1;__release_region_~arg2#1 := __release_region_#in~arg2#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6929: assume !(4366 != tlan_eisa_probe_~tmp___2~2#1 % 65536 % 4294967296);assume { :begin_inline_inw } true;inw_#in~port#1 := (if (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3202 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inw_#res#1;havoc inw_~port#1, inw_~value~2#1;inw_~port#1 := inw_#in~port#1;havoc inw_~value~2#1;inw_#res#1 := inw_~value~2#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5873: netdev_alloc_skb_ip_align_#t~ret139#1.base, netdev_alloc_skb_ip_align_#t~ret139#1.offset := __netdev_alloc_skb_ip_align_#res#1.base, __netdev_alloc_skb_ip_align_#res#1.offset;assume { :end_inline___netdev_alloc_skb_ip_align } true;netdev_alloc_skb_ip_align_~tmp~11#1.base, netdev_alloc_skb_ip_align_~tmp~11#1.offset := netdev_alloc_skb_ip_align_#t~ret139#1.base, netdev_alloc_skb_ip_align_#t~ret139#1.offset;havoc netdev_alloc_skb_ip_align_#t~ret139#1.base, netdev_alloc_skb_ip_align_#t~ret139#1.offset;netdev_alloc_skb_ip_align_#res#1.base, netdev_alloc_skb_ip_align_#res#1.offset := netdev_alloc_skb_ip_align_~tmp~11#1.base, netdev_alloc_skb_ip_align_~tmp~11#1.offset; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5345: assume { :end_inline_clear_bit } true; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13277: ldv_register_netdev_95_#t~ret1085#1 := register_netdev_#res#1;assume { :end_inline_register_netdev } true;assume -2147483648 <= ldv_register_netdev_95_#t~ret1085#1 && ldv_register_netdev_95_#t~ret1085#1 <= 2147483647;ldv_register_netdev_95_~tmp~95#1 := ldv_register_netdev_95_#t~ret1085#1;havoc ldv_register_netdev_95_#t~ret1085#1;ldv_register_netdev_95_~ldv_func_res~4#1 := ldv_register_netdev_95_~tmp~95#1;assume { :begin_inline_ldv_register_netdev } true;ldv_register_netdev_#in~arg0#1, ldv_register_netdev_#in~arg1#1.base, ldv_register_netdev_#in~arg1#1.offset := ldv_register_netdev_95_~ldv_func_res~4#1, ldv_register_netdev_95_~ldv_func_arg1#1.base, ldv_register_netdev_95_~ldv_func_arg1#1.offset;havoc ldv_register_netdev_#res#1;havoc ldv_register_netdev_#t~ret1057#1, ldv_register_netdev_#t~ret1058#1, ldv_register_netdev_#t~mem1059#1.base, ldv_register_netdev_#t~mem1059#1.offset, ldv_register_netdev_#t~mem1060#1.base, ldv_register_netdev_#t~mem1060#1.offset, ldv_register_netdev_#t~ret1061#1, ldv_register_netdev_#t~ret1062#1, ldv_register_netdev_~arg0#1, ldv_register_netdev_~arg1#1.base, ldv_register_netdev_~arg1#1.offset, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset, ldv_register_netdev_~ldv_9_ret_default~0#1, ldv_register_netdev_~tmp~83#1, ldv_register_netdev_~tmp___0~32#1;ldv_register_netdev_~arg0#1 := ldv_register_netdev_#in~arg0#1;ldv_register_netdev_~arg1#1.base, ldv_register_netdev_~arg1#1.offset := ldv_register_netdev_#in~arg1#1.base, ldv_register_netdev_#in~arg1#1.offset;havoc ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset;havoc ldv_register_netdev_~ldv_9_ret_default~0#1;havoc ldv_register_netdev_~tmp~83#1;havoc ldv_register_netdev_~tmp___0~32#1;ldv_register_netdev_~ldv_9_ret_default~0#1 := 1;assume { :begin_inline_ldv_pre_register_netdev } true;havoc ldv_pre_register_netdev_#res#1;havoc ldv_pre_register_netdev_#t~nondet1201#1;assume -2147483648 <= ldv_pre_register_netdev_#t~nondet1201#1 && ldv_pre_register_netdev_#t~nondet1201#1 <= 2147483647;ldv_pre_register_netdev_#res#1 := ldv_pre_register_netdev_#t~nondet1201#1;havoc ldv_pre_register_netdev_#t~nondet1201#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5352: netif_tx_wake_queue_#t~ret148#1 := test_and_clear_bit_#res#1;assume { :end_inline_test_and_clear_bit } true;assume -2147483648 <= netif_tx_wake_queue_#t~ret148#1 && netif_tx_wake_queue_#t~ret148#1 <= 2147483647;netif_tx_wake_queue_~tmp___0~5#1 := netif_tx_wake_queue_#t~ret148#1;havoc netif_tx_wake_queue_#t~ret148#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6939: assume 8433 != tlan_eisa_probe_~device_id~1#1 % 65536 % 4294967296 && 16625 != tlan_eisa_probe_~device_id~1#1 % 65536 % 4294967296;assume { :begin_inline___release_region } true;__release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset, __release_region_#in~arg1#1, __release_region_#in~arg2#1 := ~#ioport_resource~0.base, ~#ioport_resource~0.offset, tlan_eisa_probe_~ioaddr~0#1, 16;havoc __release_region_~arg0#1.base, __release_region_~arg0#1.offset, __release_region_~arg1#1, __release_region_~arg2#1;__release_region_~arg0#1.base, __release_region_~arg0#1.offset := __release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset;__release_region_~arg1#1 := __release_region_#in~arg1#1;__release_region_~arg2#1 := __release_region_#in~arg2#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6939: assume !(8433 != tlan_eisa_probe_~device_id~1#1 % 65536 % 4294967296 && 16625 != tlan_eisa_probe_~device_id~1#1 % 65536 % 4294967296);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (3204 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3204 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3204 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13281: request_irq_#t~ret205#1 := request_threaded_irq_#res#1;assume { :end_inline_request_threaded_irq } true;assume -2147483648 <= request_irq_#t~ret205#1 && request_irq_#t~ret205#1 <= 2147483647;request_irq_~tmp~24#1 := request_irq_#t~ret205#1;havoc request_irq_#t~ret205#1;request_irq_#res#1 := request_irq_~tmp~24#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11167: assume { :end_inline_ldv_free_netdev_96 } true; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5884: tlan_reset_lists_#t~ret591#1.base, tlan_reset_lists_#t~ret591#1.offset := netdev_alloc_skb_ip_align_#res#1.base, netdev_alloc_skb_ip_align_#res#1.offset;assume { :end_inline_netdev_alloc_skb_ip_align } true;tlan_reset_lists_~skb~3#1.base, tlan_reset_lists_~skb~3#1.offset := tlan_reset_lists_#t~ret591#1.base, tlan_reset_lists_#t~ret591#1.offset;havoc tlan_reset_lists_#t~ret591#1.base, tlan_reset_lists_#t~ret591#1.offset; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6949: assume 1 != tlan_eisa_probe_~tmp___3~1#1 % 256 % 4294967296;assume { :begin_inline___release_region } true;__release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset, __release_region_#in~arg1#1, __release_region_#in~arg2#1 := ~#ioport_resource~0.base, ~#ioport_resource~0.offset, tlan_eisa_probe_~ioaddr~0#1, 16;havoc __release_region_~arg0#1.base, __release_region_~arg0#1.offset, __release_region_~arg1#1, __release_region_~arg2#1;__release_region_~arg0#1.base, __release_region_~arg0#1.offset := __release_region_#in~arg0#1.base, __release_region_#in~arg0#1.offset;__release_region_~arg1#1 := __release_region_#in~arg1#1;__release_region_~arg2#1 := __release_region_#in~arg2#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6949: assume !(1 != tlan_eisa_probe_~tmp___3~1#1 % 256 % 4294967296); [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6953: assume 16 == ~debug~0;havoc tlan_eisa_probe_#t~nondet340#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6953: assume !(16 == ~debug~0); [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13296: assume { :end_inline_warn_slowpath_null } true; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6956-2: assume { :begin_inline_inb } true;inb_#in~port#1 := (if (3264 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3264 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3264 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6956: assume 16 == ~debug~0;havoc tlan_eisa_probe_#t~nondet336#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6956: assume !(16 == ~debug~0); [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6966: assume 16 == tlan_eisa_probe_~tmp___4~0#1 % 256; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6966: assume !(16 == tlan_eisa_probe_~tmp___4~0#1 % 256); [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6967: tlan_eisa_probe_~irq~0#1 := 5; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5911: netif_wake_queue_#t~ret150#1.base, netif_wake_queue_#t~ret150#1.offset := netdev_get_tx_queue_#res#1.base, netdev_get_tx_queue_#res#1.offset;assume { :end_inline_netdev_get_tx_queue } true;netif_wake_queue_~tmp~15#1.base, netif_wake_queue_~tmp~15#1.offset := netif_wake_queue_#t~ret150#1.base, netif_wake_queue_#t~ret150#1.offset;havoc netif_wake_queue_#t~ret150#1.base, netif_wake_queue_#t~ret150#1.offset;assume { :begin_inline_netif_tx_wake_queue } true;netif_tx_wake_queue_#in~dev_queue#1.base, netif_tx_wake_queue_#in~dev_queue#1.offset := netif_wake_queue_~tmp~15#1.base, netif_wake_queue_~tmp~15#1.offset;havoc netif_tx_wake_queue_#t~ret147#1, netif_tx_wake_queue_#t~ret148#1, netif_tx_wake_queue_#t~mem149#1.base, netif_tx_wake_queue_#t~mem149#1.offset, netif_tx_wake_queue_~dev_queue#1.base, netif_tx_wake_queue_~dev_queue#1.offset, netif_tx_wake_queue_~tmp~14#1, netif_tx_wake_queue_~tmp___0~5#1;netif_tx_wake_queue_~dev_queue#1.base, netif_tx_wake_queue_~dev_queue#1.offset := netif_tx_wake_queue_#in~dev_queue#1.base, netif_tx_wake_queue_#in~dev_queue#1.offset;havoc netif_tx_wake_queue_~tmp~14#1;havoc netif_tx_wake_queue_~tmp___0~5#1;assume { :begin_inline_netpoll_trap } true;havoc netpoll_trap_#res#1;havoc netpoll_trap_#t~nondet1206#1;assume -2147483648 <= netpoll_trap_#t~nondet1206#1 && netpoll_trap_#t~nondet1206#1 <= 2147483647;netpoll_trap_#res#1 := netpoll_trap_#t~nondet1206#1;havoc netpoll_trap_#t~nondet1206#1; [2021-11-23 03:40:16,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6970: assume 32 == tlan_eisa_probe_~tmp___4~0#1 % 256; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6970: assume !(32 == tlan_eisa_probe_~tmp___4~0#1 % 256); [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6971: tlan_eisa_probe_~irq~0#1 := 9; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6974: assume 64 == tlan_eisa_probe_~tmp___4~0#1 % 256; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6974: assume !(64 == tlan_eisa_probe_~tmp___4~0#1 % 256); [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5917-2: tlan_ee_read_byte_#t~ret979#1.base, tlan_ee_read_byte_#t~ret979#1.offset := netdev_priv_#res#1.base, netdev_priv_#res#1.offset;assume { :end_inline_netdev_priv } true;tlan_ee_read_byte_~tmp~69#1.base, tlan_ee_read_byte_~tmp~69#1.offset := tlan_ee_read_byte_#t~ret979#1.base, tlan_ee_read_byte_#t~ret979#1.offset;havoc tlan_ee_read_byte_#t~ret979#1.base, tlan_ee_read_byte_#t~ret979#1.offset;tlan_ee_read_byte_~priv~32#1.base, tlan_ee_read_byte_~priv~32#1.offset := tlan_ee_read_byte_~tmp~69#1.base, tlan_ee_read_byte_~tmp~69#1.offset;tlan_ee_read_byte_~flags~5#1 := 0;tlan_ee_read_byte_~ret~0#1 := 0;assume { :begin_inline_ldv___ldv_spin_lock_113 } true;ldv___ldv_spin_lock_113_#in~ldv_func_arg1#1.base, ldv___ldv_spin_lock_113_#in~ldv_func_arg1#1.offset := tlan_ee_read_byte_~priv~32#1.base, 322 + tlan_ee_read_byte_~priv~32#1.offset;havoc ldv___ldv_spin_lock_113_~ldv_func_arg1#1.base, ldv___ldv_spin_lock_113_~ldv_func_arg1#1.offset;ldv___ldv_spin_lock_113_~ldv_func_arg1#1.base, ldv___ldv_spin_lock_113_~ldv_func_arg1#1.offset := ldv___ldv_spin_lock_113_#in~ldv_func_arg1#1.base, ldv___ldv_spin_lock_113_#in~ldv_func_arg1#1.offset;assume { :begin_inline_ldv_spin_lock_lock_of_tlan_priv } true;assume { :begin_inline_ldv_assert } true;ldv_assert_#in~arg0#1.base, ldv_assert_#in~arg0#1.offset, ldv_assert_#in~arg1#1 := 145, 0, (if 1 == ~ldv_spin_lock_of_tlan_priv~0 then 1 else 0);havoc ldv_assert_~arg0#1.base, ldv_assert_~arg0#1.offset, ldv_assert_~arg1#1;ldv_assert_~arg0#1.base, ldv_assert_~arg0#1.offset := ldv_assert_#in~arg0#1.base, ldv_assert_#in~arg0#1.offset;ldv_assert_~arg1#1 := ldv_assert_#in~arg1#1; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5917-3: tlan_open_#t~ret361#1.base, tlan_open_#t~ret361#1.offset := netdev_priv_#res#1.base, netdev_priv_#res#1.offset;assume { :end_inline_netdev_priv } true;tlan_open_~tmp~37#1.base, tlan_open_~tmp~37#1.offset := tlan_open_#t~ret361#1.base, tlan_open_#t~ret361#1.offset;havoc tlan_open_#t~ret361#1.base, tlan_open_#t~ret361#1.offset;tlan_open_~priv~6#1.base, tlan_open_~priv~6#1.offset := tlan_open_~tmp~37#1.base, tlan_open_~tmp~37#1.offset;call tlan_open_#t~mem362#1 := read~int(tlan_open_~dev#1.base, 56 + tlan_open_~dev#1.offset, 8);assume { :begin_inline_tlan_dio_read8 } true;tlan_dio_read8_#in~base_addr#1, tlan_dio_read8_#in~internal_addr#1 := tlan_open_#t~mem362#1 % 65536, 12;havoc tlan_dio_read8_#res#1;havoc tlan_dio_read8_#t~ret220#1, tlan_dio_read8_~base_addr#1, tlan_dio_read8_~internal_addr#1, tlan_dio_read8_~tmp~25#1;tlan_dio_read8_~base_addr#1 := tlan_dio_read8_#in~base_addr#1;tlan_dio_read8_~internal_addr#1 := tlan_dio_read8_#in~internal_addr#1;havoc tlan_dio_read8_~tmp~25#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := tlan_dio_read8_~internal_addr#1 % 65536, 8 + tlan_dio_read8_~base_addr#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5917: tlan_probe1_#t~ret277#1.base, tlan_probe1_#t~ret277#1.offset := netdev_priv_#res#1.base, netdev_priv_#res#1.offset;assume { :end_inline_netdev_priv } true;tlan_probe1_~tmp~33#1.base, tlan_probe1_~tmp~33#1.offset := tlan_probe1_#t~ret277#1.base, tlan_probe1_#t~ret277#1.offset;havoc tlan_probe1_#t~ret277#1.base, tlan_probe1_#t~ret277#1.offset;tlan_probe1_~priv~3#1.base, tlan_probe1_~priv~3#1.offset := tlan_probe1_~tmp~33#1.base, tlan_probe1_~tmp~33#1.offset;call write~$Pointer$(tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset, tlan_probe1_~priv~3#1.base, 8 + tlan_probe1_~priv~3#1.offset, 8);call write~$Pointer$(tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset, tlan_probe1_~priv~3#1.base, 16 + tlan_probe1_~priv~3#1.offset, 8); [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5917-1: tlan_init_#t~ret345#1.base, tlan_init_#t~ret345#1.offset := netdev_priv_#res#1.base, netdev_priv_#res#1.offset;assume { :end_inline_netdev_priv } true;tlan_init_~tmp~36#1.base, tlan_init_~tmp~36#1.offset := tlan_init_#t~ret345#1.base, tlan_init_#t~ret345#1.offset;havoc tlan_init_#t~ret345#1.base, tlan_init_#t~ret345#1.offset;tlan_init_~priv~5#1.base, tlan_init_~priv~5#1.offset := tlan_init_~tmp~36#1.base, tlan_init_~tmp~36#1.offset;tlan_init_~dma_size~0#1 := 8448;call tlan_init_#t~mem346#1.base, tlan_init_#t~mem346#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 8 + tlan_init_~priv~5#1.offset, 8);assume { :begin_inline_pci_alloc_consistent } true;pci_alloc_consistent_#in~hwdev#1.base, pci_alloc_consistent_#in~hwdev#1.offset, pci_alloc_consistent_#in~size#1, pci_alloc_consistent_#in~dma_handle#1.base, pci_alloc_consistent_#in~dma_handle#1.offset := tlan_init_#t~mem346#1.base, tlan_init_#t~mem346#1.offset, tlan_init_~dma_size~0#1, tlan_init_~priv~5#1.base, 32 + tlan_init_~priv~5#1.offset;havoc pci_alloc_consistent_#res#1.base, pci_alloc_consistent_#res#1.offset;havoc pci_alloc_consistent_#t~ite190#1.base, pci_alloc_consistent_#t~ite190#1.offset, pci_alloc_consistent_#t~ret191#1.base, pci_alloc_consistent_#t~ret191#1.offset, pci_alloc_consistent_~hwdev#1.base, pci_alloc_consistent_~hwdev#1.offset, pci_alloc_consistent_~size#1, pci_alloc_consistent_~dma_handle#1.base, pci_alloc_consistent_~dma_handle#1.offset, pci_alloc_consistent_~tmp~20#1.base, pci_alloc_consistent_~tmp~20#1.offset;pci_alloc_consistent_~hwdev#1.base, pci_alloc_consistent_~hwdev#1.offset := pci_alloc_consistent_#in~hwdev#1.base, pci_alloc_consistent_#in~hwdev#1.offset;pci_alloc_consistent_~size#1 := pci_alloc_consistent_#in~size#1;pci_alloc_consistent_~dma_handle#1.base, pci_alloc_consistent_~dma_handle#1.offset := pci_alloc_consistent_#in~dma_handle#1.base, pci_alloc_consistent_#in~dma_handle#1.offset;havoc pci_alloc_consistent_~tmp~20#1.base, pci_alloc_consistent_~tmp~20#1.offset; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5917-4: tlan_reset_lists_#t~ret587#1.base, tlan_reset_lists_#t~ret587#1.offset := netdev_priv_#res#1.base, netdev_priv_#res#1.offset;assume { :end_inline_netdev_priv } true;tlan_reset_lists_~tmp~50#1.base, tlan_reset_lists_~tmp~50#1.offset := tlan_reset_lists_#t~ret587#1.base, tlan_reset_lists_#t~ret587#1.offset;havoc tlan_reset_lists_#t~ret587#1.base, tlan_reset_lists_#t~ret587#1.offset;tlan_reset_lists_~priv~19#1.base, tlan_reset_lists_~priv~19#1.offset := tlan_reset_lists_~tmp~50#1.base, tlan_reset_lists_~tmp~50#1.offset;call write~int(0, tlan_reset_lists_~priv~19#1.base, 128 + tlan_reset_lists_~priv~19#1.offset, 4);call write~int(0, tlan_reset_lists_~priv~19#1.base, 136 + tlan_reset_lists_~priv~19#1.offset, 4);tlan_reset_lists_~i~3#1 := 0; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6975: tlan_eisa_probe_~irq~0#1 := 10; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6978: assume 128 == tlan_eisa_probe_~tmp___4~0#1 % 256; [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6978: assume !(128 == tlan_eisa_probe_~tmp___4~0#1 % 256); [2021-11-23 03:40:16,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6979: tlan_eisa_probe_~irq~0#1 := 11; [2021-11-23 03:40:16,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5395: assume 0 != arch_local_save_flags_~tmp~0#1;assume false; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5395: assume !(0 != arch_local_save_flags_~tmp~0#1); [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5395-2: arch_local_save_flags_~__ret~0#1 := arch_local_save_flags_~__eax~0#1;arch_local_save_flags_#res#1 := arch_local_save_flags_~__ret~0#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6982: assume 16 == ~debug~0;havoc tlan_eisa_probe_#t~nondet339#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6982: assume !(16 == ~debug~0); [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11214: tlan_open_#t~ret365#1 := ldv_request_irq_100_#res#1;assume { :end_inline_ldv_request_irq_100 } true;assume -2147483648 <= tlan_open_#t~ret365#1 && tlan_open_#t~ret365#1 <= 2147483647;tlan_open_~err~1#1 := tlan_open_#t~ret365#1;havoc tlan_open_#t~mem364#1;havoc tlan_open_#t~ret365#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5932: assume { :end_inline_netif_tx_start_queue } true; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10692: assume 0 != ldv_register_netdev_~tmp___0~32#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_register_netdev_~ldv_9_ret_default~0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10692: assume !(0 != ldv_register_netdev_~tmp___0~32#1);assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != ldv_register_netdev_~ldv_9_ret_default~0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10692-1: ldv_register_netdev_#res#1 := ldv_register_netdev_~ldv_9_ret_default~0#1; [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5407: dma_free_attrs_#t~ret122#1 := arch_local_save_flags_#res#1;assume { :end_inline_arch_local_save_flags } true;dma_free_attrs_~_flags~0#1 := dma_free_attrs_#t~ret122#1;havoc dma_free_attrs_#t~ret122#1;assume { :begin_inline_arch_irqs_disabled_flags } true;arch_irqs_disabled_flags_#in~flags#1 := dma_free_attrs_~_flags~0#1;havoc arch_irqs_disabled_flags_#res#1;havoc arch_irqs_disabled_flags_~flags#1;arch_irqs_disabled_flags_~flags#1 := arch_irqs_disabled_flags_#in~flags#1;arch_irqs_disabled_flags_#res#1 := (if 0 == ~bitwiseAnd(arch_irqs_disabled_flags_~flags#1, 512) % 18446744073709551616 then 1 else 0); [2021-11-23 03:40:16,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6994: assume { :begin_inline_tlan_probe1 } true;tlan_probe1_#in~pdev#1.base, tlan_probe1_#in~pdev#1.offset, tlan_probe1_#in~ioaddr#1, tlan_probe1_#in~irq#1, tlan_probe1_#in~rev#1, tlan_probe1_#in~ent#1.base, tlan_probe1_#in~ent#1.offset := 0, 0, tlan_eisa_probe_~ioaddr~0#1, tlan_eisa_probe_~irq~0#1, 12, 0, 0;havoc tlan_probe1_#res#1;havoc tlan_probe1_#t~ret273#1, tlan_probe1_#t~ret274#1, tlan_probe1_#t~nondet275#1, tlan_probe1_#t~ret276#1.base, tlan_probe1_#t~ret276#1.offset, tlan_probe1_#t~ret277#1.base, tlan_probe1_#t~ret277#1.offset, tlan_probe1_#t~mem278#1, tlan_probe1_#t~ret279#1, tlan_probe1_#t~nondet280#1, tlan_probe1_#t~mem281#1, tlan_probe1_#t~mem282#1, tlan_probe1_#t~nondet283#1, tlan_probe1_#t~nondet284#1, tlan_probe1_#t~mem285#1, tlan_probe1_#t~mem286#1, tlan_probe1_#t~ret287#1, tlan_probe1_#t~mem288#1, tlan_probe1_#t~mem289#1, tlan_probe1_#t~mem290#1, tlan_probe1_#t~ite292#1, tlan_probe1_#t~mem291#1, tlan_probe1_#t~mem293#1, tlan_probe1_#t~ite295#1, tlan_probe1_#t~mem294#1, tlan_probe1_#t~mem296#1, tlan_probe1_#t~mem297#1, tlan_probe1_#t~mem298#1, tlan_probe1_#t~mem299#1, tlan_probe1_#t~mem300#1, tlan_probe1_#t~mem301#1, tlan_probe1_#t~mem302#1, tlan_probe1_#t~ret303#1.base, tlan_probe1_#t~ret303#1.offset, tlan_probe1_#t~ret304#1, tlan_probe1_#t~nondet305#1, tlan_probe1_#t~ret306#1, tlan_probe1_#t~nondet307#1, tlan_probe1_#t~nondet308#1, tlan_probe1_#t~mem309#1, tlan_probe1_#t~mem310#1, tlan_probe1_#t~mem311#1.base, tlan_probe1_#t~mem311#1.offset, tlan_probe1_#t~mem312#1.base, tlan_probe1_#t~mem312#1.offset, tlan_probe1_#t~mem313#1, tlan_probe1_#t~mem314#1.base, tlan_probe1_#t~mem314#1.offset, tlan_probe1_#t~mem315#1, tlan_probe1_#t~mem316#1.base, tlan_probe1_#t~mem316#1.offset, tlan_probe1_#t~mem317#1, tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset, tlan_probe1_~ioaddr#1, tlan_probe1_~irq#1, tlan_probe1_~rev#1, tlan_probe1_~ent#1.base, tlan_probe1_~ent#1.offset, tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset, tlan_probe1_~priv~3#1.base, tlan_probe1_~priv~3#1.offset, tlan_probe1_~device_id~0#1, tlan_probe1_~reg~0#1, tlan_probe1_~rc~1#1, tlan_probe1_~tmp~33#1.base, tlan_probe1_~tmp~33#1.offset, tlan_probe1_~pci_io_base~0#1, tlan_probe1_~tmp___0~11#1, tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset, tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset, tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset;tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset := tlan_probe1_#in~pdev#1.base, tlan_probe1_#in~pdev#1.offset;tlan_probe1_~ioaddr#1 := tlan_probe1_#in~ioaddr#1;tlan_probe1_~irq#1 := tlan_probe1_#in~irq#1;tlan_probe1_~rev#1 := tlan_probe1_#in~rev#1;tlan_probe1_~ent#1.base, tlan_probe1_~ent#1.offset := tlan_probe1_#in~ent#1.base, tlan_probe1_#in~ent#1.offset;havoc tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc tlan_probe1_~priv~3#1.base, tlan_probe1_~priv~3#1.offset;havoc tlan_probe1_~device_id~0#1;havoc tlan_probe1_~reg~0#1;havoc tlan_probe1_~rc~1#1;havoc tlan_probe1_~tmp~33#1.base, tlan_probe1_~tmp~33#1.offset;havoc tlan_probe1_~pci_io_base~0#1;havoc tlan_probe1_~tmp___0~11#1;call tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8);call tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);tlan_probe1_~rc~1#1 := -19; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6468-1: assume { :begin_inline_netif_wake_queue } true;netif_wake_queue_#in~dev#1.base, netif_wake_queue_#in~dev#1.offset := tlan_start_~dev#1.base, tlan_start_~dev#1.offset;havoc netif_wake_queue_#t~ret150#1.base, netif_wake_queue_#t~ret150#1.offset, netif_wake_queue_~dev#1.base, netif_wake_queue_~dev#1.offset, netif_wake_queue_~tmp~15#1.base, netif_wake_queue_~tmp~15#1.offset;netif_wake_queue_~dev#1.base, netif_wake_queue_~dev#1.offset := netif_wake_queue_#in~dev#1.base, netif_wake_queue_#in~dev#1.offset;havoc netif_wake_queue_~tmp~15#1.base, netif_wake_queue_~tmp~15#1.offset;assume { :begin_inline_netdev_get_tx_queue } true;netdev_get_tx_queue_#in~dev#1.base, netdev_get_tx_queue_#in~dev#1.offset, netdev_get_tx_queue_#in~index#1 := netif_wake_queue_~dev#1.base, netif_wake_queue_~dev#1.offset, 0;havoc netdev_get_tx_queue_#res#1.base, netdev_get_tx_queue_#res#1.offset;havoc netdev_get_tx_queue_#t~mem143#1.base, netdev_get_tx_queue_#t~mem143#1.offset, netdev_get_tx_queue_~dev#1.base, netdev_get_tx_queue_~dev#1.offset, netdev_get_tx_queue_~index#1;netdev_get_tx_queue_~dev#1.base, netdev_get_tx_queue_~dev#1.offset := netdev_get_tx_queue_#in~dev#1.base, netdev_get_tx_queue_#in~dev#1.offset;netdev_get_tx_queue_~index#1 := netdev_get_tx_queue_#in~index#1;call netdev_get_tx_queue_#t~mem143#1.base, netdev_get_tx_queue_#t~mem143#1.offset := read~$Pointer$(netdev_get_tx_queue_~dev#1.base, 871 + netdev_get_tx_queue_~dev#1.offset, 8);netdev_get_tx_queue_#res#1.base, netdev_get_tx_queue_#res#1.offset := netdev_get_tx_queue_#t~mem143#1.base, netdev_get_tx_queue_#t~mem143#1.offset + 472 * (if netdev_get_tx_queue_~index#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then netdev_get_tx_queue_~index#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else netdev_get_tx_queue_~index#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc netdev_get_tx_queue_#t~mem143#1.base, netdev_get_tx_queue_#t~mem143#1.offset; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6468: SUMMARY for call tlan_reset_adapter(tlan_start_~dev#1.base, tlan_start_~dev#1.offset); srcloc: null [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5413: dma_free_attrs_#t~ret123#1 := arch_irqs_disabled_flags_#res#1;assume { :end_inline_arch_irqs_disabled_flags } true;assume -2147483648 <= dma_free_attrs_#t~ret123#1 && dma_free_attrs_#t~ret123#1 <= 2147483647;dma_free_attrs_~tmp___0~3#1 := dma_free_attrs_#t~ret123#1;havoc dma_free_attrs_#t~ret123#1;dma_free_attrs_~__ret_warn_on~0#1 := (if 0 != dma_free_attrs_~tmp___0~3#1 then 1 else 0);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 != dma_free_attrs_~__ret_warn_on~0#1 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6471: assume { :end_inline_tlan_start } true; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10700: assume 0 != ldv_register_netdev_~tmp~83#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_register_netdev_~ldv_9_ret_default~0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10700: assume !(0 != ldv_register_netdev_~tmp~83#1);assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != ldv_register_netdev_~ldv_9_ret_default~0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5954: assume 0 != netif_tx_wake_queue_~tmp~14#1;assume { :begin_inline_netif_tx_start_queue } true;netif_tx_start_queue_#in~dev_queue#1.base, netif_tx_start_queue_#in~dev_queue#1.offset := netif_tx_wake_queue_~dev_queue#1.base, netif_tx_wake_queue_~dev_queue#1.offset;havoc netif_tx_start_queue_~dev_queue#1.base, netif_tx_start_queue_~dev_queue#1.offset;netif_tx_start_queue_~dev_queue#1.base, netif_tx_start_queue_~dev_queue#1.offset := netif_tx_start_queue_#in~dev_queue#1.base, netif_tx_start_queue_#in~dev_queue#1.offset;assume { :begin_inline_clear_bit } true;clear_bit_#in~nr#1, clear_bit_#in~addr#1.base, clear_bit_#in~addr#1.offset := 0, netif_tx_start_queue_~dev_queue#1.base, 408 + netif_tx_start_queue_~dev_queue#1.offset;havoc clear_bit_~nr#1, clear_bit_~addr#1.base, clear_bit_~addr#1.offset;clear_bit_~nr#1 := clear_bit_#in~nr#1;clear_bit_~addr#1.base, clear_bit_~addr#1.offset := clear_bit_#in~addr#1.base, clear_bit_#in~addr#1.offset; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5954: assume !(0 != netif_tx_wake_queue_~tmp~14#1);assume { :begin_inline_test_and_clear_bit } true;test_and_clear_bit_#in~nr#1, test_and_clear_bit_#in~addr#1.base, test_and_clear_bit_#in~addr#1.offset := 0, netif_tx_wake_queue_~dev_queue#1.base, 408 + netif_tx_wake_queue_~dev_queue#1.offset;havoc test_and_clear_bit_#res#1;havoc test_and_clear_bit_~nr#1, test_and_clear_bit_~addr#1.base, test_and_clear_bit_~addr#1.offset;test_and_clear_bit_~nr#1 := test_and_clear_bit_#in~nr#1;test_and_clear_bit_~addr#1.base, test_and_clear_bit_~addr#1.offset := test_and_clear_bit_#in~addr#1.base, test_and_clear_bit_#in~addr#1.offset;test_and_clear_bit_#res#1 := 0; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7013-1: tlan_eisa_probe_~ioaddr~0#1 := 4096 + tlan_eisa_probe_~ioaddr~0#1; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10716: ldv_register_netdev_95_#t~ret1086#1 := ldv_register_netdev_#res#1;assume { :end_inline_ldv_register_netdev } true;assume -2147483648 <= ldv_register_netdev_95_#t~ret1086#1 && ldv_register_netdev_95_#t~ret1086#1 <= 2147483647;ldv_register_netdev_95_~tmp___0~37#1 := ldv_register_netdev_95_#t~ret1086#1;havoc ldv_register_netdev_95_#t~ret1086#1;ldv_register_netdev_95_#res#1 := ldv_register_netdev_95_~tmp___0~37#1; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5964-2: assume { :end_inline_netif_tx_wake_queue } true; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5964: assume 0 != netif_tx_wake_queue_~tmp___0~5#1;call netif_tx_wake_queue_#t~mem149#1.base, netif_tx_wake_queue_#t~mem149#1.offset := read~$Pointer$(netif_tx_wake_queue_~dev_queue#1.base, 8 + netif_tx_wake_queue_~dev_queue#1.offset, 8);assume { :begin_inline___netif_schedule } true;__netif_schedule_#in~arg0#1.base, __netif_schedule_#in~arg0#1.offset := netif_tx_wake_queue_#t~mem149#1.base, netif_tx_wake_queue_#t~mem149#1.offset;havoc __netif_schedule_~arg0#1.base, __netif_schedule_~arg0#1.offset;__netif_schedule_~arg0#1.base, __netif_schedule_~arg0#1.offset := __netif_schedule_#in~arg0#1.base, __netif_schedule_#in~arg0#1.offset; [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5964: assume !(0 != netif_tx_wake_queue_~tmp___0~5#1); [2021-11-23 03:40:16,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7022: assume tlan_eisa_probe_~ioaddr~0#1 <= 36863; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7022: assume !(tlan_eisa_probe_~ioaddr~0#1 <= 36863); [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8080: assume tlan_reset_lists_~i~3#1 <= 63; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8080: assume !(tlan_reset_lists_~i~3#1 <= 63);call write~int(0, tlan_reset_lists_~priv~19#1.base, 84 + tlan_reset_lists_~priv~19#1.offset, 4);call write~int(31, tlan_reset_lists_~priv~19#1.base, 88 + tlan_reset_lists_~priv~19#1.offset, 4);tlan_reset_lists_~i~3#1 := 0; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7024: assume 0 != ~bitwiseAnd(~debug~0, 16);assume { :begin_inline_inw } true;inw_#in~port#1 := (if (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 <= 2147483647 then (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 else (3200 + tlan_eisa_probe_~ioaddr~0#1) % 4294967296 % 4294967296 - 4294967296);havoc inw_#res#1;havoc inw_~port#1, inw_~value~2#1;inw_~port#1 := inw_#in~port#1;havoc inw_~value~2#1;inw_#res#1 := inw_~value~2#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7024: assume !(0 != ~bitwiseAnd(~debug~0, 16)); [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8082: call tlan_reset_lists_#t~mem588#1.base, tlan_reset_lists_#t~mem588#1.offset := read~$Pointer$(tlan_reset_lists_~priv~19#1.base, 96 + tlan_reset_lists_~priv~19#1.offset, 8);tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset := tlan_reset_lists_#t~mem588#1.base, tlan_reset_lists_#t~mem588#1.offset + 88 * (if tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 else tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc tlan_reset_lists_#t~mem588#1.base, tlan_reset_lists_#t~mem588#1.offset;call write~int(32768, tlan_reset_lists_~list~0#1.base, 4 + tlan_reset_lists_~list~0#1.offset, 2);call write~int(0, tlan_reset_lists_~list~0#1.base, 12 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(0, tlan_reset_lists_~list~0#1.base, 24 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(0, tlan_reset_lists_~list~0#1.base, 28 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(0, tlan_reset_lists_~list~0#1.base, 76 + tlan_reset_lists_~list~0#1.offset, 4);call write~int(0, tlan_reset_lists_~list~0#1.base, 84 + tlan_reset_lists_~list~0#1.offset, 4);tlan_reset_lists_~i~3#1 := 1 + tlan_reset_lists_~i~3#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10728: ldv_register_netdev_#t~ret1061#1 := ldv_register_netdev_open_9_6_#res#1;assume { :end_inline_ldv_register_netdev_open_9_6 } true;assume -2147483648 <= ldv_register_netdev_#t~ret1061#1 && ldv_register_netdev_#t~ret1061#1 <= 2147483647;ldv_register_netdev_~ldv_9_ret_default~0#1 := ldv_register_netdev_#t~ret1061#1;havoc ldv_register_netdev_#t~mem1059#1.base, ldv_register_netdev_#t~mem1059#1.offset;havoc ldv_register_netdev_#t~mem1060#1.base, ldv_register_netdev_#t~mem1060#1.offset;havoc ldv_register_netdev_#t~ret1061#1;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5981: assume { :end_inline_netif_wake_queue } true; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8098: assume 0 == (tlan_reset_lists_~skb~3#1.base + tlan_reset_lists_~skb~3#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8098: assume !(0 == (tlan_reset_lists_~skb~3#1.base + tlan_reset_lists_~skb~3#1.offset) % 18446744073709551616);call tlan_reset_lists_#t~mem592#1.base, tlan_reset_lists_#t~mem592#1.offset := read~$Pointer$(tlan_reset_lists_~priv~19#1.base, 8 + tlan_reset_lists_~priv~19#1.offset, 8);call tlan_reset_lists_#t~mem593#1.base, tlan_reset_lists_#t~mem593#1.offset := read~$Pointer$(tlan_reset_lists_~skb~3#1.base, 229 + tlan_reset_lists_~skb~3#1.offset, 8);assume { :begin_inline_pci_map_single } true;pci_map_single_#in~hwdev#1.base, pci_map_single_#in~hwdev#1.offset, pci_map_single_#in~ptr#1.base, pci_map_single_#in~ptr#1.offset, pci_map_single_#in~size#1, pci_map_single_#in~direction#1 := tlan_reset_lists_#t~mem592#1.base, tlan_reset_lists_#t~mem592#1.offset, tlan_reset_lists_#t~mem593#1.base, tlan_reset_lists_#t~mem593#1.offset, 1600, 2;havoc pci_map_single_#res#1;havoc pci_map_single_#t~ite193#1.base, pci_map_single_#t~ite193#1.offset, pci_map_single_#t~ret194#1, pci_map_single_~hwdev#1.base, pci_map_single_~hwdev#1.offset, pci_map_single_~ptr#1.base, pci_map_single_~ptr#1.offset, pci_map_single_~size#1, pci_map_single_~direction#1, pci_map_single_~tmp~21#1;pci_map_single_~hwdev#1.base, pci_map_single_~hwdev#1.offset := pci_map_single_#in~hwdev#1.base, pci_map_single_#in~hwdev#1.offset;pci_map_single_~ptr#1.base, pci_map_single_~ptr#1.offset := pci_map_single_#in~ptr#1.base, pci_map_single_#in~ptr#1.offset;pci_map_single_~size#1 := pci_map_single_#in~size#1;pci_map_single_~direction#1 := pci_map_single_#in~direction#1;havoc pci_map_single_~tmp~21#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10743: assume 0 != ldv_request_irq_~tmp~85#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_request_irq_~arg0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10743: assume !(0 != ldv_request_irq_~tmp~85#1);assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != ldv_request_irq_~arg0#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_0_switch_break#1: ldv_switch_0_#res#1 := 0; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8111: assume tlan_reset_lists_~i~3#1 <= 31; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8111: assume !(tlan_reset_lists_~i~3#1 <= 31); [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12341: assume { :end_inline_ldv_spin_lock_lock_of_tlan_priv } true;assume { :begin_inline___ldv_spin_lock } true;__ldv_spin_lock_#in~arg0#1.base, __ldv_spin_lock_#in~arg0#1.offset := ldv___ldv_spin_lock_113_~ldv_func_arg1#1.base, ldv___ldv_spin_lock_113_~ldv_func_arg1#1.offset;havoc __ldv_spin_lock_~arg0#1.base, __ldv_spin_lock_~arg0#1.offset;__ldv_spin_lock_~arg0#1.base, __ldv_spin_lock_~arg0#1.offset := __ldv_spin_lock_#in~arg0#1.base, __ldv_spin_lock_#in~arg0#1.offset; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8113: call tlan_reset_lists_#t~mem589#1.base, tlan_reset_lists_#t~mem589#1.offset := read~$Pointer$(tlan_reset_lists_~priv~19#1.base, 52 + tlan_reset_lists_~priv~19#1.offset, 8);tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset := tlan_reset_lists_#t~mem589#1.base, tlan_reset_lists_#t~mem589#1.offset + 88 * (if tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 else tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc tlan_reset_lists_#t~mem589#1.base, tlan_reset_lists_#t~mem589#1.offset;call tlan_reset_lists_#t~mem590#1 := read~int(tlan_reset_lists_~priv~19#1.base, 60 + tlan_reset_lists_~priv~19#1.offset, 8);tlan_reset_lists_~list_phys~0#1 := tlan_reset_lists_#t~mem590#1 + 88 * tlan_reset_lists_~i~3#1;havoc tlan_reset_lists_#t~mem590#1;call write~int(12288, tlan_reset_lists_~list~0#1.base, 4 + tlan_reset_lists_~list~0#1.offset, 2);call write~int(1600, tlan_reset_lists_~list~0#1.base, 6 + tlan_reset_lists_~list~0#1.offset, 2);call write~int(2147485248, tlan_reset_lists_~list~0#1.base, 8 + tlan_reset_lists_~list~0#1.offset, 4);assume { :begin_inline_netdev_alloc_skb_ip_align } true;netdev_alloc_skb_ip_align_#in~dev#1.base, netdev_alloc_skb_ip_align_#in~dev#1.offset, netdev_alloc_skb_ip_align_#in~length#1 := tlan_reset_lists_~dev#1.base, tlan_reset_lists_~dev#1.offset, 1605;havoc netdev_alloc_skb_ip_align_#res#1.base, netdev_alloc_skb_ip_align_#res#1.offset;havoc netdev_alloc_skb_ip_align_#t~ret139#1.base, netdev_alloc_skb_ip_align_#t~ret139#1.offset, netdev_alloc_skb_ip_align_~dev#1.base, netdev_alloc_skb_ip_align_~dev#1.offset, netdev_alloc_skb_ip_align_~length#1, netdev_alloc_skb_ip_align_~tmp~11#1.base, netdev_alloc_skb_ip_align_~tmp~11#1.offset;netdev_alloc_skb_ip_align_~dev#1.base, netdev_alloc_skb_ip_align_~dev#1.offset := netdev_alloc_skb_ip_align_#in~dev#1.base, netdev_alloc_skb_ip_align_#in~dev#1.offset;netdev_alloc_skb_ip_align_~length#1 := netdev_alloc_skb_ip_align_#in~length#1;havoc netdev_alloc_skb_ip_align_~tmp~11#1.base, netdev_alloc_skb_ip_align_~tmp~11#1.offset;assume { :begin_inline___netdev_alloc_skb_ip_align } true;__netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset, __netdev_alloc_skb_ip_align_#in~length#1, __netdev_alloc_skb_ip_align_#in~gfp#1 := netdev_alloc_skb_ip_align_~dev#1.base, netdev_alloc_skb_ip_align_~dev#1.offset, netdev_alloc_skb_ip_align_~length#1, 32;havoc __netdev_alloc_skb_ip_align_#res#1.base, __netdev_alloc_skb_ip_align_#res#1.offset;havoc __netdev_alloc_skb_ip_align_#t~ret138#1.base, __netdev_alloc_skb_ip_align_#t~ret138#1.offset, __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1, __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset, __netdev_alloc_skb_ip_align_~tmp~10#1.base, __netdev_alloc_skb_ip_align_~tmp~10#1.offset;__netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset := __netdev_alloc_skb_ip_align_#in~dev#1.base, __netdev_alloc_skb_ip_align_#in~dev#1.offset;__netdev_alloc_skb_ip_align_~length#1 := __netdev_alloc_skb_ip_align_#in~length#1;__netdev_alloc_skb_ip_align_~gfp#1 := __netdev_alloc_skb_ip_align_#in~gfp#1;havoc __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset;havoc __netdev_alloc_skb_ip_align_~tmp~10#1.base, __netdev_alloc_skb_ip_align_~tmp~10#1.offset;assume { :begin_inline_ldv___netdev_alloc_skb_59 } true;ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_#in~flags#1 := __netdev_alloc_skb_ip_align_~dev#1.base, __netdev_alloc_skb_ip_align_~dev#1.offset, __netdev_alloc_skb_ip_align_~length#1, __netdev_alloc_skb_ip_align_~gfp#1;havoc ldv___netdev_alloc_skb_59_#res#1.base, ldv___netdev_alloc_skb_59_#res#1.offset;havoc ldv___netdev_alloc_skb_59_#t~ret1074#1.base, ldv___netdev_alloc_skb_59_#t~ret1074#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset, ldv___netdev_alloc_skb_59_~ldv_func_arg2#1, ldv___netdev_alloc_skb_59_~flags#1, ldv___netdev_alloc_skb_59_~tmp~88#1.base, ldv___netdev_alloc_skb_59_~tmp~88#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_~ldv_func_arg1#1.offset := ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.base, ldv___netdev_alloc_skb_59_#in~ldv_func_arg1#1.offset;ldv___netdev_alloc_skb_59_~ldv_func_arg2#1 := ldv___netdev_alloc_skb_59_#in~ldv_func_arg2#1;ldv___netdev_alloc_skb_59_~flags#1 := ldv___netdev_alloc_skb_59_#in~flags#1;havoc ldv___netdev_alloc_skb_59_~tmp~88#1.base, ldv___netdev_alloc_skb_59_~tmp~88#1.offset;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := ldv___netdev_alloc_skb_59_~flags#1;havoc ldv_check_alloc_flags_#t~ret1089#1, ldv_check_alloc_flags_~flags#1, ldv_check_alloc_flags_~tmp~97#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1;havoc ldv_check_alloc_flags_~tmp~97#1; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10759: ldv_request_irq_100_#t~ret1088#1 := ldv_request_irq_#res#1;assume { :end_inline_ldv_request_irq } true;assume -2147483648 <= ldv_request_irq_100_#t~ret1088#1 && ldv_request_irq_100_#t~ret1088#1 <= 2147483647;ldv_request_irq_100_~tmp___0~38#1 := ldv_request_irq_100_#t~ret1088#1;havoc ldv_request_irq_100_#t~ret1088#1;ldv_request_irq_100_#res#1 := ldv_request_irq_100_~tmp___0~38#1; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7062: assume 0 == (tlan_init_#t~mem348#1.base + tlan_init_#t~mem348#1.offset) % 18446744073709551616;havoc tlan_init_#t~mem348#1.base, tlan_init_#t~mem348#1.offset;havoc tlan_init_#t~nondet349#1;tlan_init_#res#1 := -12; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7062: assume !(0 == (tlan_init_#t~mem348#1.base + tlan_init_#t~mem348#1.offset) % 18446744073709551616);havoc tlan_init_#t~mem348#1.base, tlan_init_#t~mem348#1.offset;call tlan_init_#t~mem350#1.base, tlan_init_#t~mem350#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 24 + tlan_init_~priv~5#1.offset, 8);assume { :begin_inline_#Ultimate.C_memset } true;#Ultimate.C_memset_#ptr#1.base, #Ultimate.C_memset_#ptr#1.offset, #Ultimate.C_memset_#value#1, #Ultimate.C_memset_#amount#1 := tlan_init_#t~mem350#1.base, tlan_init_#t~mem350#1.offset, 0, tlan_init_~dma_size~0#1;havoc #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;havoc #Ultimate.C_memset_#t~loopctr1235#1;#Ultimate.C_memset_#t~loopctr1235#1 := 0; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8123: assume tlan_reset_lists_~i~3#1 <= 31; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8123: assume !(tlan_reset_lists_~i~3#1 <= 31);call write~int(0, tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset, 4); [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5481: tlan_probe1_#t~ret303#1.base, tlan_probe1_#t~ret303#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;assume { :end_inline_spinlock_check } true;havoc tlan_probe1_#t~ret303#1.base, tlan_probe1_#t~ret303#1.offset;assume { :begin_inline___raw_spin_lock_init } true;__raw_spin_lock_init_#in~arg0#1.base, __raw_spin_lock_init_#in~arg0#1.offset, __raw_spin_lock_init_#in~arg1#1.base, __raw_spin_lock_init_#in~arg1#1.offset, __raw_spin_lock_init_#in~arg2#1.base, __raw_spin_lock_init_#in~arg2#1.offset := tlan_probe1_~priv~3#1.base, 322 + tlan_probe1_~priv~3#1.offset, 38, 0, tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset;havoc __raw_spin_lock_init_~arg0#1.base, __raw_spin_lock_init_~arg0#1.offset, __raw_spin_lock_init_~arg1#1.base, __raw_spin_lock_init_~arg1#1.offset, __raw_spin_lock_init_~arg2#1.base, __raw_spin_lock_init_~arg2#1.offset;__raw_spin_lock_init_~arg0#1.base, __raw_spin_lock_init_~arg0#1.offset := __raw_spin_lock_init_#in~arg0#1.base, __raw_spin_lock_init_#in~arg0#1.offset;__raw_spin_lock_init_~arg1#1.base, __raw_spin_lock_init_~arg1#1.offset := __raw_spin_lock_init_#in~arg1#1.base, __raw_spin_lock_init_#in~arg1#1.offset;__raw_spin_lock_init_~arg2#1.base, __raw_spin_lock_init_~arg2#1.offset := __raw_spin_lock_init_#in~arg2#1.base, __raw_spin_lock_init_#in~arg2#1.offset; [2021-11-23 03:40:16,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12352: assume { :end_inline_ldv_spin_unlock_lock_of_tlan_priv } true;assume { :begin_inline_spin_unlock_irqrestore } true;spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1 := ldv_spin_unlock_irqrestore_86_~lock#1.base, ldv_spin_unlock_irqrestore_86_~lock#1.offset, ldv_spin_unlock_irqrestore_86_~flags#1;havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset := spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset;spin_unlock_irqrestore_~flags#1 := spin_unlock_irqrestore_#in~flags#1;assume { :begin_inline__raw_spin_unlock_irqrestore } true;_raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1 := spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;_raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset := _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset;_raw_spin_unlock_irqrestore_~arg1#1 := _raw_spin_unlock_irqrestore_#in~arg1#1; [2021-11-23 03:40:16,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11295: assume { :end_inline_ldv___ldv_spin_lock_113 } true;call tlan_ee_read_byte_#t~mem980#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_send_start } true;tlan_ee_send_start_#in~io_base#1 := tlan_ee_read_byte_#t~mem980#1 % 65536;havoc tlan_ee_send_start_#t~ret947#1, tlan_ee_send_start_#t~ret948#1, tlan_ee_send_start_#t~ret949#1, tlan_ee_send_start_#t~ret950#1, tlan_ee_send_start_#t~ret951#1, tlan_ee_send_start_~io_base#1, tlan_ee_send_start_~sio~5#1, tlan_ee_send_start_~tmp~66#1, tlan_ee_send_start_~tmp___0~26#1, tlan_ee_send_start_~tmp___1~12#1, tlan_ee_send_start_~tmp___2~7#1, tlan_ee_send_start_~tmp___3~6#1;tlan_ee_send_start_~io_base#1 := tlan_ee_send_start_#in~io_base#1;havoc tlan_ee_send_start_~sio~5#1;havoc tlan_ee_send_start_~tmp~66#1;havoc tlan_ee_send_start_~tmp___0~26#1;havoc tlan_ee_send_start_~tmp___1~12#1;havoc tlan_ee_send_start_~tmp___2~7#1;havoc tlan_ee_send_start_~tmp___3~6#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_send_start_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,501 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8125: call tlan_reset_lists_#t~mem595#1.base, tlan_reset_lists_#t~mem595#1.offset := read~$Pointer$(tlan_reset_lists_~priv~19#1.base, 52 + tlan_reset_lists_~priv~19#1.offset, 8);assume { :begin_inline_tlan_store_skb } true;tlan_store_skb_#in~tag#1.base, tlan_store_skb_#in~tag#1.offset, tlan_store_skb_#in~skb#1.base, tlan_store_skb_#in~skb#1.offset := tlan_reset_lists_#t~mem595#1.base, tlan_reset_lists_#t~mem595#1.offset + 88 * (if tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 else tlan_reset_lists_~i~3#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 0, 0;havoc tlan_store_skb_~tag#1.base, tlan_store_skb_~tag#1.offset, tlan_store_skb_~skb#1.base, tlan_store_skb_~skb#1.offset, tlan_store_skb_~addr~1#1;tlan_store_skb_~tag#1.base, tlan_store_skb_~tag#1.offset := tlan_store_skb_#in~tag#1.base, tlan_store_skb_#in~tag#1.offset;tlan_store_skb_~skb#1.base, tlan_store_skb_~skb#1.offset := tlan_store_skb_#in~skb#1.base, tlan_store_skb_#in~skb#1.offset;havoc tlan_store_skb_~addr~1#1;tlan_store_skb_~addr~1#1 := tlan_store_skb_~skb#1.base + tlan_store_skb_~skb#1.offset;call write~int(tlan_store_skb_~addr~1#1, tlan_store_skb_~tag#1.base, 84 + tlan_store_skb_~tag#1.offset, 4);call write~int(tlan_store_skb_~addr~1#1 / 4294967296, tlan_store_skb_~tag#1.base, 76 + tlan_store_skb_~tag#1.offset, 4); [2021-11-23 03:40:16,501 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8129: assume { :end_inline_tlan_reset_lists } true;assume { :begin_inline_tlan_read_and_clear_stats } true;tlan_read_and_clear_stats_#in~dev#1.base, tlan_read_and_clear_stats_#in~dev#1.offset, tlan_read_and_clear_stats_#in~record#1 := tlan_start_~dev#1.base, tlan_start_~dev#1.offset, 0;havoc tlan_read_and_clear_stats_#t~mem622#1, tlan_read_and_clear_stats_#t~mem623#1, tlan_read_and_clear_stats_#t~ret624#1, tlan_read_and_clear_stats_#t~mem625#1, tlan_read_and_clear_stats_#t~ret626#1, tlan_read_and_clear_stats_#t~mem627#1, tlan_read_and_clear_stats_#t~ret628#1, tlan_read_and_clear_stats_#t~mem629#1, tlan_read_and_clear_stats_#t~ret630#1, tlan_read_and_clear_stats_#t~mem631#1, tlan_read_and_clear_stats_#t~mem632#1, tlan_read_and_clear_stats_#t~ret633#1, tlan_read_and_clear_stats_#t~mem634#1, tlan_read_and_clear_stats_#t~ret635#1, tlan_read_and_clear_stats_#t~mem636#1, tlan_read_and_clear_stats_#t~ret637#1, tlan_read_and_clear_stats_#t~mem638#1, tlan_read_and_clear_stats_#t~ret639#1, tlan_read_and_clear_stats_#t~mem640#1, tlan_read_and_clear_stats_#t~mem641#1, tlan_read_and_clear_stats_#t~ret642#1, tlan_read_and_clear_stats_#t~mem643#1, tlan_read_and_clear_stats_#t~ret644#1, tlan_read_and_clear_stats_#t~mem645#1, tlan_read_and_clear_stats_#t~ret646#1, tlan_read_and_clear_stats_#t~mem647#1, tlan_read_and_clear_stats_#t~ret648#1, tlan_read_and_clear_stats_#t~mem649#1, tlan_read_and_clear_stats_#t~mem650#1, tlan_read_and_clear_stats_#t~ret651#1, tlan_read_and_clear_stats_#t~mem652#1, tlan_read_and_clear_stats_#t~ret653#1, tlan_read_and_clear_stats_#t~mem654#1, tlan_read_and_clear_stats_#t~ret655#1, tlan_read_and_clear_stats_#t~mem656#1, tlan_read_and_clear_stats_#t~ret657#1, tlan_read_and_clear_stats_#t~mem658#1, tlan_read_and_clear_stats_#t~mem659#1, tlan_read_and_clear_stats_#t~ret660#1, tlan_read_and_clear_stats_#t~mem661#1, tlan_read_and_clear_stats_#t~ret662#1, tlan_read_and_clear_stats_#t~mem663#1, tlan_read_and_clear_stats_#t~ret664#1, tlan_read_and_clear_stats_#t~mem665#1, tlan_read_and_clear_stats_#t~mem666#1, tlan_read_and_clear_stats_#t~mem667#1, tlan_read_and_clear_stats_#t~mem668#1, tlan_read_and_clear_stats_#t~mem669#1, tlan_read_and_clear_stats_#t~mem670#1, tlan_read_and_clear_stats_#t~mem671#1, tlan_read_and_clear_stats_#t~mem672#1, tlan_read_and_clear_stats_#t~mem673#1, tlan_read_and_clear_stats_#t~mem674#1, tlan_read_and_clear_stats_~dev#1.base, tlan_read_and_clear_stats_~dev#1.offset, tlan_read_and_clear_stats_~record#1, tlan_read_and_clear_stats_~tx_good~0#1, tlan_read_and_clear_stats_~tx_under~0#1, tlan_read_and_clear_stats_~rx_good~0#1, tlan_read_and_clear_stats_~rx_over~0#1, tlan_read_and_clear_stats_~def_tx~0#1, tlan_read_and_clear_stats_~crc~0#1, tlan_read_and_clear_stats_~code~0#1, tlan_read_and_clear_stats_~multi_col~0#1, tlan_read_and_clear_stats_~single_col~0#1, tlan_read_and_clear_stats_~excess_col~0#1, tlan_read_and_clear_stats_~late_col~0#1, tlan_read_and_clear_stats_~loss~0#1, tlan_read_and_clear_stats_~tmp~52#1, tlan_read_and_clear_stats_~tmp___0~19#1, tlan_read_and_clear_stats_~tmp___1~7#1, tlan_read_and_clear_stats_~tmp___2~3#1, tlan_read_and_clear_stats_~tmp___3~2#1, tlan_read_and_clear_stats_~tmp___4~1#1, tlan_read_and_clear_stats_~tmp___5~0#1, tlan_read_and_clear_stats_~tmp___6~0#1, tlan_read_and_clear_stats_~tmp___7~0#1, tlan_read_and_clear_stats_~tmp___8~0#1, tlan_read_and_clear_stats_~tmp___9~0#1, tlan_read_and_clear_stats_~tmp___10~0#1, tlan_read_and_clear_stats_~tmp___11~0#1, tlan_read_and_clear_stats_~tmp___12~0#1, tlan_read_and_clear_stats_~tmp___13~0#1, tlan_read_and_clear_stats_~tmp___14~0#1, tlan_read_and_clear_stats_~tmp___15~0#1, tlan_read_and_clear_stats_~tmp___16~0#1, tlan_read_and_clear_stats_~tmp___17~0#1;tlan_read_and_clear_stats_~dev#1.base, tlan_read_and_clear_stats_~dev#1.offset := tlan_read_and_clear_stats_#in~dev#1.base, tlan_read_and_clear_stats_#in~dev#1.offset;tlan_read_and_clear_stats_~record#1 := tlan_read_and_clear_stats_#in~record#1;havoc tlan_read_and_clear_stats_~tx_good~0#1;havoc tlan_read_and_clear_stats_~tx_under~0#1;havoc tlan_read_and_clear_stats_~rx_good~0#1;havoc tlan_read_and_clear_stats_~rx_over~0#1;havoc tlan_read_and_clear_stats_~def_tx~0#1;havoc tlan_read_and_clear_stats_~crc~0#1;havoc tlan_read_and_clear_stats_~code~0#1;havoc tlan_read_and_clear_stats_~multi_col~0#1;havoc tlan_read_and_clear_stats_~single_col~0#1;havoc tlan_read_and_clear_stats_~excess_col~0#1;havoc tlan_read_and_clear_stats_~late_col~0#1;havoc tlan_read_and_clear_stats_~loss~0#1;havoc tlan_read_and_clear_stats_~tmp~52#1;havoc tlan_read_and_clear_stats_~tmp___0~19#1;havoc tlan_read_and_clear_stats_~tmp___1~7#1;havoc tlan_read_and_clear_stats_~tmp___2~3#1;havoc tlan_read_and_clear_stats_~tmp___3~2#1;havoc tlan_read_and_clear_stats_~tmp___4~1#1;havoc tlan_read_and_clear_stats_~tmp___5~0#1;havoc tlan_read_and_clear_stats_~tmp___6~0#1;havoc tlan_read_and_clear_stats_~tmp___7~0#1;havoc tlan_read_and_clear_stats_~tmp___8~0#1;havoc tlan_read_and_clear_stats_~tmp___9~0#1;havoc tlan_read_and_clear_stats_~tmp___10~0#1;havoc tlan_read_and_clear_stats_~tmp___11~0#1;havoc tlan_read_and_clear_stats_~tmp___12~0#1;havoc tlan_read_and_clear_stats_~tmp___13~0#1;havoc tlan_read_and_clear_stats_~tmp___14~0#1;havoc tlan_read_and_clear_stats_~tmp___15~0#1;havoc tlan_read_and_clear_stats_~tmp___16~0#1;havoc tlan_read_and_clear_stats_~tmp___17~0#1;call tlan_read_and_clear_stats_#t~mem622#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 48, (if (8 + tlan_read_and_clear_stats_#t~mem622#1) % 4294967296 % 4294967296 <= 2147483647 then (8 + tlan_read_and_clear_stats_#t~mem622#1) % 4294967296 % 4294967296 else (8 + tlan_read_and_clear_stats_#t~mem622#1) % 4294967296 % 4294967296 - 4294967296);havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,501 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11305: assume 32 != ldv_check_alloc_flags_~flags#1 % 4294967296 && 0 != ldv_check_alloc_flags_~flags#1 % 4294967296;assume { :begin_inline_ldv_exclusive_spin_is_locked } true;havoc ldv_exclusive_spin_is_locked_#res#1; [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11305: assume !(32 != ldv_check_alloc_flags_~flags#1 % 4294967296 && 0 != ldv_check_alloc_flags_~flags#1 % 4294967296); [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11305-2: assume { :end_inline_ldv_check_alloc_flags } true;assume { :begin_inline_ldv_malloc } true;ldv_malloc_#in~size#1 := 245;havoc ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;havoc ldv_malloc_#t~ret1111#1, ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset, ldv_malloc_#t~ret1113#1, ldv_malloc_~size#1, ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset, ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset, ldv_malloc_~tmp___0~40#1, ldv_malloc_~tmp___1~16#1;ldv_malloc_~size#1 := ldv_malloc_#in~size#1;havoc ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset;havoc ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset;havoc ldv_malloc_~tmp___0~40#1;havoc ldv_malloc_~tmp___1~16#1;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9727: assume 0 != ldv_alloc_etherdev_mqs_~tmp___0~29#1;assume { :begin_inline_ldv_xmalloc } true;ldv_xmalloc_#in~size#1 := 3200;havoc ldv_xmalloc_#res#1.base, ldv_xmalloc_#res#1.offset;havoc ldv_xmalloc_#t~malloc1118#1.base, ldv_xmalloc_#t~malloc1118#1.offset, ldv_xmalloc_#t~ret1119#1, ldv_xmalloc_~size#1, ldv_xmalloc_~res~3#1.base, ldv_xmalloc_~res~3#1.offset, ldv_xmalloc_~tmp~108#1.base, ldv_xmalloc_~tmp~108#1.offset, ldv_xmalloc_~tmp___0~42#1;ldv_xmalloc_~size#1 := ldv_xmalloc_#in~size#1;havoc ldv_xmalloc_~res~3#1.base, ldv_xmalloc_~res~3#1.offset;havoc ldv_xmalloc_~tmp~108#1.base, ldv_xmalloc_~tmp~108#1.offset;havoc ldv_xmalloc_~tmp___0~42#1;call ldv_xmalloc_#t~malloc1118#1.base, ldv_xmalloc_#t~malloc1118#1.offset := #Ultimate.allocOnHeap(ldv_xmalloc_~size#1);ldv_xmalloc_~tmp~108#1.base, ldv_xmalloc_~tmp~108#1.offset := ldv_xmalloc_#t~malloc1118#1.base, ldv_xmalloc_#t~malloc1118#1.offset;havoc ldv_xmalloc_#t~malloc1118#1.base, ldv_xmalloc_#t~malloc1118#1.offset;ldv_xmalloc_~res~3#1.base, ldv_xmalloc_~res~3#1.offset := ldv_xmalloc_~tmp~108#1.base, ldv_xmalloc_~tmp~108#1.offset;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != (ldv_xmalloc_~res~3#1.base + ldv_xmalloc_~res~3#1.offset) % 18446744073709551616 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9727: assume !(0 != ldv_alloc_etherdev_mqs_~tmp___0~29#1);ldv_alloc_etherdev_mqs_#res#1.base, ldv_alloc_etherdev_mqs_#res#1.offset := 0, 0; [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7086: assume tlan_init_~i~0#1 <= 5; [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7086: assume !(tlan_init_~i~0#1 <= 5); [2021-11-23 03:40:16,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7088: call tlan_init_#t~mem356#1.base, tlan_init_#t~mem356#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 280 + tlan_init_~priv~5#1.offset, 8);call tlan_init_#t~mem357#1 := read~int(tlan_init_#t~mem356#1.base, 12 + tlan_init_#t~mem356#1.offset, 2);call tlan_init_#t~mem358#1.base, tlan_init_#t~mem358#1.offset := read~$Pointer$(tlan_init_~dev#1.base, 791 + tlan_init_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_read_byte } true;tlan_ee_read_byte_#in~dev#1.base, tlan_ee_read_byte_#in~dev#1.offset, tlan_ee_read_byte_#in~ee_addr#1, tlan_ee_read_byte_#in~data#1.base, tlan_ee_read_byte_#in~data#1.offset := tlan_init_~dev#1.base, tlan_init_~dev#1.offset, tlan_init_#t~mem357#1 % 256 + tlan_init_~i~0#1 % 256, tlan_init_#t~mem358#1.base, tlan_init_#t~mem358#1.offset + (if tlan_init_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then tlan_init_~i~0#1 % 18446744073709551616 % 18446744073709551616 else tlan_init_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc tlan_ee_read_byte_#res#1;havoc tlan_ee_read_byte_#t~ret979#1.base, tlan_ee_read_byte_#t~ret979#1.offset, tlan_ee_read_byte_#t~mem980#1, tlan_ee_read_byte_#t~mem981#1, tlan_ee_read_byte_#t~ret982#1, tlan_ee_read_byte_#t~mem983#1, tlan_ee_read_byte_#t~ret984#1, tlan_ee_read_byte_#t~mem985#1, tlan_ee_read_byte_#t~mem986#1, tlan_ee_read_byte_#t~ret987#1, tlan_ee_read_byte_#t~mem988#1, tlan_ee_read_byte_~dev#1.base, tlan_ee_read_byte_~dev#1.offset, tlan_ee_read_byte_~ee_addr#1, tlan_ee_read_byte_~data#1.base, tlan_ee_read_byte_~data#1.offset, tlan_ee_read_byte_~err~4#1, tlan_ee_read_byte_~priv~32#1.base, tlan_ee_read_byte_~priv~32#1.offset, tlan_ee_read_byte_~tmp~69#1.base, tlan_ee_read_byte_~tmp~69#1.offset, tlan_ee_read_byte_~flags~5#1, tlan_ee_read_byte_~ret~0#1;tlan_ee_read_byte_~dev#1.base, tlan_ee_read_byte_~dev#1.offset := tlan_ee_read_byte_#in~dev#1.base, tlan_ee_read_byte_#in~dev#1.offset;tlan_ee_read_byte_~ee_addr#1 := tlan_ee_read_byte_#in~ee_addr#1;tlan_ee_read_byte_~data#1.base, tlan_ee_read_byte_~data#1.offset := tlan_ee_read_byte_#in~data#1.base, tlan_ee_read_byte_#in~data#1.offset;havoc tlan_ee_read_byte_~err~4#1;havoc tlan_ee_read_byte_~priv~32#1.base, tlan_ee_read_byte_~priv~32#1.offset;havoc tlan_ee_read_byte_~tmp~69#1.base, tlan_ee_read_byte_~tmp~69#1.offset;havoc tlan_ee_read_byte_~flags~5#1;havoc tlan_ee_read_byte_~ret~0#1;assume { :begin_inline_netdev_priv } true;netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset := tlan_ee_read_byte_~dev#1.base, tlan_ee_read_byte_~dev#1.offset;havoc netdev_priv_#res#1.base, netdev_priv_#res#1.offset;havoc netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset;netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset := netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset;netdev_priv_#res#1.base, netdev_priv_#res#1.offset := netdev_priv_~dev#1.base, 3200 + netdev_priv_~dev#1.offset; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7091: assume 0 != tlan_init_~err~0#1;havoc tlan_init_#t~nondet360#1; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7091: assume !(0 != tlan_init_~err~0#1); [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7091-2: call write~int(6, tlan_init_~dev#1.base, 561 + tlan_init_~dev#1.offset, 1);assume { :begin_inline_netif_carrier_off } true;netif_carrier_off_#in~arg0#1.base, netif_carrier_off_#in~arg0#1.offset := tlan_init_~dev#1.base, tlan_init_~dev#1.offset;havoc netif_carrier_off_~arg0#1.base, netif_carrier_off_~arg0#1.offset;netif_carrier_off_~arg0#1.base, netif_carrier_off_~arg0#1.offset := netif_carrier_off_#in~arg0#1.base, netif_carrier_off_#in~arg0#1.offset; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9735: ldv_alloc_etherdev_mqs_94_#t~ret1084#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1084#1.offset := ldv_alloc_etherdev_mqs_#res#1.base, ldv_alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_ldv_alloc_etherdev_mqs } true;ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.base, ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.offset := ldv_alloc_etherdev_mqs_94_#t~ret1084#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1084#1.offset;havoc ldv_alloc_etherdev_mqs_94_#t~ret1084#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1084#1.offset;ldv_alloc_etherdev_mqs_94_#res#1.base, ldv_alloc_etherdev_mqs_94_#res#1.offset := ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.base, ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.offset; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5510: assume { :end_inline_spin_unlock_irqrestore } true; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7104: tlan_probe1_#t~ret304#1 := tlan_init_#res#1;assume { :end_inline_tlan_init } true;assume -2147483648 <= tlan_probe1_#t~ret304#1 && tlan_probe1_#t~ret304#1 <= 2147483647;tlan_probe1_~rc~1#1 := tlan_probe1_#t~ret304#1;havoc tlan_probe1_#t~ret304#1; [2021-11-23 03:40:16,503 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11346: ldv_dev_set_drvdata_82_#t~ret1076#1 := ldv_dev_set_drvdata_#res#1;assume { :end_inline_ldv_dev_set_drvdata } true;assume -2147483648 <= ldv_dev_set_drvdata_82_#t~ret1076#1 && ldv_dev_set_drvdata_82_#t~ret1076#1 <= 2147483647;ldv_dev_set_drvdata_82_~tmp~90#1 := ldv_dev_set_drvdata_82_#t~ret1076#1;havoc ldv_dev_set_drvdata_82_#t~ret1076#1;ldv_dev_set_drvdata_82_#res#1 := ldv_dev_set_drvdata_82_~tmp~90#1; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7121: assume 0 != tlan_open_~err~1#1;havoc tlan_open_#t~nondet366#1;call tlan_open_#t~mem367#1 := read~int(tlan_open_~dev#1.base, 64 + tlan_open_~dev#1.offset, 4);havoc tlan_open_#t~mem367#1;tlan_open_#res#1 := tlan_open_~err~1#1;call ULTIMATE.dealloc(tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset);havoc tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7121: assume !(0 != tlan_open_~err~1#1);assume { :begin_inline_init_timer_key } true;init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset, init_timer_key_#in~arg1#1, init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset, init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset := tlan_open_~priv~6#1.base, 156 + tlan_open_~priv~6#1.offset, 0, 52, 0, tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset;havoc init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset, init_timer_key_~arg1#1, init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset, init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset;init_timer_key_~arg0#1.base, init_timer_key_~arg0#1.offset := init_timer_key_#in~arg0#1.base, init_timer_key_#in~arg0#1.offset;init_timer_key_~arg1#1 := init_timer_key_#in~arg1#1;init_timer_key_~arg2#1.base, init_timer_key_~arg2#1.offset := init_timer_key_#in~arg2#1.base, init_timer_key_#in~arg2#1.offset;init_timer_key_~arg3#1.base, init_timer_key_~arg3#1.offset := init_timer_key_#in~arg3#1.base, init_timer_key_#in~arg3#1.offset; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7133-2: tlan_open_#res#1 := 0;call ULTIMATE.dealloc(tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset);havoc tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7133: assume 0 != ~bitwiseAnd(~debug~0, 1);havoc tlan_open_#t~nondet368#1;call tlan_open_#t~mem369#1 := read~int(tlan_open_~priv~6#1.base, 320 + tlan_open_~priv~6#1.offset, 1);havoc tlan_open_#t~mem369#1; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7133: assume !(0 != ~bitwiseAnd(~debug~0, 1)); [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L7139: ldv_register_netdev_open_9_6_#t~ret1063#1 := tlan_open_#res#1;assume { :end_inline_tlan_open } true;assume -2147483648 <= ldv_register_netdev_open_9_6_#t~ret1063#1 && ldv_register_netdev_open_9_6_#t~ret1063#1 <= 2147483647;ldv_register_netdev_open_9_6_~tmp~84#1 := ldv_register_netdev_open_9_6_#t~ret1063#1;havoc ldv_register_netdev_open_9_6_#t~ret1063#1;ldv_register_netdev_open_9_6_#res#1 := ldv_register_netdev_open_9_6_~tmp~84#1; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11372-8: ldv_xzalloc_#t~ret1121#1 := ldv_is_err_#res#1;assume { :end_inline_ldv_is_err } true;assume -9223372036854775808 <= ldv_xzalloc_#t~ret1121#1 && ldv_xzalloc_#t~ret1121#1 <= 9223372036854775807;ldv_xzalloc_~tmp___0~43#1 := ldv_xzalloc_#t~ret1121#1;havoc ldv_xzalloc_#t~ret1121#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_xzalloc_~tmp___0~43#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11372-7: ldv_xmalloc_#t~ret1119#1 := ldv_is_err_#res#1;assume { :end_inline_ldv_is_err } true;assume -9223372036854775808 <= ldv_xmalloc_#t~ret1119#1 && ldv_xmalloc_#t~ret1119#1 <= 9223372036854775807;ldv_xmalloc_~tmp___0~42#1 := ldv_xmalloc_#t~ret1119#1;havoc ldv_xmalloc_#t~ret1119#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_xmalloc_~tmp___0~42#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11372-9: ldv_malloc_#t~ret1113#1 := ldv_is_err_#res#1;assume { :end_inline_ldv_is_err } true;assume -9223372036854775808 <= ldv_malloc_#t~ret1113#1 && ldv_malloc_#t~ret1113#1 <= 9223372036854775807;ldv_malloc_~tmp___0~40#1 := ldv_malloc_#t~ret1113#1;havoc ldv_malloc_#t~ret1113#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_malloc_~tmp___0~40#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11372-6: ldv_malloc_#t~ret1113#1 := ldv_is_err_#res#1;assume { :end_inline_ldv_is_err } true;assume -9223372036854775808 <= ldv_malloc_#t~ret1113#1 && ldv_malloc_#t~ret1113#1 <= 9223372036854775807;ldv_malloc_~tmp___0~40#1 := ldv_malloc_#t~ret1113#1;havoc ldv_malloc_#t~ret1113#1;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 == ldv_malloc_~tmp___0~40#1 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6090: assume 0 != (pci_alloc_consistent_~hwdev#1.base + pci_alloc_consistent_~hwdev#1.offset) % 18446744073709551616;pci_alloc_consistent_#t~ite190#1.base, pci_alloc_consistent_#t~ite190#1.offset := pci_alloc_consistent_~hwdev#1.base, 179 + pci_alloc_consistent_~hwdev#1.offset; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6090: assume !(0 != (pci_alloc_consistent_~hwdev#1.base + pci_alloc_consistent_~hwdev#1.offset) % 18446744073709551616);pci_alloc_consistent_#t~ite190#1.base, pci_alloc_consistent_#t~ite190#1.offset := 0, 0; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6090-2: assume { :begin_inline_dma_alloc_attrs } true;dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset, dma_alloc_attrs_#in~size#1, dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset, dma_alloc_attrs_#in~gfp#1, dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset := pci_alloc_consistent_#t~ite190#1.base, pci_alloc_consistent_#t~ite190#1.offset, pci_alloc_consistent_~size#1, pci_alloc_consistent_~dma_handle#1.base, pci_alloc_consistent_~dma_handle#1.offset, 32, 0, 0;havoc dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;havoc dma_alloc_attrs_#t~ret108#1.base, dma_alloc_attrs_#t~ret108#1.offset, dma_alloc_attrs_#t~ret109#1, dma_alloc_attrs_#t~mem110#1.base, dma_alloc_attrs_#t~mem110#1.offset, dma_alloc_attrs_#t~ret111#1, dma_alloc_attrs_#t~mem118#1.base, dma_alloc_attrs_#t~mem118#1.offset, dma_alloc_attrs_#t~ret119#1.base, dma_alloc_attrs_#t~ret119#1.offset, dma_alloc_attrs_#t~mem120#1, dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~gfp#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, dma_alloc_attrs_~tmp~8#1.base, dma_alloc_attrs_~tmp~8#1.offset, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset, dma_alloc_attrs_~tmp___0~2#1, dma_alloc_attrs_~tmp___1~2#1;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset;dma_alloc_attrs_~size#1 := dma_alloc_attrs_#in~size#1;dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset := dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset;dma_alloc_attrs_~gfp#1 := dma_alloc_attrs_#in~gfp#1;dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset := dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset;havoc dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset;havoc dma_alloc_attrs_~tmp~8#1.base, dma_alloc_attrs_~tmp~8#1.offset;havoc dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc dma_alloc_attrs_~tmp___0~2#1;havoc dma_alloc_attrs_~tmp___1~2#1;assume { :begin_inline_get_dma_ops } true;get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;havoc get_dma_ops_#t~ret74#1, get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset, get_dma_ops_#t~short76#1, get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset, get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset, get_dma_ops_~tmp~4#1;get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset := get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset;havoc get_dma_ops_~tmp~4#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 == (get_dma_ops_~dev#1.base + get_dma_ops_~dev#1.offset) % 18446744073709551616 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6093: tlan_init_#t~ret347#1.base, tlan_init_#t~ret347#1.offset := pci_alloc_consistent_#res#1.base, pci_alloc_consistent_#res#1.offset;assume { :end_inline_pci_alloc_consistent } true;call write~$Pointer$(tlan_init_#t~ret347#1.base, tlan_init_#t~ret347#1.offset, tlan_init_~priv~5#1.base, 24 + tlan_init_~priv~5#1.offset, 8);havoc tlan_init_#t~mem346#1.base, tlan_init_#t~mem346#1.offset;havoc tlan_init_#t~ret347#1.base, tlan_init_#t~ret347#1.offset;call write~int(tlan_init_~dma_size~0#1, tlan_init_~priv~5#1.base, 40 + tlan_init_~priv~5#1.offset, 4);call tlan_init_#t~mem348#1.base, tlan_init_#t~mem348#1.offset := read~$Pointer$(tlan_init_~priv~5#1.base, 24 + tlan_init_~priv~5#1.offset, 8); [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-2: tlan_dio_read8_#t~ret220#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_dio_read8_~tmp~25#1 := tlan_dio_read8_#t~ret220#1;havoc tlan_dio_read8_#t~ret220#1;tlan_dio_read8_#res#1 := tlan_dio_read8_~tmp~25#1; [2021-11-23 03:40:16,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-3: tlan_read_and_clear_stats_#t~ret624#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp~52#1 := tlan_read_and_clear_stats_#t~ret624#1;havoc tlan_read_and_clear_stats_#t~mem623#1;havoc tlan_read_and_clear_stats_#t~ret624#1;tlan_read_and_clear_stats_~tx_good~0#1 := tlan_read_and_clear_stats_~tmp~52#1 % 256;call tlan_read_and_clear_stats_#t~mem625#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (13 + tlan_read_and_clear_stats_#t~mem625#1) % 4294967296 % 4294967296 <= 2147483647 then (13 + tlan_read_and_clear_stats_#t~mem625#1) % 4294967296 % 4294967296 else (13 + tlan_read_and_clear_stats_#t~mem625#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569: tlan_eisa_probe_#t~ret335#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_eisa_probe_~tmp___3~1#1 := tlan_eisa_probe_#t~ret335#1;havoc tlan_eisa_probe_#t~ret335#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-1: tlan_eisa_probe_#t~ret337#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_eisa_probe_~tmp___4~0#1 := tlan_eisa_probe_#t~ret337#1;havoc tlan_eisa_probe_#t~ret337#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-6: tlan_read_and_clear_stats_#t~ret630#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___2~3#1 := tlan_read_and_clear_stats_#t~ret630#1;havoc tlan_read_and_clear_stats_#t~mem629#1;havoc tlan_read_and_clear_stats_#t~ret630#1;tlan_read_and_clear_stats_~tx_under~0#1 := tlan_read_and_clear_stats_~tmp___2~3#1 % 256;call tlan_read_and_clear_stats_#t~mem631#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 52, (if (8 + tlan_read_and_clear_stats_#t~mem631#1) % 4294967296 % 4294967296 <= 2147483647 then (8 + tlan_read_and_clear_stats_#t~mem631#1) % 4294967296 % 4294967296 else (8 + tlan_read_and_clear_stats_#t~mem631#1) % 4294967296 % 4294967296 - 4294967296);havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-7: tlan_read_and_clear_stats_#t~ret633#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___3~2#1 := tlan_read_and_clear_stats_#t~ret633#1;havoc tlan_read_and_clear_stats_#t~mem632#1;havoc tlan_read_and_clear_stats_#t~ret633#1;tlan_read_and_clear_stats_~rx_good~0#1 := tlan_read_and_clear_stats_~tmp___3~2#1 % 256;call tlan_read_and_clear_stats_#t~mem634#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (13 + tlan_read_and_clear_stats_#t~mem634#1) % 4294967296 % 4294967296 <= 2147483647 then (13 + tlan_read_and_clear_stats_#t~mem634#1) % 4294967296 % 4294967296 else (13 + tlan_read_and_clear_stats_#t~mem634#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-4: tlan_read_and_clear_stats_#t~ret626#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___0~19#1 := tlan_read_and_clear_stats_#t~ret626#1;havoc tlan_read_and_clear_stats_#t~mem625#1;havoc tlan_read_and_clear_stats_#t~ret626#1;tlan_read_and_clear_stats_~tx_good~0#1 := tlan_read_and_clear_stats_~tx_good~0#1 + 256 * (tlan_read_and_clear_stats_~tmp___0~19#1 % 256);call tlan_read_and_clear_stats_#t~mem627#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (14 + tlan_read_and_clear_stats_#t~mem627#1) % 4294967296 % 4294967296 <= 2147483647 then (14 + tlan_read_and_clear_stats_#t~mem627#1) % 4294967296 % 4294967296 else (14 + tlan_read_and_clear_stats_#t~mem627#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-5: tlan_read_and_clear_stats_#t~ret628#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___1~7#1 := tlan_read_and_clear_stats_#t~ret628#1;havoc tlan_read_and_clear_stats_#t~mem627#1;havoc tlan_read_and_clear_stats_#t~ret628#1;tlan_read_and_clear_stats_~tx_good~0#1 := tlan_read_and_clear_stats_~tx_good~0#1 + 65536 * (tlan_read_and_clear_stats_~tmp___1~7#1 % 256);call tlan_read_and_clear_stats_#t~mem629#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (15 + tlan_read_and_clear_stats_#t~mem629#1) % 4294967296 % 4294967296 <= 2147483647 then (15 + tlan_read_and_clear_stats_#t~mem629#1) % 4294967296 % 4294967296 else (15 + tlan_read_and_clear_stats_#t~mem629#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-10: tlan_read_and_clear_stats_#t~ret639#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___6~0#1 := tlan_read_and_clear_stats_#t~ret639#1;havoc tlan_read_and_clear_stats_#t~mem638#1;havoc tlan_read_and_clear_stats_#t~ret639#1;tlan_read_and_clear_stats_~rx_over~0#1 := tlan_read_and_clear_stats_~tmp___6~0#1 % 256;call tlan_read_and_clear_stats_#t~mem640#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 56, (if (8 + tlan_read_and_clear_stats_#t~mem640#1) % 4294967296 % 4294967296 <= 2147483647 then (8 + tlan_read_and_clear_stats_#t~mem640#1) % 4294967296 % 4294967296 else (8 + tlan_read_and_clear_stats_#t~mem640#1) % 4294967296 % 4294967296 - 4294967296);havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-11: tlan_read_and_clear_stats_#t~ret642#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___7~0#1 := tlan_read_and_clear_stats_#t~ret642#1;havoc tlan_read_and_clear_stats_#t~mem641#1;havoc tlan_read_and_clear_stats_#t~ret642#1;tlan_read_and_clear_stats_~def_tx~0#1 := tlan_read_and_clear_stats_~tmp___7~0#1 % 256;call tlan_read_and_clear_stats_#t~mem643#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (13 + tlan_read_and_clear_stats_#t~mem643#1) % 4294967296 % 4294967296 <= 2147483647 then (13 + tlan_read_and_clear_stats_#t~mem643#1) % 4294967296 % 4294967296 else (13 + tlan_read_and_clear_stats_#t~mem643#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-8: tlan_read_and_clear_stats_#t~ret635#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___4~1#1 := tlan_read_and_clear_stats_#t~ret635#1;havoc tlan_read_and_clear_stats_#t~mem634#1;havoc tlan_read_and_clear_stats_#t~ret635#1;tlan_read_and_clear_stats_~rx_good~0#1 := tlan_read_and_clear_stats_~rx_good~0#1 + 256 * (tlan_read_and_clear_stats_~tmp___4~1#1 % 256);call tlan_read_and_clear_stats_#t~mem636#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (14 + tlan_read_and_clear_stats_#t~mem636#1) % 4294967296 % 4294967296 <= 2147483647 then (14 + tlan_read_and_clear_stats_#t~mem636#1) % 4294967296 % 4294967296 else (14 + tlan_read_and_clear_stats_#t~mem636#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-9: tlan_read_and_clear_stats_#t~ret637#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___5~0#1 := tlan_read_and_clear_stats_#t~ret637#1;havoc tlan_read_and_clear_stats_#t~mem636#1;havoc tlan_read_and_clear_stats_#t~ret637#1;tlan_read_and_clear_stats_~rx_good~0#1 := tlan_read_and_clear_stats_~rx_good~0#1 + 65536 * (tlan_read_and_clear_stats_~tmp___5~0#1 % 256);call tlan_read_and_clear_stats_#t~mem638#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (15 + tlan_read_and_clear_stats_#t~mem638#1) % 4294967296 % 4294967296 <= 2147483647 then (15 + tlan_read_and_clear_stats_#t~mem638#1) % 4294967296 % 4294967296 else (15 + tlan_read_and_clear_stats_#t~mem638#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-14: tlan_read_and_clear_stats_#t~ret648#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___10~0#1 := tlan_read_and_clear_stats_#t~ret648#1;havoc tlan_read_and_clear_stats_#t~mem647#1;havoc tlan_read_and_clear_stats_#t~ret648#1;tlan_read_and_clear_stats_~code~0#1 := tlan_read_and_clear_stats_~tmp___10~0#1 % 256;call tlan_read_and_clear_stats_#t~mem649#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 60, (if (8 + tlan_read_and_clear_stats_#t~mem649#1) % 4294967296 % 4294967296 <= 2147483647 then (8 + tlan_read_and_clear_stats_#t~mem649#1) % 4294967296 % 4294967296 else (8 + tlan_read_and_clear_stats_#t~mem649#1) % 4294967296 % 4294967296 - 4294967296);havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-15: tlan_read_and_clear_stats_#t~ret651#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___11~0#1 := tlan_read_and_clear_stats_#t~ret651#1;havoc tlan_read_and_clear_stats_#t~mem650#1;havoc tlan_read_and_clear_stats_#t~ret651#1;tlan_read_and_clear_stats_~multi_col~0#1 := tlan_read_and_clear_stats_~tmp___11~0#1 % 256;call tlan_read_and_clear_stats_#t~mem652#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (13 + tlan_read_and_clear_stats_#t~mem652#1) % 4294967296 % 4294967296 <= 2147483647 then (13 + tlan_read_and_clear_stats_#t~mem652#1) % 4294967296 % 4294967296 else (13 + tlan_read_and_clear_stats_#t~mem652#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-12: tlan_read_and_clear_stats_#t~ret644#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___8~0#1 := tlan_read_and_clear_stats_#t~ret644#1;havoc tlan_read_and_clear_stats_#t~mem643#1;havoc tlan_read_and_clear_stats_#t~ret644#1;tlan_read_and_clear_stats_~def_tx~0#1 := tlan_read_and_clear_stats_~def_tx~0#1 + 256 * (tlan_read_and_clear_stats_~tmp___8~0#1 % 256);call tlan_read_and_clear_stats_#t~mem645#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (14 + tlan_read_and_clear_stats_#t~mem645#1) % 4294967296 % 4294967296 <= 2147483647 then (14 + tlan_read_and_clear_stats_#t~mem645#1) % 4294967296 % 4294967296 else (14 + tlan_read_and_clear_stats_#t~mem645#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-13: tlan_read_and_clear_stats_#t~ret646#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___9~0#1 := tlan_read_and_clear_stats_#t~ret646#1;havoc tlan_read_and_clear_stats_#t~mem645#1;havoc tlan_read_and_clear_stats_#t~ret646#1;tlan_read_and_clear_stats_~crc~0#1 := tlan_read_and_clear_stats_~tmp___9~0#1 % 256;call tlan_read_and_clear_stats_#t~mem647#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (15 + tlan_read_and_clear_stats_#t~mem647#1) % 4294967296 % 4294967296 <= 2147483647 then (15 + tlan_read_and_clear_stats_#t~mem647#1) % 4294967296 % 4294967296 else (15 + tlan_read_and_clear_stats_#t~mem647#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-18: tlan_read_and_clear_stats_#t~ret657#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___14~0#1 := tlan_read_and_clear_stats_#t~ret657#1;havoc tlan_read_and_clear_stats_#t~mem656#1;havoc tlan_read_and_clear_stats_#t~ret657#1;tlan_read_and_clear_stats_~single_col~0#1 := tlan_read_and_clear_stats_~single_col~0#1 + 256 * (tlan_read_and_clear_stats_~tmp___14~0#1 % 256);call tlan_read_and_clear_stats_#t~mem658#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 64, (if (8 + tlan_read_and_clear_stats_#t~mem658#1) % 4294967296 % 4294967296 <= 2147483647 then (8 + tlan_read_and_clear_stats_#t~mem658#1) % 4294967296 % 4294967296 else (8 + tlan_read_and_clear_stats_#t~mem658#1) % 4294967296 % 4294967296 - 4294967296);havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-19: tlan_read_and_clear_stats_#t~ret660#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___15~0#1 := tlan_read_and_clear_stats_#t~ret660#1;havoc tlan_read_and_clear_stats_#t~mem659#1;havoc tlan_read_and_clear_stats_#t~ret660#1;tlan_read_and_clear_stats_~excess_col~0#1 := tlan_read_and_clear_stats_~tmp___15~0#1 % 256;call tlan_read_and_clear_stats_#t~mem661#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (13 + tlan_read_and_clear_stats_#t~mem661#1) % 4294967296 % 4294967296 <= 2147483647 then (13 + tlan_read_and_clear_stats_#t~mem661#1) % 4294967296 % 4294967296 else (13 + tlan_read_and_clear_stats_#t~mem661#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-16: tlan_read_and_clear_stats_#t~ret653#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___12~0#1 := tlan_read_and_clear_stats_#t~ret653#1;havoc tlan_read_and_clear_stats_#t~mem652#1;havoc tlan_read_and_clear_stats_#t~ret653#1;tlan_read_and_clear_stats_~multi_col~0#1 := tlan_read_and_clear_stats_~multi_col~0#1 + 256 * (tlan_read_and_clear_stats_~tmp___12~0#1 % 256);call tlan_read_and_clear_stats_#t~mem654#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (14 + tlan_read_and_clear_stats_#t~mem654#1) % 4294967296 % 4294967296 <= 2147483647 then (14 + tlan_read_and_clear_stats_#t~mem654#1) % 4294967296 % 4294967296 else (14 + tlan_read_and_clear_stats_#t~mem654#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-17: tlan_read_and_clear_stats_#t~ret655#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___13~0#1 := tlan_read_and_clear_stats_#t~ret655#1;havoc tlan_read_and_clear_stats_#t~mem654#1;havoc tlan_read_and_clear_stats_#t~ret655#1;tlan_read_and_clear_stats_~single_col~0#1 := tlan_read_and_clear_stats_~tmp___13~0#1 % 256;call tlan_read_and_clear_stats_#t~mem656#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (15 + tlan_read_and_clear_stats_#t~mem656#1) % 4294967296 % 4294967296 <= 2147483647 then (15 + tlan_read_and_clear_stats_#t~mem656#1) % 4294967296 % 4294967296 else (15 + tlan_read_and_clear_stats_#t~mem656#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-20: tlan_read_and_clear_stats_#t~ret662#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___16~0#1 := tlan_read_and_clear_stats_#t~ret662#1;havoc tlan_read_and_clear_stats_#t~mem661#1;havoc tlan_read_and_clear_stats_#t~ret662#1;tlan_read_and_clear_stats_~late_col~0#1 := tlan_read_and_clear_stats_~tmp___16~0#1 % 256;call tlan_read_and_clear_stats_#t~mem663#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (14 + tlan_read_and_clear_stats_#t~mem663#1) % 4294967296 % 4294967296 <= 2147483647 then (14 + tlan_read_and_clear_stats_#t~mem663#1) % 4294967296 % 4294967296 else (14 + tlan_read_and_clear_stats_#t~mem663#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5569-21: tlan_read_and_clear_stats_#t~ret664#1 := inb_#res#1;assume { :end_inline_inb } true;tlan_read_and_clear_stats_~tmp___17~0#1 := tlan_read_and_clear_stats_#t~ret664#1;havoc tlan_read_and_clear_stats_#t~mem663#1;havoc tlan_read_and_clear_stats_#t~ret664#1;tlan_read_and_clear_stats_~loss~0#1 := tlan_read_and_clear_stats_~tmp___17~0#1 % 256; [2021-11-23 03:40:16,509 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6101-2: assume { :begin_inline_dma_free_attrs } true;dma_free_attrs_#in~dev#1.base, dma_free_attrs_#in~dev#1.offset, dma_free_attrs_#in~size#1, dma_free_attrs_#in~vaddr#1.base, dma_free_attrs_#in~vaddr#1.offset, dma_free_attrs_#in~bus#1, dma_free_attrs_#in~attrs#1.base, dma_free_attrs_#in~attrs#1.offset := pci_free_consistent_#t~ite192#1.base, pci_free_consistent_#t~ite192#1.offset, pci_free_consistent_~size#1, pci_free_consistent_~vaddr#1.base, pci_free_consistent_~vaddr#1.offset, pci_free_consistent_~dma_handle#1, 0, 0;havoc dma_free_attrs_#t~ret121#1.base, dma_free_attrs_#t~ret121#1.offset, dma_free_attrs_#t~ret122#1, dma_free_attrs_#t~ret123#1, dma_free_attrs_#t~ret124#1, dma_free_attrs_#t~ret125#1, dma_free_attrs_#t~mem126#1.base, dma_free_attrs_#t~mem126#1.offset, dma_free_attrs_#t~mem133#1.base, dma_free_attrs_#t~mem133#1.offset, dma_free_attrs_~dev#1.base, dma_free_attrs_~dev#1.offset, dma_free_attrs_~size#1, dma_free_attrs_~vaddr#1.base, dma_free_attrs_~vaddr#1.offset, dma_free_attrs_~bus#1, dma_free_attrs_~attrs#1.base, dma_free_attrs_~attrs#1.offset, dma_free_attrs_~ops~3#1.base, dma_free_attrs_~ops~3#1.offset, dma_free_attrs_~tmp~9#1.base, dma_free_attrs_~tmp~9#1.offset, dma_free_attrs_~__ret_warn_on~0#1, dma_free_attrs_~_flags~0#1, dma_free_attrs_~tmp___0~3#1, dma_free_attrs_~tmp___1~3#1;dma_free_attrs_~dev#1.base, dma_free_attrs_~dev#1.offset := dma_free_attrs_#in~dev#1.base, dma_free_attrs_#in~dev#1.offset;dma_free_attrs_~size#1 := dma_free_attrs_#in~size#1;dma_free_attrs_~vaddr#1.base, dma_free_attrs_~vaddr#1.offset := dma_free_attrs_#in~vaddr#1.base, dma_free_attrs_#in~vaddr#1.offset;dma_free_attrs_~bus#1 := dma_free_attrs_#in~bus#1;dma_free_attrs_~attrs#1.base, dma_free_attrs_~attrs#1.offset := dma_free_attrs_#in~attrs#1.base, dma_free_attrs_#in~attrs#1.offset;havoc dma_free_attrs_~ops~3#1.base, dma_free_attrs_~ops~3#1.offset;havoc dma_free_attrs_~tmp~9#1.base, dma_free_attrs_~tmp~9#1.offset;havoc dma_free_attrs_~__ret_warn_on~0#1;havoc dma_free_attrs_~_flags~0#1;havoc dma_free_attrs_~tmp___0~3#1;havoc dma_free_attrs_~tmp___1~3#1;assume { :begin_inline_get_dma_ops } true;get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset := dma_free_attrs_~dev#1.base, dma_free_attrs_~dev#1.offset;havoc get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;havoc get_dma_ops_#t~ret74#1, get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset, get_dma_ops_#t~short76#1, get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset, get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset, get_dma_ops_~tmp~4#1;get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset := get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset;havoc get_dma_ops_~tmp~4#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 == (get_dma_ops_~dev#1.base + get_dma_ops_~dev#1.offset) % 18446744073709551616 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,509 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6101: assume 0 != (pci_free_consistent_~hwdev#1.base + pci_free_consistent_~hwdev#1.offset) % 18446744073709551616;pci_free_consistent_#t~ite192#1.base, pci_free_consistent_#t~ite192#1.offset := pci_free_consistent_~hwdev#1.base, 179 + pci_free_consistent_~hwdev#1.offset; [2021-11-23 03:40:16,509 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6101: assume !(0 != (pci_free_consistent_~hwdev#1.base + pci_free_consistent_~hwdev#1.offset) % 18446744073709551616);pci_free_consistent_#t~ite192#1.base, pci_free_consistent_#t~ite192#1.offset := 0, 0; [2021-11-23 03:40:16,509 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6104: assume { :end_inline_pci_free_consistent } true;havoc tlan_probe1_#t~mem314#1.base, tlan_probe1_#t~mem314#1.offset;havoc tlan_probe1_#t~mem315#1;havoc tlan_probe1_#t~mem316#1.base, tlan_probe1_#t~mem316#1.offset;havoc tlan_probe1_#t~mem317#1; [2021-11-23 03:40:16,509 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6637-2: assume { :begin_inline_ldv_alloc_etherdev_mqs_94 } true;ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg1#1, ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg2#1, ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg3#1 := 512, 1, 1;havoc ldv_alloc_etherdev_mqs_94_#res#1.base, ldv_alloc_etherdev_mqs_94_#res#1.offset;havoc ldv_alloc_etherdev_mqs_94_#t~ret1083#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1083#1.offset, ldv_alloc_etherdev_mqs_94_#t~ret1084#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1084#1.offset, ldv_alloc_etherdev_mqs_94_~ldv_func_arg1#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg2#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg3#1, ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.base, ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.offset, ldv_alloc_etherdev_mqs_94_~tmp~94#1.base, ldv_alloc_etherdev_mqs_94_~tmp~94#1.offset, ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.base, ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.offset;ldv_alloc_etherdev_mqs_94_~ldv_func_arg1#1 := ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg1#1;ldv_alloc_etherdev_mqs_94_~ldv_func_arg2#1 := ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg2#1;ldv_alloc_etherdev_mqs_94_~ldv_func_arg3#1 := ldv_alloc_etherdev_mqs_94_#in~ldv_func_arg3#1;havoc ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.base, ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.offset;havoc ldv_alloc_etherdev_mqs_94_~tmp~94#1.base, ldv_alloc_etherdev_mqs_94_~tmp~94#1.offset;havoc ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.base, ldv_alloc_etherdev_mqs_94_~tmp___0~36#1.offset;assume { :begin_inline_alloc_etherdev_mqs } true;alloc_etherdev_mqs_#in~arg0#1, alloc_etherdev_mqs_#in~arg1#1, alloc_etherdev_mqs_#in~arg2#1 := ldv_alloc_etherdev_mqs_94_~ldv_func_arg1#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg2#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg3#1;havoc alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;havoc alloc_etherdev_mqs_#t~ret1193#1.base, alloc_etherdev_mqs_#t~ret1193#1.offset, alloc_etherdev_mqs_~arg0#1, alloc_etherdev_mqs_~arg1#1, alloc_etherdev_mqs_~arg2#1;alloc_etherdev_mqs_~arg0#1 := alloc_etherdev_mqs_#in~arg0#1;alloc_etherdev_mqs_~arg1#1 := alloc_etherdev_mqs_#in~arg1#1;alloc_etherdev_mqs_~arg2#1 := alloc_etherdev_mqs_#in~arg2#1;assume { :begin_inline_ldv_malloc } true;ldv_malloc_#in~size#1 := 3027;havoc ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;havoc ldv_malloc_#t~ret1111#1, ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset, ldv_malloc_#t~ret1113#1, ldv_malloc_~size#1, ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset, ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset, ldv_malloc_~tmp___0~40#1, ldv_malloc_~tmp___1~16#1;ldv_malloc_~size#1 := ldv_malloc_#in~size#1;havoc ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset;havoc ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset;havoc ldv_malloc_~tmp___0~40#1;havoc ldv_malloc_~tmp___1~16#1;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6637: assume 0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616;assume { :begin_inline_pci_enable_device } true;pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset;havoc pci_enable_device_#res#1;havoc pci_enable_device_#t~nondet1207#1, pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset;pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset := pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset;assume -2147483648 <= pci_enable_device_#t~nondet1207#1 && pci_enable_device_#t~nondet1207#1 <= 2147483647;pci_enable_device_#res#1 := pci_enable_device_#t~nondet1207#1;havoc pci_enable_device_#t~nondet1207#1; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6637: assume !(0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616); [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6641: assume 0 != tlan_probe1_~rc~1#1;tlan_probe1_#res#1 := tlan_probe1_~rc~1#1;call ULTIMATE.dealloc(tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset);havoc tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset);havoc tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset);havoc tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6641: assume !(0 != tlan_probe1_~rc~1#1);assume { :begin_inline_pci_request_regions } true;pci_request_regions_#in~arg0#1.base, pci_request_regions_#in~arg0#1.offset, pci_request_regions_#in~arg1#1.base, pci_request_regions_#in~arg1#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset, ~#tlan_signature~0.base, ~#tlan_signature~0.offset;havoc pci_request_regions_#res#1;havoc pci_request_regions_#t~nondet1208#1, pci_request_regions_~arg0#1.base, pci_request_regions_~arg0#1.offset, pci_request_regions_~arg1#1.base, pci_request_regions_~arg1#1.offset;pci_request_regions_~arg0#1.base, pci_request_regions_~arg0#1.offset := pci_request_regions_#in~arg0#1.base, pci_request_regions_#in~arg0#1.offset;pci_request_regions_~arg1#1.base, pci_request_regions_~arg1#1.offset := pci_request_regions_#in~arg1#1.base, pci_request_regions_#in~arg1#1.offset;assume -2147483648 <= pci_request_regions_#t~nondet1208#1 && pci_request_regions_#t~nondet1208#1 <= 2147483647;pci_request_regions_#res#1 := pci_request_regions_#t~nondet1208#1;havoc pci_request_regions_#t~nondet1208#1; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6113-2: assume { :begin_inline_dma_map_single_attrs } true;dma_map_single_attrs_#in~dev#1.base, dma_map_single_attrs_#in~dev#1.offset, dma_map_single_attrs_#in~ptr#1.base, dma_map_single_attrs_#in~ptr#1.offset, dma_map_single_attrs_#in~size#1, dma_map_single_attrs_#in~dir#1, dma_map_single_attrs_#in~attrs#1.base, dma_map_single_attrs_#in~attrs#1.offset := pci_map_single_#t~ite193#1.base, pci_map_single_#t~ite193#1.offset, pci_map_single_~ptr#1.base, pci_map_single_~ptr#1.offset, pci_map_single_~size#1, pci_map_single_~direction#1, 0, 0;havoc dma_map_single_attrs_#res#1;havoc dma_map_single_attrs_#t~ret78#1.base, dma_map_single_attrs_#t~ret78#1.offset, dma_map_single_attrs_#t~ret79#1, dma_map_single_attrs_#t~ret80#1, dma_map_single_attrs_#t~ret81#1, dma_map_single_attrs_#t~mem89#1.base, dma_map_single_attrs_#t~mem89#1.offset, dma_map_single_attrs_#t~ret90#1, dma_map_single_attrs_#t~ret91#1, dma_map_single_attrs_~dev#1.base, dma_map_single_attrs_~dev#1.offset, dma_map_single_attrs_~ptr#1.base, dma_map_single_attrs_~ptr#1.offset, dma_map_single_attrs_~size#1, dma_map_single_attrs_~dir#1, dma_map_single_attrs_~attrs#1.base, dma_map_single_attrs_~attrs#1.offset, dma_map_single_attrs_~ops~0#1.base, dma_map_single_attrs_~ops~0#1.offset, dma_map_single_attrs_~tmp~5#1.base, dma_map_single_attrs_~tmp~5#1.offset, dma_map_single_attrs_~addr~0#1, dma_map_single_attrs_~tmp___0~0#1, dma_map_single_attrs_~tmp___1~0#1, dma_map_single_attrs_~tmp___2~0#1, dma_map_single_attrs_~tmp___3~0#1;dma_map_single_attrs_~dev#1.base, dma_map_single_attrs_~dev#1.offset := dma_map_single_attrs_#in~dev#1.base, dma_map_single_attrs_#in~dev#1.offset;dma_map_single_attrs_~ptr#1.base, dma_map_single_attrs_~ptr#1.offset := dma_map_single_attrs_#in~ptr#1.base, dma_map_single_attrs_#in~ptr#1.offset;dma_map_single_attrs_~size#1 := dma_map_single_attrs_#in~size#1;dma_map_single_attrs_~dir#1 := dma_map_single_attrs_#in~dir#1;dma_map_single_attrs_~attrs#1.base, dma_map_single_attrs_~attrs#1.offset := dma_map_single_attrs_#in~attrs#1.base, dma_map_single_attrs_#in~attrs#1.offset;havoc dma_map_single_attrs_~ops~0#1.base, dma_map_single_attrs_~ops~0#1.offset;havoc dma_map_single_attrs_~tmp~5#1.base, dma_map_single_attrs_~tmp~5#1.offset;havoc dma_map_single_attrs_~addr~0#1;havoc dma_map_single_attrs_~tmp___0~0#1;havoc dma_map_single_attrs_~tmp___1~0#1;havoc dma_map_single_attrs_~tmp___2~0#1;havoc dma_map_single_attrs_~tmp___3~0#1;assume { :begin_inline_get_dma_ops } true;get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset := dma_map_single_attrs_~dev#1.base, dma_map_single_attrs_~dev#1.offset;havoc get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;havoc get_dma_ops_#t~ret74#1, get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset, get_dma_ops_#t~short76#1, get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset, get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset, get_dma_ops_~tmp~4#1;get_dma_ops_~dev#1.base, get_dma_ops_~dev#1.offset := get_dma_ops_#in~dev#1.base, get_dma_ops_#in~dev#1.offset;havoc get_dma_ops_~tmp~4#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 == (get_dma_ops_~dev#1.base + get_dma_ops_~dev#1.offset) % 18446744073709551616 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6113: assume 0 != (pci_map_single_~hwdev#1.base + pci_map_single_~hwdev#1.offset) % 18446744073709551616;pci_map_single_#t~ite193#1.base, pci_map_single_#t~ite193#1.offset := pci_map_single_~hwdev#1.base, 179 + pci_map_single_~hwdev#1.offset; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6113: assume !(0 != (pci_map_single_~hwdev#1.base + pci_map_single_~hwdev#1.offset) % 18446744073709551616);pci_map_single_#t~ite193#1.base, pci_map_single_#t~ite193#1.offset := 0, 0; [2021-11-23 03:40:16,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12985: assume 2 == ~ldv_spin__xmit_lock_of_netdev_queue~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12985: assume !(2 == ~ldv_spin__xmit_lock_of_netdev_queue~0); [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6116: tlan_reset_lists_#t~ret594#1 := pci_map_single_#res#1;assume { :end_inline_pci_map_single } true;tlan_reset_lists_~tmp___0~18#1 := tlan_reset_lists_#t~ret594#1;havoc tlan_reset_lists_#t~mem592#1.base, tlan_reset_lists_#t~mem592#1.offset;havoc tlan_reset_lists_#t~mem593#1.base, tlan_reset_lists_#t~mem593#1.offset;havoc tlan_reset_lists_#t~ret594#1;call write~int(tlan_reset_lists_~tmp___0~18#1, tlan_reset_lists_~list~0#1.base, 12 + tlan_reset_lists_~list~0#1.offset, 4);assume { :begin_inline_tlan_store_skb } true;tlan_store_skb_#in~tag#1.base, tlan_store_skb_#in~tag#1.offset, tlan_store_skb_#in~skb#1.base, tlan_store_skb_#in~skb#1.offset := tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset, tlan_reset_lists_~skb~3#1.base, tlan_reset_lists_~skb~3#1.offset;havoc tlan_store_skb_~tag#1.base, tlan_store_skb_~tag#1.offset, tlan_store_skb_~skb#1.base, tlan_store_skb_~skb#1.offset, tlan_store_skb_~addr~1#1;tlan_store_skb_~tag#1.base, tlan_store_skb_~tag#1.offset := tlan_store_skb_#in~tag#1.base, tlan_store_skb_#in~tag#1.offset;tlan_store_skb_~skb#1.base, tlan_store_skb_~skb#1.offset := tlan_store_skb_#in~skb#1.base, tlan_store_skb_#in~skb#1.offset;havoc tlan_store_skb_~addr~1#1;tlan_store_skb_~addr~1#1 := tlan_store_skb_~skb#1.base + tlan_store_skb_~skb#1.offset;call write~int(tlan_store_skb_~addr~1#1, tlan_store_skb_~tag#1.base, 84 + tlan_store_skb_~tag#1.offset, 4);call write~int(tlan_store_skb_~addr~1#1 / 4294967296, tlan_store_skb_~tag#1.base, 76 + tlan_store_skb_~tag#1.offset, 4); [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12989: assume 2 == ~ldv_spin_addr_list_lock_of_net_device~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12989: assume !(2 == ~ldv_spin_addr_list_lock_of_net_device~0); [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6648: assume 0 != tlan_probe1_~rc~1#1;havoc tlan_probe1_#t~nondet275#1; [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6648: assume !(0 != tlan_probe1_~rc~1#1); [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12993: assume 2 == ~ldv_spin_alloc_lock_of_task_struct~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12993: assume !(2 == ~ldv_spin_alloc_lock_of_task_struct~0); [2021-11-23 03:40:16,511 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12997: assume 2 == ~ldv_spin_i_lock_of_inode~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12997: assume !(2 == ~ldv_spin_i_lock_of_inode~0); [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10883: assume { :end_inline_ldv_switch_automaton_state_0_6 } true; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599: assume { :end_inline_outw } true;tlan_ee_send_start_~sio~5#1 := 13 + tlan_ee_send_start_~io_base#1 % 65536; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-1: assume { :end_inline_outw } true;tlan_ee_send_byte_~sio~6#1 := 13 + tlan_ee_send_byte_~io_base#1 % 65536;tlan_ee_send_byte_~place~0#1 := 128; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-4: assume { :end_inline_outw } true;tlan_ee_send_byte_~sio~6#1 := 13 + tlan_ee_send_byte_~io_base#1 % 65536;tlan_ee_send_byte_~place~0#1 := 128; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-5: assume { :end_inline_outw } true;tlan_ee_receive_byte_~sio~7#1 := 13 + tlan_ee_receive_byte_~io_base#1 % 65536;call write~int(0, tlan_ee_receive_byte_~data#1.base, tlan_ee_receive_byte_~data#1.offset, 1); [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-2: assume { :end_inline_outw } true;tlan_ee_send_byte_~sio~6#1 := 13 + tlan_ee_send_byte_~io_base#1 % 65536;tlan_ee_send_byte_~place~0#1 := 128; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-3: assume { :end_inline_outw } true;tlan_ee_send_start_~sio~5#1 := 13 + tlan_ee_send_start_~io_base#1 % 65536; [2021-11-23 03:40:16,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-8: assume { :end_inline_outw } true;havoc tlan_read_and_clear_stats_#t~mem631#1;call tlan_read_and_clear_stats_#t~mem632#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (12 + tlan_read_and_clear_stats_#t~mem632#1) % 4294967296 % 4294967296 <= 2147483647 then (12 + tlan_read_and_clear_stats_#t~mem632#1) % 4294967296 % 4294967296 else (12 + tlan_read_and_clear_stats_#t~mem632#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-9: assume { :end_inline_outw } true;havoc tlan_read_and_clear_stats_#t~mem640#1;call tlan_read_and_clear_stats_#t~mem641#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (12 + tlan_read_and_clear_stats_#t~mem641#1) % 4294967296 % 4294967296 <= 2147483647 then (12 + tlan_read_and_clear_stats_#t~mem641#1) % 4294967296 % 4294967296 else (12 + tlan_read_and_clear_stats_#t~mem641#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-6: assume { :end_inline_outw } true;assume { :begin_inline_inb } true;inb_#in~port#1 := 12 + tlan_dio_read8_~base_addr#1 % 65536 + ~bitwiseAnd(tlan_dio_read8_~internal_addr#1 % 65536, 3);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-7: assume { :end_inline_outw } true;havoc tlan_read_and_clear_stats_#t~mem622#1;call tlan_read_and_clear_stats_#t~mem623#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (12 + tlan_read_and_clear_stats_#t~mem623#1) % 4294967296 % 4294967296 <= 2147483647 then (12 + tlan_read_and_clear_stats_#t~mem623#1) % 4294967296 % 4294967296 else (12 + tlan_read_and_clear_stats_#t~mem623#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-10: assume { :end_inline_outw } true;havoc tlan_read_and_clear_stats_#t~mem649#1;call tlan_read_and_clear_stats_#t~mem650#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (12 + tlan_read_and_clear_stats_#t~mem650#1) % 4294967296 % 4294967296 <= 2147483647 then (12 + tlan_read_and_clear_stats_#t~mem650#1) % 4294967296 % 4294967296 else (12 + tlan_read_and_clear_stats_#t~mem650#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5599-11: assume { :end_inline_outw } true;havoc tlan_read_and_clear_stats_#t~mem658#1;call tlan_read_and_clear_stats_#t~mem659#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 56 + tlan_read_and_clear_stats_~dev#1.offset, 8);assume { :begin_inline_inb } true;inb_#in~port#1 := (if (12 + tlan_read_and_clear_stats_#t~mem659#1) % 4294967296 % 4294967296 <= 2147483647 then (12 + tlan_read_and_clear_stats_#t~mem659#1) % 4294967296 % 4294967296 else (12 + tlan_read_and_clear_stats_#t~mem659#1) % 4294967296 % 4294967296 - 4294967296);havoc inb_#res#1;havoc inb_~port#1, inb_~value~0#1;inb_~port#1 := inb_#in~port#1;havoc inb_~value~0#1;inb_#res#1 := inb_~value~0#1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13001: assume 2 == ~ldv_spin_lock~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13001: assume !(2 == ~ldv_spin_lock~0); [2021-11-23 03:40:16,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9830: assume { :end_inline_ldv_dispatch_irq_register_10_2 } true;ldv_request_irq_#res#1 := ldv_request_irq_~arg0#1; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6660: assume 0 == (tlan_probe1_~dev~3#1.base + tlan_probe1_~dev~3#1.offset) % 18446744073709551616;tlan_probe1_~rc~1#1 := -12; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6660: assume !(0 == (tlan_probe1_~dev~3#1.base + tlan_probe1_~dev~3#1.offset) % 18446744073709551616);call write~$Pointer$(tlan_probe1_~pdev#1.base, 179 + tlan_probe1_~pdev#1.offset, tlan_probe1_~dev~3#1.base, 1236 + tlan_probe1_~dev~3#1.offset, 8);assume { :begin_inline_netdev_priv } true;netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset := tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc netdev_priv_#res#1.base, netdev_priv_#res#1.offset;havoc netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset;netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset := netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset;netdev_priv_#res#1.base, netdev_priv_#res#1.offset := netdev_priv_~dev#1.base, 3200 + netdev_priv_~dev#1.offset; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13005: assume 2 == ~ldv_spin_lock_of_NOT_ARG_SIGN~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13005: assume !(2 == ~ldv_spin_lock_of_NOT_ARG_SIGN~0); [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5607: tlan_eisa_probe_#t~ret327#1 := inw_#res#1;assume { :end_inline_inw } true;tlan_eisa_probe_~tmp~35#1 := tlan_eisa_probe_#t~ret327#1;havoc tlan_eisa_probe_#t~ret327#1;havoc tlan_eisa_probe_#t~nondet328#1; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5607-1: tlan_eisa_probe_#t~ret329#1 := inw_#res#1;assume { :end_inline_inw } true;tlan_eisa_probe_~tmp___0~12#1 := tlan_eisa_probe_#t~ret329#1;havoc tlan_eisa_probe_#t~ret329#1;havoc tlan_eisa_probe_#t~nondet330#1; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5607-4: tlan_probe1_#t~ret287#1 := inw_#res#1;assume { :end_inline_inw } true;tlan_probe1_~device_id~0#1 := tlan_probe1_#t~ret287#1;havoc tlan_probe1_#t~ret287#1; [2021-11-23 03:40:16,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5607-2: tlan_eisa_probe_#t~ret333#1 := inw_#res#1;assume { :end_inline_inw } true;tlan_eisa_probe_~tmp___2~2#1 := tlan_eisa_probe_#t~ret333#1;havoc tlan_eisa_probe_#t~ret333#1; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5607-3: tlan_eisa_probe_#t~ret334#1 := inw_#res#1;assume { :end_inline_inw } true;tlan_eisa_probe_~device_id~1#1 := tlan_eisa_probe_#t~ret334#1;havoc tlan_eisa_probe_#t~ret334#1; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6137: tlan_probe1_#t~ret279#1 := pci_set_dma_mask_#res#1;assume { :end_inline_pci_set_dma_mask } true;assume -2147483648 <= tlan_probe1_#t~ret279#1 && tlan_probe1_#t~ret279#1 <= 2147483647;tlan_probe1_~rc~1#1 := tlan_probe1_#t~ret279#1;havoc tlan_probe1_#t~ret279#1; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13009: assume 2 == ~ldv_spin_lock_of_tlan_priv~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13009: assume !(2 == ~ldv_spin_lock_of_tlan_priv~0); [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10897: assume { :end_inline_ldv_switch_automaton_state_1_5 } true; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13013: assume 2 == ~ldv_spin_lru_lock_of_netns_frags~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13013: assume !(2 == ~ldv_spin_lru_lock_of_netns_frags~0); [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6672-2: call tlan_probe1_#t~mem288#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8); [2021-11-23 03:40:16,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6672: assume 0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616;tlan_probe1_~pci_io_base~0#1 := 0;call tlan_probe1_#t~mem278#1 := read~int(tlan_probe1_~ent#1.base, 24 + tlan_probe1_~ent#1.offset, 8);call write~$Pointer$(~#board_info~0.base, ~#board_info~0.offset + 14 * (if tlan_probe1_#t~mem278#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then tlan_probe1_#t~mem278#1 % 18446744073709551616 % 18446744073709551616 else tlan_probe1_#t~mem278#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), tlan_probe1_~priv~3#1.base, 280 + tlan_probe1_~priv~3#1.offset, 8);havoc tlan_probe1_#t~mem278#1;assume { :begin_inline_pci_set_dma_mask } true;pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset, pci_set_dma_mask_#in~mask#1 := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset, 4294967295;havoc pci_set_dma_mask_#res#1;havoc pci_set_dma_mask_#t~ret196#1, pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1, pci_set_dma_mask_~tmp~22#1;pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset := pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset;pci_set_dma_mask_~mask#1 := pci_set_dma_mask_#in~mask#1;havoc pci_set_dma_mask_~tmp~22#1;assume { :begin_inline_dma_set_mask } true;dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset, dma_set_mask_#in~arg1#1 := pci_set_dma_mask_~dev#1.base, 179 + pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1;havoc dma_set_mask_#res#1;havoc dma_set_mask_#t~nondet1196#1, dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset, dma_set_mask_~arg1#1;dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset := dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset;dma_set_mask_~arg1#1 := dma_set_mask_#in~arg1#1;assume -2147483648 <= dma_set_mask_#t~nondet1196#1 && dma_set_mask_#t~nondet1196#1 <= 2147483647;dma_set_mask_#res#1 := dma_set_mask_#t~nondet1196#1;havoc dma_set_mask_#t~nondet1196#1; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6672: assume !(0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616);assume { :begin_inline_inw } true;inw_#in~port#1 := (if (3202 + tlan_probe1_~ioaddr#1) % 4294967296 % 4294967296 <= 2147483647 then (3202 + tlan_probe1_~ioaddr#1) % 4294967296 % 4294967296 else (3202 + tlan_probe1_~ioaddr#1) % 4294967296 % 4294967296 - 4294967296);havoc inw_#res#1;havoc inw_~port#1, inw_~value~2#1;inw_~port#1 := inw_#in~port#1;havoc inw_~value~2#1;inw_#res#1 := inw_~value~2#1; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13017: assume 2 == ~ldv_spin_node_size_lock_of_pglist_data~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13017: assume !(2 == ~ldv_spin_node_size_lock_of_pglist_data~0); [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6678: assume 0 != tlan_probe1_~rc~1#1;havoc tlan_probe1_#t~nondet280#1; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6678: assume !(0 != tlan_probe1_~rc~1#1);tlan_probe1_~reg~0#1 := 0; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13021: assume 2 == ~ldv_spin_ptl~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13021: assume !(2 == ~ldv_spin_ptl~0); [2021-11-23 03:40:16,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9850: assume { :end_inline_ldv_dispatch_register_9_4 } true; [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13025: assume 2 == ~ldv_spin_siglock_of_sighand_struct~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13025: assume !(2 == ~ldv_spin_siglock_of_sighand_struct~0); [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6156: assume { :end_inline_pci_set_drvdata } true; [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9328-3: tlan_ee_send_start_~tmp~66#1 := tlan_ee_send_start_#t~ret947#1;havoc tlan_ee_send_start_#t~ret947#1; [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9328: SUMMARY for call tlan_ee_send_start_#t~ret947#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9328-1: tlan_ee_send_start_~tmp~66#1 := tlan_ee_send_start_#t~ret947#1;havoc tlan_ee_send_start_#t~ret947#1; [2021-11-23 03:40:16,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9328-2: SUMMARY for call tlan_ee_send_start_#t~ret947#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9329: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9329-1: SUMMARY for call tlan_ee_send_start_#t~ret948#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9329-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp~66#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9329-3: SUMMARY for call tlan_ee_send_start_#t~ret948#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13029: assume 2 == ~ldv_spin_tx_global_lock_of_net_device~0;ldv_exclusive_spin_is_locked_#res#1 := 1; [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13029: assume !(2 == ~ldv_spin_tx_global_lock_of_net_device~0);ldv_exclusive_spin_is_locked_#res#1 := 0; [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9330: tlan_ee_send_start_~tmp___0~26#1 := tlan_ee_send_start_#t~ret948#1;havoc tlan_ee_send_start_#t~ret948#1; [2021-11-23 03:40:16,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9330-1: tlan_ee_send_start_~tmp___0~26#1 := tlan_ee_send_start_#t~ret948#1;havoc tlan_ee_send_start_#t~ret948#1; [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5631: assume { :end_inline_kmemcheck_mark_initialized } true;assume { :begin_inline_valid_dma_direction } true;valid_dma_direction_#in~dma_direction#1 := dma_map_single_attrs_~dir#1;havoc valid_dma_direction_#res#1;havoc valid_dma_direction_~dma_direction#1;valid_dma_direction_~dma_direction#1 := valid_dma_direction_#in~dma_direction#1;valid_dma_direction_#res#1 := (if valid_dma_direction_~dma_direction#1 % 4294967296 <= 2 then 1 else 0); [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6688: assume 0 != ~bitwiseAnd(tlan_probe1_#t~mem281#1, 256) % 18446744073709551616;havoc tlan_probe1_#t~mem281#1;call tlan_probe1_#t~mem282#1 := read~int(tlan_probe1_~pdev#1.base, 1551 + tlan_probe1_~pdev#1.offset + 56 * tlan_probe1_~reg~0#1, 8);tlan_probe1_~pci_io_base~0#1 := tlan_probe1_#t~mem282#1;havoc tlan_probe1_#t~mem282#1; [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6688: assume !(0 != ~bitwiseAnd(tlan_probe1_#t~mem281#1, 256) % 18446744073709551616);havoc tlan_probe1_#t~mem281#1;tlan_probe1_~reg~0#1 := 1 + tlan_probe1_~reg~0#1; [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9331: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9331-1: SUMMARY for call tlan_ee_send_start_#t~ret949#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9331-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp___0~26#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9331-3: SUMMARY for call tlan_ee_send_start_#t~ret949#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9332: tlan_ee_send_start_~tmp___1~12#1 := tlan_ee_send_start_#t~ret949#1;havoc tlan_ee_send_start_#t~ret949#1; [2021-11-23 03:40:16,519 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9332-1: tlan_ee_send_start_~tmp___1~12#1 := tlan_ee_send_start_#t~ret949#1;havoc tlan_ee_send_start_#t~ret949#1; [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6690: assume 0 != ~bitwiseAnd(~debug~0, 1);havoc tlan_probe1_#t~nondet283#1; [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6690: assume !(0 != ~bitwiseAnd(~debug~0, 1)); [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9333: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9333-1: SUMMARY for call tlan_ee_send_start_#t~ret950#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9333-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_start_~tmp___1~12#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9333-3: SUMMARY for call tlan_ee_send_start_#t~ret950#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13033: ldv_check_alloc_flags_#t~ret1089#1 := ldv_exclusive_spin_is_locked_#res#1;assume { :end_inline_ldv_exclusive_spin_is_locked } true;assume -2147483648 <= ldv_check_alloc_flags_#t~ret1089#1 && ldv_check_alloc_flags_#t~ret1089#1 <= 2147483647;ldv_check_alloc_flags_~tmp~97#1 := ldv_check_alloc_flags_#t~ret1089#1;havoc ldv_check_alloc_flags_#t~ret1089#1;assume { :begin_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true;ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1 := (if 0 == ldv_check_alloc_flags_~tmp~97#1 then 1 else 0);havoc ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1;ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1 := ldv_assert_linux_alloc_spinlock__wrong_flags_#in~expr#1; [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9334-1: tlan_ee_send_start_~tmp___2~7#1 := tlan_ee_send_start_#t~ret950#1;havoc tlan_ee_send_start_#t~ret950#1; [2021-11-23 03:40:16,520 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9334: tlan_ee_send_start_~tmp___2~7#1 := tlan_ee_send_start_#t~ret950#1;havoc tlan_ee_send_start_#t~ret950#1; [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9335-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_start_~tmp___2~7#1 % 256, 239), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9335-3: SUMMARY for call tlan_ee_send_start_#t~ret951#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9335: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_start_~tmp___2~7#1 % 256, 239), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9335-1: SUMMARY for call tlan_ee_send_start_#t~ret951#1 := inb_p(tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9336: tlan_ee_send_start_~tmp___3~6#1 := tlan_ee_send_start_#t~ret951#1;havoc tlan_ee_send_start_#t~ret951#1; [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9336-1: tlan_ee_send_start_~tmp___3~6#1 := tlan_ee_send_start_#t~ret951#1;havoc tlan_ee_send_start_#t~ret951#1; [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5637: dma_map_single_attrs_#t~ret79#1 := valid_dma_direction_#res#1;assume { :end_inline_valid_dma_direction } true;assume -2147483648 <= dma_map_single_attrs_#t~ret79#1 && dma_map_single_attrs_#t~ret79#1 <= 2147483647;dma_map_single_attrs_~tmp___0~0#1 := dma_map_single_attrs_#t~ret79#1;havoc dma_map_single_attrs_#t~ret79#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 == dma_map_single_attrs_~tmp___0~0#1 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,521 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9337: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_start_~tmp___3~6#1 % 256, 191), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9337-1: assume { :end_inline_tlan_ee_send_start } true;havoc tlan_ee_read_byte_#t~mem980#1;call tlan_ee_read_byte_#t~mem981#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_send_byte } true;tlan_ee_send_byte_#in~io_base#1, tlan_ee_send_byte_#in~data#1, tlan_ee_send_byte_#in~stop#1 := tlan_ee_read_byte_#t~mem981#1 % 65536, 160, 0;havoc tlan_ee_send_byte_#res#1;havoc tlan_ee_send_byte_#t~ret952#1, tlan_ee_send_byte_#t~ret953#1, tlan_ee_send_byte_#t~ret954#1, tlan_ee_send_byte_#t~ret955#1, tlan_ee_send_byte_#t~ret956#1, tlan_ee_send_byte_#t~ret957#1, tlan_ee_send_byte_#t~ret958#1, tlan_ee_send_byte_#t~ret959#1, tlan_ee_send_byte_#t~ret960#1, tlan_ee_send_byte_#t~ret961#1, tlan_ee_send_byte_#t~ret962#1, tlan_ee_send_byte_#t~ret963#1, tlan_ee_send_byte_~io_base#1, tlan_ee_send_byte_~data#1, tlan_ee_send_byte_~stop#1, tlan_ee_send_byte_~err~3#1, tlan_ee_send_byte_~place~0#1, tlan_ee_send_byte_~sio~6#1, tlan_ee_send_byte_~tmp~67#1, tlan_ee_send_byte_~tmp___0~27#1, tlan_ee_send_byte_~tmp___1~13#1, tlan_ee_send_byte_~tmp___2~8#1, tlan_ee_send_byte_~tmp___3~7#1, tlan_ee_send_byte_~tmp___4~5#1, tlan_ee_send_byte_~tmp___5~4#1, tlan_ee_send_byte_~tmp___6~3#1, tlan_ee_send_byte_~tmp___7~2#1, tlan_ee_send_byte_~tmp___8~2#1, tlan_ee_send_byte_~tmp___9~2#1, tlan_ee_send_byte_~tmp___10~2#1;tlan_ee_send_byte_~io_base#1 := tlan_ee_send_byte_#in~io_base#1;tlan_ee_send_byte_~data#1 := tlan_ee_send_byte_#in~data#1;tlan_ee_send_byte_~stop#1 := tlan_ee_send_byte_#in~stop#1;havoc tlan_ee_send_byte_~err~3#1;havoc tlan_ee_send_byte_~place~0#1;havoc tlan_ee_send_byte_~sio~6#1;havoc tlan_ee_send_byte_~tmp~67#1;havoc tlan_ee_send_byte_~tmp___0~27#1;havoc tlan_ee_send_byte_~tmp___1~13#1;havoc tlan_ee_send_byte_~tmp___2~8#1;havoc tlan_ee_send_byte_~tmp___3~7#1;havoc tlan_ee_send_byte_~tmp___4~5#1;havoc tlan_ee_send_byte_~tmp___5~4#1;havoc tlan_ee_send_byte_~tmp___6~3#1;havoc tlan_ee_send_byte_~tmp___7~2#1;havoc tlan_ee_send_byte_~tmp___8~2#1;havoc tlan_ee_send_byte_~tmp___9~2#1;havoc tlan_ee_send_byte_~tmp___10~2#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_send_byte_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9337-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_start_~tmp___3~6#1 % 256, 191), tlan_ee_send_start_~sio~5#1 % 65536); srcloc: null [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9337-3: assume { :end_inline_tlan_ee_send_start } true;havoc tlan_ee_read_byte_#t~mem985#1;call tlan_ee_read_byte_#t~mem986#1 := read~int(tlan_ee_read_byte_~dev#1.base, 56 + tlan_ee_read_byte_~dev#1.offset, 8);assume { :begin_inline_tlan_ee_send_byte } true;tlan_ee_send_byte_#in~io_base#1, tlan_ee_send_byte_#in~data#1, tlan_ee_send_byte_#in~stop#1 := tlan_ee_read_byte_#t~mem986#1 % 65536, 161, 0;havoc tlan_ee_send_byte_#res#1;havoc tlan_ee_send_byte_#t~ret952#1, tlan_ee_send_byte_#t~ret953#1, tlan_ee_send_byte_#t~ret954#1, tlan_ee_send_byte_#t~ret955#1, tlan_ee_send_byte_#t~ret956#1, tlan_ee_send_byte_#t~ret957#1, tlan_ee_send_byte_#t~ret958#1, tlan_ee_send_byte_#t~ret959#1, tlan_ee_send_byte_#t~ret960#1, tlan_ee_send_byte_#t~ret961#1, tlan_ee_send_byte_#t~ret962#1, tlan_ee_send_byte_#t~ret963#1, tlan_ee_send_byte_~io_base#1, tlan_ee_send_byte_~data#1, tlan_ee_send_byte_~stop#1, tlan_ee_send_byte_~err~3#1, tlan_ee_send_byte_~place~0#1, tlan_ee_send_byte_~sio~6#1, tlan_ee_send_byte_~tmp~67#1, tlan_ee_send_byte_~tmp___0~27#1, tlan_ee_send_byte_~tmp___1~13#1, tlan_ee_send_byte_~tmp___2~8#1, tlan_ee_send_byte_~tmp___3~7#1, tlan_ee_send_byte_~tmp___4~5#1, tlan_ee_send_byte_~tmp___5~4#1, tlan_ee_send_byte_~tmp___6~3#1, tlan_ee_send_byte_~tmp___7~2#1, tlan_ee_send_byte_~tmp___8~2#1, tlan_ee_send_byte_~tmp___9~2#1, tlan_ee_send_byte_~tmp___10~2#1;tlan_ee_send_byte_~io_base#1 := tlan_ee_send_byte_#in~io_base#1;tlan_ee_send_byte_~data#1 := tlan_ee_send_byte_#in~data#1;tlan_ee_send_byte_~stop#1 := tlan_ee_send_byte_#in~stop#1;havoc tlan_ee_send_byte_~err~3#1;havoc tlan_ee_send_byte_~place~0#1;havoc tlan_ee_send_byte_~sio~6#1;havoc tlan_ee_send_byte_~tmp~67#1;havoc tlan_ee_send_byte_~tmp___0~27#1;havoc tlan_ee_send_byte_~tmp___1~13#1;havoc tlan_ee_send_byte_~tmp___2~8#1;havoc tlan_ee_send_byte_~tmp___3~7#1;havoc tlan_ee_send_byte_~tmp___4~5#1;havoc tlan_ee_send_byte_~tmp___5~4#1;havoc tlan_ee_send_byte_~tmp___6~3#1;havoc tlan_ee_send_byte_~tmp___7~2#1;havoc tlan_ee_send_byte_~tmp___8~2#1;havoc tlan_ee_send_byte_~tmp___9~2#1;havoc tlan_ee_send_byte_~tmp___10~2#1;assume { :begin_inline_outw } true;outw_#in~value#1, outw_#in~port#1 := 1, 8 + tlan_ee_send_byte_~io_base#1 % 65536;havoc outw_~value#1, outw_~port#1;outw_~value#1 := outw_#in~value#1;outw_~port#1 := outw_#in~port#1; [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6171: ldv_request_irq_100_#t~ret1087#1 := request_irq_#res#1;assume { :end_inline_request_irq } true;assume -2147483648 <= ldv_request_irq_100_#t~ret1087#1 && ldv_request_irq_100_#t~ret1087#1 <= 2147483647;ldv_request_irq_100_~tmp~96#1 := ldv_request_irq_100_#t~ret1087#1;havoc ldv_request_irq_100_#t~ret1087#1;ldv_request_irq_100_~ldv_func_res~5#1 := ldv_request_irq_100_~tmp~96#1;assume { :begin_inline_ldv_request_irq } true;ldv_request_irq_#in~arg0#1, ldv_request_irq_#in~arg1#1, ldv_request_irq_#in~arg2#1.base, ldv_request_irq_#in~arg2#1.offset, ldv_request_irq_#in~arg3#1, ldv_request_irq_#in~arg4#1.base, ldv_request_irq_#in~arg4#1.offset, ldv_request_irq_#in~arg5#1.base, ldv_request_irq_#in~arg5#1.offset := ldv_request_irq_100_~ldv_func_res~5#1, ldv_request_irq_100_~irq#1, ldv_request_irq_100_~handler#1.base, ldv_request_irq_100_~handler#1.offset, ldv_request_irq_100_~flags#1, ldv_request_irq_100_~name#1.base, ldv_request_irq_100_~name#1.offset, ldv_request_irq_100_~dev#1.base, ldv_request_irq_100_~dev#1.offset;havoc ldv_request_irq_#res#1;havoc ldv_request_irq_#t~ret1064#1, ldv_request_irq_~arg0#1, ldv_request_irq_~arg1#1, ldv_request_irq_~arg2#1.base, ldv_request_irq_~arg2#1.offset, ldv_request_irq_~arg3#1, ldv_request_irq_~arg4#1.base, ldv_request_irq_~arg4#1.offset, ldv_request_irq_~arg5#1.base, ldv_request_irq_~arg5#1.offset, ldv_request_irq_~ldv_10_callback_handler~0#1.base, ldv_request_irq_~ldv_10_callback_handler~0#1.offset, ldv_request_irq_~ldv_10_data_data~0#1.base, ldv_request_irq_~ldv_10_data_data~0#1.offset, ldv_request_irq_~ldv_10_line_line~0#1, ldv_request_irq_~ldv_10_thread_thread~0#1.base, ldv_request_irq_~ldv_10_thread_thread~0#1.offset, ldv_request_irq_~tmp~85#1;ldv_request_irq_~arg0#1 := ldv_request_irq_#in~arg0#1;ldv_request_irq_~arg1#1 := ldv_request_irq_#in~arg1#1;ldv_request_irq_~arg2#1.base, ldv_request_irq_~arg2#1.offset := ldv_request_irq_#in~arg2#1.base, ldv_request_irq_#in~arg2#1.offset;ldv_request_irq_~arg3#1 := ldv_request_irq_#in~arg3#1;ldv_request_irq_~arg4#1.base, ldv_request_irq_~arg4#1.offset := ldv_request_irq_#in~arg4#1.base, ldv_request_irq_#in~arg4#1.offset;ldv_request_irq_~arg5#1.base, ldv_request_irq_~arg5#1.offset := ldv_request_irq_#in~arg5#1.base, ldv_request_irq_#in~arg5#1.offset;havoc ldv_request_irq_~ldv_10_callback_handler~0#1.base, ldv_request_irq_~ldv_10_callback_handler~0#1.offset;havoc ldv_request_irq_~ldv_10_data_data~0#1.base, ldv_request_irq_~ldv_10_data_data~0#1.offset;havoc ldv_request_irq_~ldv_10_line_line~0#1;havoc ldv_request_irq_~ldv_10_thread_thread~0#1.base, ldv_request_irq_~ldv_10_thread_thread~0#1.offset;havoc ldv_request_irq_~tmp~85#1;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5643: assume is_device_dma_capable_#t~short53#1;call is_device_dma_capable_#t~mem51#1.base, is_device_dma_capable_#t~mem51#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1130 + is_device_dma_capable_~dev#1.offset, 8);call is_device_dma_capable_#t~mem52#1 := read~int(is_device_dma_capable_#t~mem51#1.base, is_device_dma_capable_#t~mem51#1.offset, 8);is_device_dma_capable_#t~short53#1 := 0 != is_device_dma_capable_#t~mem52#1 % 18446744073709551616; [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5643: assume !is_device_dma_capable_#t~short53#1; [2021-11-23 03:40:16,522 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6700: assume tlan_probe1_~reg~0#1 <= 5; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6700: assume !(tlan_probe1_~reg~0#1 <= 5); [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5643-2: is_device_dma_capable_#res#1 := (if is_device_dma_capable_#t~short53#1 then 1 else 0);havoc is_device_dma_capable_#t~mem50#1.base, is_device_dma_capable_#t~mem50#1.offset;havoc is_device_dma_capable_#t~mem51#1.base, is_device_dma_capable_#t~mem51#1.offset;havoc is_device_dma_capable_#t~mem52#1;havoc is_device_dma_capable_#t~short53#1; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5643-3: dma_alloc_attrs_#t~ret109#1 := is_device_dma_capable_#res#1;assume { :end_inline_is_device_dma_capable } true;assume -2147483648 <= dma_alloc_attrs_#t~ret109#1 && dma_alloc_attrs_#t~ret109#1 <= 2147483647;dma_alloc_attrs_~tmp___0~2#1 := dma_alloc_attrs_#t~ret109#1;havoc dma_alloc_attrs_#t~ret109#1; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6702: call tlan_probe1_#t~mem281#1 := read~int(tlan_probe1_~pdev#1.base, 24 + (1551 + tlan_probe1_~pdev#1.offset + 56 * tlan_probe1_~reg~0#1), 8); [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6705: assume 0 == tlan_probe1_~pci_io_base~0#1 % 4294967296;havoc tlan_probe1_#t~nondet284#1;tlan_probe1_~rc~1#1 := -5; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6705: assume !(0 == tlan_probe1_~pci_io_base~0#1 % 4294967296);call write~int(tlan_probe1_~pci_io_base~0#1 % 4294967296, tlan_probe1_~dev~3#1.base, 56 + tlan_probe1_~dev~3#1.offset, 8);call tlan_probe1_#t~mem285#1 := read~int(tlan_probe1_~pdev#1.base, 1547 + tlan_probe1_~pdev#1.offset, 4);call write~int((if tlan_probe1_#t~mem285#1 % 4294967296 % 4294967296 <= 2147483647 then tlan_probe1_#t~mem285#1 % 4294967296 % 4294967296 else tlan_probe1_#t~mem285#1 % 4294967296 % 4294967296 - 4294967296), tlan_probe1_~dev~3#1.base, 64 + tlan_probe1_~dev~3#1.offset, 4);havoc tlan_probe1_#t~mem285#1;call tlan_probe1_#t~mem286#1 := read~int(tlan_probe1_~pdev#1.base, 72 + tlan_probe1_~pdev#1.offset, 1);call write~int(tlan_probe1_#t~mem286#1 % 256, tlan_probe1_~priv~3#1.base, 288 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem286#1;assume { :begin_inline_pci_set_master } true;pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset;havoc pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset;pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset := pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-20: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-20: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-19: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-19: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-22: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-22: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-21: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-21: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-28: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-28: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-27: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-27: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-30: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-30: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-29: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-29: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-24: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-24: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-23: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-23: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-26: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-26: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-25: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-25: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-36: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-36: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-35: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-35: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-37: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-37: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-32: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-32: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-31: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-31: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-34: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-34: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-33: assume 0 == ldv_assume_~expression#1; [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11464-33: assume !(0 == ldv_assume_~expression#1); [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-21: assume true; [2021-11-23 03:40:16,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-20: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-23: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-22: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-19: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-29: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-28: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-31: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-30: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-25: assume true; [2021-11-23 03:40:16,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-24: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-27: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-26: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-37: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-36: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-33: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-32: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-35: assume true; [2021-11-23 03:40:16,529 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11465-34: assume true; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-19: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_is_err } true;ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset := ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset;havoc ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset := ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;ldv_is_err_#res#1 := (if (ldv_is_err_~ptr#1.base + ldv_is_err_~ptr#1.offset) % 18446744073709551616 > 4294967295 then 1 else 0); [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-25: assume { :end_inline_ldv_assume } true;~ldv_spin_lock_of_tlan_priv~0 := 2; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-24: assume { :end_inline_ldv_assume } true;ldv_xzalloc_#res#1.base, ldv_xzalloc_#res#1.offset := ldv_xzalloc_~res~4#1.base, ldv_xzalloc_~res~4#1.offset; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-27: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 6 == ~ldv_statevar_0~0 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-26: assume { :end_inline_ldv_assume } true;~ldv_spin_lock_of_tlan_priv~0 := 1; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-21: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_is_err } true;ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset := ldv_xmalloc_~res~3#1.base, ldv_xmalloc_~res~3#1.offset;havoc ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset := ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;ldv_is_err_#res#1 := (if (ldv_is_err_~ptr#1.base + ldv_is_err_~ptr#1.offset) % 18446744073709551616 > 4294967295 then 1 else 0); [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-20: assume { :end_inline_ldv_assume } true;ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset; [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-23: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_is_err } true;ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset := ldv_xzalloc_~res~4#1.base, ldv_xzalloc_~res~4#1.offset;havoc ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset := ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;ldv_is_err_#res#1 := (if (ldv_is_err_~ptr#1.base + ldv_is_err_~ptr#1.offset) % 18446744073709551616 > 4294967295 then 1 else 0); [2021-11-23 03:40:16,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-22: assume { :end_inline_ldv_assume } true;ldv_xmalloc_#res#1.base, ldv_xmalloc_#res#1.offset := ldv_xmalloc_~res~3#1.base, ldv_xmalloc_~res~3#1.offset; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-33: assume { :end_inline_ldv_assume } true;ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-32: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_is_err } true;ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset := ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset;havoc ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset := ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;ldv_is_err_#res#1 := (if (ldv_is_err_~ptr#1.base + ldv_is_err_~ptr#1.offset) % 18446744073709551616 > 4294967295 then 1 else 0); [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-35: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_dispatch_register_9_4 } true;ldv_dispatch_register_9_4_#in~arg0#1.base, ldv_dispatch_register_9_4_#in~arg0#1.offset := ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset;havoc ldv_dispatch_register_9_4_~arg0#1.base, ldv_dispatch_register_9_4_~arg0#1.offset;ldv_dispatch_register_9_4_~arg0#1.base, ldv_dispatch_register_9_4_~arg0#1.offset := ldv_dispatch_register_9_4_#in~arg0#1.base, ldv_dispatch_register_9_4_#in~arg0#1.offset;~ldv_1_container_net_device~0.base, ~ldv_1_container_net_device~0.offset := ldv_dispatch_register_9_4_~arg0#1.base, ldv_dispatch_register_9_4_~arg0#1.offset;assume { :begin_inline_ldv_switch_automaton_state_1_5 } true;~ldv_statevar_1~0 := 4; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-34: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 5 == ~ldv_statevar_1~0 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-29: assume { :end_inline_ldv_assume } true;ldv_request_irq_~ldv_10_line_line~0#1 := (if ldv_request_irq_~arg1#1 % 4294967296 % 4294967296 <= 2147483647 then ldv_request_irq_~arg1#1 % 4294967296 % 4294967296 else ldv_request_irq_~arg1#1 % 4294967296 % 4294967296 - 4294967296);ldv_request_irq_~ldv_10_callback_handler~0#1.base, ldv_request_irq_~ldv_10_callback_handler~0#1.offset := ldv_request_irq_~arg2#1.base, ldv_request_irq_~arg2#1.offset;ldv_request_irq_~ldv_10_thread_thread~0#1.base, ldv_request_irq_~ldv_10_thread_thread~0#1.offset := 0, 0;ldv_request_irq_~ldv_10_data_data~0#1.base, ldv_request_irq_~ldv_10_data_data~0#1.offset := ldv_request_irq_~arg5#1.base, ldv_request_irq_~arg5#1.offset;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 6 == ~ldv_statevar_0~0 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-28: assume { :end_inline_ldv_assume } true;call ldv_register_netdev_#t~mem1059#1.base, ldv_register_netdev_#t~mem1059#1.offset := read~$Pointer$(ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, 468 + ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset, 8);call ldv_register_netdev_#t~mem1060#1.base, ldv_register_netdev_#t~mem1060#1.offset := read~$Pointer$(ldv_register_netdev_#t~mem1059#1.base, 16 + ldv_register_netdev_#t~mem1059#1.offset, 8);assume { :begin_inline_ldv_register_netdev_open_9_6 } true;ldv_register_netdev_open_9_6_#in~arg0#1.base, ldv_register_netdev_open_9_6_#in~arg0#1.offset, ldv_register_netdev_open_9_6_#in~arg1#1.base, ldv_register_netdev_open_9_6_#in~arg1#1.offset := ldv_register_netdev_#t~mem1060#1.base, ldv_register_netdev_#t~mem1060#1.offset, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.base, ldv_register_netdev_~ldv_9_netdev_net_device~0#1.offset;havoc ldv_register_netdev_open_9_6_#res#1;havoc ldv_register_netdev_open_9_6_#t~ret1063#1, ldv_register_netdev_open_9_6_~arg0#1.base, ldv_register_netdev_open_9_6_~arg0#1.offset, ldv_register_netdev_open_9_6_~arg1#1.base, ldv_register_netdev_open_9_6_~arg1#1.offset, ldv_register_netdev_open_9_6_~tmp~84#1;ldv_register_netdev_open_9_6_~arg0#1.base, ldv_register_netdev_open_9_6_~arg0#1.offset := ldv_register_netdev_open_9_6_#in~arg0#1.base, ldv_register_netdev_open_9_6_#in~arg0#1.offset;ldv_register_netdev_open_9_6_~arg1#1.base, ldv_register_netdev_open_9_6_~arg1#1.offset := ldv_register_netdev_open_9_6_#in~arg1#1.base, ldv_register_netdev_open_9_6_#in~arg1#1.offset;havoc ldv_register_netdev_open_9_6_~tmp~84#1;assume { :begin_inline_tlan_open } true;tlan_open_#in~dev#1.base, tlan_open_#in~dev#1.offset := ldv_register_netdev_open_9_6_~arg1#1.base, ldv_register_netdev_open_9_6_~arg1#1.offset;havoc tlan_open_#res#1;havoc tlan_open_#t~ret361#1.base, tlan_open_#t~ret361#1.offset, tlan_open_#t~mem362#1, tlan_open_#t~ret363#1, tlan_open_#t~mem364#1, tlan_open_#t~ret365#1, tlan_open_#t~nondet366#1, tlan_open_#t~mem367#1, tlan_open_#t~nondet368#1, tlan_open_#t~mem369#1, tlan_open_~dev#1.base, tlan_open_~dev#1.offset, tlan_open_~priv~6#1.base, tlan_open_~priv~6#1.offset, tlan_open_~tmp~37#1.base, tlan_open_~tmp~37#1.offset, tlan_open_~err~1#1, tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset;tlan_open_~dev#1.base, tlan_open_~dev#1.offset := tlan_open_#in~dev#1.base, tlan_open_#in~dev#1.offset;havoc tlan_open_~priv~6#1.base, tlan_open_~priv~6#1.offset;havoc tlan_open_~tmp~37#1.base, tlan_open_~tmp~37#1.offset;havoc tlan_open_~err~1#1;call tlan_open_~#__key~1#1.base, tlan_open_~#__key~1#1.offset := #Ultimate.allocOnStack(8);assume { :begin_inline_netdev_priv } true;netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset := tlan_open_~dev#1.base, tlan_open_~dev#1.offset;havoc netdev_priv_#res#1.base, netdev_priv_#res#1.offset;havoc netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset;netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset := netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset;netdev_priv_#res#1.base, netdev_priv_#res#1.offset := netdev_priv_~dev#1.base, 3200 + netdev_priv_~dev#1.offset; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-31: assume { :end_inline_ldv_assume } true;ldv_request_irq_#res#1 := ldv_request_irq_~arg0#1; [2021-11-23 03:40:16,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-30: assume { :end_inline_ldv_assume } true;assume { :begin_inline_ldv_dispatch_irq_register_10_2 } true;ldv_dispatch_irq_register_10_2_#in~arg0#1, ldv_dispatch_irq_register_10_2_#in~arg1#1.base, ldv_dispatch_irq_register_10_2_#in~arg1#1.offset, ldv_dispatch_irq_register_10_2_#in~arg2#1.base, ldv_dispatch_irq_register_10_2_#in~arg2#1.offset, ldv_dispatch_irq_register_10_2_#in~arg3#1.base, ldv_dispatch_irq_register_10_2_#in~arg3#1.offset := ldv_request_irq_~ldv_10_line_line~0#1, ldv_request_irq_~ldv_10_callback_handler~0#1.base, ldv_request_irq_~ldv_10_callback_handler~0#1.offset, ldv_request_irq_~ldv_10_thread_thread~0#1.base, ldv_request_irq_~ldv_10_thread_thread~0#1.offset, ldv_request_irq_~ldv_10_data_data~0#1.base, ldv_request_irq_~ldv_10_data_data~0#1.offset;havoc ldv_dispatch_irq_register_10_2_~arg0#1, ldv_dispatch_irq_register_10_2_~arg1#1.base, ldv_dispatch_irq_register_10_2_~arg1#1.offset, ldv_dispatch_irq_register_10_2_~arg2#1.base, ldv_dispatch_irq_register_10_2_~arg2#1.offset, ldv_dispatch_irq_register_10_2_~arg3#1.base, ldv_dispatch_irq_register_10_2_~arg3#1.offset;ldv_dispatch_irq_register_10_2_~arg0#1 := ldv_dispatch_irq_register_10_2_#in~arg0#1;ldv_dispatch_irq_register_10_2_~arg1#1.base, ldv_dispatch_irq_register_10_2_~arg1#1.offset := ldv_dispatch_irq_register_10_2_#in~arg1#1.base, ldv_dispatch_irq_register_10_2_#in~arg1#1.offset;ldv_dispatch_irq_register_10_2_~arg2#1.base, ldv_dispatch_irq_register_10_2_~arg2#1.offset := ldv_dispatch_irq_register_10_2_#in~arg2#1.base, ldv_dispatch_irq_register_10_2_#in~arg2#1.offset;ldv_dispatch_irq_register_10_2_~arg3#1.base, ldv_dispatch_irq_register_10_2_~arg3#1.offset := ldv_dispatch_irq_register_10_2_#in~arg3#1.base, ldv_dispatch_irq_register_10_2_#in~arg3#1.offset;~ldv_0_line_line~0 := ldv_dispatch_irq_register_10_2_~arg0#1;~ldv_0_callback_handler~0.base, ~ldv_0_callback_handler~0.offset := ldv_dispatch_irq_register_10_2_~arg1#1.base, ldv_dispatch_irq_register_10_2_~arg1#1.offset;~ldv_0_thread_thread~0.base, ~ldv_0_thread_thread~0.offset := ldv_dispatch_irq_register_10_2_~arg2#1.base, ldv_dispatch_irq_register_10_2_~arg2#1.offset;~ldv_0_data_data~0.base, ~ldv_0_data_data~0.offset := ldv_dispatch_irq_register_10_2_~arg3#1.base, ldv_dispatch_irq_register_10_2_~arg3#1.offset;assume { :begin_inline_ldv_switch_automaton_state_0_6 } true;~ldv_statevar_0~0 := 5; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-37: assume { :end_inline_ldv_assume } true; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11469-36: assume { :end_inline_ldv_assume } true; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662: assume get_dma_ops_#t~short76#1; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662: assume !get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#t~short76#1 := 0 == (get_dma_ops_#t~mem75#1.base + get_dma_ops_#t~mem75#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-3: assume get_dma_ops_#t~short76#1; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-3: assume !get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#t~short76#1 := 0 == (get_dma_ops_#t~mem75#1.base + get_dma_ops_#t~mem75#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-2: assume get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := ~dma_ops~0.base, ~dma_ops~0.offset; [2021-11-23 03:40:16,532 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-2: assume !get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset;havoc get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-8: assume get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := ~dma_ops~0.base, ~dma_ops~0.offset; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-8: assume !get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset;havoc get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-5: assume get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := ~dma_ops~0.base, ~dma_ops~0.offset; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-5: assume !get_dma_ops_#t~short76#1;havoc get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset;havoc get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset := get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset;havoc get_dma_ops_#t~mem77#1.base, get_dma_ops_#t~mem77#1.offset; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-6: assume get_dma_ops_#t~short76#1; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5662-6: assume !get_dma_ops_#t~short76#1;call get_dma_ops_#t~mem75#1.base, get_dma_ops_#t~mem75#1.offset := read~$Pointer$(get_dma_ops_~dev#1.base, 1178 + get_dma_ops_~dev#1.offset, 8);get_dma_ops_#t~short76#1 := 0 == (get_dma_ops_#t~mem75#1.base + get_dma_ops_#t~mem75#1.offset) % 18446744073709551616; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13063-2: assume { :end_inline_ldv_assert_linux_alloc_spinlock__wrong_flags } true; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13063: assume 0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1; [2021-11-23 03:40:16,533 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13063: assume !(0 == ldv_assert_linux_alloc_spinlock__wrong_flags_~expr#1); [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5665-2: dma_free_attrs_#t~ret121#1.base, dma_free_attrs_#t~ret121#1.offset := get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;assume { :end_inline_get_dma_ops } true;dma_free_attrs_~tmp~9#1.base, dma_free_attrs_~tmp~9#1.offset := dma_free_attrs_#t~ret121#1.base, dma_free_attrs_#t~ret121#1.offset;havoc dma_free_attrs_#t~ret121#1.base, dma_free_attrs_#t~ret121#1.offset;dma_free_attrs_~ops~3#1.base, dma_free_attrs_~ops~3#1.offset := dma_free_attrs_~tmp~9#1.base, dma_free_attrs_~tmp~9#1.offset;assume { :begin_inline_arch_local_save_flags } true;havoc arch_local_save_flags_#res#1;havoc arch_local_save_flags_#t~mem10#1.base, arch_local_save_flags_#t~mem10#1.offset, arch_local_save_flags_#t~ret11#1, arch_local_save_flags_~__ret~0#1, arch_local_save_flags_~__edi~0#1, arch_local_save_flags_~__esi~0#1, arch_local_save_flags_~__edx~0#1, arch_local_save_flags_~__ecx~0#1, arch_local_save_flags_~__eax~0#1, arch_local_save_flags_~tmp~0#1;havoc arch_local_save_flags_~__ret~0#1;havoc arch_local_save_flags_~__edi~0#1;havoc arch_local_save_flags_~__esi~0#1;havoc arch_local_save_flags_~__edx~0#1;havoc arch_local_save_flags_~__ecx~0#1;havoc arch_local_save_flags_~__eax~0#1;havoc arch_local_save_flags_~tmp~0#1;arch_local_save_flags_~__edi~0#1 := arch_local_save_flags_~__edi~0#1;arch_local_save_flags_~__esi~0#1 := arch_local_save_flags_~__esi~0#1;arch_local_save_flags_~__edx~0#1 := arch_local_save_flags_~__edx~0#1;arch_local_save_flags_~__ecx~0#1 := arch_local_save_flags_~__ecx~0#1;arch_local_save_flags_~__eax~0#1 := arch_local_save_flags_~__eax~0#1;call arch_local_save_flags_#t~mem10#1.base, arch_local_save_flags_#t~mem10#1.offset := read~$Pointer$(~#pv_irq_ops~0.base, ~#pv_irq_ops~0.offset, 8);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 == (arch_local_save_flags_#t~mem10#1.base + arch_local_save_flags_#t~mem10#1.offset) % 18446744073709551616 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5665: dma_alloc_attrs_#t~ret108#1.base, dma_alloc_attrs_#t~ret108#1.offset := get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;assume { :end_inline_get_dma_ops } true;dma_alloc_attrs_~tmp~8#1.base, dma_alloc_attrs_~tmp~8#1.offset := dma_alloc_attrs_#t~ret108#1.base, dma_alloc_attrs_#t~ret108#1.offset;havoc dma_alloc_attrs_#t~ret108#1.base, dma_alloc_attrs_#t~ret108#1.offset;dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset := dma_alloc_attrs_~tmp~8#1.base, dma_alloc_attrs_~tmp~8#1.offset;dma_alloc_attrs_~gfp#1 := ~bitwiseAnd(dma_alloc_attrs_~gfp#1, 4294967288); [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5665-1: dma_map_single_attrs_#t~ret78#1.base, dma_map_single_attrs_#t~ret78#1.offset := get_dma_ops_#res#1.base, get_dma_ops_#res#1.offset;assume { :end_inline_get_dma_ops } true;dma_map_single_attrs_~tmp~5#1.base, dma_map_single_attrs_~tmp~5#1.offset := dma_map_single_attrs_#t~ret78#1.base, dma_map_single_attrs_#t~ret78#1.offset;havoc dma_map_single_attrs_#t~ret78#1.base, dma_map_single_attrs_#t~ret78#1.offset;dma_map_single_attrs_~ops~0#1.base, dma_map_single_attrs_~ops~0#1.offset := dma_map_single_attrs_~tmp~5#1.base, dma_map_single_attrs_~tmp~5#1.offset;assume { :begin_inline_kmemcheck_mark_initialized } true;kmemcheck_mark_initialized_#in~address#1.base, kmemcheck_mark_initialized_#in~address#1.offset, kmemcheck_mark_initialized_#in~n#1 := dma_map_single_attrs_~ptr#1.base, dma_map_single_attrs_~ptr#1.offset, dma_map_single_attrs_~size#1;havoc kmemcheck_mark_initialized_~address#1.base, kmemcheck_mark_initialized_~address#1.offset, kmemcheck_mark_initialized_~n#1;kmemcheck_mark_initialized_~address#1.base, kmemcheck_mark_initialized_~address#1.offset := kmemcheck_mark_initialized_#in~address#1.base, kmemcheck_mark_initialized_#in~address#1.offset;kmemcheck_mark_initialized_~n#1 := kmemcheck_mark_initialized_#in~n#1; [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13065: assume !false; [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13065: assume false; [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6725-2: call write~int(tlan_probe1_~ioaddr#1, tlan_probe1_~dev~3#1.base, 56 + tlan_probe1_~dev~3#1.offset, 8);call write~int(tlan_probe1_~irq#1, tlan_probe1_~dev~3#1.base, 64 + tlan_probe1_~dev~3#1.offset, 4); [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6725: assume 8433 == tlan_probe1_~device_id~0#1 % 65536 % 4294967296;call write~$Pointer$(~#board_info~0.base, 182 + ~#board_info~0.offset, tlan_probe1_~priv~3#1.base, 280 + tlan_probe1_~priv~3#1.offset, 8);call write~int(23, tlan_probe1_~priv~3#1.base, 288 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6725: assume !(8433 == tlan_probe1_~device_id~0#1 % 65536 % 4294967296);call write~$Pointer$(~#board_info~0.base, 196 + ~#board_info~0.offset, tlan_probe1_~priv~3#1.base, 280 + tlan_probe1_~priv~3#1.offset, 8);call write~int(10, tlan_probe1_~priv~3#1.base, 288 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,534 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482: get_dma_ops_#t~ret74#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= get_dma_ops_#t~ret74#1 && get_dma_ops_#t~ret74#1 <= 9223372036854775807;get_dma_ops_~tmp~4#1 := get_dma_ops_#t~ret74#1;havoc get_dma_ops_#t~ret74#1;get_dma_ops_#t~short76#1 := 0 != get_dma_ops_~tmp~4#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-6: dma_free_attrs_#t~ret125#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= dma_free_attrs_#t~ret125#1 && dma_free_attrs_#t~ret125#1 <= 9223372036854775807;havoc dma_free_attrs_#t~ret125#1;assume { :begin_inline_debug_dma_free_coherent } true;debug_dma_free_coherent_#in~arg0#1.base, debug_dma_free_coherent_#in~arg0#1.offset, debug_dma_free_coherent_#in~arg1#1, debug_dma_free_coherent_#in~arg2#1.base, debug_dma_free_coherent_#in~arg2#1.offset, debug_dma_free_coherent_#in~arg3#1 := dma_free_attrs_~dev#1.base, dma_free_attrs_~dev#1.offset, dma_free_attrs_~size#1, dma_free_attrs_~vaddr#1.base, dma_free_attrs_~vaddr#1.offset, dma_free_attrs_~bus#1;havoc debug_dma_free_coherent_~arg0#1.base, debug_dma_free_coherent_~arg0#1.offset, debug_dma_free_coherent_~arg1#1, debug_dma_free_coherent_~arg2#1.base, debug_dma_free_coherent_~arg2#1.offset, debug_dma_free_coherent_~arg3#1;debug_dma_free_coherent_~arg0#1.base, debug_dma_free_coherent_~arg0#1.offset := debug_dma_free_coherent_#in~arg0#1.base, debug_dma_free_coherent_#in~arg0#1.offset;debug_dma_free_coherent_~arg1#1 := debug_dma_free_coherent_#in~arg1#1;debug_dma_free_coherent_~arg2#1.base, debug_dma_free_coherent_~arg2#1.offset := debug_dma_free_coherent_#in~arg2#1.base, debug_dma_free_coherent_#in~arg2#1.offset;debug_dma_free_coherent_~arg3#1 := debug_dma_free_coherent_#in~arg3#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-5: dma_free_attrs_#t~ret124#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= dma_free_attrs_#t~ret124#1 && dma_free_attrs_#t~ret124#1 <= 9223372036854775807;dma_free_attrs_~tmp___1~3#1 := dma_free_attrs_#t~ret124#1;havoc dma_free_attrs_#t~ret124#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-2: dma_map_single_attrs_#t~ret80#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= dma_map_single_attrs_#t~ret80#1 && dma_map_single_attrs_#t~ret80#1 <= 9223372036854775807;dma_map_single_attrs_~tmp___1~0#1 := dma_map_single_attrs_#t~ret80#1;havoc dma_map_single_attrs_#t~ret80#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-1: get_dma_ops_#t~ret74#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= get_dma_ops_#t~ret74#1 && get_dma_ops_#t~ret74#1 <= 9223372036854775807;get_dma_ops_~tmp~4#1 := get_dma_ops_#t~ret74#1;havoc get_dma_ops_#t~ret74#1;get_dma_ops_#t~short76#1 := 0 != get_dma_ops_~tmp~4#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-4: arch_local_save_flags_#t~ret11#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= arch_local_save_flags_#t~ret11#1 && arch_local_save_flags_#t~ret11#1 <= 9223372036854775807;arch_local_save_flags_~tmp~0#1 := arch_local_save_flags_#t~ret11#1;havoc arch_local_save_flags_#t~mem10#1.base, arch_local_save_flags_#t~mem10#1.offset;havoc arch_local_save_flags_#t~ret11#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11482-3: get_dma_ops_#t~ret74#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= get_dma_ops_#t~ret74#1 && get_dma_ops_#t~ret74#1 <= 9223372036854775807;get_dma_ops_~tmp~4#1 := get_dma_ops_#t~ret74#1;havoc get_dma_ops_#t~ret74#1;get_dma_ops_#t~short76#1 := 0 != get_dma_ops_~tmp~4#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369-4: SUMMARY for call tlan_ee_send_byte_#t~ret952#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369-5: tlan_ee_send_byte_~tmp~67#1 := tlan_ee_send_byte_#t~ret952#1;havoc tlan_ee_send_byte_#t~ret952#1; [2021-11-23 03:40:16,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369: SUMMARY for call tlan_ee_send_byte_#t~ret952#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369-1: tlan_ee_send_byte_~tmp~67#1 := tlan_ee_send_byte_#t~ret952#1;havoc tlan_ee_send_byte_#t~ret952#1; [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369-2: SUMMARY for call tlan_ee_send_byte_#t~ret952#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9369-3: tlan_ee_send_byte_~tmp~67#1 := tlan_ee_send_byte_#t~ret952#1;havoc tlan_ee_send_byte_#t~ret952#1; [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9370: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9370-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9370-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp~67#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374-1: tlan_ee_send_byte_~tmp___0~27#1 := tlan_ee_send_byte_#t~ret953#1;havoc tlan_ee_send_byte_#t~ret953#1; [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374-2: SUMMARY for call tlan_ee_send_byte_#t~ret953#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374-3: tlan_ee_send_byte_~tmp___0~27#1 := tlan_ee_send_byte_#t~ret953#1;havoc tlan_ee_send_byte_#t~ret953#1; [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374-4: SUMMARY for call tlan_ee_send_byte_#t~ret953#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6203: tlan_open_#t~ret363#1 := tlan_dio_read8_#res#1;assume { :end_inline_tlan_dio_read8 } true;call write~int(tlan_open_#t~ret363#1, tlan_open_~priv~6#1.base, 320 + tlan_open_~priv~6#1.offset, 1);havoc tlan_open_#t~mem362#1;havoc tlan_open_#t~ret363#1;call tlan_open_#t~mem364#1 := read~int(tlan_open_~dev#1.base, 64 + tlan_open_~dev#1.offset, 4);assume { :begin_inline_ldv_request_irq_100 } true;ldv_request_irq_100_#in~irq#1, ldv_request_irq_100_#in~handler#1.base, ldv_request_irq_100_#in~handler#1.offset, ldv_request_irq_100_#in~flags#1, ldv_request_irq_100_#in~name#1.base, ldv_request_irq_100_#in~name#1.offset, ldv_request_irq_100_#in~dev#1.base, ldv_request_irq_100_#in~dev#1.offset := tlan_open_#t~mem364#1, #funAddr~tlan_handle_interrupt.base, #funAddr~tlan_handle_interrupt.offset, 128, tlan_open_~dev#1.base, tlan_open_~dev#1.offset, tlan_open_~dev#1.base, tlan_open_~dev#1.offset;havoc ldv_request_irq_100_#res#1;havoc ldv_request_irq_100_#t~ret1087#1, ldv_request_irq_100_#t~ret1088#1, ldv_request_irq_100_~irq#1, ldv_request_irq_100_~handler#1.base, ldv_request_irq_100_~handler#1.offset, ldv_request_irq_100_~flags#1, ldv_request_irq_100_~name#1.base, ldv_request_irq_100_~name#1.offset, ldv_request_irq_100_~dev#1.base, ldv_request_irq_100_~dev#1.offset, ldv_request_irq_100_~ldv_func_res~5#1, ldv_request_irq_100_~tmp~96#1, ldv_request_irq_100_~tmp___0~38#1;ldv_request_irq_100_~irq#1 := ldv_request_irq_100_#in~irq#1;ldv_request_irq_100_~handler#1.base, ldv_request_irq_100_~handler#1.offset := ldv_request_irq_100_#in~handler#1.base, ldv_request_irq_100_#in~handler#1.offset;ldv_request_irq_100_~flags#1 := ldv_request_irq_100_#in~flags#1;ldv_request_irq_100_~name#1.base, ldv_request_irq_100_~name#1.offset := ldv_request_irq_100_#in~name#1.base, ldv_request_irq_100_#in~name#1.offset;ldv_request_irq_100_~dev#1.base, ldv_request_irq_100_~dev#1.offset := ldv_request_irq_100_#in~dev#1.base, ldv_request_irq_100_#in~dev#1.offset;havoc ldv_request_irq_100_~ldv_func_res~5#1;havoc ldv_request_irq_100_~tmp~96#1;havoc ldv_request_irq_100_~tmp___0~38#1;assume { :begin_inline_request_irq } true;request_irq_#in~irq#1, request_irq_#in~handler#1.base, request_irq_#in~handler#1.offset, request_irq_#in~flags#1, request_irq_#in~name#1.base, request_irq_#in~name#1.offset, request_irq_#in~dev#1.base, request_irq_#in~dev#1.offset := ldv_request_irq_100_~irq#1, ldv_request_irq_100_~handler#1.base, ldv_request_irq_100_~handler#1.offset, ldv_request_irq_100_~flags#1, ldv_request_irq_100_~name#1.base, ldv_request_irq_100_~name#1.offset, ldv_request_irq_100_~dev#1.base, ldv_request_irq_100_~dev#1.offset;havoc request_irq_#res#1;havoc request_irq_#t~ret205#1, request_irq_~irq#1, request_irq_~handler#1.base, request_irq_~handler#1.offset, request_irq_~flags#1, request_irq_~name#1.base, request_irq_~name#1.offset, request_irq_~dev#1.base, request_irq_~dev#1.offset, request_irq_~tmp~24#1;request_irq_~irq#1 := request_irq_#in~irq#1;request_irq_~handler#1.base, request_irq_~handler#1.offset := request_irq_#in~handler#1.base, request_irq_#in~handler#1.offset;request_irq_~flags#1 := request_irq_#in~flags#1;request_irq_~name#1.base, request_irq_~name#1.offset := request_irq_#in~name#1.base, request_irq_#in~name#1.offset;request_irq_~dev#1.base, request_irq_~dev#1.offset := request_irq_#in~dev#1.base, request_irq_#in~dev#1.offset;havoc request_irq_~tmp~24#1;assume { :begin_inline_request_threaded_irq } true;request_threaded_irq_#in~arg0#1, request_threaded_irq_#in~arg1#1.base, request_threaded_irq_#in~arg1#1.offset, request_threaded_irq_#in~arg2#1.base, request_threaded_irq_#in~arg2#1.offset, request_threaded_irq_#in~arg3#1, request_threaded_irq_#in~arg4#1.base, request_threaded_irq_#in~arg4#1.offset, request_threaded_irq_#in~arg5#1.base, request_threaded_irq_#in~arg5#1.offset := request_irq_~irq#1, request_irq_~handler#1.base, request_irq_~handler#1.offset, 0, 0, request_irq_~flags#1, request_irq_~name#1.base, request_irq_~name#1.offset, request_irq_~dev#1.base, request_irq_~dev#1.offset;havoc request_threaded_irq_#res#1;havoc request_threaded_irq_#t~nondet1215#1, request_threaded_irq_~arg0#1, request_threaded_irq_~arg1#1.base, request_threaded_irq_~arg1#1.offset, request_threaded_irq_~arg2#1.base, request_threaded_irq_~arg2#1.offset, request_threaded_irq_~arg3#1, request_threaded_irq_~arg4#1.base, request_threaded_irq_~arg4#1.offset, request_threaded_irq_~arg5#1.base, request_threaded_irq_~arg5#1.offset;request_threaded_irq_~arg0#1 := request_threaded_irq_#in~arg0#1;request_threaded_irq_~arg1#1.base, request_threaded_irq_~arg1#1.offset := request_threaded_irq_#in~arg1#1.base, request_threaded_irq_#in~arg1#1.offset;request_threaded_irq_~arg2#1.base, request_threaded_irq_~arg2#1.offset := request_threaded_irq_#in~arg2#1.base, request_threaded_irq_#in~arg2#1.offset;request_threaded_irq_~arg3#1 := request_threaded_irq_#in~arg3#1;request_threaded_irq_~arg4#1.base, request_threaded_irq_~arg4#1.offset := request_threaded_irq_#in~arg4#1.base, request_threaded_irq_#in~arg4#1.offset;request_threaded_irq_~arg5#1.base, request_threaded_irq_~arg5#1.offset := request_threaded_irq_#in~arg5#1.base, request_threaded_irq_#in~arg5#1.offset;assume -2147483648 <= request_threaded_irq_#t~nondet1215#1 && request_threaded_irq_#t~nondet1215#1 <= 2147483647;request_threaded_irq_#res#1 := request_threaded_irq_#t~nondet1215#1;havoc request_threaded_irq_#t~nondet1215#1; [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374: SUMMARY for call tlan_ee_send_byte_#t~ret953#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9374-5: tlan_ee_send_byte_~tmp___0~27#1 := tlan_ee_send_byte_#t~ret953#1;havoc tlan_ee_send_byte_#t~ret953#1; [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___0~27#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375-3: SUMMARY for call tlan_ee_send_byte_#t~ret954#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375-4: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___0~27#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,537 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375-5: SUMMARY for call tlan_ee_send_byte_#t~ret954#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___0~27#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9375-1: SUMMARY for call tlan_ee_send_byte_#t~ret954#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6735: assume 0 != tlan_probe1_#t~mem288#1 % 18446744073709551616;havoc tlan_probe1_#t~mem288#1;call tlan_probe1_#t~mem289#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8);call write~int(~bitwiseAnd(tlan_probe1_#t~mem289#1, 1), tlan_probe1_~priv~3#1.base, 292 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem289#1;call tlan_probe1_#t~mem290#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8); [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6735: assume !(0 != tlan_probe1_#t~mem288#1 % 18446744073709551616);havoc tlan_probe1_#t~mem288#1;call tlan_probe1_#t~mem299#1 := read~int(~#aui~0.base, ~#aui~0.offset + 4 * ~boards_found~0, 4);call write~int(tlan_probe1_#t~mem299#1, tlan_probe1_~priv~3#1.base, 292 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem299#1;call tlan_probe1_#t~mem300#1 := read~int(~#speed~0.base, ~#speed~0.offset + 4 * ~boards_found~0, 4);call write~int(tlan_probe1_#t~mem300#1, tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem300#1;call tlan_probe1_#t~mem301#1 := read~int(~#duplex~0.base, ~#duplex~0.offset + 4 * ~boards_found~0, 4);call write~int(tlan_probe1_#t~mem301#1, tlan_probe1_~priv~3#1.base, 300 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem301#1;call write~int(~debug~0, tlan_probe1_~priv~3#1.base, 296 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6735-2: assume { :begin_inline___init_work } true;__init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset, __init_work_#in~arg1#1 := tlan_probe1_~priv~3#1.base, 391 + tlan_probe1_~priv~3#1.offset, 0;havoc __init_work_~arg0#1.base, __init_work_~arg0#1.offset, __init_work_~arg1#1;__init_work_~arg0#1.base, __init_work_~arg0#1.offset := __init_work_#in~arg0#1.base, __init_work_#in~arg0#1.offset;__init_work_~arg1#1 := __init_work_#in~arg1#1; [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9379: tlan_ee_send_byte_~tmp___1~13#1 := tlan_ee_send_byte_#t~ret954#1;havoc tlan_ee_send_byte_#t~ret954#1; [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9379-1: tlan_ee_send_byte_~tmp___1~13#1 := tlan_ee_send_byte_#t~ret954#1;havoc tlan_ee_send_byte_#t~ret954#1; [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9379-2: tlan_ee_send_byte_~tmp___1~13#1 := tlan_ee_send_byte_#t~ret954#1;havoc tlan_ee_send_byte_#t~ret954#1; [2021-11-23 03:40:16,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13079: assume { :end_inline___init_work } true;call write~int(137438953408, tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset, 8);call tlan_probe1_#t~mem302#1 := read~int(tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset, 8);call write~int(tlan_probe1_#t~mem302#1, tlan_probe1_~priv~3#1.base, 391 + tlan_probe1_~priv~3#1.offset, 8);havoc tlan_probe1_#t~mem302#1;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := tlan_probe1_~priv~3#1.base, 423 + tlan_probe1_~priv~3#1.offset, 37, 0, tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6737-2: call write~int(tlan_probe1_#t~ite292#1, tlan_probe1_~priv~3#1.base, 300 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem290#1;havoc tlan_probe1_#t~ite292#1;havoc tlan_probe1_#t~mem291#1;call tlan_probe1_#t~mem293#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8); [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6737: assume 6 != ~bitwiseAnd(tlan_probe1_#t~mem290#1, 6) % 18446744073709551616;call tlan_probe1_#t~mem291#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8);tlan_probe1_#t~ite292#1 := ~bitwiseAnd(tlan_probe1_#t~mem291#1, 6) / 2; [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6737: assume !(6 != ~bitwiseAnd(tlan_probe1_#t~mem290#1, 6) % 18446744073709551616);tlan_probe1_#t~ite292#1 := 0; [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380-1: SUMMARY for call tlan_ee_send_byte_#t~ret955#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380-3: SUMMARY for call tlan_ee_send_byte_#t~ret955#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___1~13#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9380-5: SUMMARY for call tlan_ee_send_byte_#t~ret955#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6738: assume 24 != ~bitwiseAnd(tlan_probe1_#t~mem293#1, 24) % 18446744073709551616;call tlan_probe1_#t~mem294#1 := read~int(tlan_probe1_~dev~3#1.base, 48 + tlan_probe1_~dev~3#1.offset, 8);tlan_probe1_#t~ite295#1 := ~bitwiseAnd(tlan_probe1_#t~mem294#1, 24) / 8; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6738: assume !(24 != ~bitwiseAnd(tlan_probe1_#t~mem293#1, 24) % 18446744073709551616);tlan_probe1_#t~ite295#1 := 0; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6738-2: call write~int(tlan_probe1_#t~ite295#1, tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem293#1;havoc tlan_probe1_#t~ite295#1;havoc tlan_probe1_#t~mem294#1;call tlan_probe1_#t~mem296#1 := read~int(tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9381: tlan_ee_send_byte_~tmp___2~8#1 := tlan_ee_send_byte_#t~ret955#1;havoc tlan_ee_send_byte_#t~ret955#1; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9381-1: tlan_ee_send_byte_~tmp___2~8#1 := tlan_ee_send_byte_#t~ret955#1;havoc tlan_ee_send_byte_#t~ret955#1; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9381-2: tlan_ee_send_byte_~tmp___2~8#1 := tlan_ee_send_byte_#t~ret955#1;havoc tlan_ee_send_byte_#t~ret955#1; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6739: assume 1 == tlan_probe1_#t~mem296#1 % 4294967296;havoc tlan_probe1_#t~mem296#1;call write~int(10, tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6739: assume !(1 == tlan_probe1_#t~mem296#1 % 4294967296);havoc tlan_probe1_#t~mem296#1;call tlan_probe1_#t~mem297#1 := read~int(tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382-1: tlan_ee_send_byte_~place~0#1 := tlan_ee_send_byte_~place~0#1 % 256 / 2; [2021-11-23 03:40:16,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___2~8#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382-3: tlan_ee_send_byte_~place~0#1 := tlan_ee_send_byte_~place~0#1 % 256 / 2; [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382-4: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___2~8#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___2~8#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13082: assume { :end_inline___ldv_spin_lock } true; [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9382-5: tlan_ee_send_byte_~place~0#1 := tlan_ee_send_byte_~place~0#1 % 256 / 2; [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6742: assume 2 == tlan_probe1_#t~mem297#1 % 4294967296;havoc tlan_probe1_#t~mem297#1;call write~int(100, tlan_probe1_~priv~3#1.base, 316 + tlan_probe1_~priv~3#1.offset, 4); [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6742: assume !(2 == tlan_probe1_#t~mem297#1 % 4294967296);havoc tlan_probe1_#t~mem297#1; [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6742-2: call tlan_probe1_#t~mem298#1 := read~int(tlan_probe1_~dev~3#1.base, 40 + tlan_probe1_~dev~3#1.offset, 8);tlan_probe1_~tmp___0~11#1 := tlan_probe1_#t~mem298#1;havoc tlan_probe1_#t~mem298#1;call write~int(tlan_probe1_~tmp___0~11#1, tlan_probe1_~priv~3#1.base, 296 + tlan_probe1_~priv~3#1.offset, 4);~debug~0 := (if tlan_probe1_~tmp___0~11#1 % 4294967296 % 4294967296 <= 2147483647 then tlan_probe1_~tmp___0~11#1 % 4294967296 % 4294967296 else tlan_probe1_~tmp___0~11#1 % 4294967296 % 4294967296 - 4294967296); [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385: assume 0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296; [2021-11-23 03:40:16,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385: assume !(0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296); [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385-1: assume 0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296; [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385-1: assume !(0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296); [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385-2: assume 0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296; [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9385-2: assume !(0 != tlan_ee_send_byte_~place~0#1 % 256 % 4294967296); [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13085: assume { :end_inline___netif_schedule } true;havoc netif_tx_wake_queue_#t~mem149#1.base, netif_tx_wake_queue_#t~mem149#1.offset; [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8329-2: assume { :end_inline_tlan_read_and_clear_stats } true; [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8329: assume 0 != tlan_read_and_clear_stats_~record#1;call tlan_read_and_clear_stats_#t~mem665#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 260 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem665#1 + tlan_read_and_clear_stats_~rx_good~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 260 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem665#1;call tlan_read_and_clear_stats_#t~mem666#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 292 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem666#1 + (tlan_read_and_clear_stats_~rx_over~0#1 + tlan_read_and_clear_stats_~crc~0#1 + tlan_read_and_clear_stats_~code~0#1) % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 292 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem666#1;call tlan_read_and_clear_stats_#t~mem667#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 268 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem667#1 + tlan_read_and_clear_stats_~tx_good~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 268 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem667#1;call tlan_read_and_clear_stats_#t~mem668#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 300 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem668#1 + (tlan_read_and_clear_stats_~tx_under~0#1 + tlan_read_and_clear_stats_~loss~0#1) % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 300 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem668#1;call tlan_read_and_clear_stats_#t~mem669#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 332 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem669#1 + (tlan_read_and_clear_stats_~multi_col~0#1 + tlan_read_and_clear_stats_~single_col~0#1 + tlan_read_and_clear_stats_~excess_col~0#1 + tlan_read_and_clear_stats_~late_col~0#1) % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 332 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem669#1;call tlan_read_and_clear_stats_#t~mem670#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 348 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem670#1 + tlan_read_and_clear_stats_~rx_over~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 348 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem670#1;call tlan_read_and_clear_stats_#t~mem671#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 356 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem671#1 + tlan_read_and_clear_stats_~crc~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 356 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem671#1;call tlan_read_and_clear_stats_#t~mem672#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 364 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem672#1 + tlan_read_and_clear_stats_~code~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 364 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem672#1;call tlan_read_and_clear_stats_#t~mem673#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 388 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem673#1 + tlan_read_and_clear_stats_~tx_under~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 388 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem673#1;call tlan_read_and_clear_stats_#t~mem674#1 := read~int(tlan_read_and_clear_stats_~dev#1.base, 396 + tlan_read_and_clear_stats_~dev#1.offset, 8);call write~int(tlan_read_and_clear_stats_#t~mem674#1 + tlan_read_and_clear_stats_~loss~0#1 % 4294967296, tlan_read_and_clear_stats_~dev#1.base, 396 + tlan_read_and_clear_stats_~dev#1.offset, 8);havoc tlan_read_and_clear_stats_#t~mem674#1; [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8329: assume !(0 != tlan_read_and_clear_stats_~record#1); [2021-11-23 03:40:16,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5687: assume 0 != dma_map_single_attrs_~tmp___1~0#1;assume false; [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5687: assume !(0 != dma_map_single_attrs_~tmp___1~0#1); [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5687-2: assume { :begin_inline___phys_addr } true;__phys_addr_#in~arg0#1 := dma_map_single_attrs_~ptr#1.base + dma_map_single_attrs_~ptr#1.offset;havoc __phys_addr_#res#1;havoc __phys_addr_#t~nondet1192#1, __phys_addr_~arg0#1;__phys_addr_~arg0#1 := __phys_addr_#in~arg0#1;__phys_addr_#res#1 := __phys_addr_#t~nondet1192#1;havoc __phys_addr_#t~nondet1192#1; [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387: assume 0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296; [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387: assume !(0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296); [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387-1: assume 0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296; [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387-1: assume !(0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296); [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387-2: assume 0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296; [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9387-2: assume !(0 != ~bitwiseAnd(tlan_ee_send_byte_~place~0#1 % 256, tlan_ee_send_byte_~data#1 % 256) % 4294967296); [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391-2: SUMMARY for call tlan_ee_send_byte_#t~ret956#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391-3: tlan_ee_send_byte_~tmp___3~7#1 := tlan_ee_send_byte_#t~ret956#1;havoc tlan_ee_send_byte_#t~ret956#1; [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391-4: SUMMARY for call tlan_ee_send_byte_#t~ret956#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391-5: tlan_ee_send_byte_~tmp___3~7#1 := tlan_ee_send_byte_#t~ret956#1;havoc tlan_ee_send_byte_#t~ret956#1; [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391: SUMMARY for call tlan_ee_send_byte_#t~ret956#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9391-1: tlan_ee_send_byte_~tmp___3~7#1 := tlan_ee_send_byte_#t~ret956#1;havoc tlan_ee_send_byte_#t~ret956#1; [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392-3: SUMMARY for call tlan_ee_send_byte_#t~ret957#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392-4: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___3~7#1 % 256, 223), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392-5: SUMMARY for call tlan_ee_send_byte_#t~ret957#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___3~7#1 % 256, 223), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392-1: SUMMARY for call tlan_ee_send_byte_#t~ret957#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,544 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9392-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___3~7#1 % 256, 223), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9393: tlan_ee_send_byte_~tmp___4~5#1 := tlan_ee_send_byte_#t~ret957#1;havoc tlan_ee_send_byte_#t~ret957#1; [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9393-1: tlan_ee_send_byte_~tmp___4~5#1 := tlan_ee_send_byte_#t~ret957#1;havoc tlan_ee_send_byte_#t~ret957#1; [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9393-2: tlan_ee_send_byte_~tmp___4~5#1 := tlan_ee_send_byte_#t~ret957#1;havoc tlan_ee_send_byte_#t~ret957#1; [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394-5: SUMMARY for call tlan_ee_send_byte_#t~ret958#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11508-7: assume 0 != ldv_malloc_~tmp___1~16#1;call ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset := #Ultimate.allocOnHeap(ldv_malloc_~size#1);ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset := ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset;havoc ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset;ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset := ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != (ldv_malloc_~res~1#1.base + ldv_malloc_~res~1#1.offset) % 18446744073709551616 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11508-7: assume !(0 != ldv_malloc_~tmp___1~16#1);ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := 0, 0; [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394-1: SUMMARY for call tlan_ee_send_byte_#t~ret958#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,545 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11508-6: assume 0 != ldv_malloc_~tmp___1~16#1;call ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset := #Ultimate.allocOnHeap(ldv_malloc_~size#1);ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset := ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset;havoc ldv_malloc_#t~malloc1112#1.base, ldv_malloc_#t~malloc1112#1.offset;ldv_malloc_~res~1#1.base, ldv_malloc_~res~1#1.offset := ldv_malloc_~tmp~105#1.base, ldv_malloc_~tmp~105#1.offset;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 0 != (ldv_malloc_~res~1#1.base + ldv_malloc_~res~1#1.offset) % 18446744073709551616 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11508-6: assume !(0 != ldv_malloc_~tmp___1~16#1);ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := 0, 0; [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394-3: SUMMARY for call tlan_ee_send_byte_#t~ret958#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9394-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___4~5#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9395: tlan_ee_send_byte_~tmp___5~4#1 := tlan_ee_send_byte_#t~ret958#1;havoc tlan_ee_send_byte_#t~ret958#1;tlan_ee_send_byte_~err~3#1 := ~bitwiseAnd(tlan_ee_send_byte_~tmp___5~4#1 % 256, 16); [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9395-1: tlan_ee_send_byte_~tmp___5~4#1 := tlan_ee_send_byte_#t~ret958#1;havoc tlan_ee_send_byte_#t~ret958#1;tlan_ee_send_byte_~err~3#1 := ~bitwiseAnd(tlan_ee_send_byte_~tmp___5~4#1 % 256, 16); [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9395-2: tlan_ee_send_byte_~tmp___5~4#1 := tlan_ee_send_byte_#t~ret958#1;havoc tlan_ee_send_byte_#t~ret958#1;tlan_ee_send_byte_~err~3#1 := ~bitwiseAnd(tlan_ee_send_byte_~tmp___5~4#1 % 256, 16); [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397: SUMMARY for call tlan_ee_send_byte_#t~ret959#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397-1: tlan_ee_send_byte_~tmp___6~3#1 := tlan_ee_send_byte_#t~ret959#1;havoc tlan_ee_send_byte_#t~ret959#1; [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397-2: SUMMARY for call tlan_ee_send_byte_#t~ret959#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,546 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397-3: tlan_ee_send_byte_~tmp___6~3#1 := tlan_ee_send_byte_#t~ret959#1;havoc tlan_ee_send_byte_#t~ret959#1; [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397-4: SUMMARY for call tlan_ee_send_byte_#t~ret959#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9397-5: tlan_ee_send_byte_~tmp___6~3#1 := tlan_ee_send_byte_#t~ret959#1;havoc tlan_ee_send_byte_#t~ret959#1; [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13097: dma_map_single_attrs_#t~ret81#1 := __phys_addr_#res#1;assume { :end_inline___phys_addr } true;dma_map_single_attrs_~tmp___2~0#1 := dma_map_single_attrs_#t~ret81#1;havoc dma_map_single_attrs_#t~ret81#1;call dma_map_single_attrs_#t~mem89#1.base, dma_map_single_attrs_#t~mem89#1.offset := read~$Pointer$(dma_map_single_attrs_~ops~0#1.base, 32 + dma_map_single_attrs_~ops~0#1.offset, 8);assume { :begin_inline_##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 } true;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~83#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~83#1.offset, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~84#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~84#1.offset, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~85#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~86#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~87#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~88#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~88#1.offset, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~#fp#1.offset := dma_map_single_attrs_~dev#1.base, dma_map_single_attrs_~dev#1.offset, 0, -24189255811072 + 72 * (if dma_map_single_attrs_~tmp___2~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then dma_map_single_attrs_~tmp___2~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 else dma_map_single_attrs_~tmp___2~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~bitwiseAnd(dma_map_single_attrs_~ptr#1.base + dma_map_single_attrs_~ptr#1.offset, 4095), dma_map_single_attrs_~size#1, dma_map_single_attrs_~dir#1, dma_map_single_attrs_~attrs#1.base, dma_map_single_attrs_~attrs#1.offset, dma_map_single_attrs_#t~mem89#1.base, dma_map_single_attrs_#t~mem89#1.offset;havoc ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#res#1;havoc ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~83#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~83#1.offset, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~84#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~84#1.offset, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~85#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~86#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~87#1, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~88#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~88#1.offset;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~83#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~83#1.offset := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~83#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~83#1.offset;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~84#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~84#1.offset := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~84#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~84#1.offset;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~85#1 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~85#1;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~86#1 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~86#1;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~87#1 := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~87#1;##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~88#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#~88#1.offset := ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~88#1.base, ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0_#in~88#1.offset; [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13097-1: dma_map_single_attrs_#t~ret91#1 := __phys_addr_#res#1;assume { :end_inline___phys_addr } true;dma_map_single_attrs_~tmp___3~0#1 := dma_map_single_attrs_#t~ret91#1;havoc dma_map_single_attrs_#t~ret91#1;assume { :begin_inline_debug_dma_map_page } true;debug_dma_map_page_#in~arg0#1.base, debug_dma_map_page_#in~arg0#1.offset, debug_dma_map_page_#in~arg1#1.base, debug_dma_map_page_#in~arg1#1.offset, debug_dma_map_page_#in~arg2#1, debug_dma_map_page_#in~arg3#1, debug_dma_map_page_#in~arg4#1, debug_dma_map_page_#in~arg5#1, debug_dma_map_page_#in~arg6#1 := dma_map_single_attrs_~dev#1.base, dma_map_single_attrs_~dev#1.offset, 0, -24189255811072 + 72 * (if dma_map_single_attrs_~tmp___3~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then dma_map_single_attrs_~tmp___3~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 else dma_map_single_attrs_~tmp___3~0#1 / 4096 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~bitwiseAnd(dma_map_single_attrs_~ptr#1.base + dma_map_single_attrs_~ptr#1.offset, 4095), dma_map_single_attrs_~size#1, dma_map_single_attrs_~dir#1, dma_map_single_attrs_~addr~0#1, 1;havoc debug_dma_map_page_~arg0#1.base, debug_dma_map_page_~arg0#1.offset, debug_dma_map_page_~arg1#1.base, debug_dma_map_page_~arg1#1.offset, debug_dma_map_page_~arg2#1, debug_dma_map_page_~arg3#1, debug_dma_map_page_~arg4#1, debug_dma_map_page_~arg5#1, debug_dma_map_page_~arg6#1;debug_dma_map_page_~arg0#1.base, debug_dma_map_page_~arg0#1.offset := debug_dma_map_page_#in~arg0#1.base, debug_dma_map_page_#in~arg0#1.offset;debug_dma_map_page_~arg1#1.base, debug_dma_map_page_~arg1#1.offset := debug_dma_map_page_#in~arg1#1.base, debug_dma_map_page_#in~arg1#1.offset;debug_dma_map_page_~arg2#1 := debug_dma_map_page_#in~arg2#1;debug_dma_map_page_~arg3#1 := debug_dma_map_page_#in~arg3#1;debug_dma_map_page_~arg4#1 := debug_dma_map_page_#in~arg4#1;debug_dma_map_page_~arg5#1 := debug_dma_map_page_#in~arg5#1;debug_dma_map_page_~arg6#1 := debug_dma_map_page_#in~arg6#1; [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398-1: SUMMARY for call tlan_ee_send_byte_#t~ret960#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___6~3#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398-3: SUMMARY for call tlan_ee_send_byte_#t~ret960#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398-4: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___6~3#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,547 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___6~3#1 % 256, 191), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9398-5: SUMMARY for call tlan_ee_send_byte_#t~ret960#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9399-2: tlan_ee_send_byte_~tmp___7~2#1 := tlan_ee_send_byte_#t~ret960#1;havoc tlan_ee_send_byte_#t~ret960#1; [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9399: tlan_ee_send_byte_~tmp___7~2#1 := tlan_ee_send_byte_#t~ret960#1;havoc tlan_ee_send_byte_#t~ret960#1; [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9399-1: tlan_ee_send_byte_~tmp___7~2#1 := tlan_ee_send_byte_#t~ret960#1;havoc tlan_ee_send_byte_#t~ret960#1; [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-3: assume 0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1; [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-3: assume !(0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1); [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-5: assume 0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1; [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-5: assume !(0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1); [2021-11-23 03:40:16,548 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-1: assume 0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-1: assume !(0 == tlan_ee_send_byte_~err~3#1 && 0 != tlan_ee_send_byte_~stop#1); [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9400-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___7~2#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13100: assume { :end_inline___raw_spin_lock_init } true;assume { :begin_inline_tlan_init } true;tlan_init_#in~dev#1.base, tlan_init_#in~dev#1.offset := tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc tlan_init_#res#1;havoc tlan_init_#t~ret345#1.base, tlan_init_#t~ret345#1.offset, tlan_init_#t~mem346#1.base, tlan_init_#t~mem346#1.offset, tlan_init_#t~ret347#1.base, tlan_init_#t~ret347#1.offset, tlan_init_#t~mem348#1.base, tlan_init_#t~mem348#1.offset, tlan_init_#t~nondet349#1, tlan_init_#t~mem350#1.base, tlan_init_#t~mem350#1.offset, tlan_init_#t~memset~res351#1.base, tlan_init_#t~memset~res351#1.offset, tlan_init_#t~mem352#1.base, tlan_init_#t~mem352#1.offset, tlan_init_#t~mem353#1, tlan_init_#t~mem354#1.base, tlan_init_#t~mem354#1.offset, tlan_init_#t~mem355#1, tlan_init_#t~mem356#1.base, tlan_init_#t~mem356#1.offset, tlan_init_#t~mem357#1, tlan_init_#t~mem358#1.base, tlan_init_#t~mem358#1.offset, tlan_init_#t~ret359#1, tlan_init_#t~nondet360#1, tlan_init_~dev#1.base, tlan_init_~dev#1.offset, tlan_init_~dma_size~0#1, tlan_init_~err~0#1, tlan_init_~i~0#1, tlan_init_~priv~5#1.base, tlan_init_~priv~5#1.offset, tlan_init_~tmp~36#1.base, tlan_init_~tmp~36#1.offset, tlan_init_~tmp___0~13#1;tlan_init_~dev#1.base, tlan_init_~dev#1.offset := tlan_init_#in~dev#1.base, tlan_init_#in~dev#1.offset;havoc tlan_init_~dma_size~0#1;havoc tlan_init_~err~0#1;havoc tlan_init_~i~0#1;havoc tlan_init_~priv~5#1.base, tlan_init_~priv~5#1.offset;havoc tlan_init_~tmp~36#1.base, tlan_init_~tmp~36#1.offset;havoc tlan_init_~tmp___0~13#1;assume { :begin_inline_netdev_priv } true;netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset := tlan_init_~dev#1.base, tlan_init_~dev#1.offset;havoc netdev_priv_#res#1.base, netdev_priv_#res#1.offset;havoc netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset;netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset := netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset;netdev_priv_#res#1.base, netdev_priv_#res#1.offset := netdev_priv_~dev#1.base, 3200 + netdev_priv_~dev#1.offset; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9402: tlan_ee_send_byte_#res#1 := tlan_ee_send_byte_~err~3#1; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9402-1: tlan_ee_send_byte_#res#1 := tlan_ee_send_byte_~err~3#1; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9402-2: tlan_ee_send_byte_#res#1 := tlan_ee_send_byte_~err~3#1; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5703: pci_map_single_#t~ret194#1 := dma_map_single_attrs_#res#1;assume { :end_inline_dma_map_single_attrs } true;pci_map_single_~tmp~21#1 := pci_map_single_#t~ret194#1;havoc pci_map_single_#t~ite193#1.base, pci_map_single_#t~ite193#1.offset;havoc pci_map_single_#t~ret194#1;pci_map_single_#res#1 := pci_map_single_~tmp~21#1; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13103-2: assume { :end_inline___release_region } true; [2021-11-23 03:40:16,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13103: assume { :end_inline___release_region } true; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13103-1: assume { :end_inline___release_region } true; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404: SUMMARY for call tlan_ee_send_byte_#t~ret961#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404-1: tlan_ee_send_byte_~tmp___8~2#1 := tlan_ee_send_byte_#t~ret961#1;havoc tlan_ee_send_byte_#t~ret961#1; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404-2: SUMMARY for call tlan_ee_send_byte_#t~ret961#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11518-6: alloc_etherdev_mqs_#t~ret1193#1.base, alloc_etherdev_mqs_#t~ret1193#1.offset := ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;assume { :end_inline_ldv_malloc } true;alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset := alloc_etherdev_mqs_#t~ret1193#1.base, alloc_etherdev_mqs_#t~ret1193#1.offset;havoc alloc_etherdev_mqs_#t~ret1193#1.base, alloc_etherdev_mqs_#t~ret1193#1.offset; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404-3: tlan_ee_send_byte_~tmp___8~2#1 := tlan_ee_send_byte_#t~ret961#1;havoc tlan_ee_send_byte_#t~ret961#1; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404-4: SUMMARY for call tlan_ee_send_byte_#t~ret961#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9404-5: tlan_ee_send_byte_~tmp___8~2#1 := tlan_ee_send_byte_#t~ret961#1;havoc tlan_ee_send_byte_#t~ret961#1; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11518-7: ldv___netdev_alloc_skb_59_#t~ret1074#1.base, ldv___netdev_alloc_skb_59_#t~ret1074#1.offset := ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;assume { :end_inline_ldv_malloc } true;ldv___netdev_alloc_skb_59_~tmp~88#1.base, ldv___netdev_alloc_skb_59_~tmp~88#1.offset := ldv___netdev_alloc_skb_59_#t~ret1074#1.base, ldv___netdev_alloc_skb_59_#t~ret1074#1.offset;havoc ldv___netdev_alloc_skb_59_#t~ret1074#1.base, ldv___netdev_alloc_skb_59_#t~ret1074#1.offset;ldv___netdev_alloc_skb_59_#res#1.base, ldv___netdev_alloc_skb_59_#res#1.offset := ldv___netdev_alloc_skb_59_~tmp~88#1.base, ldv___netdev_alloc_skb_59_~tmp~88#1.offset; [2021-11-23 03:40:16,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___8~2#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405-1: SUMMARY for call tlan_ee_send_byte_#t~ret962#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405-2: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___8~2#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405-3: SUMMARY for call tlan_ee_send_byte_#t~ret962#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405-4: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_send_byte_~tmp___8~2#1 % 256, 239), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9405-5: SUMMARY for call tlan_ee_send_byte_#t~ret962#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9406-1: tlan_ee_send_byte_~tmp___9~2#1 := tlan_ee_send_byte_#t~ret962#1;havoc tlan_ee_send_byte_#t~ret962#1; [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9406-2: tlan_ee_send_byte_~tmp___9~2#1 := tlan_ee_send_byte_#t~ret962#1;havoc tlan_ee_send_byte_#t~ret962#1; [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9406: tlan_ee_send_byte_~tmp___9~2#1 := tlan_ee_send_byte_#t~ret962#1;havoc tlan_ee_send_byte_#t~ret962#1; [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,551 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407-3: SUMMARY for call tlan_ee_send_byte_#t~ret963#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407-5: SUMMARY for call tlan_ee_send_byte_#t~ret963#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___9~2#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9407-1: SUMMARY for call tlan_ee_send_byte_#t~ret963#1 := inb_p(tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9408: tlan_ee_send_byte_~tmp___10~2#1 := tlan_ee_send_byte_#t~ret963#1;havoc tlan_ee_send_byte_#t~ret963#1; [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9408-1: tlan_ee_send_byte_~tmp___10~2#1 := tlan_ee_send_byte_#t~ret963#1;havoc tlan_ee_send_byte_#t~ret963#1; [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9408-2: tlan_ee_send_byte_~tmp___10~2#1 := tlan_ee_send_byte_#t~ret963#1;havoc tlan_ee_send_byte_#t~ret963#1; [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9409-4: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,552 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9409: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9409-2: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_send_byte_~tmp___10~2#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_send_byte_~sio~6#1 % 65536); srcloc: null [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6768: assume 0 != tlan_probe1_~rc~1#1;havoc tlan_probe1_#t~nondet305#1; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6768: assume !(0 != tlan_probe1_~rc~1#1);assume { :begin_inline_ldv_register_netdev_95 } true;ldv_register_netdev_95_#in~ldv_func_arg1#1.base, ldv_register_netdev_95_#in~ldv_func_arg1#1.offset := tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc ldv_register_netdev_95_#res#1;havoc ldv_register_netdev_95_#t~ret1085#1, ldv_register_netdev_95_#t~ret1086#1, ldv_register_netdev_95_~ldv_func_arg1#1.base, ldv_register_netdev_95_~ldv_func_arg1#1.offset, ldv_register_netdev_95_~ldv_func_res~4#1, ldv_register_netdev_95_~tmp~95#1, ldv_register_netdev_95_~tmp___0~37#1;ldv_register_netdev_95_~ldv_func_arg1#1.base, ldv_register_netdev_95_~ldv_func_arg1#1.offset := ldv_register_netdev_95_#in~ldv_func_arg1#1.base, ldv_register_netdev_95_#in~ldv_func_arg1#1.offset;havoc ldv_register_netdev_95_~ldv_func_res~4#1;havoc ldv_register_netdev_95_~tmp~95#1;havoc ldv_register_netdev_95_~tmp___0~37#1;assume { :begin_inline_register_netdev } true;register_netdev_#in~arg0#1.base, register_netdev_#in~arg0#1.offset := ldv_register_netdev_95_~ldv_func_arg1#1.base, ldv_register_netdev_95_~ldv_func_arg1#1.offset;havoc register_netdev_#res#1;havoc register_netdev_#t~nondet1214#1, register_netdev_~arg0#1.base, register_netdev_~arg0#1.offset;register_netdev_~arg0#1.base, register_netdev_~arg0#1.offset := register_netdev_#in~arg0#1.base, register_netdev_#in~arg0#1.offset;assume -2147483648 <= register_netdev_#t~nondet1214#1 && register_netdev_#t~nondet1214#1 <= 2147483647;register_netdev_#res#1 := register_netdev_#t~nondet1214#1;havoc register_netdev_#t~nondet1214#1; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13112: assume { :end_inline__raw_spin_unlock_irqrestore } true; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9413: tlan_ee_read_byte_#t~ret982#1 := tlan_ee_send_byte_#res#1;assume { :end_inline_tlan_ee_send_byte } true;assume -2147483648 <= tlan_ee_read_byte_#t~ret982#1 && tlan_ee_read_byte_#t~ret982#1 <= 2147483647;tlan_ee_read_byte_~err~4#1 := tlan_ee_read_byte_#t~ret982#1;havoc tlan_ee_read_byte_#t~mem981#1;havoc tlan_ee_read_byte_#t~ret982#1; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9413-1: tlan_ee_read_byte_#t~ret984#1 := tlan_ee_send_byte_#res#1;assume { :end_inline_tlan_ee_send_byte } true;assume -2147483648 <= tlan_ee_read_byte_#t~ret984#1 && tlan_ee_read_byte_#t~ret984#1 <= 2147483647;tlan_ee_read_byte_~err~4#1 := tlan_ee_read_byte_#t~ret984#1;havoc tlan_ee_read_byte_#t~mem983#1;havoc tlan_ee_read_byte_#t~ret984#1; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9413-2: tlan_ee_read_byte_#t~ret987#1 := tlan_ee_send_byte_#res#1;assume { :end_inline_tlan_ee_send_byte } true;assume -2147483648 <= tlan_ee_read_byte_#t~ret987#1 && tlan_ee_read_byte_#t~ret987#1 <= 2147483647;tlan_ee_read_byte_~err~4#1 := tlan_ee_read_byte_#t~ret987#1;havoc tlan_ee_read_byte_#t~mem986#1;havoc tlan_ee_read_byte_#t~ret987#1; [2021-11-23 03:40:16,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13118: ldv_alloc_etherdev_mqs_94_#t~ret1083#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1083#1.offset := alloc_etherdev_mqs_#res#1.base, alloc_etherdev_mqs_#res#1.offset;assume { :end_inline_alloc_etherdev_mqs } true;ldv_alloc_etherdev_mqs_94_~tmp~94#1.base, ldv_alloc_etherdev_mqs_94_~tmp~94#1.offset := ldv_alloc_etherdev_mqs_94_#t~ret1083#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1083#1.offset;havoc ldv_alloc_etherdev_mqs_94_#t~ret1083#1.base, ldv_alloc_etherdev_mqs_94_#t~ret1083#1.offset;ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.base, ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.offset := ldv_alloc_etherdev_mqs_94_~tmp~94#1.base, ldv_alloc_etherdev_mqs_94_~tmp~94#1.offset;assume { :begin_inline_ldv_alloc_etherdev_mqs } true;ldv_alloc_etherdev_mqs_#in~arg0#1.base, ldv_alloc_etherdev_mqs_#in~arg0#1.offset, ldv_alloc_etherdev_mqs_#in~arg1#1, ldv_alloc_etherdev_mqs_#in~arg2#1, ldv_alloc_etherdev_mqs_#in~arg3#1 := ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.base, ldv_alloc_etherdev_mqs_94_~ldv_func_res~3#1.offset, ldv_alloc_etherdev_mqs_94_~ldv_func_arg1#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg2#1, ldv_alloc_etherdev_mqs_94_~ldv_func_arg3#1;havoc ldv_alloc_etherdev_mqs_#res#1.base, ldv_alloc_etherdev_mqs_#res#1.offset;havoc ldv_alloc_etherdev_mqs_#t~ret991#1, ldv_alloc_etherdev_mqs_#t~ret992#1.base, ldv_alloc_etherdev_mqs_#t~ret992#1.offset, ldv_alloc_etherdev_mqs_~arg0#1.base, ldv_alloc_etherdev_mqs_~arg0#1.offset, ldv_alloc_etherdev_mqs_~arg1#1, ldv_alloc_etherdev_mqs_~arg2#1, ldv_alloc_etherdev_mqs_~arg3#1, ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.base, ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.offset, ldv_alloc_etherdev_mqs_~tmp~72#1.base, ldv_alloc_etherdev_mqs_~tmp~72#1.offset, ldv_alloc_etherdev_mqs_~tmp___0~29#1;ldv_alloc_etherdev_mqs_~arg0#1.base, ldv_alloc_etherdev_mqs_~arg0#1.offset := ldv_alloc_etherdev_mqs_#in~arg0#1.base, ldv_alloc_etherdev_mqs_#in~arg0#1.offset;ldv_alloc_etherdev_mqs_~arg1#1 := ldv_alloc_etherdev_mqs_#in~arg1#1;ldv_alloc_etherdev_mqs_~arg2#1 := ldv_alloc_etherdev_mqs_#in~arg2#1;ldv_alloc_etherdev_mqs_~arg3#1 := ldv_alloc_etherdev_mqs_#in~arg3#1;havoc ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.base, ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.offset;havoc ldv_alloc_etherdev_mqs_~tmp~72#1.base, ldv_alloc_etherdev_mqs_~tmp~72#1.offset;havoc ldv_alloc_etherdev_mqs_~tmp___0~29#1;assume { :begin_inline_ldv_undef_int } true;havoc ldv_undef_int_#res#1;havoc ldv_undef_int_#t~nondet1122#1, ldv_undef_int_~tmp~110#1;havoc ldv_undef_int_~tmp~110#1;assume -2147483648 <= ldv_undef_int_#t~nondet1122#1 && ldv_undef_int_#t~nondet1122#1 <= 2147483647;ldv_undef_int_~tmp~110#1 := ldv_undef_int_#t~nondet1122#1;havoc ldv_undef_int_#t~nondet1122#1;ldv_undef_int_#res#1 := ldv_undef_int_~tmp~110#1; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6778: assume 0 != tlan_probe1_~rc~1#1;havoc tlan_probe1_#t~nondet307#1; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6778: assume !(0 != tlan_probe1_~rc~1#1);~tlan_devices_installed~0 := 1 + ~tlan_devices_installed~0;~boards_found~0 := 1 + ~boards_found~0; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11009: __netdev_alloc_skb_ip_align_#t~ret138#1.base, __netdev_alloc_skb_ip_align_#t~ret138#1.offset := ldv___netdev_alloc_skb_59_#res#1.base, ldv___netdev_alloc_skb_59_#res#1.offset;assume { :end_inline_ldv___netdev_alloc_skb_59 } true;__netdev_alloc_skb_ip_align_~tmp~10#1.base, __netdev_alloc_skb_ip_align_~tmp~10#1.offset := __netdev_alloc_skb_ip_align_#t~ret138#1.base, __netdev_alloc_skb_ip_align_#t~ret138#1.offset;havoc __netdev_alloc_skb_ip_align_#t~ret138#1.base, __netdev_alloc_skb_ip_align_#t~ret138#1.offset;__netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset := __netdev_alloc_skb_ip_align_~tmp~10#1.base, __netdev_alloc_skb_ip_align_~tmp~10#1.offset;__netdev_alloc_skb_ip_align_#res#1.base, __netdev_alloc_skb_ip_align_#res#1.offset := __netdev_alloc_skb_ip_align_~skb~0#1.base, __netdev_alloc_skb_ip_align_~skb~0#1.offset; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6782: call tlan_probe1_#t~mem314#1.base, tlan_probe1_#t~mem314#1.offset := read~$Pointer$(tlan_probe1_~priv~3#1.base, 8 + tlan_probe1_~priv~3#1.offset, 8);call tlan_probe1_#t~mem315#1 := read~int(tlan_probe1_~priv~3#1.base, 40 + tlan_probe1_~priv~3#1.offset, 4);call tlan_probe1_#t~mem316#1.base, tlan_probe1_#t~mem316#1.offset := read~$Pointer$(tlan_probe1_~priv~3#1.base, 24 + tlan_probe1_~priv~3#1.offset, 8);call tlan_probe1_#t~mem317#1 := read~int(tlan_probe1_~priv~3#1.base, 32 + tlan_probe1_~priv~3#1.offset, 8);assume { :begin_inline_pci_free_consistent } true;pci_free_consistent_#in~hwdev#1.base, pci_free_consistent_#in~hwdev#1.offset, pci_free_consistent_#in~size#1, pci_free_consistent_#in~vaddr#1.base, pci_free_consistent_#in~vaddr#1.offset, pci_free_consistent_#in~dma_handle#1 := tlan_probe1_#t~mem314#1.base, tlan_probe1_#t~mem314#1.offset, tlan_probe1_#t~mem315#1 % 4294967296, tlan_probe1_#t~mem316#1.base, tlan_probe1_#t~mem316#1.offset, tlan_probe1_#t~mem317#1;havoc pci_free_consistent_#t~ite192#1.base, pci_free_consistent_#t~ite192#1.offset, pci_free_consistent_~hwdev#1.base, pci_free_consistent_~hwdev#1.offset, pci_free_consistent_~size#1, pci_free_consistent_~vaddr#1.base, pci_free_consistent_~vaddr#1.offset, pci_free_consistent_~dma_handle#1;pci_free_consistent_~hwdev#1.base, pci_free_consistent_~hwdev#1.offset := pci_free_consistent_#in~hwdev#1.base, pci_free_consistent_#in~hwdev#1.offset;pci_free_consistent_~size#1 := pci_free_consistent_#in~size#1;pci_free_consistent_~vaddr#1.base, pci_free_consistent_~vaddr#1.offset := pci_free_consistent_#in~vaddr#1.base, pci_free_consistent_#in~vaddr#1.offset;pci_free_consistent_~dma_handle#1 := pci_free_consistent_#in~dma_handle#1; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13125: assume { :end_inline_debug_dma_alloc_coherent } true;havoc dma_alloc_attrs_#t~mem120#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13128: assume { :end_inline_debug_dma_free_coherent } true;call dma_free_attrs_#t~mem126#1.base, dma_free_attrs_#t~mem126#1.offset := read~$Pointer$(dma_free_attrs_~ops~3#1.base, 8 + dma_free_attrs_~ops~3#1.offset, 8); [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6787: assume 0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616;~tlan_have_pci~0 := 1 + ~tlan_have_pci~0; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6787: assume !(0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616);call write~$Pointer$(~tlan_eisa_devices~0.base, ~tlan_eisa_devices~0.offset, tlan_probe1_~priv~3#1.base, tlan_probe1_~priv~3#1.offset, 8);~tlan_eisa_devices~0.base, ~tlan_eisa_devices~0.offset := tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;~tlan_have_eisa~0 := 1 + ~tlan_have_eisa~0; [2021-11-23 03:40:16,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6787-2: havoc tlan_probe1_#t~nondet308#1;call tlan_probe1_#t~mem309#1 := read~int(tlan_probe1_~dev~3#1.base, 64 + tlan_probe1_~dev~3#1.offset, 4);call tlan_probe1_#t~mem310#1 := read~int(tlan_probe1_~dev~3#1.base, 56 + tlan_probe1_~dev~3#1.offset, 8);call tlan_probe1_#t~mem311#1.base, tlan_probe1_#t~mem311#1.offset := read~$Pointer$(tlan_probe1_~priv~3#1.base, 280 + tlan_probe1_~priv~3#1.offset, 8);call tlan_probe1_#t~mem312#1.base, tlan_probe1_#t~mem312#1.offset := read~$Pointer$(tlan_probe1_#t~mem311#1.base, tlan_probe1_#t~mem311#1.offset, 8);call tlan_probe1_#t~mem313#1 := read~int(tlan_probe1_~priv~3#1.base, 288 + tlan_probe1_~priv~3#1.offset, 4);havoc tlan_probe1_#t~mem309#1;havoc tlan_probe1_#t~mem310#1;havoc tlan_probe1_#t~mem311#1.base, tlan_probe1_#t~mem311#1.offset;havoc tlan_probe1_#t~mem312#1.base, tlan_probe1_#t~mem312#1.offset;havoc tlan_probe1_#t~mem313#1;tlan_probe1_#res#1 := 0;call ULTIMATE.dealloc(tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset);havoc tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset);havoc tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset);havoc tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13131: assume { :end_inline_debug_dma_map_page } true;dma_map_single_attrs_#res#1 := dma_map_single_attrs_~addr~0#1; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9439: SUMMARY for call tlan_ee_receive_byte_#t~ret964#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9439-1: tlan_ee_receive_byte_~tmp~68#1 := tlan_ee_receive_byte_#t~ret964#1;havoc tlan_ee_receive_byte_#t~ret964#1; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9440: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp~68#1 % 256, 223), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9440-1: tlan_ee_receive_byte_~place~1#1 := 128; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11029: pci_set_drvdata_#t~ret198#1 := ldv_dev_set_drvdata_82_#res#1;assume { :end_inline_ldv_dev_set_drvdata_82 } true;assume -2147483648 <= pci_set_drvdata_#t~ret198#1 && pci_set_drvdata_#t~ret198#1 <= 2147483647;havoc pci_set_drvdata_#t~ret198#1; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6803: assume { :begin_inline_ldv_free_netdev_96 } true;ldv_free_netdev_96_#in~ldv_func_arg1#1.base, ldv_free_netdev_96_#in~ldv_func_arg1#1.offset := tlan_probe1_~dev~3#1.base, tlan_probe1_~dev~3#1.offset;havoc ldv_free_netdev_96_~ldv_func_arg1#1.base, ldv_free_netdev_96_~ldv_func_arg1#1.offset;ldv_free_netdev_96_~ldv_func_arg1#1.base, ldv_free_netdev_96_~ldv_func_arg1#1.offset := ldv_free_netdev_96_#in~ldv_func_arg1#1.base, ldv_free_netdev_96_#in~ldv_func_arg1#1.offset;assume { :begin_inline_free_netdev } true;free_netdev_#in~arg0#1.base, free_netdev_#in~arg0#1.offset := ldv_free_netdev_96_~ldv_func_arg1#1.base, ldv_free_netdev_96_~ldv_func_arg1#1.offset;havoc free_netdev_~arg0#1.base, free_netdev_~arg0#1.offset;free_netdev_~arg0#1.base, free_netdev_~arg0#1.offset := free_netdev_#in~arg0#1.base, free_netdev_#in~arg0#1.offset; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13145: pci_set_dma_mask_#t~ret196#1 := dma_set_mask_#res#1;assume { :end_inline_dma_set_mask } true;assume -2147483648 <= pci_set_dma_mask_#t~ret196#1 && pci_set_dma_mask_#t~ret196#1 <= 2147483647;pci_set_dma_mask_~tmp~22#1 := pci_set_dma_mask_#t~ret196#1;havoc pci_set_dma_mask_#t~ret196#1;pci_set_dma_mask_#res#1 := pci_set_dma_mask_~tmp~22#1; [2021-11-23 03:40:16,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9446: tlan_ee_receive_byte_~tmp___0~28#1 := tlan_ee_receive_byte_#t~ret965#1;havoc tlan_ee_receive_byte_#t~ret965#1; [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9447: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___0~28#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___0~28#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___0~28#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9447-1: SUMMARY for call tlan_ee_receive_byte_#t~ret966#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11562: assume { :end_inline_ldv_free } true; [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9448: tlan_ee_receive_byte_~tmp___1~14#1 := tlan_ee_receive_byte_#t~ret966#1;havoc tlan_ee_receive_byte_#t~ret966#1; [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6807: assume 0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616;assume { :begin_inline_pci_release_regions } true;pci_release_regions_#in~arg0#1.base, pci_release_regions_#in~arg0#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset;havoc pci_release_regions_~arg0#1.base, pci_release_regions_~arg0#1.offset;pci_release_regions_~arg0#1.base, pci_release_regions_~arg0#1.offset := pci_release_regions_#in~arg0#1.base, pci_release_regions_#in~arg0#1.offset; [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6807: assume !(0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616); [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9450: assume 0 != ~bitwiseAnd(tlan_ee_receive_byte_~tmp___1~14#1 % 256, 16);call tlan_ee_receive_byte_#t~mem967#1 := read~int(tlan_ee_receive_byte_~data#1.base, tlan_ee_receive_byte_~data#1.offset, 1);call write~int(~bitwiseOr(tlan_ee_receive_byte_#t~mem967#1 % 256, tlan_ee_receive_byte_~place~1#1 % 256), tlan_ee_receive_byte_~data#1.base, tlan_ee_receive_byte_~data#1.offset, 1);havoc tlan_ee_receive_byte_#t~mem967#1; [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9450: assume !(0 != ~bitwiseAnd(tlan_ee_receive_byte_~tmp___1~14#1 % 256, 16)); [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9450-2: SUMMARY for call tlan_ee_receive_byte_#t~ret968#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5751: assume 0 == dma_alloc_coherent_mask_~dma_mask~0#1 % 18446744073709551616; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5751: assume !(0 == dma_alloc_coherent_mask_~dma_mask~0#1 % 18446744073709551616); [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5751-2: dma_alloc_coherent_mask_#res#1 := dma_alloc_coherent_mask_~dma_mask~0#1; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5752-2: dma_alloc_coherent_mask_~dma_mask~0#1 := dma_alloc_coherent_mask_#t~ite106#1;havoc dma_alloc_coherent_mask_#t~ite106#1; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5752: assume 0 != ~bitwiseAnd((if dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 <= 2147483647 then dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 else dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 - 4294967296), 1);dma_alloc_coherent_mask_#t~ite106#1 := 16777215; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5752: assume !(0 != ~bitwiseAnd((if dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 <= 2147483647 then dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 else dma_alloc_coherent_mask_~gfp#1 % 4294967296 % 4294967296 - 4294967296), 1));dma_alloc_coherent_mask_#t~ite106#1 := 4294967295; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5755: dma_alloc_coherent_gfp_flags_#t~ret107#1 := dma_alloc_coherent_mask_#res#1;assume { :end_inline_dma_alloc_coherent_mask } true;dma_alloc_coherent_gfp_flags_~tmp~7#1 := dma_alloc_coherent_gfp_flags_#t~ret107#1;havoc dma_alloc_coherent_gfp_flags_#t~ret107#1;dma_alloc_coherent_gfp_flags_~dma_mask~1#1 := dma_alloc_coherent_gfp_flags_~tmp~7#1; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9455: tlan_ee_receive_byte_~tmp___2~9#1 := tlan_ee_receive_byte_#t~ret968#1;havoc tlan_ee_receive_byte_#t~ret968#1; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9456: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp___2~9#1 % 256, 191), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9456-1: tlan_ee_receive_byte_~place~1#1 := tlan_ee_receive_byte_~place~1#1 % 256 / 2; [2021-11-23 03:40:16,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6814: assume 0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616;assume { :begin_inline_pci_disable_device } true;pci_disable_device_#in~arg0#1.base, pci_disable_device_#in~arg0#1.offset := tlan_probe1_~pdev#1.base, tlan_probe1_~pdev#1.offset;havoc pci_disable_device_~arg0#1.base, pci_disable_device_~arg0#1.offset;pci_disable_device_~arg0#1.base, pci_disable_device_~arg0#1.offset := pci_disable_device_#in~arg0#1.base, pci_disable_device_#in~arg0#1.offset; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6814: assume !(0 != (tlan_probe1_~pdev#1.base + tlan_probe1_~pdev#1.offset) % 18446744073709551616); [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6815-1: tlan_probe1_#res#1 := tlan_probe1_~rc~1#1;call ULTIMATE.dealloc(tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset);havoc tlan_probe1_~#__key~0#1.base, tlan_probe1_~#__key~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset);havoc tlan_probe1_~#__constr_expr_0~0#1.base, tlan_probe1_~#__constr_expr_0~0#1.offset;call ULTIMATE.dealloc(tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset);havoc tlan_probe1_~#__key___0~0#1.base, tlan_probe1_~#__key___0~0#1.offset; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9459: assume 0 != tlan_ee_receive_byte_~place~1#1 % 256 % 4294967296; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9459: assume !(0 != tlan_ee_receive_byte_~place~1#1 % 256 % 4294967296); [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9461: SUMMARY for call tlan_ee_receive_byte_#t~ret965#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11049: assume { :end_inline_ldv_spin_unlock_irqrestore_86 } true;tlan_ee_read_byte_#res#1 := tlan_ee_read_byte_~ret~0#1; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L6821: tlan_eisa_probe_#t~ret338#1 := tlan_probe1_#res#1;assume { :end_inline_tlan_probe1 } true;assume -2147483648 <= tlan_eisa_probe_#t~ret338#1 && tlan_eisa_probe_#t~ret338#1 <= 2147483647;tlan_eisa_probe_~rc~2#1 := tlan_eisa_probe_#t~ret338#1;havoc tlan_eisa_probe_#t~ret338#1; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11578: ldv_alloc_etherdev_mqs_#t~ret992#1.base, ldv_alloc_etherdev_mqs_#t~ret992#1.offset := ldv_xmalloc_#res#1.base, ldv_xmalloc_#res#1.offset;assume { :end_inline_ldv_xmalloc } true;ldv_alloc_etherdev_mqs_~tmp~72#1.base, ldv_alloc_etherdev_mqs_~tmp~72#1.offset := ldv_alloc_etherdev_mqs_#t~ret992#1.base, ldv_alloc_etherdev_mqs_#t~ret992#1.offset;havoc ldv_alloc_etherdev_mqs_#t~ret992#1.base, ldv_alloc_etherdev_mqs_#t~ret992#1.offset;ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.base, ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.offset := ldv_alloc_etherdev_mqs_~tmp~72#1.base, ldv_alloc_etherdev_mqs_~tmp~72#1.offset;ldv_alloc_etherdev_mqs_#res#1.base, ldv_alloc_etherdev_mqs_#res#1.offset := ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.base, ldv_alloc_etherdev_mqs_~ldv_4_netdev_net_device~0#1.offset; [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9465: SUMMARY for call tlan_ee_receive_byte_#t~ret969#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,558 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9465-1: tlan_ee_receive_byte_~tmp___3~8#1 := tlan_ee_receive_byte_#t~ret969#1;havoc tlan_ee_receive_byte_#t~ret969#1; [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9466: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___3~8#1 % 256, 32) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___3~8#1 % 256, 32) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___3~8#1 % 256, 32) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9466-1: assume 0 == tlan_ee_receive_byte_~stop#1; [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9466-1: assume !(0 == tlan_ee_receive_byte_~stop#1); [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5767: assume dma_alloc_coherent_gfp_flags_~dma_mask~1#1 % 18446744073709551616 <= 16777215;dma_alloc_coherent_gfp_flags_~gfp#1 := ~bitwiseOr(dma_alloc_coherent_gfp_flags_~gfp#1, 1); [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5767: assume !(dma_alloc_coherent_gfp_flags_~dma_mask~1#1 % 18446744073709551616 <= 16777215); [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5767-2: assume dma_alloc_coherent_gfp_flags_~dma_mask~1#1 % 18446744073709551616 <= 4294967295 && 0 == ~bitwiseAnd(dma_alloc_coherent_gfp_flags_~gfp#1, 1) % 4294967296;dma_alloc_coherent_gfp_flags_~gfp#1 := ~bitwiseOr(dma_alloc_coherent_gfp_flags_~gfp#1, 4); [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5767-2: assume !(dma_alloc_coherent_gfp_flags_~dma_mask~1#1 % 18446744073709551616 <= 4294967295 && 0 == ~bitwiseAnd(dma_alloc_coherent_gfp_flags_~gfp#1, 1) % 4294967296); [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9470-1: tlan_ee_receive_byte_~tmp___4~6#1 := tlan_ee_receive_byte_#t~ret970#1;havoc tlan_ee_receive_byte_#t~ret970#1; [2021-11-23 03:40:16,559 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9470: SUMMARY for call tlan_ee_receive_byte_#t~ret970#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13170: assume { :end_inline_free_netdev } true;assume { :begin_inline_ldv_free_netdev } true;ldv_free_netdev_#in~arg0#1.base, ldv_free_netdev_#in~arg0#1.offset, ldv_free_netdev_#in~arg1#1.base, ldv_free_netdev_#in~arg1#1.offset := 0, 0, ldv_free_netdev_96_~ldv_func_arg1#1.base, ldv_free_netdev_96_~ldv_func_arg1#1.offset;havoc ldv_free_netdev_~arg0#1.base, ldv_free_netdev_~arg0#1.offset, ldv_free_netdev_~arg1#1.base, ldv_free_netdev_~arg1#1.offset, ldv_free_netdev_~ldv_7_netdev_net_device~0#1.base, ldv_free_netdev_~ldv_7_netdev_net_device~0#1.offset;ldv_free_netdev_~arg0#1.base, ldv_free_netdev_~arg0#1.offset := ldv_free_netdev_#in~arg0#1.base, ldv_free_netdev_#in~arg0#1.offset;ldv_free_netdev_~arg1#1.base, ldv_free_netdev_~arg1#1.offset := ldv_free_netdev_#in~arg1#1.base, ldv_free_netdev_#in~arg1#1.offset;havoc ldv_free_netdev_~ldv_7_netdev_net_device~0#1.base, ldv_free_netdev_~ldv_7_netdev_net_device~0#1.offset;ldv_free_netdev_~ldv_7_netdev_net_device~0#1.base, ldv_free_netdev_~ldv_7_netdev_net_device~0#1.offset := ldv_free_netdev_~arg1#1.base, ldv_free_netdev_~arg1#1.offset;assume { :begin_inline_ldv_free } true;ldv_free_#in~s#1.base, ldv_free_#in~s#1.offset := ldv_free_netdev_~ldv_7_netdev_net_device~0#1.base, ldv_free_netdev_~ldv_7_netdev_net_device~0#1.offset;havoc ldv_free_~s#1.base, ldv_free_~s#1.offset;ldv_free_~s#1.base, ldv_free_~s#1.offset := ldv_free_#in~s#1.base, ldv_free_#in~s#1.offset;call ULTIMATE.dealloc(ldv_free_~s#1.base, ldv_free_~s#1.offset); [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5771-1: dma_alloc_coherent_gfp_flags_#res#1 := dma_alloc_coherent_gfp_flags_~gfp#1; [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9471: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp___4~6#1 % 256, 239), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9471-1: SUMMARY for call tlan_ee_receive_byte_#t~ret971#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9472: tlan_ee_receive_byte_~tmp___5~5#1 := tlan_ee_receive_byte_#t~ret971#1;havoc tlan_ee_receive_byte_#t~ret971#1; [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9473: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___5~5#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___5~5#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___5~5#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9473-1: SUMMARY for call tlan_ee_receive_byte_#t~ret972#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13173: assume { :end_inline_init_timer_key } true;assume { :begin_inline_tlan_start } true;tlan_start_#in~dev#1.base, tlan_start_#in~dev#1.offset := tlan_open_~dev#1.base, tlan_open_~dev#1.offset;havoc tlan_start_~dev#1.base, tlan_start_~dev#1.offset;tlan_start_~dev#1.base, tlan_start_~dev#1.offset := tlan_start_#in~dev#1.base, tlan_start_#in~dev#1.offset;assume { :begin_inline_tlan_reset_lists } true;tlan_reset_lists_#in~dev#1.base, tlan_reset_lists_#in~dev#1.offset := tlan_start_~dev#1.base, tlan_start_~dev#1.offset;havoc tlan_reset_lists_#t~ret587#1.base, tlan_reset_lists_#t~ret587#1.offset, tlan_reset_lists_#t~mem588#1.base, tlan_reset_lists_#t~mem588#1.offset, tlan_reset_lists_#t~mem589#1.base, tlan_reset_lists_#t~mem589#1.offset, tlan_reset_lists_#t~mem590#1, tlan_reset_lists_#t~ret591#1.base, tlan_reset_lists_#t~ret591#1.offset, tlan_reset_lists_#t~mem592#1.base, tlan_reset_lists_#t~mem592#1.offset, tlan_reset_lists_#t~mem593#1.base, tlan_reset_lists_#t~mem593#1.offset, tlan_reset_lists_#t~ret594#1, tlan_reset_lists_#t~mem595#1.base, tlan_reset_lists_#t~mem595#1.offset, tlan_reset_lists_~dev#1.base, tlan_reset_lists_~dev#1.offset, tlan_reset_lists_~priv~19#1.base, tlan_reset_lists_~priv~19#1.offset, tlan_reset_lists_~tmp~50#1.base, tlan_reset_lists_~tmp~50#1.offset, tlan_reset_lists_~i~3#1, tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset, tlan_reset_lists_~list_phys~0#1, tlan_reset_lists_~skb~3#1.base, tlan_reset_lists_~skb~3#1.offset, tlan_reset_lists_~tmp___0~18#1;tlan_reset_lists_~dev#1.base, tlan_reset_lists_~dev#1.offset := tlan_reset_lists_#in~dev#1.base, tlan_reset_lists_#in~dev#1.offset;havoc tlan_reset_lists_~priv~19#1.base, tlan_reset_lists_~priv~19#1.offset;havoc tlan_reset_lists_~tmp~50#1.base, tlan_reset_lists_~tmp~50#1.offset;havoc tlan_reset_lists_~i~3#1;havoc tlan_reset_lists_~list~0#1.base, tlan_reset_lists_~list~0#1.offset;havoc tlan_reset_lists_~list_phys~0#1;havoc tlan_reset_lists_~skb~3#1.base, tlan_reset_lists_~skb~3#1.offset;havoc tlan_reset_lists_~tmp___0~18#1;assume { :begin_inline_netdev_priv } true;netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset := tlan_reset_lists_~dev#1.base, tlan_reset_lists_~dev#1.offset;havoc netdev_priv_#res#1.base, netdev_priv_#res#1.offset;havoc netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset;netdev_priv_~dev#1.base, netdev_priv_~dev#1.offset := netdev_priv_#in~dev#1.base, netdev_priv_#in~dev#1.offset;netdev_priv_#res#1.base, netdev_priv_#res#1.offset := netdev_priv_~dev#1.base, 3200 + netdev_priv_~dev#1.offset; [2021-11-23 03:40:16,560 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9474: tlan_ee_receive_byte_~tmp___6~4#1 := tlan_ee_receive_byte_#t~ret972#1;havoc tlan_ee_receive_byte_#t~ret972#1; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5775: dma_alloc_attrs_#t~ret111#1 := dma_alloc_coherent_gfp_flags_#res#1;assume { :end_inline_dma_alloc_coherent_gfp_flags } true;dma_alloc_attrs_~tmp___1~2#1 := dma_alloc_attrs_#t~ret111#1;havoc dma_alloc_attrs_#t~ret111#1;call dma_alloc_attrs_#t~mem118#1.base, dma_alloc_attrs_#t~mem118#1.offset := read~$Pointer$(dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, 8);assume { :begin_inline_##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$ } true;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~113#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~113#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~114#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~115#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~115#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~116#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~117#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~117#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~#fp#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~#fp#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~tmp___1~2#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_#t~mem118#1.base, dma_alloc_attrs_#t~mem118#1.offset;havoc ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#res#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#res#1.offset;havoc ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~113#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~113#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~114#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~115#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~115#1.offset, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~116#1, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~117#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~117#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~113#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~113#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~113#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~113#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~114#1 := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~114#1;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~115#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~115#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~115#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~115#1.offset;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~116#1 := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~116#1;##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~117#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#~117#1.offset := ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~117#1.base, ##fun~$Pointer$~X~int~X~$Pointer$~X~~gfp_t~0~X~$Pointer$~TO~$Pointer$_#in~117#1.offset; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9475: SUMMARY for call outb_p(~bitwiseAnd(tlan_ee_receive_byte_~tmp___6~4#1 % 256, 191), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9479: SUMMARY for call tlan_ee_receive_byte_#t~ret973#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9479-1: tlan_ee_receive_byte_~tmp___7~3#1 := tlan_ee_receive_byte_#t~ret973#1;havoc tlan_ee_receive_byte_#t~ret973#1; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L11594: ldv_dev_set_drvdata_#t~ret1095#1.base, ldv_dev_set_drvdata_#t~ret1095#1.offset := ldv_xzalloc_#res#1.base, ldv_xzalloc_#res#1.offset;assume { :end_inline_ldv_xzalloc } true;ldv_dev_set_drvdata_~tmp~99#1.base, ldv_dev_set_drvdata_~tmp~99#1.offset := ldv_dev_set_drvdata_#t~ret1095#1.base, ldv_dev_set_drvdata_#t~ret1095#1.offset;havoc ldv_dev_set_drvdata_#t~ret1095#1.base, ldv_dev_set_drvdata_#t~ret1095#1.offset;call write~$Pointer$(ldv_dev_set_drvdata_~tmp~99#1.base, ldv_dev_set_drvdata_~tmp~99#1.offset, ldv_dev_set_drvdata_~dev#1.base, 8 + ldv_dev_set_drvdata_~dev#1.offset, 8);call ldv_dev_set_drvdata_#t~mem1096#1.base, ldv_dev_set_drvdata_#t~mem1096#1.offset := read~$Pointer$(ldv_dev_set_drvdata_~dev#1.base, 8 + ldv_dev_set_drvdata_~dev#1.offset, 8);call write~$Pointer$(ldv_dev_set_drvdata_~data#1.base, ldv_dev_set_drvdata_~data#1.offset, ldv_dev_set_drvdata_#t~mem1096#1.base, ldv_dev_set_drvdata_#t~mem1096#1.offset, 8);havoc ldv_dev_set_drvdata_#t~mem1096#1.base, ldv_dev_set_drvdata_#t~mem1096#1.offset;ldv_dev_set_drvdata_#res#1 := 0; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13179-24: assume { :end_inline_ldv_assert } true;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 1 == ~ldv_spin_lock_of_tlan_priv~0 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L13179-25: assume { :end_inline_ldv_assert } true;assume { :begin_inline_ldv_assume } true;ldv_assume_#in~expression#1 := (if 2 == ~ldv_spin_lock_of_tlan_priv~0 then 1 else 0);havoc ldv_assume_~expression#1;ldv_assume_~expression#1 := ldv_assume_#in~expression#1; [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9480: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___7~3#1 % 256, 16) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___7~3#1 % 256, 16) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___7~3#1 % 256, 16) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,561 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9480-1: SUMMARY for call tlan_ee_receive_byte_#t~ret974#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,562 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9481: tlan_ee_receive_byte_~tmp___8~3#1 := tlan_ee_receive_byte_#t~ret974#1;havoc tlan_ee_receive_byte_#t~ret974#1; [2021-11-23 03:40:16,562 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9482: SUMMARY for call outb_p((if ~bitwiseOr(tlan_ee_receive_byte_~tmp___8~3#1 % 256, 64) % 4294967296 % 4294967296 <= 2147483647 then ~bitwiseOr(tlan_ee_receive_byte_~tmp___8~3#1 % 256, 64) % 4294967296 % 4294967296 else ~bitwiseOr(tlan_ee_receive_byte_~tmp___8~3#1 % 256, 64) % 4294967296 % 4294967296 - 4294967296), tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,562 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L9482-1: SUMMARY for call tlan_ee_receive_byte_#t~ret975#1 := inb_p(tlan_ee_receive_byte_~sio~7#1 % 65536); srcloc: null [2021-11-23 03:40:16,937 INFO L277 CfgBuilder]: Performing block encoding [2021-11-23 03:40:16,964 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-23 03:40:16,964 INFO L301 CfgBuilder]: Removed 34 assume(true) statements. [2021-11-23 03:40:16,968 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:40:16 BoogieIcfgContainer [2021-11-23 03:40:16,968 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-23 03:40:16,969 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-23 03:40:16,969 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-23 03:40:16,972 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-23 03:40:16,972 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:40:04" (1/3) ... [2021-11-23 03:40:16,972 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c155b89 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:40:16, skipping insertion in model container [2021-11-23 03:40:16,972 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:40:07" (2/3) ... [2021-11-23 03:40:16,972 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c155b89 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:40:16, skipping insertion in model container [2021-11-23 03:40:16,973 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:40:16" (3/3) ... [2021-11-23 03:40:16,973 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_complex_emg_linux-alloc-spinlock_drivers-net-ethernet-ti-tlan.cil.i [2021-11-23 03:40:16,977 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-23 03:40:16,977 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 11 error locations. [2021-11-23 03:40:17,016 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-23 03:40:17,020 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-23 03:40:17,020 INFO L340 AbstractCegarLoop]: Starting to check reachability of 11 error locations. [2021-11-23 03:40:17,071 INFO L276 IsEmpty]: Start isEmpty. Operand has 4648 states, 4334 states have (on average 1.2884171665897555) internal successors, (5584), 4364 states have internal predecessors, (5584), 285 states have call successors, (285), 19 states have call predecessors, (285), 19 states have return successors, (285), 275 states have call predecessors, (285), 285 states have call successors, (285) [2021-11-23 03:40:17,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2021-11-23 03:40:17,081 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:17,081 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:17,082 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:17,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:17,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1773120704, now seen corresponding path program 1 times [2021-11-23 03:40:17,091 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:17,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469104634] [2021-11-23 03:40:17,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:17,092 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:17,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:17,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:40:17,509 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:17,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469104634] [2021-11-23 03:40:17,509 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [469104634] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:17,509 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:17,510 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:17,511 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733357129] [2021-11-23 03:40:17,511 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:17,514 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:17,514 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:17,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:17,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:17,540 INFO L87 Difference]: Start difference. First operand has 4648 states, 4334 states have (on average 1.2884171665897555) internal successors, (5584), 4364 states have internal predecessors, (5584), 285 states have call successors, (285), 19 states have call predecessors, (285), 19 states have return successors, (285), 275 states have call predecessors, (285), 285 states have call successors, (285) Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:17,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:17,967 INFO L93 Difference]: Finished difference Result 10766 states and 14497 transitions. [2021-11-23 03:40:17,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:17,969 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 52 [2021-11-23 03:40:17,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:18,008 INFO L225 Difference]: With dead ends: 10766 [2021-11-23 03:40:18,008 INFO L226 Difference]: Without dead ends: 5908 [2021-11-23 03:40:18,043 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:18,046 INFO L933 BasicCegarLoop]: 6220 mSDtfsCounter, 4310 mSDsluCounter, 3545 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4310 SdHoareTripleChecker+Valid, 9765 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:18,046 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4310 Valid, 9765 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:18,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5908 states. [2021-11-23 03:40:18,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5908 to 5372. [2021-11-23 03:40:18,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5372 states, 5059 states have (on average 1.2316663372207945) internal successors, (6231), 5089 states have internal predecessors, (6231), 284 states have call successors, (284), 19 states have call predecessors, (284), 19 states have return successors, (284), 274 states have call predecessors, (284), 284 states have call successors, (284) [2021-11-23 03:40:18,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5372 states to 5372 states and 6799 transitions. [2021-11-23 03:40:18,255 INFO L78 Accepts]: Start accepts. Automaton has 5372 states and 6799 transitions. Word has length 52 [2021-11-23 03:40:18,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:18,256 INFO L470 AbstractCegarLoop]: Abstraction has 5372 states and 6799 transitions. [2021-11-23 03:40:18,256 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:18,256 INFO L276 IsEmpty]: Start isEmpty. Operand 5372 states and 6799 transitions. [2021-11-23 03:40:18,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-11-23 03:40:18,259 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:18,259 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:18,259 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-23 03:40:18,260 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:18,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:18,260 INFO L85 PathProgramCache]: Analyzing trace with hash 1434097785, now seen corresponding path program 1 times [2021-11-23 03:40:18,261 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:18,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799434839] [2021-11-23 03:40:18,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:18,261 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:18,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:18,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:40:18,420 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:18,420 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799434839] [2021-11-23 03:40:18,420 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [799434839] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:18,421 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:18,421 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:18,421 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427305615] [2021-11-23 03:40:18,421 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:18,423 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:18,423 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:18,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:18,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:18,424 INFO L87 Difference]: Start difference. First operand 5372 states and 6799 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:18,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:18,859 INFO L93 Difference]: Finished difference Result 14701 states and 18916 transitions. [2021-11-23 03:40:18,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:18,859 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-11-23 03:40:18,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:18,912 INFO L225 Difference]: With dead ends: 14701 [2021-11-23 03:40:18,912 INFO L226 Difference]: Without dead ends: 9382 [2021-11-23 03:40:18,933 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:18,935 INFO L933 BasicCegarLoop]: 6367 mSDtfsCounter, 4898 mSDsluCounter, 5406 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4898 SdHoareTripleChecker+Valid, 11773 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:18,936 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4898 Valid, 11773 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:18,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9382 states. [2021-11-23 03:40:19,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9382 to 9306. [2021-11-23 03:40:19,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9306 states, 8696 states have (on average 1.2283808647654093) internal successors, (10682), 8749 states have internal predecessors, (10682), 564 states have call successors, (564), 38 states have call predecessors, (564), 36 states have return successors, (844), 540 states have call predecessors, (844), 564 states have call successors, (844) [2021-11-23 03:40:19,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9306 states to 9306 states and 12090 transitions. [2021-11-23 03:40:19,258 INFO L78 Accepts]: Start accepts. Automaton has 9306 states and 12090 transitions. Word has length 58 [2021-11-23 03:40:19,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:19,259 INFO L470 AbstractCegarLoop]: Abstraction has 9306 states and 12090 transitions. [2021-11-23 03:40:19,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:19,259 INFO L276 IsEmpty]: Start isEmpty. Operand 9306 states and 12090 transitions. [2021-11-23 03:40:19,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-11-23 03:40:19,262 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:19,262 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:19,262 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-11-23 03:40:19,262 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:19,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:19,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1633562951, now seen corresponding path program 1 times [2021-11-23 03:40:19,263 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:19,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64631682] [2021-11-23 03:40:19,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:19,263 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:19,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:19,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:40:19,419 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:19,419 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64631682] [2021-11-23 03:40:19,419 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64631682] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:19,419 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:19,420 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:19,420 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407228457] [2021-11-23 03:40:19,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:19,420 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:19,420 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:19,421 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:19,421 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:19,421 INFO L87 Difference]: Start difference. First operand 9306 states and 12090 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:19,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:19,801 INFO L93 Difference]: Finished difference Result 26307 states and 34517 transitions. [2021-11-23 03:40:19,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:19,801 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-11-23 03:40:19,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:19,910 INFO L225 Difference]: With dead ends: 26307 [2021-11-23 03:40:19,910 INFO L226 Difference]: Without dead ends: 17054 [2021-11-23 03:40:19,958 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:19,959 INFO L933 BasicCegarLoop]: 5955 mSDtfsCounter, 5376 mSDsluCounter, 5355 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5376 SdHoareTripleChecker+Valid, 11310 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:19,959 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5376 Valid, 11310 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:19,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17054 states. [2021-11-23 03:40:20,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17054 to 16991. [2021-11-23 03:40:20,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16991 states, 15807 states have (on average 1.2262921490478902) internal successors, (19384), 15909 states have internal predecessors, (19384), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:20,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16991 states to 16991 states and 22414 transitions. [2021-11-23 03:40:20,764 INFO L78 Accepts]: Start accepts. Automaton has 16991 states and 22414 transitions. Word has length 62 [2021-11-23 03:40:20,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:20,766 INFO L470 AbstractCegarLoop]: Abstraction has 16991 states and 22414 transitions. [2021-11-23 03:40:20,766 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:20,766 INFO L276 IsEmpty]: Start isEmpty. Operand 16991 states and 22414 transitions. [2021-11-23 03:40:20,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-11-23 03:40:20,769 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:20,770 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:20,770 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-11-23 03:40:20,770 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:20,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:20,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1552829393, now seen corresponding path program 1 times [2021-11-23 03:40:20,771 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:20,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102143613] [2021-11-23 03:40:20,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:20,771 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:20,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:21,066 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:40:21,067 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:21,067 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102143613] [2021-11-23 03:40:21,067 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [102143613] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:21,067 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:21,067 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:21,068 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831684829] [2021-11-23 03:40:21,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:21,068 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:21,068 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:21,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:21,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:21,069 INFO L87 Difference]: Start difference. First operand 16991 states and 22414 transitions. Second operand has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:21,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:21,516 INFO L93 Difference]: Finished difference Result 36831 states and 48525 transitions. [2021-11-23 03:40:21,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:21,516 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 86 [2021-11-23 03:40:21,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:21,600 INFO L225 Difference]: With dead ends: 36831 [2021-11-23 03:40:21,601 INFO L226 Difference]: Without dead ends: 19893 [2021-11-23 03:40:21,661 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:21,662 INFO L933 BasicCegarLoop]: 7106 mSDtfsCounter, 1549 mSDsluCounter, 5490 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1549 SdHoareTripleChecker+Valid, 12596 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:21,662 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1549 Valid, 12596 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:21,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19893 states. [2021-11-23 03:40:22,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19893 to 19213. [2021-11-23 03:40:22,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19213 states, 18029 states have (on average 1.229907371457097) internal successors, (22174), 18131 states have internal predecessors, (22174), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19213 states to 19213 states and 25204 transitions. [2021-11-23 03:40:22,374 INFO L78 Accepts]: Start accepts. Automaton has 19213 states and 25204 transitions. Word has length 86 [2021-11-23 03:40:22,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:22,376 INFO L470 AbstractCegarLoop]: Abstraction has 19213 states and 25204 transitions. [2021-11-23 03:40:22,376 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:22,376 INFO L276 IsEmpty]: Start isEmpty. Operand 19213 states and 25204 transitions. [2021-11-23 03:40:22,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2021-11-23 03:40:22,381 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:22,381 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:22,381 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-11-23 03:40:22,382 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:22,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:22,382 INFO L85 PathProgramCache]: Analyzing trace with hash 204645284, now seen corresponding path program 1 times [2021-11-23 03:40:22,382 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:22,382 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362374769] [2021-11-23 03:40:22,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:22,383 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:22,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:22,525 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-11-23 03:40:22,526 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:22,526 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362374769] [2021-11-23 03:40:22,526 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [362374769] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:22,526 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:22,526 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:22,527 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040258251] [2021-11-23 03:40:22,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:22,527 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:22,527 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:22,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:22,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:22,528 INFO L87 Difference]: Start difference. First operand 19213 states and 25204 transitions. Second operand has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:23,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:23,136 INFO L93 Difference]: Finished difference Result 41263 states and 54077 transitions. [2021-11-23 03:40:23,137 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:23,137 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 124 [2021-11-23 03:40:23,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:23,210 INFO L225 Difference]: With dead ends: 41263 [2021-11-23 03:40:23,210 INFO L226 Difference]: Without dead ends: 22103 [2021-11-23 03:40:23,255 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:23,257 INFO L933 BasicCegarLoop]: 7107 mSDtfsCounter, 1546 mSDsluCounter, 5504 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1546 SdHoareTripleChecker+Valid, 12611 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:23,257 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1546 Valid, 12611 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:23,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22103 states. [2021-11-23 03:40:23,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22103 to 21423. [2021-11-23 03:40:23,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21423 states, 20239 states have (on average 1.2328672365235436) internal successors, (24952), 20341 states have internal predecessors, (24952), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:23,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21423 states to 21423 states and 27982 transitions. [2021-11-23 03:40:23,993 INFO L78 Accepts]: Start accepts. Automaton has 21423 states and 27982 transitions. Word has length 124 [2021-11-23 03:40:23,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:23,994 INFO L470 AbstractCegarLoop]: Abstraction has 21423 states and 27982 transitions. [2021-11-23 03:40:23,996 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:23,996 INFO L276 IsEmpty]: Start isEmpty. Operand 21423 states and 27982 transitions. [2021-11-23 03:40:24,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2021-11-23 03:40:24,004 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:24,005 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:24,005 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-11-23 03:40:24,005 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:24,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:24,006 INFO L85 PathProgramCache]: Analyzing trace with hash 906245158, now seen corresponding path program 1 times [2021-11-23 03:40:24,007 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:24,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [282131771] [2021-11-23 03:40:24,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:24,009 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:24,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:24,115 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-11-23 03:40:24,115 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:24,115 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [282131771] [2021-11-23 03:40:24,115 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [282131771] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:24,116 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:24,116 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:24,116 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437962983] [2021-11-23 03:40:24,116 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:24,117 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:24,117 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:24,117 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:24,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:24,118 INFO L87 Difference]: Start difference. First operand 21423 states and 27982 transitions. Second operand has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:24,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:24,680 INFO L93 Difference]: Finished difference Result 46465 states and 60605 transitions. [2021-11-23 03:40:24,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:24,681 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 124 [2021-11-23 03:40:24,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:24,780 INFO L225 Difference]: With dead ends: 46465 [2021-11-23 03:40:24,780 INFO L226 Difference]: Without dead ends: 25095 [2021-11-23 03:40:24,988 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:24,992 INFO L933 BasicCegarLoop]: 7109 mSDtfsCounter, 1904 mSDsluCounter, 5378 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1904 SdHoareTripleChecker+Valid, 12487 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:24,992 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1904 Valid, 12487 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:25,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25095 states. [2021-11-23 03:40:25,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25095 to 23645. [2021-11-23 03:40:25,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23645 states, 22461 states have (on average 1.2351186501046258) internal successors, (27742), 22563 states have internal predecessors, (27742), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:25,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23645 states to 23645 states and 30772 transitions. [2021-11-23 03:40:25,555 INFO L78 Accepts]: Start accepts. Automaton has 23645 states and 30772 transitions. Word has length 124 [2021-11-23 03:40:25,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:25,556 INFO L470 AbstractCegarLoop]: Abstraction has 23645 states and 30772 transitions. [2021-11-23 03:40:25,556 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:25,556 INFO L276 IsEmpty]: Start isEmpty. Operand 23645 states and 30772 transitions. [2021-11-23 03:40:25,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2021-11-23 03:40:25,563 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:25,563 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:25,563 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-11-23 03:40:25,563 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:25,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:25,564 INFO L85 PathProgramCache]: Analyzing trace with hash -589628141, now seen corresponding path program 1 times [2021-11-23 03:40:25,564 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:25,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362821205] [2021-11-23 03:40:25,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:25,564 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:25,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:25,829 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-11-23 03:40:25,830 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:25,830 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362821205] [2021-11-23 03:40:25,830 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [362821205] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:25,830 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:25,830 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:25,830 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811793045] [2021-11-23 03:40:25,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:25,831 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:25,831 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:25,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:25,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:25,832 INFO L87 Difference]: Start difference. First operand 23645 states and 30772 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:26,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:26,330 INFO L93 Difference]: Finished difference Result 50131 states and 65221 transitions. [2021-11-23 03:40:26,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:26,331 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 162 [2021-11-23 03:40:26,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:26,438 INFO L225 Difference]: With dead ends: 50131 [2021-11-23 03:40:26,438 INFO L226 Difference]: Without dead ends: 26539 [2021-11-23 03:40:26,512 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:26,513 INFO L933 BasicCegarLoop]: 6194 mSDtfsCounter, 1549 mSDsluCounter, 5502 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1549 SdHoareTripleChecker+Valid, 11696 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:26,514 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1549 Valid, 11696 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:26,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26539 states. [2021-11-23 03:40:27,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26539 to 25859. [2021-11-23 03:40:27,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25859 states, 24675 states have (on average 1.2370415400202635) internal successors, (30524), 24777 states have internal predecessors, (30524), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:27,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25859 states to 25859 states and 33554 transitions. [2021-11-23 03:40:27,238 INFO L78 Accepts]: Start accepts. Automaton has 25859 states and 33554 transitions. Word has length 162 [2021-11-23 03:40:27,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:27,239 INFO L470 AbstractCegarLoop]: Abstraction has 25859 states and 33554 transitions. [2021-11-23 03:40:27,239 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:27,239 INFO L276 IsEmpty]: Start isEmpty. Operand 25859 states and 33554 transitions. [2021-11-23 03:40:27,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2021-11-23 03:40:27,244 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:27,244 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:27,244 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-11-23 03:40:27,244 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:27,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:27,245 INFO L85 PathProgramCache]: Analyzing trace with hash 111971733, now seen corresponding path program 1 times [2021-11-23 03:40:27,245 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:27,245 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417585819] [2021-11-23 03:40:27,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:27,245 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:27,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:27,387 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-11-23 03:40:27,388 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:27,388 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417585819] [2021-11-23 03:40:27,388 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [417585819] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:27,388 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:27,388 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:27,388 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859742807] [2021-11-23 03:40:27,388 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:27,389 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:27,389 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:27,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:27,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:27,389 INFO L87 Difference]: Start difference. First operand 25859 states and 33554 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:28,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:28,165 INFO L93 Difference]: Finished difference Result 54563 states and 70793 transitions. [2021-11-23 03:40:28,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:28,166 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 162 [2021-11-23 03:40:28,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:28,280 INFO L225 Difference]: With dead ends: 54563 [2021-11-23 03:40:28,281 INFO L226 Difference]: Without dead ends: 28757 [2021-11-23 03:40:28,365 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:28,366 INFO L933 BasicCegarLoop]: 7107 mSDtfsCounter, 1558 mSDsluCounter, 5494 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1558 SdHoareTripleChecker+Valid, 12601 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:28,366 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1558 Valid, 12601 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:40:28,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28757 states. [2021-11-23 03:40:29,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28757 to 28077. [2021-11-23 03:40:29,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28077 states, 26893 states have (on average 1.2386122782880304) internal successors, (33310), 26995 states have internal predecessors, (33310), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:29,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28077 states to 28077 states and 36340 transitions. [2021-11-23 03:40:29,147 INFO L78 Accepts]: Start accepts. Automaton has 28077 states and 36340 transitions. Word has length 162 [2021-11-23 03:40:29,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:29,148 INFO L470 AbstractCegarLoop]: Abstraction has 28077 states and 36340 transitions. [2021-11-23 03:40:29,148 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:29,148 INFO L276 IsEmpty]: Start isEmpty. Operand 28077 states and 36340 transitions. [2021-11-23 03:40:29,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2021-11-23 03:40:29,154 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:29,154 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:29,155 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-11-23 03:40:29,155 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:29,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:29,155 INFO L85 PathProgramCache]: Analyzing trace with hash 463208893, now seen corresponding path program 1 times [2021-11-23 03:40:29,155 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:29,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660406949] [2021-11-23 03:40:29,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:29,156 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:29,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:29,282 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2021-11-23 03:40:29,283 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:29,283 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660406949] [2021-11-23 03:40:29,283 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1660406949] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:29,283 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:29,283 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:29,283 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523233583] [2021-11-23 03:40:29,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:29,284 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:29,284 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:29,285 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:29,285 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:29,285 INFO L87 Difference]: Start difference. First operand 28077 states and 36340 transitions. Second operand has 3 states, 3 states have (on average 46.0) internal successors, (138), 3 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:29,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:29,952 INFO L93 Difference]: Finished difference Result 56581 states and 73231 transitions. [2021-11-23 03:40:29,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:29,953 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.0) internal successors, (138), 3 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 190 [2021-11-23 03:40:29,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:30,052 INFO L225 Difference]: With dead ends: 56581 [2021-11-23 03:40:30,052 INFO L226 Difference]: Without dead ends: 28557 [2021-11-23 03:40:30,158 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:30,160 INFO L933 BasicCegarLoop]: 5527 mSDtfsCounter, 171 mSDsluCounter, 5515 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 171 SdHoareTripleChecker+Valid, 11042 SdHoareTripleChecker+Invalid, 52 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:30,161 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [171 Valid, 11042 Invalid, 52 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 03:40:30,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28557 states. [2021-11-23 03:40:30,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28557 to 28097. [2021-11-23 03:40:30,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28097 states, 26913 states have (on average 1.238434957083937) internal successors, (33330), 27015 states have internal predecessors, (33330), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:30,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28097 states to 28097 states and 36360 transitions. [2021-11-23 03:40:30,897 INFO L78 Accepts]: Start accepts. Automaton has 28097 states and 36360 transitions. Word has length 190 [2021-11-23 03:40:30,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:30,897 INFO L470 AbstractCegarLoop]: Abstraction has 28097 states and 36360 transitions. [2021-11-23 03:40:30,897 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.0) internal successors, (138), 3 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:30,897 INFO L276 IsEmpty]: Start isEmpty. Operand 28097 states and 36360 transitions. [2021-11-23 03:40:30,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2021-11-23 03:40:30,905 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:30,905 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:30,905 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-11-23 03:40:30,905 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:30,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:30,906 INFO L85 PathProgramCache]: Analyzing trace with hash 627501700, now seen corresponding path program 1 times [2021-11-23 03:40:30,906 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:30,906 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723727963] [2021-11-23 03:40:30,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:30,907 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:30,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-11-23 03:40:31,074 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:31,075 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723727963] [2021-11-23 03:40:31,075 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1723727963] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:31,075 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:31,075 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 03:40:31,075 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40412715] [2021-11-23 03:40:31,075 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:31,076 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 03:40:31,076 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:31,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 03:40:31,076 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 03:40:31,076 INFO L87 Difference]: Start difference. First operand 28097 states and 36360 transitions. Second operand has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:33,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:33,252 INFO L93 Difference]: Finished difference Result 127311 states and 163102 transitions. [2021-11-23 03:40:33,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 03:40:33,253 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 193 [2021-11-23 03:40:33,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:33,600 INFO L225 Difference]: With dead ends: 127311 [2021-11-23 03:40:33,600 INFO L226 Difference]: Without dead ends: 99267 [2021-11-23 03:40:33,694 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 03:40:33,695 INFO L933 BasicCegarLoop]: 12858 mSDtfsCounter, 11671 mSDsluCounter, 18666 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 138 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11921 SdHoareTripleChecker+Valid, 31524 SdHoareTripleChecker+Invalid, 175 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 138 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:33,696 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [11921 Valid, 31524 Invalid, 175 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [138 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-23 03:40:33,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99267 states. [2021-11-23 03:40:35,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99267 to 28105. [2021-11-23 03:40:35,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28105 states, 26921 states have (on average 1.2383641023736116) internal successors, (33338), 27023 states have internal predecessors, (33338), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:35,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28105 states to 28105 states and 36368 transitions. [2021-11-23 03:40:35,279 INFO L78 Accepts]: Start accepts. Automaton has 28105 states and 36368 transitions. Word has length 193 [2021-11-23 03:40:35,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:35,279 INFO L470 AbstractCegarLoop]: Abstraction has 28105 states and 36368 transitions. [2021-11-23 03:40:35,280 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:35,280 INFO L276 IsEmpty]: Start isEmpty. Operand 28105 states and 36368 transitions. [2021-11-23 03:40:35,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2021-11-23 03:40:35,285 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:35,285 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:35,285 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-11-23 03:40:35,285 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:35,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:35,286 INFO L85 PathProgramCache]: Analyzing trace with hash 29953190, now seen corresponding path program 1 times [2021-11-23 03:40:35,286 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:35,286 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217341250] [2021-11-23 03:40:35,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:35,286 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:35,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:35,448 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2021-11-23 03:40:35,448 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:35,448 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217341250] [2021-11-23 03:40:35,448 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [217341250] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:35,448 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:35,449 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 03:40:35,449 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766605512] [2021-11-23 03:40:35,449 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:35,449 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 03:40:35,449 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:35,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 03:40:35,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 03:40:35,450 INFO L87 Difference]: Start difference. First operand 28105 states and 36368 transitions. Second operand has 4 states, 4 states have (on average 38.5) internal successors, (154), 4 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:37,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:37,077 INFO L93 Difference]: Finished difference Result 84435 states and 109003 transitions. [2021-11-23 03:40:37,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 03:40:37,078 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.5) internal successors, (154), 4 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 196 [2021-11-23 03:40:37,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:37,251 INFO L225 Difference]: With dead ends: 84435 [2021-11-23 03:40:37,252 INFO L226 Difference]: Without dead ends: 56383 [2021-11-23 03:40:37,338 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 03:40:37,338 INFO L933 BasicCegarLoop]: 9203 mSDtfsCounter, 8427 mSDsluCounter, 13533 mSDsCounter, 0 mSdLazyCounter, 137 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8607 SdHoareTripleChecker+Valid, 22736 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 137 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:37,338 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [8607 Valid, 22736 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 137 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-23 03:40:37,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56383 states. [2021-11-23 03:40:38,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56383 to 30295. [2021-11-23 03:40:38,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30295 states, 29111 states have (on average 1.2399436639071142) internal successors, (36096), 29213 states have internal predecessors, (36096), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:38,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30295 states to 30295 states and 39126 transitions. [2021-11-23 03:40:38,727 INFO L78 Accepts]: Start accepts. Automaton has 30295 states and 39126 transitions. Word has length 196 [2021-11-23 03:40:38,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:38,727 INFO L470 AbstractCegarLoop]: Abstraction has 30295 states and 39126 transitions. [2021-11-23 03:40:38,727 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.5) internal successors, (154), 4 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:38,727 INFO L276 IsEmpty]: Start isEmpty. Operand 30295 states and 39126 transitions. [2021-11-23 03:40:38,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2021-11-23 03:40:38,733 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:38,733 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:38,733 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-11-23 03:40:38,734 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:38,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:38,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1557849659, now seen corresponding path program 1 times [2021-11-23 03:40:38,734 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:38,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570691170] [2021-11-23 03:40:38,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:38,735 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:38,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:38,847 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2021-11-23 03:40:38,848 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:38,848 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570691170] [2021-11-23 03:40:38,848 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [570691170] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:38,848 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:38,848 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 03:40:38,848 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431090927] [2021-11-23 03:40:38,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:38,849 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 03:40:38,849 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:38,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 03:40:38,849 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 03:40:38,850 INFO L87 Difference]: Start difference. First operand 30295 states and 39126 transitions. Second operand has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:40,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:40,662 INFO L93 Difference]: Finished difference Result 88735 states and 114432 transitions. [2021-11-23 03:40:40,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 03:40:40,663 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 197 [2021-11-23 03:40:40,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:40,821 INFO L225 Difference]: With dead ends: 88735 [2021-11-23 03:40:40,821 INFO L226 Difference]: Without dead ends: 58493 [2021-11-23 03:40:40,906 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 03:40:40,906 INFO L933 BasicCegarLoop]: 9708 mSDtfsCounter, 7197 mSDsluCounter, 15251 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7380 SdHoareTripleChecker+Valid, 24959 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:40,906 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [7380 Valid, 24959 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-23 03:40:40,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58493 states. [2021-11-23 03:40:42,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58493 to 32505. [2021-11-23 03:40:42,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32505 states, 31321 states have (on average 1.241148111490693) internal successors, (38874), 31423 states have internal predecessors, (38874), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:42,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32505 states to 32505 states and 41904 transitions. [2021-11-23 03:40:42,702 INFO L78 Accepts]: Start accepts. Automaton has 32505 states and 41904 transitions. Word has length 197 [2021-11-23 03:40:42,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:42,702 INFO L470 AbstractCegarLoop]: Abstraction has 32505 states and 41904 transitions. [2021-11-23 03:40:42,702 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:42,703 INFO L276 IsEmpty]: Start isEmpty. Operand 32505 states and 41904 transitions. [2021-11-23 03:40:42,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2021-11-23 03:40:42,710 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:42,710 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:42,710 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-11-23 03:40:42,710 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:42,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:42,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1257426823, now seen corresponding path program 1 times [2021-11-23 03:40:42,711 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:42,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563715916] [2021-11-23 03:40:42,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:42,712 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:42,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:42,836 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2021-11-23 03:40:42,836 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:42,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563715916] [2021-11-23 03:40:42,836 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1563715916] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:42,836 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:42,837 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 03:40:42,837 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393946006] [2021-11-23 03:40:42,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:42,837 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 03:40:42,837 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:42,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 03:40:42,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 03:40:42,838 INFO L87 Difference]: Start difference. First operand 32505 states and 41904 transitions. Second operand has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:44,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:44,883 INFO L93 Difference]: Finished difference Result 92895 states and 119720 transitions. [2021-11-23 03:40:44,884 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 03:40:44,884 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 198 [2021-11-23 03:40:44,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:45,050 INFO L225 Difference]: With dead ends: 92895 [2021-11-23 03:40:45,050 INFO L226 Difference]: Without dead ends: 60443 [2021-11-23 03:40:45,134 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 03:40:45,135 INFO L933 BasicCegarLoop]: 9959 mSDtfsCounter, 6710 mSDsluCounter, 15108 mSDsCounter, 0 mSdLazyCounter, 143 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6894 SdHoareTripleChecker+Valid, 25067 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 143 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:45,135 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [6894 Valid, 25067 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 143 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-23 03:40:45,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60443 states. [2021-11-23 03:40:46,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60443 to 34711. [2021-11-23 03:40:46,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34711 states, 33527 states have (on average 1.2422226861932173) internal successors, (41648), 33629 states have internal predecessors, (41648), 1108 states have call successors, (1108), 76 states have call predecessors, (1108), 66 states have return successors, (1922), 1049 states have call predecessors, (1922), 1108 states have call successors, (1922) [2021-11-23 03:40:46,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34711 states to 34711 states and 44678 transitions. [2021-11-23 03:40:46,790 INFO L78 Accepts]: Start accepts. Automaton has 34711 states and 44678 transitions. Word has length 198 [2021-11-23 03:40:46,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:40:46,790 INFO L470 AbstractCegarLoop]: Abstraction has 34711 states and 44678 transitions. [2021-11-23 03:40:46,790 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:46,790 INFO L276 IsEmpty]: Start isEmpty. Operand 34711 states and 44678 transitions. [2021-11-23 03:40:46,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2021-11-23 03:40:46,796 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:40:46,796 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:40:46,796 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-11-23 03:40:46,796 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 8 more)] === [2021-11-23 03:40:46,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:40:46,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1898552581, now seen corresponding path program 1 times [2021-11-23 03:40:46,797 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 03:40:46,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121589517] [2021-11-23 03:40:46,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:40:46,797 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:40:46,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:40:46,928 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-11-23 03:40:46,928 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 03:40:46,929 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121589517] [2021-11-23 03:40:46,929 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121589517] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:40:46,929 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:40:46,929 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 03:40:46,929 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82812983] [2021-11-23 03:40:46,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:40:46,930 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:40:46,930 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 03:40:46,930 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:40:46,930 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:46,930 INFO L87 Difference]: Start difference. First operand 34711 states and 44678 transitions. Second operand has 3 states, 3 states have (on average 59.0) internal successors, (177), 3 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:40:48,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:40:48,203 INFO L93 Difference]: Finished difference Result 70285 states and 91089 transitions. [2021-11-23 03:40:48,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:40:48,204 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 59.0) internal successors, (177), 3 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 199 [2021-11-23 03:40:48,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:40:48,302 INFO L225 Difference]: With dead ends: 70285 [2021-11-23 03:40:48,303 INFO L226 Difference]: Without dead ends: 35627 [2021-11-23 03:40:48,380 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:40:48,381 INFO L933 BasicCegarLoop]: 5658 mSDtfsCounter, 127 mSDsluCounter, 5539 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 243 SdHoareTripleChecker+Valid, 11197 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 03:40:48,381 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [243 Valid, 11197 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 03:40:48,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35627 states.