./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version fcb8e130 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d9035b4ec3c8be0c8a62b9c4cf3880a262fca73149d78c2d88c8226ff5942d9e --- Real Ultimate output --- This is Ultimate 0.2.1-dev-fcb8e13 [2021-11-23 04:50:51,806 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-23 04:50:51,807 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-23 04:50:51,842 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-23 04:50:51,843 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-23 04:50:51,843 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-23 04:50:51,844 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-23 04:50:51,845 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-23 04:50:51,846 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-23 04:50:51,847 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-23 04:50:51,848 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-23 04:50:51,848 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-23 04:50:51,849 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-23 04:50:51,849 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-23 04:50:51,850 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-23 04:50:51,851 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-23 04:50:51,852 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-23 04:50:51,853 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-23 04:50:51,854 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-23 04:50:51,856 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-23 04:50:51,857 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-23 04:50:51,858 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-23 04:50:51,859 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-23 04:50:51,859 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-23 04:50:51,861 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-23 04:50:51,862 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-23 04:50:51,862 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-23 04:50:51,863 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-23 04:50:51,863 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-23 04:50:51,864 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-23 04:50:51,864 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-23 04:50:51,864 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-23 04:50:51,865 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-23 04:50:51,866 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-23 04:50:51,866 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-23 04:50:51,867 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-23 04:50:51,867 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-23 04:50:51,867 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-23 04:50:51,867 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-23 04:50:51,868 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-23 04:50:51,869 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-23 04:50:51,869 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-11-23 04:50:51,885 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-23 04:50:51,887 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-23 04:50:51,888 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-23 04:50:51,889 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-23 04:50:51,889 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-23 04:50:51,890 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-23 04:50:51,890 INFO L138 SettingsManager]: * Use SBE=true [2021-11-23 04:50:51,890 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-23 04:50:51,890 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-23 04:50:51,890 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-23 04:50:51,891 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-23 04:50:51,891 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-23 04:50:51,891 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-23 04:50:51,891 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-23 04:50:51,892 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-23 04:50:51,892 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-23 04:50:51,892 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-23 04:50:51,892 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-23 04:50:51,892 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-23 04:50:51,892 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 04:50:51,893 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-11-23 04:50:51,893 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-11-23 04:50:51,894 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-23 04:50:51,894 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-23 04:50:51,894 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d9035b4ec3c8be0c8a62b9c4cf3880a262fca73149d78c2d88c8226ff5942d9e [2021-11-23 04:50:52,076 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-23 04:50:52,101 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-23 04:50:52,102 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-23 04:50:52,103 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-23 04:50:52,104 INFO L275 PluginConnector]: CDTParser initialized [2021-11-23 04:50:52,105 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i [2021-11-23 04:50:52,157 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ceb31675e/4c50b80107044637afd217b22bb3e07a/FLAG58bc9fc51 [2021-11-23 04:50:52,772 INFO L306 CDTParser]: Found 1 translation units. [2021-11-23 04:50:52,772 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i [2021-11-23 04:50:52,815 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ceb31675e/4c50b80107044637afd217b22bb3e07a/FLAG58bc9fc51 [2021-11-23 04:50:53,177 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ceb31675e/4c50b80107044637afd217b22bb3e07a [2021-11-23 04:50:53,179 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-23 04:50:53,180 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-23 04:50:53,191 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-23 04:50:53,191 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-23 04:50:53,194 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-23 04:50:53,194 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:50:53" (1/1) ... [2021-11-23 04:50:53,195 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6da742b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:53, skipping insertion in model container [2021-11-23 04:50:53,195 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 04:50:53" (1/1) ... [2021-11-23 04:50:53,199 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-23 04:50:53,293 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-23 04:50:55,340 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374560,374573] [2021-11-23 04:50:55,342 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374705,374718] [2021-11-23 04:50:55,342 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374851,374864] [2021-11-23 04:50:55,343 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375016,375029] [2021-11-23 04:50:55,343 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375174,375187] [2021-11-23 04:50:55,344 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375332,375345] [2021-11-23 04:50:55,345 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375490,375503] [2021-11-23 04:50:55,345 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375650,375663] [2021-11-23 04:50:55,345 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375809,375822] [2021-11-23 04:50:55,347 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375948,375961] [2021-11-23 04:50:55,350 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376090,376103] [2021-11-23 04:50:55,351 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376239,376252] [2021-11-23 04:50:55,351 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376378,376391] [2021-11-23 04:50:55,352 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376533,376546] [2021-11-23 04:50:55,352 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376693,376706] [2021-11-23 04:50:55,353 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376844,376857] [2021-11-23 04:50:55,353 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376995,377008] [2021-11-23 04:50:55,353 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377147,377160] [2021-11-23 04:50:55,354 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377296,377309] [2021-11-23 04:50:55,354 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377444,377457] [2021-11-23 04:50:55,355 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377601,377614] [2021-11-23 04:50:55,355 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377750,377763] [2021-11-23 04:50:55,355 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377906,377919] [2021-11-23 04:50:55,355 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378059,378072] [2021-11-23 04:50:55,356 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378205,378218] [2021-11-23 04:50:55,358 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378348,378361] [2021-11-23 04:50:55,358 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378500,378513] [2021-11-23 04:50:55,359 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378646,378659] [2021-11-23 04:50:55,359 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378791,378804] [2021-11-23 04:50:55,360 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378945,378958] [2021-11-23 04:50:55,360 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379096,379109] [2021-11-23 04:50:55,360 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379251,379264] [2021-11-23 04:50:55,361 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379403,379416] [2021-11-23 04:50:55,361 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379558,379571] [2021-11-23 04:50:55,361 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379722,379735] [2021-11-23 04:50:55,362 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379878,379891] [2021-11-23 04:50:55,363 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380042,380055] [2021-11-23 04:50:55,363 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380184,380197] [2021-11-23 04:50:55,363 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380342,380355] [2021-11-23 04:50:55,364 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380509,380522] [2021-11-23 04:50:55,364 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380668,380681] [2021-11-23 04:50:55,364 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380827,380840] [2021-11-23 04:50:55,364 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380976,380989] [2021-11-23 04:50:55,365 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381123,381136] [2021-11-23 04:50:55,365 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381262,381275] [2021-11-23 04:50:55,365 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381425,381438] [2021-11-23 04:50:55,366 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381591,381604] [2021-11-23 04:50:55,367 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381755,381768] [2021-11-23 04:50:55,367 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381920,381933] [2021-11-23 04:50:55,367 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382085,382098] [2021-11-23 04:50:55,368 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382251,382264] [2021-11-23 04:50:55,368 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382416,382429] [2021-11-23 04:50:55,368 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382583,382596] [2021-11-23 04:50:55,368 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382743,382756] [2021-11-23 04:50:55,369 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382905,382918] [2021-11-23 04:50:55,370 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383064,383077] [2021-11-23 04:50:55,370 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383210,383223] [2021-11-23 04:50:55,370 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383353,383366] [2021-11-23 04:50:55,370 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383497,383510] [2021-11-23 04:50:55,371 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383640,383653] [2021-11-23 04:50:55,371 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383784,383797] [2021-11-23 04:50:55,371 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383925,383938] [2021-11-23 04:50:55,372 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384063,384076] [2021-11-23 04:50:55,372 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384221,384234] [2021-11-23 04:50:55,372 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384380,384393] [2021-11-23 04:50:55,373 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384536,384549] [2021-11-23 04:50:55,373 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384685,384698] [2021-11-23 04:50:55,373 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384837,384850] [2021-11-23 04:50:55,373 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384988,385001] [2021-11-23 04:50:55,374 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385137,385150] [2021-11-23 04:50:55,374 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385289,385302] [2021-11-23 04:50:55,379 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385437,385450] [2021-11-23 04:50:55,380 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385590,385603] [2021-11-23 04:50:55,380 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385741,385754] [2021-11-23 04:50:55,381 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385891,385904] [2021-11-23 04:50:55,381 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386038,386051] [2021-11-23 04:50:55,381 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386189,386202] [2021-11-23 04:50:55,381 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386340,386353] [2021-11-23 04:50:55,382 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386488,386501] [2021-11-23 04:50:55,382 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386654,386667] [2021-11-23 04:50:55,382 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386823,386836] [2021-11-23 04:50:55,383 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386990,387003] [2021-11-23 04:50:55,383 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387158,387171] [2021-11-23 04:50:55,383 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387308,387321] [2021-11-23 04:50:55,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387455,387468] [2021-11-23 04:50:55,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387616,387629] [2021-11-23 04:50:55,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387786,387799] [2021-11-23 04:50:55,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387948,387961] [2021-11-23 04:50:55,387 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 04:50:55,407 INFO L203 MainTranslator]: Completed pre-run [2021-11-23 04:50:55,681 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374560,374573] [2021-11-23 04:50:55,682 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374705,374718] [2021-11-23 04:50:55,682 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[374851,374864] [2021-11-23 04:50:55,683 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375016,375029] [2021-11-23 04:50:55,684 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375174,375187] [2021-11-23 04:50:55,686 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375332,375345] [2021-11-23 04:50:55,687 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375490,375503] [2021-11-23 04:50:55,687 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375650,375663] [2021-11-23 04:50:55,688 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375809,375822] [2021-11-23 04:50:55,688 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[375948,375961] [2021-11-23 04:50:55,688 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376090,376103] [2021-11-23 04:50:55,689 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376239,376252] [2021-11-23 04:50:55,689 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376378,376391] [2021-11-23 04:50:55,689 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376533,376546] [2021-11-23 04:50:55,690 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376693,376706] [2021-11-23 04:50:55,690 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376844,376857] [2021-11-23 04:50:55,690 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[376995,377008] [2021-11-23 04:50:55,691 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377147,377160] [2021-11-23 04:50:55,691 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377296,377309] [2021-11-23 04:50:55,691 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377444,377457] [2021-11-23 04:50:55,691 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377601,377614] [2021-11-23 04:50:55,692 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377750,377763] [2021-11-23 04:50:55,692 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[377906,377919] [2021-11-23 04:50:55,693 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378059,378072] [2021-11-23 04:50:55,693 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378205,378218] [2021-11-23 04:50:55,696 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378348,378361] [2021-11-23 04:50:55,696 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378500,378513] [2021-11-23 04:50:55,697 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378646,378659] [2021-11-23 04:50:55,697 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378791,378804] [2021-11-23 04:50:55,697 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[378945,378958] [2021-11-23 04:50:55,698 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379096,379109] [2021-11-23 04:50:55,698 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379251,379264] [2021-11-23 04:50:55,698 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379403,379416] [2021-11-23 04:50:55,699 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379558,379571] [2021-11-23 04:50:55,699 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379722,379735] [2021-11-23 04:50:55,699 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[379878,379891] [2021-11-23 04:50:55,700 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380042,380055] [2021-11-23 04:50:55,700 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380184,380197] [2021-11-23 04:50:55,701 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380342,380355] [2021-11-23 04:50:55,701 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380509,380522] [2021-11-23 04:50:55,702 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380668,380681] [2021-11-23 04:50:55,703 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380827,380840] [2021-11-23 04:50:55,703 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[380976,380989] [2021-11-23 04:50:55,703 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381123,381136] [2021-11-23 04:50:55,703 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381262,381275] [2021-11-23 04:50:55,704 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381425,381438] [2021-11-23 04:50:55,704 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381591,381604] [2021-11-23 04:50:55,704 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381755,381768] [2021-11-23 04:50:55,705 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[381920,381933] [2021-11-23 04:50:55,705 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382085,382098] [2021-11-23 04:50:55,705 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382251,382264] [2021-11-23 04:50:55,706 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382416,382429] [2021-11-23 04:50:55,706 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382583,382596] [2021-11-23 04:50:55,706 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382743,382756] [2021-11-23 04:50:55,706 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[382905,382918] [2021-11-23 04:50:55,707 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383064,383077] [2021-11-23 04:50:55,707 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383210,383223] [2021-11-23 04:50:55,708 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383353,383366] [2021-11-23 04:50:55,708 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383497,383510] [2021-11-23 04:50:55,708 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383640,383653] [2021-11-23 04:50:55,709 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383784,383797] [2021-11-23 04:50:55,709 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[383925,383938] [2021-11-23 04:50:55,710 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384063,384076] [2021-11-23 04:50:55,711 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384221,384234] [2021-11-23 04:50:55,711 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384380,384393] [2021-11-23 04:50:55,713 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384536,384549] [2021-11-23 04:50:55,713 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384685,384698] [2021-11-23 04:50:55,713 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384837,384850] [2021-11-23 04:50:55,716 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[384988,385001] [2021-11-23 04:50:55,717 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385137,385150] [2021-11-23 04:50:55,718 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385289,385302] [2021-11-23 04:50:55,718 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385437,385450] [2021-11-23 04:50:55,718 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385590,385603] [2021-11-23 04:50:55,719 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385741,385754] [2021-11-23 04:50:55,723 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[385891,385904] [2021-11-23 04:50:55,723 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386038,386051] [2021-11-23 04:50:55,723 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386189,386202] [2021-11-23 04:50:55,724 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386340,386353] [2021-11-23 04:50:55,725 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386488,386501] [2021-11-23 04:50:55,725 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386654,386667] [2021-11-23 04:50:55,725 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386823,386836] [2021-11-23 04:50:55,726 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[386990,387003] [2021-11-23 04:50:55,726 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387158,387171] [2021-11-23 04:50:55,726 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387308,387321] [2021-11-23 04:50:55,727 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387455,387468] [2021-11-23 04:50:55,727 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387616,387629] [2021-11-23 04:50:55,727 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387786,387799] [2021-11-23 04:50:55,727 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-4.0-rc1-mav/linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i[387948,387961] [2021-11-23 04:50:55,729 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 04:50:55,858 INFO L208 MainTranslator]: Completed translation [2021-11-23 04:50:55,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55 WrapperNode [2021-11-23 04:50:55,859 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-23 04:50:55,860 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-23 04:50:55,860 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-23 04:50:55,860 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-23 04:50:55,864 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:50:55,944 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:00,904 INFO L137 Inliner]: procedures = 640, calls = 2778, calls flagged for inlining = 1199, calls inlined = 25295, statements flattened = 219440 [2021-11-23 04:51:00,904 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-23 04:51:00,905 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-23 04:51:00,905 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-23 04:51:00,905 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-23 04:51:00,911 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:00,911 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:02,079 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:02,080 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:04,755 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:05,029 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:05,292 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:06,168 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-23 04:51:06,175 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-23 04:51:06,175 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-23 04:51:06,175 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-23 04:51:06,176 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (1/1) ... [2021-11-23 04:51:06,187 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 04:51:06,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-11-23 04:51:06,207 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-23 04:51:06,210 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-23 04:51:06,234 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_pio_advance [2021-11-23 04:51:06,235 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_pio_advance [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_handle_dma [2021-11-23 04:51:06,235 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_handle_dma [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_interrupt_interrupt_instance_0 [2021-11-23 04:51:06,235 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_interrupt_interrupt_instance_0 [2021-11-23 04:51:06,235 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-23 04:51:06,236 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_irq [2021-11-23 04:51:06,236 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_irq [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_handle_ep [2021-11-23 04:51:06,236 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_handle_ep [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_pci_probe [2021-11-23 04:51:06,236 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_pci_probe [2021-11-23 04:51:06,236 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_probe_fin [2021-11-23 04:51:06,236 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_probe_fin [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_request_irq_130 [2021-11-23 04:51:06,237 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_request_irq_130 [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_request_irq [2021-11-23 04:51:06,237 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_request_irq [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dispatch_irq_register_11_2 [2021-11-23 04:51:06,237 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dispatch_irq_register_11_2 [2021-11-23 04:51:06,237 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-23 04:51:06,238 INFO L130 BoogieDeclarations]: Found specification of procedure net2272_handle_stat0_irqs [2021-11-23 04:51:06,238 INFO L138 BoogieDeclarations]: Found implementation of procedure net2272_handle_stat0_irqs [2021-11-23 04:51:06,238 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_interrupt_instance_handler_0_5 [2021-11-23 04:51:06,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_interrupt_instance_handler_0_5 [2021-11-23 04:51:06,238 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2021-11-23 04:51:06,238 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2021-11-23 04:51:06,238 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-23 04:51:07,119 INFO L236 CfgBuilder]: Building ICFG [2021-11-23 04:51:07,120 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-23 04:51:58,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_pci_pci_instance_1_switch_break#1: call ULTIMATE.dealloc(ldv_pci_pci_instance_1_~#ldv_1_resource_pm_message~0#1.base, ldv_pci_pci_instance_1_~#ldv_1_resource_pm_message~0#1.offset);havoc ldv_pci_pci_instance_1_~#ldv_1_resource_pm_message~0#1.base, ldv_pci_pci_instance_1_~#ldv_1_resource_pm_message~0#1.offset; [2021-11-23 04:51:58,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-578: net2272_read_#t~ret102#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret102#1;havoc net2272_read_#t~ret102#1; [2021-11-23 04:51:58,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-579: net2272_read_#t~ret104#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret104#1;havoc net2272_read_#t~ret104#1; [2021-11-23 04:51:58,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-628: net2272_read_#t~ret102#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret102#1;havoc net2272_read_#t~ret102#1; [2021-11-23 04:51:58,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-629: net2272_read_#t~ret104#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret104#1;havoc net2272_read_#t~ret104#1; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4579: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4580: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4578: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4583: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4584: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,481 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4581: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4582: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4587: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4585: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4586: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4880: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4883: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4884: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4881: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4882: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4887: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4888: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4885: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4886: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-4889: assume { :end_inline_writeb } true; [2021-11-23 04:51:58,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L8864: #t~ret1232#1 := main_#res#1;assume { :end_inline_main } true; [2021-11-23 04:51:58,486 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4695-264: net2272_ep_read_#t~ret115#1 := net2272_read_#res#1;assume { :end_inline_net2272_read } true;net2272_ep_read_~tmp~8#1 := net2272_ep_read_#t~ret115#1;havoc net2272_ep_read_#t~ret115#1;net2272_ep_read_#res#1 := net2272_ep_read_~tmp~8#1; [2021-11-23 04:51:58,486 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4695-289: net2272_ep_read_#t~ret115#1 := net2272_read_#res#1;assume { :end_inline_net2272_read } true;net2272_ep_read_~tmp~8#1 := net2272_ep_read_#t~ret115#1;havoc net2272_ep_read_#t~ret115#1;net2272_ep_read_#res#1 := net2272_ep_read_~tmp~8#1; [2021-11-23 04:51:58,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-792: assume net2272_read_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-792: assume !(net2272_read_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-794: net2272_read_#res#1 := net2272_read_~ret~3#1; [2021-11-23 04:51:58,487 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-867: assume net2272_read_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-867: assume !(net2272_read_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,488 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-869: net2272_read_#res#1 := net2272_read_~ret~3#1; [2021-11-23 04:51:58,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4713-525: assume { :end_inline_net2272_ep_write } true; [2021-11-23 04:51:58,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4713-556: assume { :end_inline_net2272_ep_write } true; [2021-11-23 04:51:58,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4722-337: assume { :begin_inline_net2272_read } true;net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset, net2272_read_#in~reg#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, net2272_ep_read_~reg#1;havoc net2272_read_#res#1;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset, net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset, net2272_read_#t~ret102#1, net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset, net2272_read_#t~ret104#1, net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1, net2272_read_~ret~3#1, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset, net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset, net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;net2272_read_~dev#1.base, net2272_read_~dev#1.offset := net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset;net2272_read_~reg#1 := net2272_read_#in~reg#1;havoc net2272_read_~ret~3#1;havoc net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset; [2021-11-23 04:51:58,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4722-390: assume { :begin_inline_net2272_read } true;net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset, net2272_read_#in~reg#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, net2272_ep_read_~reg#1;havoc net2272_read_#res#1;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset, net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset, net2272_read_#t~ret102#1, net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset, net2272_read_#t~ret104#1, net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1, net2272_read_~ret~3#1, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset, net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset, net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;net2272_read_~dev#1.base, net2272_read_~dev#1.offset := net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset;net2272_read_~reg#1 := net2272_read_#in~reg#1;havoc net2272_read_~ret~3#1;havoc net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset; [2021-11-23 04:51:58,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4732-112: assert_out_naking_#t~ret116#1 := net2272_ep_read_#res#1;assume { :end_inline_net2272_ep_read } true;assert_out_naking_~tmp~9#1 := assert_out_naking_#t~ret116#1;havoc assert_out_naking_#t~ret116#1; [2021-11-23 04:51:58,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4732-130: assert_out_naking_#t~ret116#1 := net2272_ep_read_#res#1;assume { :end_inline_net2272_ep_read } true;assert_out_naking_~tmp~9#1 := assert_out_naking_#t~ret116#1;havoc assert_out_naking_#t~ret116#1; [2021-11-23 04:51:58,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1577: assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1575: assume net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256;havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1;call net2272_ep_write_#t~mem108#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, 4, net2272_ep_write_#t~mem108#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1575: assume !(net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256);havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1; [2021-11-23 04:51:58,492 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1668: assume net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256;havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1;call net2272_ep_write_#t~mem108#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, 4, net2272_ep_write_#t~mem108#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,492 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1668: assume !(net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256);havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1; [2021-11-23 04:51:58,492 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-1670: assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,493 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4164: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,493 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4164: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,493 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4169: assume { :end_inline_net2272_write } true;havoc net2272_ep_write_#t~mem108#1;call net2272_ep_write_#t~mem109#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);call write~int(net2272_ep_write_#t~mem109#1, net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);havoc net2272_ep_write_#t~mem109#1; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4166: assume { :end_inline_net2272_write } true;havoc net2272_ep_read_#t~mem113#1;call net2272_ep_read_#t~mem114#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);call write~int(net2272_ep_read_#t~mem114#1, net2272_ep_read_~dev~1#1.base, 2032 + net2272_ep_read_~dev~1#1.offset, 1);havoc net2272_ep_read_#t~mem114#1; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4167: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4167: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4172: assume { :end_inline_net2272_write } true; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4170: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,494 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4170: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4437: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4437: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4440: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4440: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4439: assume { :end_inline_net2272_write } true;havoc net2272_ep_read_#t~mem113#1;call net2272_ep_read_#t~mem114#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);call write~int(net2272_ep_read_#t~mem114#1, net2272_ep_read_~dev~1#1.base, 2032 + net2272_ep_read_~dev~1#1.offset, 1);havoc net2272_ep_read_#t~mem114#1; [2021-11-23 04:51:58,495 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4445: assume { :end_inline_net2272_write } true; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4442: assume { :end_inline_net2272_write } true;havoc net2272_ep_write_#t~mem108#1;call net2272_ep_write_#t~mem109#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);call write~int(net2272_ep_write_#t~mem109#1, net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);havoc net2272_ep_write_#t~mem109#1; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4443: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-4443: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4959: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4960: net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset := net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_read_~reg#1 % 256, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,496 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4957: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4958: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4963: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4964: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4961: net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset := net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;havoc net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4962: net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset := net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;havoc net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4967: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4968: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4965: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,497 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-4966: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814: assume 0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32);call write~$Pointer$(4, 0, assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, assert_out_naking_~#descriptor~0#1.base, 8 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, assert_out_naking_~#descriptor~0#1.base, 16 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(7, 0, assert_out_naking_~#descriptor~0#1.base, 24 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~int(131, assert_out_naking_~#descriptor~0#1.base, 32 + assert_out_naking_~#descriptor~0#1.offset, 4);call write~int(0, assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);call assert_out_naking_#t~mem117#1 := read~int(assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := ~bitwiseAnd(assert_out_naking_#t~mem117#1 % 256, 1), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814: assume !(0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32)); [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814-3: assume 0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32);call write~$Pointer$(4, 0, assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, assert_out_naking_~#descriptor~0#1.base, 8 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, assert_out_naking_~#descriptor~0#1.base, 16 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(7, 0, assert_out_naking_~#descriptor~0#1.base, 24 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~int(131, assert_out_naking_~#descriptor~0#1.base, 32 + assert_out_naking_~#descriptor~0#1.offset, 4);call write~int(0, assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);call assert_out_naking_#t~mem117#1 := read~int(assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := ~bitwiseAnd(assert_out_naking_#t~mem117#1 % 256, 1), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814-3: assume !(0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32)); [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814-2: call ULTIMATE.dealloc(assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset);havoc assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset; [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814-5: call ULTIMATE.dealloc(assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset);havoc assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset; [2021-11-23 04:51:58,498 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5307: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5308: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5311: net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset := net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;havoc net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5312: net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset := net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;havoc net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5309: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5310: net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset := net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_read_~reg#1 % 256, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5315: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5316: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,499 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5313: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5314: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5317: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-5318: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824-2: assume { :begin_inline_net2272_ep_write } true;net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset, net2272_ep_write_#in~reg#1, net2272_ep_write_#in~value#1 := assert_out_naking_~ep#1.base, assert_out_naking_~ep#1.offset, 15, 128;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset, net2272_ep_write_#t~mem106#1, net2272_ep_write_#t~mem107#1, net2272_ep_write_#t~mem108#1, net2272_ep_write_#t~mem109#1, net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1, net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset := net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset;net2272_ep_write_~reg#1 := net2272_ep_write_#in~reg#1;net2272_ep_write_~value#1 := net2272_ep_write_#in~value#1;havoc net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;call net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset := read~$Pointer$(net2272_ep_write_~ep#1.base, 65 + net2272_ep_write_~ep#1.offset, 8);net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset := net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;call net2272_ep_write_#t~mem106#1 := read~int(net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);call net2272_ep_write_#t~mem107#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1); [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824: assume 0 != assert_out_naking_~tmp___0~4#1;call assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 65 + assert_out_naking_~ep#1.offset, 8);call assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset := read~$Pointer$(assert_out_naking_#t~mem119#1.base, 1481 + assert_out_naking_#t~mem119#1.offset, 8);call assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 8 + assert_out_naking_~ep#1.offset, 8);havoc assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset;havoc assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset;havoc assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824: assume !(0 != assert_out_naking_~tmp___0~4#1); [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824-5: assume { :begin_inline_net2272_ep_write } true;net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset, net2272_ep_write_#in~reg#1, net2272_ep_write_#in~value#1 := assert_out_naking_~ep#1.base, assert_out_naking_~ep#1.offset, 15, 128;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset, net2272_ep_write_#t~mem106#1, net2272_ep_write_#t~mem107#1, net2272_ep_write_#t~mem108#1, net2272_ep_write_#t~mem109#1, net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1, net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset := net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset;net2272_ep_write_~reg#1 := net2272_ep_write_#in~reg#1;net2272_ep_write_~value#1 := net2272_ep_write_#in~value#1;havoc net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;call net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset := read~$Pointer$(net2272_ep_write_~ep#1.base, 65 + net2272_ep_write_~ep#1.offset, 8);net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset := net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;call net2272_ep_write_#t~mem106#1 := read~int(net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);call net2272_ep_write_#t~mem107#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1); [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824-3: assume 0 != assert_out_naking_~tmp___0~4#1;call assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 65 + assert_out_naking_~ep#1.offset, 8);call assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset := read~$Pointer$(assert_out_naking_#t~mem119#1.base, 1481 + assert_out_naking_#t~mem119#1.offset, 8);call assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 8 + assert_out_naking_~ep#1.offset, 8);havoc assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset;havoc assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset;havoc assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset; [2021-11-23 04:51:58,500 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824-3: assume !(0 != assert_out_naking_~tmp___0~4#1); [2021-11-23 04:51:58,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19062: assume net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256;havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1;call net2272_ep_read_#t~mem113#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, 4, net2272_ep_read_#t~mem113#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19063: assume !(net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256);havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1; [2021-11-23 04:51:58,502 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2021-11-23 04:51:58,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18284: assume !(net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256);havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1; [2021-11-23 04:51:58,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18283: assume net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256;havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1;call net2272_ep_read_#t~mem113#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, 4, net2272_ep_read_#t~mem113#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:51:58,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_entry_EMGentry_14_returnLabel#1: assume { :end_inline_ldv_entry_EMGentry_14 } true;main_#res#1 := 0; [2021-11-23 04:51:58,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12386-111: assert_out_naking_#t~ret118#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= assert_out_naking_#t~ret118#1 && assert_out_naking_#t~ret118#1 <= 9223372036854775807;assert_out_naking_~tmp___0~4#1 := assert_out_naking_#t~ret118#1;havoc assert_out_naking_#t~mem117#1;havoc assert_out_naking_#t~ret118#1; [2021-11-23 04:51:58,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12386-120: assert_out_naking_#t~ret118#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= assert_out_naking_#t~ret118#1 && assert_out_naking_#t~ret118#1 <= 9223372036854775807;assert_out_naking_~tmp___0~4#1 := assert_out_naking_#t~ret118#1;havoc assert_out_naking_#t~mem117#1;havoc assert_out_naking_#t~ret118#1; [2021-11-23 04:52:04,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4732-6: assert_out_naking_#t~ret116#1 := net2272_ep_read_#res#1;assume { :end_inline_net2272_ep_read } true;assert_out_naking_~tmp~9#1 := assert_out_naking_#t~ret116#1;havoc assert_out_naking_#t~ret116#1; [2021-11-23 04:52:04,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-111: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-112: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-109: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-110: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-115: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-116: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-113: assume { :end_inline_writeb } true;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-114: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-117: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4478-118: assume { :end_inline_writeb } true; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##348: assume !(net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256);havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##347: assume net2272_ep_read_#t~mem111#1 % 256 != net2272_ep_read_#t~mem112#1 % 256;havoc net2272_ep_read_#t~mem111#1;havoc net2272_ep_read_#t~mem112#1;call net2272_ep_read_#t~mem113#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, 4, net2272_ep_read_#t~mem113#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814: assume 0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32);call write~$Pointer$(4, 0, assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(5, 0, assert_out_naking_~#descriptor~0#1.base, 8 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(6, 0, assert_out_naking_~#descriptor~0#1.base, 16 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~$Pointer$(7, 0, assert_out_naking_~#descriptor~0#1.base, 24 + assert_out_naking_~#descriptor~0#1.offset, 8);call write~int(131, assert_out_naking_~#descriptor~0#1.base, 32 + assert_out_naking_~#descriptor~0#1.offset, 4);call write~int(0, assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);call assert_out_naking_#t~mem117#1 := read~int(assert_out_naking_~#descriptor~0#1.base, 36 + assert_out_naking_~#descriptor~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := ~bitwiseAnd(assert_out_naking_#t~mem117#1 % 256, 1), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814: assume !(0 == ~bitwiseAnd(assert_out_naking_~tmp~9#1 % 256, 32)); [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4814-2: call ULTIMATE.dealloc(assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset);havoc assert_out_naking_~#descriptor~0#1.base, assert_out_naking_~#descriptor~0#1.offset; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824-2: assume { :begin_inline_net2272_ep_write } true;net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset, net2272_ep_write_#in~reg#1, net2272_ep_write_#in~value#1 := assert_out_naking_~ep#1.base, assert_out_naking_~ep#1.offset, 15, 128;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset, net2272_ep_write_#t~mem106#1, net2272_ep_write_#t~mem107#1, net2272_ep_write_#t~mem108#1, net2272_ep_write_#t~mem109#1, net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1, net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;net2272_ep_write_~ep#1.base, net2272_ep_write_~ep#1.offset := net2272_ep_write_#in~ep#1.base, net2272_ep_write_#in~ep#1.offset;net2272_ep_write_~reg#1 := net2272_ep_write_#in~reg#1;net2272_ep_write_~value#1 := net2272_ep_write_#in~value#1;havoc net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset;call net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset := read~$Pointer$(net2272_ep_write_~ep#1.base, 65 + net2272_ep_write_~ep#1.offset, 8);net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset := net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;havoc net2272_ep_write_#t~mem105#1.base, net2272_ep_write_#t~mem105#1.offset;call net2272_ep_write_#t~mem106#1 := read~int(net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);call net2272_ep_write_#t~mem107#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1); [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824: assume 0 != assert_out_naking_~tmp___0~4#1;call assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 65 + assert_out_naking_~ep#1.offset, 8);call assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset := read~$Pointer$(assert_out_naking_#t~mem119#1.base, 1481 + assert_out_naking_#t~mem119#1.offset, 8);call assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset := read~$Pointer$(assert_out_naking_~ep#1.base, 8 + assert_out_naking_~ep#1.offset, 8);havoc assert_out_naking_#t~mem119#1.base, assert_out_naking_#t~mem119#1.offset;havoc assert_out_naking_#t~mem120#1.base, assert_out_naking_#t~mem120#1.offset;havoc assert_out_naking_#t~mem121#1.base, assert_out_naking_#t~mem121#1.offset; [2021-11-23 04:52:04,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4824: assume !(0 != assert_out_naking_~tmp___0~4#1); [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-124: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-127: net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset := net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_read_~reg#1 % 256, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-128: net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset := net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;havoc net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-125: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-126: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-131: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-132: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-129: net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset := net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;havoc net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset;assume { :begin_inline_readb } true;readb_#in~addr#1.base, readb_#in~addr#1.offset := net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;havoc readb_#res#1;havoc readb_~addr#1.base, readb_~addr#1.offset, readb_~ret~0#1;readb_~addr#1.base, readb_~addr#1.offset := readb_#in~addr#1.base, readb_#in~addr#1.offset;havoc readb_~ret~0#1;readb_#res#1 := readb_~ret~0#1; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-130: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-135: net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset := net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;havoc net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-133: net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset := net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~reg#1 % 256, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4650-134: net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset := net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;assume { :end_inline_net2272_reg_addr } true;net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset := net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;havoc net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset;assume { :begin_inline_writeb } true;writeb_#in~val#1, writeb_#in~addr#1.base, writeb_#in~addr#1.offset := net2272_write_~value#1 % 256, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc writeb_~val#1, writeb_~addr#1.base, writeb_~addr#1.offset;writeb_~val#1 := writeb_#in~val#1;writeb_~addr#1.base, writeb_~addr#1.offset := writeb_#in~addr#1.base, writeb_#in~addr#1.offset; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-104: assume { :end_inline_net2272_write } true;havoc net2272_ep_read_#t~mem113#1;call net2272_ep_read_#t~mem114#1 := read~int(net2272_ep_read_~ep#1.base, 105 + net2272_ep_read_~ep#1.offset, 1);call write~int(net2272_ep_read_#t~mem114#1, net2272_ep_read_~dev~1#1.base, 2032 + net2272_ep_read_~dev~1#1.offset, 1);havoc net2272_ep_read_#t~mem114#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-105: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-105: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-102: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-102: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-108: assume net2272_write_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-108: assume !(net2272_write_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-107: assume { :end_inline_net2272_write } true;havoc net2272_ep_write_#t~mem108#1;call net2272_ep_write_#t~mem109#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);call write~int(net2272_ep_write_#t~mem109#1, net2272_ep_write_~dev~0#1.base, 2032 + net2272_ep_write_~dev~0#1.offset, 1);havoc net2272_ep_write_#t~mem109#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4659-110: assume { :end_inline_net2272_write } true; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-23: net2272_read_#res#1 := net2272_read_~ret~3#1; [2021-11-23 04:52:04,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-21: assume net2272_read_~reg#1 % 4294967296 > 31;assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, 0;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-21: assume !(net2272_read_~reg#1 % 4294967296 > 31);assume { :begin_inline_net2272_reg_addr } true;net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset, net2272_reg_addr_#in~reg#1 := net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1;havoc net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset;havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset, net2272_reg_addr_#t~mem96#1, net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset, net2272_reg_addr_~reg#1;net2272_reg_addr_~dev#1.base, net2272_reg_addr_~dev#1.offset := net2272_reg_addr_#in~dev#1.base, net2272_reg_addr_#in~dev#1.offset;net2272_reg_addr_~reg#1 := net2272_reg_addr_#in~reg#1;call net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset := read~$Pointer$(net2272_reg_addr_~dev#1.base, 2043 + net2272_reg_addr_~dev#1.offset, 8);call net2272_reg_addr_#t~mem96#1 := read~int(net2272_reg_addr_~dev#1.base, 2039 + net2272_reg_addr_~dev#1.offset, 4);net2272_reg_addr_#res#1.base, net2272_reg_addr_#res#1.offset := net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset + (if ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~shiftLeft(net2272_reg_addr_~reg#1, (if net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 <= 2147483647 then net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 else net2272_reg_addr_#t~mem96#1 % 4294967296 % 4294967296 - 4294967296)) % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc net2272_reg_addr_#t~mem95#1.base, net2272_reg_addr_#t~mem95#1.offset;havoc net2272_reg_addr_#t~mem96#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4695-7: net2272_ep_read_#t~ret115#1 := net2272_read_#res#1;assume { :end_inline_net2272_read } true;net2272_ep_read_~tmp~8#1 := net2272_ep_read_#t~ret115#1;havoc net2272_ep_read_#t~ret115#1;net2272_ep_read_#res#1 := net2272_ep_read_~tmp~8#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-36: assume net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256;havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1;call net2272_ep_write_#t~mem108#1 := read~int(net2272_ep_write_~ep#1.base, 105 + net2272_ep_write_~ep#1.offset, 1);assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, 4, net2272_ep_write_#t~mem108#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-36: assume !(net2272_ep_write_#t~mem106#1 % 256 != net2272_ep_write_#t~mem107#1 % 256);havoc net2272_ep_write_#t~mem106#1;havoc net2272_ep_write_#t~mem107#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4703-38: assume { :begin_inline_net2272_write } true;net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset, net2272_write_#in~reg#1, net2272_write_#in~value#1 := net2272_ep_write_~dev~0#1.base, net2272_ep_write_~dev~0#1.offset, net2272_ep_write_~reg#1, net2272_ep_write_~value#1 % 256;havoc net2272_write_#t~ret97#1.base, net2272_write_#t~ret97#1.offset, net2272_write_#t~ret98#1.base, net2272_write_#t~ret98#1.offset, net2272_write_#t~ret99#1.base, net2272_write_#t~ret99#1.offset, net2272_write_~dev#1.base, net2272_write_~dev#1.offset, net2272_write_~reg#1, net2272_write_~value#1, net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset, net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset, net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset;net2272_write_~dev#1.base, net2272_write_~dev#1.offset := net2272_write_#in~dev#1.base, net2272_write_#in~dev#1.offset;net2272_write_~reg#1 := net2272_write_#in~reg#1;net2272_write_~value#1 := net2272_write_#in~value#1;havoc net2272_write_~tmp~6#1.base, net2272_write_~tmp~6#1.offset;havoc net2272_write_~tmp___0~2#1.base, net2272_write_~tmp___0~2#1.offset;havoc net2272_write_~tmp___1~0#1.base, net2272_write_~tmp___1~0#1.offset; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4713-12: assume { :end_inline_net2272_ep_write } true; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-14: net2272_read_#t~ret102#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret102#1;havoc net2272_read_#t~ret102#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4455-15: net2272_read_#t~ret104#1 := readb_#res#1;assume { :end_inline_readb } true;net2272_read_~ret~3#1 := net2272_read_#t~ret104#1;havoc net2272_read_#t~ret104#1; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4722-19: assume { :begin_inline_net2272_read } true;net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset, net2272_read_#in~reg#1 := net2272_ep_read_~dev~1#1.base, net2272_ep_read_~dev~1#1.offset, net2272_ep_read_~reg#1;havoc net2272_read_#res#1;havoc net2272_read_#t~ret100#1.base, net2272_read_#t~ret100#1.offset, net2272_read_#t~ret101#1.base, net2272_read_#t~ret101#1.offset, net2272_read_#t~ret102#1, net2272_read_#t~ret103#1.base, net2272_read_#t~ret103#1.offset, net2272_read_#t~ret104#1, net2272_read_~dev#1.base, net2272_read_~dev#1.offset, net2272_read_~reg#1, net2272_read_~ret~3#1, net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset, net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset, net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset;net2272_read_~dev#1.base, net2272_read_~dev#1.offset := net2272_read_#in~dev#1.base, net2272_read_#in~dev#1.offset;net2272_read_~reg#1 := net2272_read_#in~reg#1;havoc net2272_read_~ret~3#1;havoc net2272_read_~tmp~7#1.base, net2272_read_~tmp~7#1.offset;havoc net2272_read_~tmp___0~3#1.base, net2272_read_~tmp___0~3#1.offset;havoc net2272_read_~tmp___1~1#1.base, net2272_read_~tmp___1~1#1.offset; [2021-11-23 04:52:04,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L12386-7: assert_out_naking_#t~ret118#1 := ldv__builtin_expect_#res#1;assume { :end_inline_ldv__builtin_expect } true;assume -9223372036854775808 <= assert_out_naking_#t~ret118#1 && assert_out_naking_#t~ret118#1 <= 9223372036854775807;assert_out_naking_~tmp___0~4#1 := assert_out_naking_#t~ret118#1;havoc assert_out_naking_#t~mem117#1;havoc assert_out_naking_#t~ret118#1; [2021-11-23 04:52:04,843 INFO L277 CfgBuilder]: Performing block encoding [2021-11-23 04:52:04,931 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-23 04:52:04,931 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-11-23 04:52:04,959 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:52:04 BoogieIcfgContainer [2021-11-23 04:52:04,960 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-23 04:52:04,961 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-23 04:52:04,961 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-23 04:52:04,964 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-23 04:52:04,964 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 04:50:53" (1/3) ... [2021-11-23 04:52:04,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3199e629 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:52:04, skipping insertion in model container [2021-11-23 04:52:04,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 04:50:55" (2/3) ... [2021-11-23 04:52:04,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3199e629 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 04:52:04, skipping insertion in model container [2021-11-23 04:52:04,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 04:52:04" (3/3) ... [2021-11-23 04:52:04,967 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-4.0-rc1---drivers--usb--gadget--udc--net2272.ko.cil.i [2021-11-23 04:52:04,970 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-23 04:52:04,971 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 758 error locations. [2021-11-23 04:52:05,094 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-23 04:52:05,101 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-23 04:52:05,101 INFO L340 AbstractCegarLoop]: Starting to check reachability of 758 error locations. [2021-11-23 04:52:05,430 INFO L276 IsEmpty]: Start isEmpty. Operand has 39463 states, 38648 states have (on average 1.237321465535086) internal successors, (47820), 39411 states have internal predecessors, (47820), 44 states have call successors, (44), 13 states have call predecessors, (44), 13 states have return successors, (44), 42 states have call predecessors, (44), 44 states have call successors, (44) [2021-11-23 04:52:05,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2021-11-23 04:52:05,437 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:05,438 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:05,438 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr592ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:05,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:05,442 INFO L85 PathProgramCache]: Analyzing trace with hash 1240068815, now seen corresponding path program 1 times [2021-11-23 04:52:05,448 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:05,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607844061] [2021-11-23 04:52:05,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:05,449 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:05,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:05,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:05,857 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:05,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607844061] [2021-11-23 04:52:05,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607844061] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:05,857 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:05,857 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 04:52:05,858 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138720463] [2021-11-23 04:52:05,859 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:05,862 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 04:52:05,862 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:05,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 04:52:05,888 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 04:52:05,940 INFO L87 Difference]: Start difference. First operand has 39463 states, 38648 states have (on average 1.237321465535086) internal successors, (47820), 39411 states have internal predecessors, (47820), 44 states have call successors, (44), 13 states have call predecessors, (44), 13 states have return successors, (44), 42 states have call predecessors, (44), 44 states have call successors, (44) Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:09,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:09,062 INFO L93 Difference]: Finished difference Result 116489 states and 141546 transitions. [2021-11-23 04:52:09,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 04:52:09,064 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2021-11-23 04:52:09,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:09,369 INFO L225 Difference]: With dead ends: 116489 [2021-11-23 04:52:09,369 INFO L226 Difference]: Without dead ends: 75296 [2021-11-23 04:52:09,511 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:09,515 INFO L933 BasicCegarLoop]: 47837 mSDtfsCounter, 45316 mSDsluCounter, 94342 mSDsCounter, 0 mSdLazyCounter, 828 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45316 SdHoareTripleChecker+Valid, 142179 SdHoareTripleChecker+Invalid, 832 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 828 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:09,517 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45316 Valid, 142179 Invalid, 832 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [4 Valid, 828 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-23 04:52:09,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75296 states. [2021-11-23 04:52:11,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75296 to 73213. [2021-11-23 04:52:11,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73213 states, 72341 states have (on average 1.2010339917888888) internal successors, (86884), 73110 states have internal predecessors, (86884), 88 states have call successors, (88), 26 states have call predecessors, (88), 26 states have return successors, (132), 84 states have call predecessors, (132), 88 states have call successors, (132) [2021-11-23 04:52:11,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73213 states to 73213 states and 87104 transitions. [2021-11-23 04:52:11,629 INFO L78 Accepts]: Start accepts. Automaton has 73213 states and 87104 transitions. Word has length 30 [2021-11-23 04:52:11,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 04:52:11,629 INFO L470 AbstractCegarLoop]: Abstraction has 73213 states and 87104 transitions. [2021-11-23 04:52:11,630 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:11,630 INFO L276 IsEmpty]: Start isEmpty. Operand 73213 states and 87104 transitions. [2021-11-23 04:52:11,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-11-23 04:52:11,632 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:11,632 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:11,632 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-23 04:52:11,633 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr593ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:11,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:11,633 INFO L85 PathProgramCache]: Analyzing trace with hash 1961976421, now seen corresponding path program 1 times [2021-11-23 04:52:11,633 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:11,633 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219731815] [2021-11-23 04:52:11,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:11,634 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:11,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:11,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:11,758 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:11,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219731815] [2021-11-23 04:52:11,758 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219731815] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:11,759 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:11,759 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 04:52:11,759 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626804363] [2021-11-23 04:52:11,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:11,760 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 04:52:11,760 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:11,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 04:52:11,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 04:52:11,761 INFO L87 Difference]: Start difference. First operand 73213 states and 87104 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:12,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:12,988 INFO L93 Difference]: Finished difference Result 73213 states and 87104 transitions. [2021-11-23 04:52:12,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 04:52:12,989 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-11-23 04:52:12,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:13,153 INFO L225 Difference]: With dead ends: 73213 [2021-11-23 04:52:13,153 INFO L226 Difference]: Without dead ends: 73209 [2021-11-23 04:52:13,185 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:13,186 INFO L933 BasicCegarLoop]: 45340 mSDtfsCounter, 45502 mSDsluCounter, 45154 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45502 SdHoareTripleChecker+Valid, 90494 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:13,186 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45502 Valid, 90494 Invalid, 6 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 04:52:13,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73209 states. [2021-11-23 04:52:14,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73209 to 73209. [2021-11-23 04:52:14,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73209 states, 72339 states have (on average 1.2010119022933687) internal successors, (86880), 73106 states have internal predecessors, (86880), 88 states have call successors, (88), 26 states have call predecessors, (88), 26 states have return successors, (132), 84 states have call predecessors, (132), 88 states have call successors, (132) [2021-11-23 04:52:14,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73209 states to 73209 states and 87100 transitions. [2021-11-23 04:52:14,947 INFO L78 Accepts]: Start accepts. Automaton has 73209 states and 87100 transitions. Word has length 33 [2021-11-23 04:52:14,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 04:52:14,947 INFO L470 AbstractCegarLoop]: Abstraction has 73209 states and 87100 transitions. [2021-11-23 04:52:14,948 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:14,948 INFO L276 IsEmpty]: Start isEmpty. Operand 73209 states and 87100 transitions. [2021-11-23 04:52:14,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-11-23 04:52:14,951 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:14,952 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:14,952 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-11-23 04:52:14,952 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr594ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:14,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:14,952 INFO L85 PathProgramCache]: Analyzing trace with hash -884739685, now seen corresponding path program 1 times [2021-11-23 04:52:14,953 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:14,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953314789] [2021-11-23 04:52:14,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:14,953 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:15,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:15,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:15,151 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:15,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953314789] [2021-11-23 04:52:15,151 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1953314789] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:15,151 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:15,152 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 04:52:15,152 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875636981] [2021-11-23 04:52:15,152 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:15,152 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 04:52:15,153 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:15,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 04:52:15,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 04:52:15,153 INFO L87 Difference]: Start difference. First operand 73209 states and 87100 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:16,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:16,437 INFO L93 Difference]: Finished difference Result 73209 states and 87100 transitions. [2021-11-23 04:52:16,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 04:52:16,437 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-11-23 04:52:16,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:16,625 INFO L225 Difference]: With dead ends: 73209 [2021-11-23 04:52:16,625 INFO L226 Difference]: Without dead ends: 73205 [2021-11-23 04:52:16,661 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:16,664 INFO L933 BasicCegarLoop]: 45336 mSDtfsCounter, 45485 mSDsluCounter, 45160 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45485 SdHoareTripleChecker+Valid, 90496 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:16,666 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45485 Valid, 90496 Invalid, 6 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 04:52:16,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73205 states. [2021-11-23 04:52:18,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73205 to 73205. [2021-11-23 04:52:18,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73205 states, 72337 states have (on average 1.2009898115763717) internal successors, (86876), 73102 states have internal predecessors, (86876), 88 states have call successors, (88), 26 states have call predecessors, (88), 26 states have return successors, (132), 84 states have call predecessors, (132), 88 states have call successors, (132) [2021-11-23 04:52:18,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73205 states to 73205 states and 87096 transitions. [2021-11-23 04:52:18,449 INFO L78 Accepts]: Start accepts. Automaton has 73205 states and 87096 transitions. Word has length 36 [2021-11-23 04:52:18,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 04:52:18,450 INFO L470 AbstractCegarLoop]: Abstraction has 73205 states and 87096 transitions. [2021-11-23 04:52:18,450 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:18,450 INFO L276 IsEmpty]: Start isEmpty. Operand 73205 states and 87096 transitions. [2021-11-23 04:52:18,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2021-11-23 04:52:18,451 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:18,451 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:18,451 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-11-23 04:52:18,451 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr595ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:18,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:18,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1019985201, now seen corresponding path program 1 times [2021-11-23 04:52:18,452 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:18,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611179454] [2021-11-23 04:52:18,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:18,452 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:18,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:18,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:18,614 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:18,614 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611179454] [2021-11-23 04:52:18,614 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [611179454] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:18,614 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:18,615 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 04:52:18,615 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767088936] [2021-11-23 04:52:18,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:18,615 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 04:52:18,615 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:18,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 04:52:18,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 04:52:18,616 INFO L87 Difference]: Start difference. First operand 73205 states and 87096 transitions. Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:20,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:20,130 INFO L93 Difference]: Finished difference Result 73205 states and 87096 transitions. [2021-11-23 04:52:20,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 04:52:20,131 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2021-11-23 04:52:20,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:20,301 INFO L225 Difference]: With dead ends: 73205 [2021-11-23 04:52:20,302 INFO L226 Difference]: Without dead ends: 73201 [2021-11-23 04:52:20,325 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:20,327 INFO L933 BasicCegarLoop]: 45332 mSDtfsCounter, 45468 mSDsluCounter, 45166 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45468 SdHoareTripleChecker+Valid, 90498 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:20,328 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45468 Valid, 90498 Invalid, 6 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 04:52:20,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73201 states. [2021-11-23 04:52:22,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73201 to 73201. [2021-11-23 04:52:22,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73201 states, 72335 states have (on average 1.2009677196377964) internal successors, (86872), 73098 states have internal predecessors, (86872), 88 states have call successors, (88), 26 states have call predecessors, (88), 26 states have return successors, (132), 84 states have call predecessors, (132), 88 states have call successors, (132) [2021-11-23 04:52:22,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73201 states to 73201 states and 87092 transitions. [2021-11-23 04:52:22,223 INFO L78 Accepts]: Start accepts. Automaton has 73201 states and 87092 transitions. Word has length 39 [2021-11-23 04:52:22,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 04:52:22,224 INFO L470 AbstractCegarLoop]: Abstraction has 73201 states and 87092 transitions. [2021-11-23 04:52:22,224 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:22,224 INFO L276 IsEmpty]: Start isEmpty. Operand 73201 states and 87092 transitions. [2021-11-23 04:52:22,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2021-11-23 04:52:22,225 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:22,225 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:22,225 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-11-23 04:52:22,225 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr596ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:22,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:22,225 INFO L85 PathProgramCache]: Analyzing trace with hash -428838809, now seen corresponding path program 1 times [2021-11-23 04:52:22,226 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:22,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486058180] [2021-11-23 04:52:22,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:22,226 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:22,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:22,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:22,402 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:22,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486058180] [2021-11-23 04:52:22,402 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486058180] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:22,403 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:22,403 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-23 04:52:22,403 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439126975] [2021-11-23 04:52:22,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:22,403 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 04:52:22,403 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:22,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 04:52:22,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 04:52:22,404 INFO L87 Difference]: Start difference. First operand 73201 states and 87092 transitions. Second operand has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:23,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:23,815 INFO L93 Difference]: Finished difference Result 73201 states and 87092 transitions. [2021-11-23 04:52:23,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 04:52:23,815 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2021-11-23 04:52:23,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:24,085 INFO L225 Difference]: With dead ends: 73201 [2021-11-23 04:52:24,085 INFO L226 Difference]: Without dead ends: 73197 [2021-11-23 04:52:24,107 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:24,108 INFO L933 BasicCegarLoop]: 45328 mSDtfsCounter, 45451 mSDsluCounter, 45172 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45451 SdHoareTripleChecker+Valid, 90500 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:24,108 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45451 Valid, 90500 Invalid, 6 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [2 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 04:52:24,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73197 states. [2021-11-23 04:52:25,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73197 to 73197. [2021-11-23 04:52:25,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73197 states, 72333 states have (on average 1.2009456264775413) internal successors, (86868), 73094 states have internal predecessors, (86868), 88 states have call successors, (88), 26 states have call predecessors, (88), 26 states have return successors, (132), 84 states have call predecessors, (132), 88 states have call successors, (132) [2021-11-23 04:52:26,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73197 states to 73197 states and 87088 transitions. [2021-11-23 04:52:26,080 INFO L78 Accepts]: Start accepts. Automaton has 73197 states and 87088 transitions. Word has length 42 [2021-11-23 04:52:26,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 04:52:26,081 INFO L470 AbstractCegarLoop]: Abstraction has 73197 states and 87088 transitions. [2021-11-23 04:52:26,081 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:26,081 INFO L276 IsEmpty]: Start isEmpty. Operand 73197 states and 87088 transitions. [2021-11-23 04:52:26,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-11-23 04:52:26,082 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 04:52:26,082 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 04:52:26,082 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-11-23 04:52:26,082 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION === [net2272_handle_dmaErr0ASSERT_VIOLATIONERROR_FUNCTION, net2272_handle_dmaErr1ASSERT_VIOLATIONERROR_FUNCTION, net2272_pci_probeErr0ASSERT_VIOLATIONERROR_FUNCTION (and 755 more)] === [2021-11-23 04:52:26,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 04:52:26,082 INFO L85 PathProgramCache]: Analyzing trace with hash -532175044, now seen corresponding path program 1 times [2021-11-23 04:52:26,082 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-23 04:52:26,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860152265] [2021-11-23 04:52:26,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 04:52:26,083 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 04:52:26,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 04:52:26,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 04:52:26,237 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-23 04:52:26,237 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860152265] [2021-11-23 04:52:26,237 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [860152265] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 04:52:26,238 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 04:52:26,238 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 04:52:26,238 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932626819] [2021-11-23 04:52:26,238 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 04:52:26,238 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-23 04:52:26,238 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-23 04:52:26,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-23 04:52:26,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-23 04:52:26,239 INFO L87 Difference]: Start difference. First operand 73197 states and 87088 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 4 states have internal predecessors, (45), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 04:52:28,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 04:52:28,909 INFO L93 Difference]: Finished difference Result 151250 states and 180178 transitions. [2021-11-23 04:52:28,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 04:52:28,910 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 4 states have internal predecessors, (45), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2021-11-23 04:52:28,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 04:52:29,088 INFO L225 Difference]: With dead ends: 151250 [2021-11-23 04:52:29,088 INFO L226 Difference]: Without dead ends: 78087 [2021-11-23 04:52:29,406 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-11-23 04:52:29,407 INFO L933 BasicCegarLoop]: 47575 mSDtfsCounter, 42870 mSDsluCounter, 100425 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42870 SdHoareTripleChecker+Valid, 148000 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-23 04:52:29,407 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [42870 Valid, 148000 Invalid, 95 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [3 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-23 04:52:29,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78087 states.