./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aef121e0 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash da295a433f96a090e97fd0ee72a58f7ad7a804da074c3950d4e4dc7d412af0ef --- Real Ultimate output --- This is Ultimate 0.2.1-dev-aef121e [2021-11-22 15:33:00,126 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-22 15:33:00,130 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-22 15:33:00,189 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-22 15:33:00,190 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-22 15:33:00,195 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-22 15:33:00,199 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-22 15:33:00,205 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-22 15:33:00,208 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-22 15:33:00,216 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-22 15:33:00,218 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-22 15:33:00,220 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-22 15:33:00,221 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-22 15:33:00,224 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-22 15:33:00,226 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-22 15:33:00,229 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-22 15:33:00,231 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-22 15:33:00,233 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-22 15:33:00,239 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-22 15:33:00,251 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-22 15:33:00,253 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-22 15:33:00,254 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-22 15:33:00,258 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-22 15:33:00,260 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-22 15:33:00,264 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-22 15:33:00,265 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-22 15:33:00,266 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-22 15:33:00,268 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-22 15:33:00,269 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-22 15:33:00,271 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-22 15:33:00,272 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-22 15:33:00,273 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-22 15:33:00,276 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-22 15:33:00,277 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-22 15:33:00,279 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-22 15:33:00,280 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-22 15:33:00,281 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-22 15:33:00,281 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-22 15:33:00,282 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-22 15:33:00,283 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-22 15:33:00,284 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-22 15:33:00,285 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-11-22 15:33:00,334 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-22 15:33:00,335 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-22 15:33:00,336 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-22 15:33:00,343 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-22 15:33:00,345 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-22 15:33:00,345 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-22 15:33:00,346 INFO L138 SettingsManager]: * Use SBE=true [2021-11-22 15:33:00,346 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-22 15:33:00,346 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-22 15:33:00,347 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-22 15:33:00,348 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-22 15:33:00,348 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-22 15:33:00,349 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-22 15:33:00,349 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-22 15:33:00,349 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-22 15:33:00,349 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-22 15:33:00,350 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-22 15:33:00,350 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-22 15:33:00,350 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-22 15:33:00,351 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-22 15:33:00,351 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-22 15:33:00,351 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-22 15:33:00,351 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-22 15:33:00,352 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-22 15:33:00,352 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-22 15:33:00,352 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-11-22 15:33:00,353 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-11-22 15:33:00,353 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-22 15:33:00,353 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-22 15:33:00,355 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> da295a433f96a090e97fd0ee72a58f7ad7a804da074c3950d4e4dc7d412af0ef [2021-11-22 15:33:00,700 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-22 15:33:00,728 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-22 15:33:00,733 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-22 15:33:00,735 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-22 15:33:00,736 INFO L275 PluginConnector]: CDTParser initialized [2021-11-22 15:33:00,737 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/../../sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i [2021-11-22 15:33:00,817 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/data/e8b0ed76b/f70e764160f64bda937d9807cec02ea6/FLAG1b51c7c8d [2021-11-22 15:33:01,941 INFO L306 CDTParser]: Found 1 translation units. [2021-11-22 15:33:01,941 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i [2021-11-22 15:33:01,994 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/data/e8b0ed76b/f70e764160f64bda937d9807cec02ea6/FLAG1b51c7c8d [2021-11-22 15:33:02,290 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/data/e8b0ed76b/f70e764160f64bda937d9807cec02ea6 [2021-11-22 15:33:02,293 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-22 15:33:02,296 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-22 15:33:02,301 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-22 15:33:02,301 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-22 15:33:02,305 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-22 15:33:02,306 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 03:33:02" (1/1) ... [2021-11-22 15:33:02,307 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6154a6be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:02, skipping insertion in model container [2021-11-22 15:33:02,307 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 03:33:02" (1/1) ... [2021-11-22 15:33:02,314 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-22 15:33:02,486 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-22 15:33:04,521 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277615,277628] [2021-11-22 15:33:04,527 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277762,277775] [2021-11-22 15:33:04,528 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277901,277914] [2021-11-22 15:33:04,529 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[278059,278072] [2021-11-22 15:33:04,540 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-22 15:33:04,680 INFO L203 MainTranslator]: Completed pre-run [2021-11-22 15:33:05,095 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277615,277628] [2021-11-22 15:33:05,096 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277762,277775] [2021-11-22 15:33:05,097 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[277901,277914] [2021-11-22 15:33:05,098 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/sv-benchmarks/c/ldv-linux-3.14/linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i[278059,278072] [2021-11-22 15:33:05,107 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-22 15:33:05,327 INFO L208 MainTranslator]: Completed translation [2021-11-22 15:33:05,328 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05 WrapperNode [2021-11-22 15:33:05,328 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-22 15:33:05,329 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-22 15:33:05,330 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-22 15:33:05,330 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-22 15:33:05,338 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:05,432 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:15,307 INFO L137 Inliner]: procedures = 202, calls = 3694, calls flagged for inlining = 1344, calls inlined = 39372, statements flattened = 528346 [2021-11-22 15:33:15,308 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-22 15:33:15,309 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-22 15:33:15,309 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-22 15:33:15,309 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-22 15:33:15,319 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:15,319 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:18,117 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:18,117 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:24,240 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:25,184 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:25,789 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:27,733 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-22 15:33:27,742 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-22 15:33:27,742 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-22 15:33:27,743 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-22 15:33:27,755 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (1/1) ... [2021-11-22 15:33:27,781 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-22 15:33:27,833 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/z3 [2021-11-22 15:33:27,878 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-22 15:33:27,893 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_854931e7-20fd-44e6-ae43-3972654cf2b0/bin/uautomizer-w2VwFs6gM0/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-22 15:33:27,934 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-22 15:33:27,934 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-22 15:33:27,934 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-22 15:33:27,935 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-11-22 15:33:27,935 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-22 15:33:27,935 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-22 15:33:27,935 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-22 15:33:27,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-22 15:33:27,936 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-22 15:33:27,936 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-22 15:33:27,936 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-22 15:33:27,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-22 15:33:28,834 INFO L236 CfgBuilder]: Building ICFG [2021-11-22 15:33:28,836 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-22 15:36:31,451 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_0_switch_break#1: ldv_switch_0_#res#1 := 0; [2021-11-22 15:36:31,452 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_0_switch_break#2: ldv_switch_0_#res#1 := 0; [2021-11-22 15:36:31,452 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#2379: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,453 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#2596: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,453 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#2524: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,455 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2381: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,455 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2380: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,456 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2382: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,456 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2379: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,456 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2378: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,456 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2525: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,456 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2524: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,457 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2527: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,457 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2526: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,457 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2523: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,457 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2533: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,459 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2532: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,459 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2535: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,468 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2534: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2529: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2528: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2531: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,469 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2530: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2541: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2540: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,470 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2543: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2542: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2537: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2536: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2539: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2538: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,471 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2545: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2544: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2546: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2597: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2596: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,472 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2599: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,473 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2598: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,473 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2595: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,473 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2601: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,473 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2600: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,473 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-2602: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,475 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5447: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,475 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5449: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,475 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5448: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5451: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5450: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5597: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5596: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,476 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5599: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5598: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5593: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5592: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5595: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5594: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,477 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5605: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5604: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5607: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5606: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5601: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5600: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,478 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5603: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,479 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5602: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,479 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5613: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,479 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5612: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,479 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5615: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,479 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5614: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5609: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,482 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5608: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,483 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5611: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5610: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5669: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,484 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5668: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,485 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5671: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,485 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5670: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,485 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5665: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,485 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5664: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,485 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5667: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,486 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-5666: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9405: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9407: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9406: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9409: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,489 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9408: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9551: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9550: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9557: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9556: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9559: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,490 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9558: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9553: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9552: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9555: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,491 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9554: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,504 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9565: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9564: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9567: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9566: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9561: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,505 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9560: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9563: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9562: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9573: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9572: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9569: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9568: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,506 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9571: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9570: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9623: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9622: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9629: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9628: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,507 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9625: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9624: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9627: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,508 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L10849-9626: cit_write_reg_#t~ret57#1 := usb_control_msg_#res#1;assume { :end_inline_usb_control_msg } true;assume -2147483648 <= cit_write_reg_#t~ret57#1 && cit_write_reg_#t~ret57#1 <= 2147483647;cit_write_reg_~err~0#1 := cit_write_reg_#t~ret57#1;havoc cit_write_reg_#t~ret57#1; [2021-11-22 15:36:31,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#5665: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_switch_1_switch_break#1: ldv_switch_1_#res#1 := 0; [2021-11-22 15:36:31,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#5448: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,510 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#5593: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2379: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2380: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,512 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2378: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2381: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2523: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2524: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2522: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,513 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2527: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2528: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2525: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2526: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2531: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,514 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2532: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2529: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2530: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2535: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2536: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,515 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2533: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2534: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2539: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2540: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2537: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2538: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,516 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2543: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2544: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2541: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2542: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2595: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,517 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2596: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2593: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2594: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2599: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2597: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,518 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-2598: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,523 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5444: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5447: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5445: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5446: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,524 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5588: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5591: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5592: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5589: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5590: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5595: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,525 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5596: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5593: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5594: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5599: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5600: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,526 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5597: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5598: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5603: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5604: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5601: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5602: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,527 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5607: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5608: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5605: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5606: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,528 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5609: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5610: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5659: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5660: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5663: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,530 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5664: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5661: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5662: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,531 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-5665: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9399: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9400: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9401: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9402: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,535 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9543: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9544: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,536 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9547: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,538 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9548: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9545: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,539 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9546: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9551: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9552: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9549: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9550: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9555: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,540 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9556: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9553: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9554: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9559: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9560: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9557: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,541 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9558: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9563: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9564: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9561: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9562: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9565: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,542 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9615: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9616: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9614: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9619: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9620: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9617: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,543 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L4802-9618: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2329: cit_start_model2_#t~ret406#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret406#1 && cit_start_model2_#t~ret406#1 <= 2147483647;havoc cit_start_model2_#t~ret406#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 30, 261;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2330: cit_start_model2_#t~ret407#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret407#1 && cit_start_model2_#t~ret407#1 <= 2147483647;havoc cit_start_model2_#t~ret407#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 57, 266;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2328: cit_start_model2_#t~ret405#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret405#1 && cit_start_model2_#t~ret405#1 <= 2147483647;havoc cit_start_model2_#t~ret405#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 0, 260;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,549 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2331: cit_start_model2_#t~ret408#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret408#1 && cit_start_model2_#t~ret408#1 <= 2147483647;havoc cit_start_model2_#t~ret408#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 112, 281;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2332: cit_start_model2_#t~ret409#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret409#1 && cit_start_model2_#t~ret409#1 <= 2147483647;havoc cit_start_model2_#t~ret409#1;call write~int(2, cit_start_model2_~sd~10#1.base, 4530 + cit_start_model2_~sd~10#1.offset, 1); [2021-11-22 15:36:31,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2473: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,550 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2474: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2477: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2478: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,553 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2475: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2476: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,554 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2481: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2482: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,555 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2479: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,556 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2480: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,557 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2485: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,562 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2486: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,563 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2483: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,563 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2484: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,563 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2489: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,563 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2490: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,563 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2487: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2488: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2493: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2494: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2491: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2492: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,564 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2495: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,565 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2496: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,565 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2545: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,565 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2546: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,565 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2549: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,565 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2550: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,566 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2547: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,567 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2548: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,567 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2551: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,567 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-2552: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,570 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-20: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,570 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-21: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,570 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-22: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-29: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-56: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-57: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-58: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-65: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,571 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-96: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,572 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-94: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,572 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-95: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,572 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5575-103: assume { :end_inline_cit_model2_Packet2 } true; [2021-11-22 15:36:31,572 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5345: cit_start_model2_#t~ret406#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret406#1 && cit_start_model2_#t~ret406#1 <= 2147483647;havoc cit_start_model2_#t~ret406#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 30, 261;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,572 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5346: cit_start_model2_#t~ret407#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret407#1 && cit_start_model2_#t~ret407#1 <= 2147483647;havoc cit_start_model2_#t~ret407#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 57, 266;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,573 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5344: cit_start_model2_#t~ret405#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret405#1 && cit_start_model2_#t~ret405#1 <= 2147483647;havoc cit_start_model2_#t~ret405#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 0, 260;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,573 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5347: cit_start_model2_#t~ret408#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret408#1 && cit_start_model2_#t~ret408#1 <= 2147483647;havoc cit_start_model2_#t~ret408#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 112, 281;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,573 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5348: cit_start_model2_#t~ret409#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret409#1 && cit_start_model2_#t~ret409#1 <= 2147483647;havoc cit_start_model2_#t~ret409#1;call write~int(2, cit_start_model2_~sd~10#1.base, 4530 + cit_start_model2_~sd~10#1.offset, 1); [2021-11-22 15:36:31,573 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5489: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,574 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5490: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,574 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5493: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,574 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5494: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,574 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5491: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,575 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5492: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,576 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5497: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,576 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5498: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,576 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5495: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,576 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5496: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,576 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5501: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,577 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5502: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,577 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5499: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,577 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5500: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,577 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5505: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,578 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5506: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,578 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5503: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,578 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5504: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,578 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5509: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,579 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5510: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,579 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5507: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,579 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5508: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,579 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5511: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,579 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5512: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,580 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5561: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,580 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5562: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,580 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5565: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,580 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5566: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,581 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5563: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,581 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5564: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,581 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5567: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,581 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-5568: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,582 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-20: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 22, 3;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,582 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-21: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 24, 68;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,582 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-22: assume { :end_inline_cit_model2_Packet1 } true;cit_start_model2_~clock_div~3#1 := 10; [2021-11-22 15:36:31,582 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-29: assume { :end_inline_cit_model2_Packet1 } true; [2021-11-22 15:36:31,583 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-56: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 22, 3;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,583 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-57: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 24, 68;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,583 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-58: assume { :end_inline_cit_model2_Packet1 } true;cit_start_model2_~clock_div~3#1 := 10; [2021-11-22 15:36:31,583 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-65: assume { :end_inline_cit_model2_Packet1 } true; [2021-11-22 15:36:31,583 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-95: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 24, 68;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,584 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-96: assume { :end_inline_cit_model2_Packet1 } true;cit_start_model2_~clock_div~3#1 := 10; [2021-11-22 15:36:31,584 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-94: assume { :end_inline_cit_model2_Packet1 } true;assume { :begin_inline_cit_model2_Packet1 } true;cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset, cit_model2_Packet1_#in~v1#1, cit_model2_Packet1_#in~v2#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 22, 3;havoc cit_model2_Packet1_#t~ret97#1, cit_model2_Packet1_#t~ret98#1, cit_model2_Packet1_#t~ret99#1, cit_model2_Packet1_#t~ret100#1, cit_model2_Packet1_#t~ret101#1, cit_model2_Packet1_#t~ret102#1, cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1, cit_model2_Packet1_~v2#1;cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset := cit_model2_Packet1_#in~gspca_dev#1.base, cit_model2_Packet1_#in~gspca_dev#1.offset;cit_model2_Packet1_~v1#1 := cit_model2_Packet1_#in~v1#1;cit_model2_Packet1_~v2#1 := cit_model2_Packet1_#in~v2#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 170, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,584 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5590-103: assume { :end_inline_cit_model2_Packet1 } true; [2021-11-22 15:36:31,586 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6986: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,586 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6987: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,586 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6987: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,586 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6984: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,586 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6984: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6990: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6990: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6989: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6995: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6992: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,587 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6993: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,588 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6993: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,588 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6998: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,588 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6996: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,588 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-6996: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,589 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7419: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,589 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7419: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,589 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7422: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,589 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7422: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,589 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7421: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7427: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7424: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7425: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7425: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7430: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7431: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,590 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7431: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7428: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7428: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7434: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7434: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7433: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,591 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7439: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,592 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7436: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,592 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7437: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,592 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7437: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,596 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7442: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,596 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7443: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7443: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7440: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7440: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7446: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7446: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,597 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7445: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,598 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7451: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,599 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7448: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,599 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7449: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,600 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7449: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,600 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7454: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,600 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7455: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7455: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7452: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7452: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7458: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7458: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,601 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7457: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7463: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7460: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7461: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7461: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7466: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7467: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,602 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7467: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7464: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7464: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7470: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7470: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7469: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7475: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,603 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7472: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7473: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7473: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7478: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7479: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7479: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7476: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,604 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7476: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7482: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7482: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7481: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7487: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7484: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7485: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,605 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7485: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7490: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7488: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7488: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7635: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7635: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,606 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7638: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7638: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7637: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7643: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7640: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7641: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7641: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,607 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7646: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7647: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7647: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7644: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7644: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7650: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7650: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,608 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7649: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7655: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7652: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7653: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7653: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7658: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7656: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,609 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-7656: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,611 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9245: cit_start_model2_#t~ret407#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret407#1 && cit_start_model2_#t~ret407#1 <= 2147483647;havoc cit_start_model2_#t~ret407#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 57, 266;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,612 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9246: cit_start_model2_#t~ret408#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret408#1 && cit_start_model2_#t~ret408#1 <= 2147483647;havoc cit_start_model2_#t~ret408#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 112, 281;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,612 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9243: cit_start_model2_#t~ret405#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret405#1 && cit_start_model2_#t~ret405#1 <= 2147483647;havoc cit_start_model2_#t~ret405#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 0, 260;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,612 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9244: cit_start_model2_#t~ret406#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret406#1 && cit_start_model2_#t~ret406#1 <= 2147483647;havoc cit_start_model2_#t~ret406#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_start_model2_~gspca_dev#1.base, cit_start_model2_~gspca_dev#1.offset, 30, 261;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,612 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9247: cit_start_model2_#t~ret409#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_start_model2_#t~ret409#1 && cit_start_model2_#t~ret409#1 <= 2147483647;havoc cit_start_model2_#t~ret409#1;call write~int(2, cit_start_model2_~sd~10#1.base, 4530 + cit_start_model2_~sd~10#1.offset, 1); [2021-11-22 15:36:31,613 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ULTIMATE.startFINAL: assume true; [2021-11-22 15:36:31,613 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9389: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,614 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9390: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,614 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9388: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,614 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9393: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,614 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9394: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,615 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9391: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,615 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9392: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,615 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9397: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,615 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9398: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,615 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9395: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,616 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9396: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,616 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9401: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,616 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9402: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,616 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9399: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,617 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9400: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,617 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9405: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,617 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9406: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,617 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9403: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,617 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9404: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,618 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9409: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,618 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9410: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,618 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9407: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,618 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9408: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,619 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9411: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,619 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9461: cit_model2_Packet1_#t~ret98#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret98#1 && cit_model2_Packet1_#t~ret98#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret98#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v1#1 % 65536, 303;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,619 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9462: cit_model2_Packet1_#t~ret99#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret99#1 && cit_model2_Packet1_#t~ret99#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret99#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 304;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,619 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9460: cit_model2_Packet1_#t~ret97#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret97#1 && cit_model2_Packet1_#t~ret97#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret97#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 255, 302;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,619 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9465: cit_model2_Packet1_#t~ret102#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret102#1 && cit_model2_Packet1_#t~ret102#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret102#1;assume { :begin_inline_cit_model2_Packet2 } true;cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset;havoc cit_model2_Packet2_#t~ret95#1, cit_model2_Packet2_#t~ret96#1, cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset;cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset := cit_model2_Packet2_#in~gspca_dev#1.base, cit_model2_Packet2_#in~gspca_dev#1.offset;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 255, 301;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,620 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9466: cit_model2_Packet2_#t~ret95#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret95#1 && cit_model2_Packet2_#t~ret95#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret95#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet2_~gspca_dev#1.base, cit_model2_Packet2_~gspca_dev#1.offset, 65187, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,620 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9463: cit_model2_Packet1_#t~ret100#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret100#1 && cit_model2_Packet1_#t~ret100#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret100#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, 50969, 292;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,620 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9464: cit_model2_Packet1_#t~ret101#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet1_#t~ret101#1 && cit_model2_Packet1_#t~ret101#1 <= 2147483647;havoc cit_model2_Packet1_#t~ret101#1;assume { :begin_inline_cit_write_reg } true;cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset, cit_write_reg_#in~value#1, cit_write_reg_#in~index#1 := cit_model2_Packet1_~gspca_dev#1.base, cit_model2_Packet1_~gspca_dev#1.offset, cit_model2_Packet1_~v2#1 % 65536, 295;havoc cit_write_reg_#res#1;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset, cit_write_reg_#t~ret56#1, cit_write_reg_#t~ret57#1, cit_write_reg_#t~nondet58#1, cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset, cit_write_reg_~value#1, cit_write_reg_~index#1, cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, cit_write_reg_~err~0#1, cit_write_reg_~tmp~0#1;cit_write_reg_~gspca_dev#1.base, cit_write_reg_~gspca_dev#1.offset := cit_write_reg_#in~gspca_dev#1.base, cit_write_reg_#in~gspca_dev#1.offset;cit_write_reg_~value#1 := cit_write_reg_#in~value#1;cit_write_reg_~index#1 := cit_write_reg_#in~index#1;havoc cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset;havoc cit_write_reg_~err~0#1;havoc cit_write_reg_~tmp~0#1;call cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset := read~$Pointer$(cit_write_reg_~gspca_dev#1.base, 2106 + cit_write_reg_~gspca_dev#1.offset, 8);cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset := cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;havoc cit_write_reg_#t~mem55#1.base, cit_write_reg_#t~mem55#1.offset;assume { :begin_inline___create_pipe } true;__create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset, __create_pipe_#in~endpoint#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, 0;havoc __create_pipe_#res#1;havoc __create_pipe_#t~mem23#1, __create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, __create_pipe_~endpoint#1;__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset := __create_pipe_#in~dev#1.base, __create_pipe_#in~dev#1.offset;__create_pipe_~endpoint#1 := __create_pipe_#in~endpoint#1;call __create_pipe_#t~mem23#1 := read~int(__create_pipe_~dev#1.base, __create_pipe_~dev#1.offset, 4);__create_pipe_#res#1 := ~bitwiseOr(256 * __create_pipe_#t~mem23#1, 32768 * __create_pipe_~endpoint#1);havoc __create_pipe_#t~mem23#1; [2021-11-22 15:36:31,620 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408-9467: cit_model2_Packet2_#t~ret96#1 := cit_write_reg_#res#1;assume { :end_inline_cit_write_reg } true;assume -2147483648 <= cit_model2_Packet2_#t~ret96#1 && cit_model2_Packet2_#t~ret96#1 <= 2147483647;havoc cit_model2_Packet2_#t~ret96#1; [2021-11-22 15:36:31,624 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16034: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,624 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16035: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,624 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16035: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,624 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16032: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16032: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16038: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16038: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16037: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16043: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16040: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,625 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16041: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,626 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16041: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,626 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16046: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,626 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16044: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,626 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16044: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,626 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16467: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16467: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16470: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16470: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16469: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16475: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16472: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,627 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16473: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16473: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16478: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16479: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16479: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16476: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16476: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,628 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16482: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16482: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16481: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16487: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16484: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16485: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16485: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,629 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16490: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16491: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16491: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16488: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16488: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16494: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16494: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,630 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16493: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16499: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16496: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16497: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16497: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16502: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16503: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,631 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16503: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16500: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16500: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16506: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16506: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16505: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16511: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,632 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16508: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16509: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16509: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16514: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16515: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16515: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16512: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,633 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16512: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16518: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16518: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16517: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16523: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16520: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16521: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,634 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16521: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16526: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16527: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16527: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16524: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16524: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16530: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,635 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16530: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16529: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16535: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16532: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16533: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16533: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16538: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,636 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16536: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16536: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16683: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16683: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16686: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16686: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16685: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,637 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16691: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16688: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16689: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16689: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16694: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16695: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16695: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,638 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16692: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16692: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16698: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16698: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16697: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16703: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16700: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,639 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16701: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,640 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16701: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,640 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16706: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,640 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16704: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,640 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-16704: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,644 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27731: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,644 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27729: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,644 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27729: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,644 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27734: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27735: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27735: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27732: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27732: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27738: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27738: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,645 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27737: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27743: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27740: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27741: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-27741: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28166: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,646 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28167: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28167: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28164: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28164: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28170: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28170: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28169: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,647 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28175: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28172: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28173: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28173: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28178: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28179: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28179: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,648 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28176: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28176: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28182: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28182: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28181: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28187: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28184: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,649 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28185: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28185: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28190: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28191: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28191: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28188: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28188: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28194: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,650 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28194: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28193: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28199: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28196: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28197: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28197: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28202: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,651 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28203: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28203: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28200: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28200: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28206: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28206: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28205: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,652 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28211: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28208: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28209: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28209: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28214: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28215: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28215: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,653 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28212: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28212: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28218: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28218: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28217: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28223: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28221: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,654 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28221: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,655 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28220: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,655 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28227: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,655 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28227: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28226: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28224: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28224: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28230: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28230: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28229: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,656 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28235: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,657 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28233: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,657 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28233: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,657 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28232: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,662 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28383: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,662 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28383: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,662 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28382: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28380: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28380: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28386: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28386: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28385: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28391: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,663 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28389: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28389: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28388: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28395: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28395: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28394: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28392: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28392: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,664 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28398: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28398: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28397: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28403: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28401: assume cit_write_reg_~err~0#1 < 0;havoc cit_write_reg_#t~nondet58#1; [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28401: assume !(cit_write_reg_~err~0#1 < 0); [2021-11-22 15:36:31,665 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint L5401-28400: cit_write_reg_#res#1 := 0; [2021-11-22 15:36:31,667 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#9406: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,668 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#9551: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,668 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint __create_pipe_returnLabel#9623: cit_write_reg_#t~ret56#1 := __create_pipe_#res#1;assume { :end_inline___create_pipe } true;cit_write_reg_~tmp~0#1 := cit_write_reg_#t~ret56#1;havoc cit_write_reg_#t~ret56#1;assume { :begin_inline_usb_control_msg } true;usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset, usb_control_msg_#in~arg1#1, usb_control_msg_#in~arg2#1, usb_control_msg_#in~arg3#1, usb_control_msg_#in~arg4#1, usb_control_msg_#in~arg5#1, usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset, usb_control_msg_#in~arg7#1, usb_control_msg_#in~arg8#1 := cit_write_reg_~udev~0#1.base, cit_write_reg_~udev~0#1.offset, ~bitwiseOr(cit_write_reg_~tmp~0#1, 2147483648), 0, 66, cit_write_reg_~value#1 % 65536, cit_write_reg_~index#1 % 65536, 0, 0, 0, 1000;havoc usb_control_msg_#res#1;havoc usb_control_msg_#t~nondet1163#1, usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset, usb_control_msg_~arg1#1, usb_control_msg_~arg2#1, usb_control_msg_~arg3#1, usb_control_msg_~arg4#1, usb_control_msg_~arg5#1, usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset, usb_control_msg_~arg7#1, usb_control_msg_~arg8#1;usb_control_msg_~arg0#1.base, usb_control_msg_~arg0#1.offset := usb_control_msg_#in~arg0#1.base, usb_control_msg_#in~arg0#1.offset;usb_control_msg_~arg1#1 := usb_control_msg_#in~arg1#1;usb_control_msg_~arg2#1 := usb_control_msg_#in~arg2#1;usb_control_msg_~arg3#1 := usb_control_msg_#in~arg3#1;usb_control_msg_~arg4#1 := usb_control_msg_#in~arg4#1;usb_control_msg_~arg5#1 := usb_control_msg_#in~arg5#1;usb_control_msg_~arg6#1.base, usb_control_msg_~arg6#1.offset := usb_control_msg_#in~arg6#1.base, usb_control_msg_#in~arg6#1.offset;usb_control_msg_~arg7#1 := usb_control_msg_#in~arg7#1;usb_control_msg_~arg8#1 := usb_control_msg_#in~arg8#1;assume -2147483648 <= usb_control_msg_#t~nondet1163#1 && usb_control_msg_#t~nondet1163#1 <= 2147483647;usb_control_msg_#res#1 := usb_control_msg_#t~nondet1163#1;havoc usb_control_msg_#t~nondet1163#1; [2021-11-22 15:36:31,668 INFO L277 CfgBuilder]: Performing block encoding [2021-11-22 15:36:31,872 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-22 15:36:31,873 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-11-22 15:36:31,931 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 03:36:31 BoogieIcfgContainer [2021-11-22 15:36:31,931 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-22 15:36:31,934 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-22 15:36:31,934 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-22 15:36:31,938 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-22 15:36:31,938 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 03:33:02" (1/3) ... [2021-11-22 15:36:31,939 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4525143a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 03:36:31, skipping insertion in model container [2021-11-22 15:36:31,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 03:33:05" (2/3) ... [2021-11-22 15:36:31,940 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4525143a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 03:36:31, skipping insertion in model container [2021-11-22 15:36:31,940 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 03:36:31" (3/3) ... [2021-11-22 15:36:31,942 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-3.14_complex_emg_linux-usb-dev_drivers-media-usb-gspca-gspca_xirlink_cit.cil.i [2021-11-22 15:36:31,948 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-22 15:36:31,948 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 4 error locations. [2021-11-22 15:36:32,404 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-22 15:36:32,412 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-22 15:36:32,412 INFO L340 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2021-11-22 15:36:33,208 INFO L276 IsEmpty]: Start isEmpty. Operand has 64650 states, 64646 states have (on average 1.202549268322866) internal successors, (77740), 64649 states have internal predecessors, (77740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:33,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-11-22 15:36:33,225 INFO L506 BasicCegarLoop]: Found error trace [2021-11-22 15:36:33,226 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-22 15:36:33,226 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2021-11-22 15:36:33,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-22 15:36:33,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1426440070, now seen corresponding path program 1 times [2021-11-22 15:36:33,242 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-22 15:36:33,243 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764920083] [2021-11-22 15:36:33,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-22 15:36:33,244 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-22 15:36:33,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-22 15:36:34,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-22 15:36:34,139 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-22 15:36:34,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764920083] [2021-11-22 15:36:34,140 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764920083] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-22 15:36:34,141 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-22 15:36:34,141 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-22 15:36:34,143 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683320301] [2021-11-22 15:36:34,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-22 15:36:34,149 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-22 15:36:34,149 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-22 15:36:34,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-22 15:36:34,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-22 15:36:34,276 INFO L87 Difference]: Start difference. First operand has 64650 states, 64646 states have (on average 1.202549268322866) internal successors, (77740), 64649 states have internal predecessors, (77740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:39,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-22 15:36:39,057 INFO L93 Difference]: Finished difference Result 184567 states and 221974 transitions. [2021-11-22 15:36:39,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-22 15:36:39,061 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2021-11-22 15:36:39,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-22 15:36:39,598 INFO L225 Difference]: With dead ends: 184567 [2021-11-22 15:36:39,598 INFO L226 Difference]: Without dead ends: 119748 [2021-11-22 15:36:39,789 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-22 15:36:39,793 INFO L933 BasicCegarLoop]: 72273 mSDtfsCounter, 72059 mSDsluCounter, 72219 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72059 SdHoareTripleChecker+Valid, 144492 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.4s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-22 15:36:39,795 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [72059 Valid, 144492 Invalid, 44 Unknown, 0 Unchecked, 0.4s Time], IncrementalHoareTripleChecker [9 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-22 15:36:40,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119748 states. [2021-11-22 15:36:43,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119748 to 119746. [2021-11-22 15:36:43,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119746 states, 119742 states have (on average 1.2010990295802642) internal successors, (143822), 119745 states have internal predecessors, (143822), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:44,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119746 states to 119746 states and 143822 transitions. [2021-11-22 15:36:44,835 INFO L78 Accepts]: Start accepts. Automaton has 119746 states and 143822 transitions. Word has length 46 [2021-11-22 15:36:44,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-22 15:36:44,837 INFO L470 AbstractCegarLoop]: Abstraction has 119746 states and 143822 transitions. [2021-11-22 15:36:44,837 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:44,838 INFO L276 IsEmpty]: Start isEmpty. Operand 119746 states and 143822 transitions. [2021-11-22 15:36:44,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-11-22 15:36:44,868 INFO L506 BasicCegarLoop]: Found error trace [2021-11-22 15:36:44,868 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-22 15:36:44,868 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-22 15:36:44,869 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2021-11-22 15:36:44,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-22 15:36:44,870 INFO L85 PathProgramCache]: Analyzing trace with hash 814571705, now seen corresponding path program 1 times [2021-11-22 15:36:44,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-22 15:36:44,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034758814] [2021-11-22 15:36:44,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-22 15:36:44,871 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-22 15:36:45,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-22 15:36:45,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-22 15:36:45,304 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-22 15:36:45,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034758814] [2021-11-22 15:36:45,305 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034758814] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-22 15:36:45,305 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-22 15:36:45,305 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-22 15:36:45,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110475918] [2021-11-22 15:36:45,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-22 15:36:45,307 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-22 15:36:45,307 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-22 15:36:45,308 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-22 15:36:45,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-22 15:36:45,309 INFO L87 Difference]: Start difference. First operand 119746 states and 143822 transitions. Second operand has 3 states, 3 states have (on average 24.666666666666668) internal successors, (74), 3 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:49,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-22 15:36:49,222 INFO L93 Difference]: Finished difference Result 280036 states and 336429 transitions. [2021-11-22 15:36:49,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-22 15:36:49,223 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.666666666666668) internal successors, (74), 3 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-11-22 15:36:49,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-22 15:36:49,982 INFO L225 Difference]: With dead ends: 280036 [2021-11-22 15:36:49,982 INFO L226 Difference]: Without dead ends: 160359 [2021-11-22 15:36:50,217 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-22 15:36:50,219 INFO L933 BasicCegarLoop]: 71985 mSDtfsCounter, 24452 mSDsluCounter, 71955 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24452 SdHoareTripleChecker+Valid, 143940 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-22 15:36:50,220 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [24452 Valid, 143940 Invalid, 64 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [16 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-22 15:36:50,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160359 states. [2021-11-22 15:36:53,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160359 to 160311. [2021-11-22 15:36:54,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160311 states, 160307 states have (on average 1.2015507744515213) internal successors, (192617), 160310 states have internal predecessors, (192617), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:54,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160311 states to 160311 states and 192617 transitions. [2021-11-22 15:36:54,726 INFO L78 Accepts]: Start accepts. Automaton has 160311 states and 192617 transitions. Word has length 74 [2021-11-22 15:36:54,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-22 15:36:54,727 INFO L470 AbstractCegarLoop]: Abstraction has 160311 states and 192617 transitions. [2021-11-22 15:36:54,727 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.666666666666668) internal successors, (74), 3 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-22 15:36:54,728 INFO L276 IsEmpty]: Start isEmpty. Operand 160311 states and 192617 transitions. [2021-11-22 15:36:54,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-11-22 15:36:54,739 INFO L506 BasicCegarLoop]: Found error trace [2021-11-22 15:36:54,739 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-22 15:36:54,740 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-11-22 15:36:54,740 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2021-11-22 15:36:54,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-22 15:36:54,741 INFO L85 PathProgramCache]: Analyzing trace with hash -276085192, now seen corresponding path program 1 times [2021-11-22 15:36:54,741 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-22 15:36:54,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729940309] [2021-11-22 15:36:54,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-22 15:36:54,742 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-22 15:36:54,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-22 15:36:55,144 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-22 15:36:55,145 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-22 15:36:55,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729940309] [2021-11-22 15:36:55,145 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729940309] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-22 15:36:55,145 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-22 15:36:55,146 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-22 15:36:55,146 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399475385] [2021-11-22 15:36:55,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-22 15:36:55,147 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-22 15:36:55,147 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-22 15:36:55,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-22 15:36:55,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-22 15:36:55,149 INFO L87 Difference]: Start difference. First operand 160311 states and 192617 transitions. Second operand has 3 states, 3 states have (on average 26.333333333333332) internal successors, (79), 3 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)