./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 17:42:14,828 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 17:42:14,830 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 17:42:14,861 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 17:42:14,861 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 17:42:14,862 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 17:42:14,863 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 17:42:14,865 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 17:42:14,867 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 17:42:14,868 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 17:42:14,868 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 17:42:14,870 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 17:42:14,870 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 17:42:14,871 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 17:42:14,872 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 17:42:14,873 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 17:42:14,874 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 17:42:14,875 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 17:42:14,877 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 17:42:14,879 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 17:42:14,880 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 17:42:14,882 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 17:42:14,883 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 17:42:14,883 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 17:42:14,886 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 17:42:14,887 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 17:42:14,887 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 17:42:14,888 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 17:42:14,888 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 17:42:14,889 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 17:42:14,889 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 17:42:14,890 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 17:42:14,891 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 17:42:14,891 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 17:42:14,892 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 17:42:14,892 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 17:42:14,893 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 17:42:14,893 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 17:42:14,893 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 17:42:14,894 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 17:42:14,894 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 17:42:14,895 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-12-06 17:42:14,919 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 17:42:14,919 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 17:42:14,920 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 17:42:14,920 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 17:42:14,921 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 17:42:14,921 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 17:42:14,921 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 17:42:14,921 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 17:42:14,921 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 17:42:14,921 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 17:42:14,922 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 17:42:14,922 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 17:42:14,922 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 17:42:14,922 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 17:42:14,922 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 17:42:14,922 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 17:42:14,923 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 17:42:14,924 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 17:42:14,924 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 17:42:14,924 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 17:42:14,924 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 17:42:14,924 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 17:42:14,925 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 17:42:14,926 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf [2021-12-06 17:42:15,107 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 17:42:15,125 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 17:42:15,127 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 17:42:15,127 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 17:42:15,128 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 17:42:15,129 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2021-12-06 17:42:15,171 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/data/854ae18d4/dad6eed1da7342538fa34810d78da710/FLAG6e4ea7986 [2021-12-06 17:42:15,556 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 17:42:15,557 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2021-12-06 17:42:15,561 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/data/854ae18d4/dad6eed1da7342538fa34810d78da710/FLAG6e4ea7986 [2021-12-06 17:42:15,570 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/data/854ae18d4/dad6eed1da7342538fa34810d78da710 [2021-12-06 17:42:15,572 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 17:42:15,573 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 17:42:15,574 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 17:42:15,574 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 17:42:15,577 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 17:42:15,578 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,579 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5f8cc058 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15, skipping insertion in model container [2021-12-06 17:42:15,579 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,586 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 17:42:15,597 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 17:42:15,714 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 17:42:15,716 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 17:42:15,728 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 17:42:15,740 INFO L208 MainTranslator]: Completed translation [2021-12-06 17:42:15,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15 WrapperNode [2021-12-06 17:42:15,741 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 17:42:15,742 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 17:42:15,742 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 17:42:15,742 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 17:42:15,747 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,752 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,764 INFO L137 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 32 [2021-12-06 17:42:15,764 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 17:42:15,765 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 17:42:15,765 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 17:42:15,765 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 17:42:15,771 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,771 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,772 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,772 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,776 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,778 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,779 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,780 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 17:42:15,781 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 17:42:15,781 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 17:42:15,781 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 17:42:15,782 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (1/1) ... [2021-12-06 17:42:15,788 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:15,796 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:15,806 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:15,808 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 17:42:15,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-06 17:42:15,842 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 17:42:15,842 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 17:42:15,843 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-06 17:42:15,843 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 17:42:15,843 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 17:42:15,897 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 17:42:15,899 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 17:42:15,981 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 17:42:15,986 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 17:42:15,986 INFO L301 CfgBuilder]: Removed 2 assume(true) statements. [2021-12-06 17:42:15,988 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 05:42:15 BoogieIcfgContainer [2021-12-06 17:42:15,988 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 17:42:15,989 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 17:42:15,989 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 17:42:15,992 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 17:42:15,993 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 17:42:15,993 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 05:42:15" (1/3) ... [2021-12-06 17:42:15,995 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5a71c1a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 05:42:15, skipping insertion in model container [2021-12-06 17:42:15,995 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 17:42:15,995 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 05:42:15" (2/3) ... [2021-12-06 17:42:15,995 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5a71c1a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 05:42:15, skipping insertion in model container [2021-12-06 17:42:15,995 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 17:42:15,996 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 05:42:15" (3/3) ... [2021-12-06 17:42:15,997 INFO L388 chiAutomizerObserver]: Analyzing ICFG Arrays01-EquivalentConstantIndices-1.c [2021-12-06 17:42:16,042 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 17:42:16,043 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 17:42:16,043 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 17:42:16,043 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 17:42:16,043 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 17:42:16,043 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 17:42:16,043 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 17:42:16,043 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 17:42:16,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:16,067 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-06 17:42:16,068 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:16,068 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:16,072 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 17:42:16,072 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:16,072 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 17:42:16,072 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:16,073 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-06 17:42:16,073 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:16,073 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:16,074 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 17:42:16,074 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:16,079 INFO L791 eck$LassoCheckResult]: Stem: 6#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 8#L13-3true [2021-12-06 17:42:16,079 INFO L793 eck$LassoCheckResult]: Loop: 8#L13-3true assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 7#L13-2true main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 8#L13-3true [2021-12-06 17:42:16,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:16,084 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-12-06 17:42:16,090 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:16,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315475385] [2021-12-06 17:42:16,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:16,092 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:16,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,157 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:16,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,175 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:16,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:16,178 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-12-06 17:42:16,178 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:16,178 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333831041] [2021-12-06 17:42:16,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:16,178 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:16,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,186 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:16,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,193 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:16,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:16,195 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-12-06 17:42:16,195 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:16,195 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130756101] [2021-12-06 17:42:16,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:16,196 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:16,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,211 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:16,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:16,223 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:16,396 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 17:42:16,396 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 17:42:16,396 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 17:42:16,396 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 17:42:16,396 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-06 17:42:16,396 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,396 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 17:42:16,397 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 17:42:16,397 INFO L133 ssoRankerPreferences]: Filename of dumped script: Arrays01-EquivalentConstantIndices-1.c_Iteration1_Lasso [2021-12-06 17:42:16,397 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 17:42:16,397 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 17:42:16,411 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,417 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,419 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,458 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,460 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,462 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,464 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 17:42:16,544 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-06 17:42:16,547 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-06 17:42:16,548 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,549 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,550 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-12-06 17:42:16,551 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,560 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,560 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,561 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,561 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,565 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 17:42:16,565 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 17:42:16,570 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,595 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-12-06 17:42:16,596 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,596 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,597 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,598 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-12-06 17:42:16,598 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,607 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,608 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 17:42:16,608 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,608 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,608 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,609 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 17:42:16,609 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 17:42:16,611 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,630 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2021-12-06 17:42:16,631 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,631 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,631 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-12-06 17:42:16,633 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,641 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,642 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,642 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,642 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,645 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 17:42:16,645 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 17:42:16,650 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,670 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-12-06 17:42:16,670 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,671 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,672 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-12-06 17:42:16,672 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,681 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,681 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,681 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,681 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,684 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 17:42:16,684 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 17:42:16,688 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,707 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-12-06 17:42:16,707 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,707 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,708 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-12-06 17:42:16,709 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,716 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,716 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,716 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,716 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,719 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 17:42:16,719 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 17:42:16,723 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,749 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2021-12-06 17:42:16,750 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,750 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,751 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-12-06 17:42:16,752 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,759 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,759 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 17:42:16,759 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,759 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,760 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,760 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 17:42:16,760 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 17:42:16,761 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 17:42:16,786 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2021-12-06 17:42:16,786 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,786 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,787 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,788 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-12-06 17:42:16,789 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 17:42:16,796 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 17:42:16,796 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 17:42:16,796 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 17:42:16,796 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 17:42:16,800 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 17:42:16,800 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 17:42:16,807 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-06 17:42:16,825 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2021-12-06 17:42:16,825 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2021-12-06 17:42:16,827 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 17:42:16,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:16,828 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 17:42:16,833 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-12-06 17:42:16,833 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-06 17:42:16,843 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-06 17:42:16,843 INFO L513 LassoAnalysis]: Proved termination. [2021-12-06 17:42:16,849 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2021-12-06 17:42:16,868 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2021-12-06 17:42:16,875 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2021-12-06 17:42:16,880 INFO L297 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2021-12-06 17:42:16,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:16,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:16,915 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 17:42:16,916 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:16,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:16,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 17:42:16,929 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:16,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:16,990 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-06 17:42:16,991 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,024 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 22 states and 31 transitions. Complement of second has 8 states. [2021-12-06 17:42:17,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-12-06 17:42:17,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 17 transitions. [2021-12-06 17:42:17,030 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 2 letters. Loop has 2 letters. [2021-12-06 17:42:17,030 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 17:42:17,030 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 4 letters. Loop has 2 letters. [2021-12-06 17:42:17,030 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 17:42:17,030 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 2 letters. Loop has 4 letters. [2021-12-06 17:42:17,030 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 17:42:17,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 31 transitions. [2021-12-06 17:42:17,032 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,034 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 8 states and 10 transitions. [2021-12-06 17:42:17,035 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:17,035 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2021-12-06 17:42:17,035 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2021-12-06 17:42:17,036 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:17,036 INFO L681 BuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2021-12-06 17:42:17,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2021-12-06 17:42:17,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 7. [2021-12-06 17:42:17,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.2857142857142858) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2021-12-06 17:42:17,052 INFO L704 BuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2021-12-06 17:42:17,052 INFO L587 BuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2021-12-06 17:42:17,052 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 17:42:17,052 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 9 transitions. [2021-12-06 17:42:17,052 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,052 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:17,052 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:17,052 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1] [2021-12-06 17:42:17,052 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:17,053 INFO L791 eck$LassoCheckResult]: Stem: 78#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 79#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 82#L13-3 assume !(main_~i~0#1 < 1048); 76#L17-2 [2021-12-06 17:42:17,053 INFO L793 eck$LassoCheckResult]: Loop: 76#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 77#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 76#L17-2 [2021-12-06 17:42:17,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,053 INFO L85 PathProgramCache]: Analyzing trace with hash 29861, now seen corresponding path program 1 times [2021-12-06 17:42:17,053 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,054 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994829678] [2021-12-06 17:42:17,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,054 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:17,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,084 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:17,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994829678] [2021-12-06 17:42:17,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1994829678] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 17:42:17,085 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 17:42:17,086 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-12-06 17:42:17,086 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [308802411] [2021-12-06 17:42:17,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 17:42:17,088 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:17,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,089 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 1 times [2021-12-06 17:42:17,089 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,089 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960935411] [2021-12-06 17:42:17,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,090 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,097 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:17,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,103 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:17,131 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:17,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 17:42:17,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 17:42:17,135 INFO L87 Difference]: Start difference. First operand 7 states and 9 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:17,144 INFO L93 Difference]: Finished difference Result 8 states and 9 transitions. [2021-12-06 17:42:17,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 17:42:17,145 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8 states and 9 transitions. [2021-12-06 17:42:17,146 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,146 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8 states to 8 states and 9 transitions. [2021-12-06 17:42:17,146 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:17,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:17,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2021-12-06 17:42:17,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:17,147 INFO L681 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-12-06 17:42:17,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2021-12-06 17:42:17,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 7. [2021-12-06 17:42:17,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2021-12-06 17:42:17,148 INFO L704 BuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2021-12-06 17:42:17,148 INFO L587 BuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2021-12-06 17:42:17,148 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 17:42:17,148 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2021-12-06 17:42:17,149 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,149 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:17,149 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:17,149 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2021-12-06 17:42:17,149 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:17,149 INFO L791 eck$LassoCheckResult]: Stem: 99#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 100#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 103#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 101#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 102#L13-3 assume !(main_~i~0#1 < 1048); 98#L17-2 [2021-12-06 17:42:17,149 INFO L793 eck$LassoCheckResult]: Loop: 98#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 97#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 98#L17-2 [2021-12-06 17:42:17,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,150 INFO L85 PathProgramCache]: Analyzing trace with hash 28698723, now seen corresponding path program 1 times [2021-12-06 17:42:17,150 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,150 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595576157] [2021-12-06 17:42:17,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,151 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:17,178 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,178 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:17,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595576157] [2021-12-06 17:42:17,178 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1595576157] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:17,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1583586704] [2021-12-06 17:42:17,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,179 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:17,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:17,180 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:17,181 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-12-06 17:42:17,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:17,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 17:42:17,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:17,213 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,214 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 17:42:17,230 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,230 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1583586704] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 17:42:17,230 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 17:42:17,230 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2021-12-06 17:42:17,230 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330860557] [2021-12-06 17:42:17,230 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 17:42:17,231 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:17,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,231 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 2 times [2021-12-06 17:42:17,231 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,231 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473144213] [2021-12-06 17:42:17,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,231 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,236 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:17,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,241 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:17,265 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:17,265 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 17:42:17,266 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 17:42:17,266 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:17,282 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2021-12-06 17:42:17,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 17:42:17,283 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 14 transitions. [2021-12-06 17:42:17,284 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,284 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 14 transitions. [2021-12-06 17:42:17,284 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:17,284 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:17,284 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 14 transitions. [2021-12-06 17:42:17,285 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:17,285 INFO L681 BuchiCegarLoop]: Abstraction has 13 states and 14 transitions. [2021-12-06 17:42:17,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 14 transitions. [2021-12-06 17:42:17,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2021-12-06 17:42:17,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.0769230769230769) internal successors, (14), 12 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2021-12-06 17:42:17,287 INFO L704 BuchiCegarLoop]: Abstraction has 13 states and 14 transitions. [2021-12-06 17:42:17,287 INFO L587 BuchiCegarLoop]: Abstraction has 13 states and 14 transitions. [2021-12-06 17:42:17,287 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 17:42:17,287 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 14 transitions. [2021-12-06 17:42:17,288 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,288 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:17,288 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:17,288 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1] [2021-12-06 17:42:17,288 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:17,289 INFO L791 eck$LassoCheckResult]: Stem: 153#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 154#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 157#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 155#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 156#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 158#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 163#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 162#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 161#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 160#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 159#L13-3 assume !(main_~i~0#1 < 1048); 151#L17-2 [2021-12-06 17:42:17,289 INFO L793 eck$LassoCheckResult]: Loop: 151#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 152#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 151#L17-2 [2021-12-06 17:42:17,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,289 INFO L85 PathProgramCache]: Analyzing trace with hash -1081477475, now seen corresponding path program 2 times [2021-12-06 17:42:17,289 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,290 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111811104] [2021-12-06 17:42:17,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,290 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:17,343 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,343 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:17,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111811104] [2021-12-06 17:42:17,344 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1111811104] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:17,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [413145992] [2021-12-06 17:42:17,344 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 17:42:17,344 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:17,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:17,345 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:17,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-12-06 17:42:17,432 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 17:42:17,432 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 17:42:17,433 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 17:42:17,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:17,467 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,467 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 17:42:17,515 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [413145992] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 17:42:17,515 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 17:42:17,516 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2021-12-06 17:42:17,516 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034830603] [2021-12-06 17:42:17,516 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 17:42:17,516 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:17,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 3 times [2021-12-06 17:42:17,517 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,517 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1290101123] [2021-12-06 17:42:17,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,517 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,522 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:17,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,528 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:17,555 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:17,555 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-12-06 17:42:17,556 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-12-06 17:42:17,556 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 2.0) internal successors, (24), 13 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:17,585 INFO L93 Difference]: Finished difference Result 25 states and 26 transitions. [2021-12-06 17:42:17,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 17:42:17,586 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 26 transitions. [2021-12-06 17:42:17,587 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,588 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 26 transitions. [2021-12-06 17:42:17,588 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:17,588 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:17,588 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 26 transitions. [2021-12-06 17:42:17,588 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:17,588 INFO L681 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-12-06 17:42:17,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 26 transitions. [2021-12-06 17:42:17,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2021-12-06 17:42:17,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:17,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2021-12-06 17:42:17,590 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-12-06 17:42:17,590 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-12-06 17:42:17,590 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-06 17:42:17,590 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2021-12-06 17:42:17,591 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:17,591 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:17,591 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:17,592 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1] [2021-12-06 17:42:17,592 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:17,592 INFO L791 eck$LassoCheckResult]: Stem: 267#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 268#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 271#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 272#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 273#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 269#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 270#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 289#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 288#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 287#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 286#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 285#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 284#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 283#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 282#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 281#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 280#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 279#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 278#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 277#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 276#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 275#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 274#L13-3 assume !(main_~i~0#1 < 1048); 265#L17-2 [2021-12-06 17:42:17,592 INFO L793 eck$LassoCheckResult]: Loop: 265#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 266#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 265#L17-2 [2021-12-06 17:42:17,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,592 INFO L85 PathProgramCache]: Analyzing trace with hash 899905681, now seen corresponding path program 3 times [2021-12-06 17:42:17,592 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957513914] [2021-12-06 17:42:17,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,593 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:17,687 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,687 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:17,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957513914] [2021-12-06 17:42:17,687 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1957513914] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:17,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1704634877] [2021-12-06 17:42:17,687 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 17:42:17,687 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:17,688 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:17,688 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:17,689 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-12-06 17:42:17,779 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-06 17:42:17,779 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 17:42:17,780 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-06 17:42:17,782 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:17,828 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,828 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 17:42:17,949 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:17,950 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1704634877] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 17:42:17,950 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 17:42:17,950 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2021-12-06 17:42:17,950 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061091610] [2021-12-06 17:42:17,950 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 17:42:17,951 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:17,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:17,951 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 4 times [2021-12-06 17:42:17,951 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:17,951 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929957324] [2021-12-06 17:42:17,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:17,951 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:17,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,955 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:17,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:17,959 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:17,982 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:17,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-12-06 17:42:17,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2021-12-06 17:42:17,984 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 25 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:18,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:18,035 INFO L93 Difference]: Finished difference Result 49 states and 50 transitions. [2021-12-06 17:42:18,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-06 17:42:18,036 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 50 transitions. [2021-12-06 17:42:18,038 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:18,038 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 50 transitions. [2021-12-06 17:42:18,039 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:18,039 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:18,039 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 50 transitions. [2021-12-06 17:42:18,039 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:18,039 INFO L681 BuchiCegarLoop]: Abstraction has 49 states and 50 transitions. [2021-12-06 17:42:18,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 50 transitions. [2021-12-06 17:42:18,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2021-12-06 17:42:18,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.0204081632653061) internal successors, (50), 48 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:18,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2021-12-06 17:42:18,042 INFO L704 BuchiCegarLoop]: Abstraction has 49 states and 50 transitions. [2021-12-06 17:42:18,042 INFO L587 BuchiCegarLoop]: Abstraction has 49 states and 50 transitions. [2021-12-06 17:42:18,042 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-06 17:42:18,042 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 50 transitions. [2021-12-06 17:42:18,043 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:18,044 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:18,044 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:18,045 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1] [2021-12-06 17:42:18,045 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:18,045 INFO L791 eck$LassoCheckResult]: Stem: 501#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 502#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 505#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 506#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 507#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 503#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 504#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 547#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 546#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 545#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 544#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 543#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 542#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 541#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 540#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 539#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 538#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 537#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 536#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 535#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 534#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 533#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 532#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 531#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 530#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 529#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 528#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 527#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 526#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 525#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 524#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 523#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 522#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 521#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 520#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 519#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 518#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 517#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 516#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 515#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 514#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 513#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 512#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 511#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 510#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 509#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 508#L13-3 assume !(main_~i~0#1 < 1048); 499#L17-2 [2021-12-06 17:42:18,045 INFO L793 eck$LassoCheckResult]: Loop: 499#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 500#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 499#L17-2 [2021-12-06 17:42:18,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:18,046 INFO L85 PathProgramCache]: Analyzing trace with hash -111832455, now seen corresponding path program 4 times [2021-12-06 17:42:18,046 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:18,046 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [55795051] [2021-12-06 17:42:18,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:18,046 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:18,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:18,302 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:18,302 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:18,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [55795051] [2021-12-06 17:42:18,302 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [55795051] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:18,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1970674753] [2021-12-06 17:42:18,302 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-06 17:42:18,303 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:18,303 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:18,304 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:18,304 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-12-06 17:42:18,362 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-06 17:42:18,363 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 17:42:18,364 INFO L263 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-06 17:42:18,367 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:18,450 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:18,450 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 17:42:18,884 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:18,884 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1970674753] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 17:42:18,884 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 17:42:18,885 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2021-12-06 17:42:18,885 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036101925] [2021-12-06 17:42:18,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 17:42:18,885 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:18,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:18,886 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 5 times [2021-12-06 17:42:18,886 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:18,886 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085021141] [2021-12-06 17:42:18,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:18,886 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:18,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:18,890 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:18,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:18,893 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:18,913 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:18,914 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-06 17:42:18,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2021-12-06 17:42:18,915 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 2.0) internal successors, (96), 49 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:19,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:19,017 INFO L93 Difference]: Finished difference Result 97 states and 98 transitions. [2021-12-06 17:42:19,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-12-06 17:42:19,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 98 transitions. [2021-12-06 17:42:19,019 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:19,020 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 97 states and 98 transitions. [2021-12-06 17:42:19,020 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:19,020 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:19,021 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 98 transitions. [2021-12-06 17:42:19,021 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:19,021 INFO L681 BuchiCegarLoop]: Abstraction has 97 states and 98 transitions. [2021-12-06 17:42:19,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 98 transitions. [2021-12-06 17:42:19,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2021-12-06 17:42:19,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.0103092783505154) internal successors, (98), 96 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:19,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2021-12-06 17:42:19,026 INFO L704 BuchiCegarLoop]: Abstraction has 97 states and 98 transitions. [2021-12-06 17:42:19,026 INFO L587 BuchiCegarLoop]: Abstraction has 97 states and 98 transitions. [2021-12-06 17:42:19,026 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-06 17:42:19,026 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 98 transitions. [2021-12-06 17:42:19,027 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:19,028 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:19,028 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:19,030 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1] [2021-12-06 17:42:19,030 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:19,031 INFO L791 eck$LassoCheckResult]: Stem: 975#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 976#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 979#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 980#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 981#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 977#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 978#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1069#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1068#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1067#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1066#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1065#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1064#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1063#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1062#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1061#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1060#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1059#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1058#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1057#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1056#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1055#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1054#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1053#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1052#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1051#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1050#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1049#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1048#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1047#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1046#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1045#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1044#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1043#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1042#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1041#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1040#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1039#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1038#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1037#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1036#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1035#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1034#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1033#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1032#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1031#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1030#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1029#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1028#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1027#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1026#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1025#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1024#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1023#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1022#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1021#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1020#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1019#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1018#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1017#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1016#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1015#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1014#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1013#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1012#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1011#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1010#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1009#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1008#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1007#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1006#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1005#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1004#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1003#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1002#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1001#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1000#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 999#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 998#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 997#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 996#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 995#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 994#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 993#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 992#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 991#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 990#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 989#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 988#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 987#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 986#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 985#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 984#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 983#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 982#L13-3 assume !(main_~i~0#1 < 1048); 973#L17-2 [2021-12-06 17:42:19,031 INFO L793 eck$LassoCheckResult]: Loop: 973#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 974#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 973#L17-2 [2021-12-06 17:42:19,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:19,031 INFO L85 PathProgramCache]: Analyzing trace with hash -1497227703, now seen corresponding path program 5 times [2021-12-06 17:42:19,031 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:19,031 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639703476] [2021-12-06 17:42:19,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:19,032 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:19,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:19,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:19,680 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:19,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639703476] [2021-12-06 17:42:19,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [639703476] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:19,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [553847279] [2021-12-06 17:42:19,681 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-06 17:42:19,681 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:19,681 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:19,682 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:19,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-12-06 17:42:22,545 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2021-12-06 17:42:22,545 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 17:42:22,555 INFO L263 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 48 conjunts are in the unsatisfiable core [2021-12-06 17:42:22,558 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 17:42:22,675 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:22,675 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 17:42:24,079 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:24,079 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [553847279] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 17:42:24,079 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 17:42:24,080 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 96 [2021-12-06 17:42:24,080 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674584996] [2021-12-06 17:42:24,080 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 17:42:24,080 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 17:42:24,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:24,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 6 times [2021-12-06 17:42:24,081 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:24,081 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991994030] [2021-12-06 17:42:24,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:24,081 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:24,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:24,086 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 17:42:24,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 17:42:24,090 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 17:42:24,111 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 17:42:24,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2021-12-06 17:42:24,117 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2021-12-06 17:42:24,117 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. cyclomatic complexity: 3 Second operand has 97 states, 96 states have (on average 2.0) internal successors, (192), 97 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:24,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 17:42:24,371 INFO L93 Difference]: Finished difference Result 193 states and 194 transitions. [2021-12-06 17:42:24,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2021-12-06 17:42:24,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 194 transitions. [2021-12-06 17:42:24,374 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:24,376 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 193 states and 194 transitions. [2021-12-06 17:42:24,376 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-12-06 17:42:24,376 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-12-06 17:42:24,376 INFO L73 IsDeterministic]: Start isDeterministic. Operand 193 states and 194 transitions. [2021-12-06 17:42:24,377 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 17:42:24,377 INFO L681 BuchiCegarLoop]: Abstraction has 193 states and 194 transitions. [2021-12-06 17:42:24,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states and 194 transitions. [2021-12-06 17:42:24,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2021-12-06 17:42:24,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 193 states have (on average 1.005181347150259) internal successors, (194), 192 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 17:42:24,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 194 transitions. [2021-12-06 17:42:24,385 INFO L704 BuchiCegarLoop]: Abstraction has 193 states and 194 transitions. [2021-12-06 17:42:24,385 INFO L587 BuchiCegarLoop]: Abstraction has 193 states and 194 transitions. [2021-12-06 17:42:24,385 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-06 17:42:24,385 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 194 transitions. [2021-12-06 17:42:24,386 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-06 17:42:24,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 17:42:24,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 17:42:24,391 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1] [2021-12-06 17:42:24,391 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 17:42:24,391 INFO L791 eck$LassoCheckResult]: Stem: 1929#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1930#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1933#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1934#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1935#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1931#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1932#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2119#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2118#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2117#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2116#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2115#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2114#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2113#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2112#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2111#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2110#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2109#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2108#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2107#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2106#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2105#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2104#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2103#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2102#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2101#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2100#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2099#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2098#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2097#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2096#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2095#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2094#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2093#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2092#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2091#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2090#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2089#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2088#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2087#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2086#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2085#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2084#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2083#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2082#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2081#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2080#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2079#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2078#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2077#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2076#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2075#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2074#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2073#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2072#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2071#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2070#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2069#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2068#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2067#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2066#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2065#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2064#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2063#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2062#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2061#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2060#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2059#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2058#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2057#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2056#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2055#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2054#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2053#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2052#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2051#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2050#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2049#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2048#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2047#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2046#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2045#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2044#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2043#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2042#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2041#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2040#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2039#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2038#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2037#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2036#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2035#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2034#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2033#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2032#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2031#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2030#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2029#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2028#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2027#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2026#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2025#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2024#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2023#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2022#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2021#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2020#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2019#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2018#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2017#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2016#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2015#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2014#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2013#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2012#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2011#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2010#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2009#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2008#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2007#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2006#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2005#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2004#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2003#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2002#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2001#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2000#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1999#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1998#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1997#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1996#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1995#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1994#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1993#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1992#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1991#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1990#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1989#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1988#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1987#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1986#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1985#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1984#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1983#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1982#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1981#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1980#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1979#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1978#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1977#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1976#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1975#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1974#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1973#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1972#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1971#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1970#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1969#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1968#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1967#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1966#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1965#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1964#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1963#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1962#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1961#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1960#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1959#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1958#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1957#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1956#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1955#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1954#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1953#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1952#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1951#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1950#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1949#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1948#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1947#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1946#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1945#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1944#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1943#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1942#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1941#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1940#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1939#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1938#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1937#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1936#L13-3 assume !(main_~i~0#1 < 1048); 1927#L17-2 [2021-12-06 17:42:24,391 INFO L793 eck$LassoCheckResult]: Loop: 1927#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 1928#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 1927#L17-2 [2021-12-06 17:42:24,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 17:42:24,392 INFO L85 PathProgramCache]: Analyzing trace with hash 2115802601, now seen corresponding path program 6 times [2021-12-06 17:42:24,392 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 17:42:24,392 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248632609] [2021-12-06 17:42:24,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 17:42:24,392 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 17:42:24,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 17:42:26,280 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 17:42:26,280 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 17:42:26,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248632609] [2021-12-06 17:42:26,280 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248632609] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 17:42:26,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [591538030] [2021-12-06 17:42:26,281 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-06 17:42:26,281 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 17:42:26,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 17:42:26,281 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 17:42:26,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_639cf740-be52-4402-a466-e1458f702ef6/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process