./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 19:25:27,919 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 19:25:27,920 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 19:25:27,949 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 19:25:27,950 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 19:25:27,951 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 19:25:27,953 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 19:25:27,956 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 19:25:27,958 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 19:25:27,959 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 19:25:27,960 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 19:25:27,961 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 19:25:27,962 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 19:25:27,963 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 19:25:27,964 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 19:25:27,965 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 19:25:27,966 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 19:25:27,966 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 19:25:27,968 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 19:25:27,970 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 19:25:27,971 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 19:25:27,972 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 19:25:27,973 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 19:25:27,974 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 19:25:27,977 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 19:25:27,977 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 19:25:27,977 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 19:25:27,978 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 19:25:27,978 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 19:25:27,979 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 19:25:27,979 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 19:25:27,980 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 19:25:27,981 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 19:25:27,981 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 19:25:27,982 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 19:25:27,982 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 19:25:27,983 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 19:25:27,983 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 19:25:27,983 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 19:25:27,984 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 19:25:27,985 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 19:25:27,985 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-12-06 19:25:28,003 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 19:25:28,003 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 19:25:28,003 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 19:25:28,003 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 19:25:28,004 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 19:25:28,004 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 19:25:28,004 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 19:25:28,005 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 19:25:28,005 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 19:25:28,005 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 19:25:28,006 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 19:25:28,006 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 19:25:28,007 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 19:25:28,007 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 19:25:28,007 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 19:25:28,007 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 19:25:28,008 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 19:25:28,008 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2021-12-06 19:25:28,203 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 19:25:28,219 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 19:25:28,220 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 19:25:28,221 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 19:25:28,222 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 19:25:28,223 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2021-12-06 19:25:28,273 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/data/3fb799b55/bb05167bd4a44ee7b3aa80a46fcb12e1/FLAG042aa47c7 [2021-12-06 19:25:28,643 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 19:25:28,644 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2021-12-06 19:25:28,649 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/data/3fb799b55/bb05167bd4a44ee7b3aa80a46fcb12e1/FLAG042aa47c7 [2021-12-06 19:25:28,659 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/data/3fb799b55/bb05167bd4a44ee7b3aa80a46fcb12e1 [2021-12-06 19:25:28,661 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 19:25:28,662 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 19:25:28,663 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 19:25:28,664 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 19:25:28,667 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 19:25:28,668 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,669 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5ed1434e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28, skipping insertion in model container [2021-12-06 19:25:28,669 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,676 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 19:25:28,687 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 19:25:28,814 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:25:28,818 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 19:25:28,834 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:25:28,845 INFO L208 MainTranslator]: Completed translation [2021-12-06 19:25:28,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28 WrapperNode [2021-12-06 19:25:28,846 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 19:25:28,847 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 19:25:28,847 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 19:25:28,847 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 19:25:28,852 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,857 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,869 INFO L137 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 44 [2021-12-06 19:25:28,870 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 19:25:28,870 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 19:25:28,870 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 19:25:28,871 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 19:25:28,876 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,877 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,878 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,878 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,883 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,887 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,888 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,889 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 19:25:28,890 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 19:25:28,890 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 19:25:28,890 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 19:25:28,891 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (1/1) ... [2021-12-06 19:25:28,899 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:28,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:28,919 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:28,921 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 19:25:28,949 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-06 19:25:28,949 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 19:25:28,949 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 19:25:28,949 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-06 19:25:28,949 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 19:25:28,949 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 19:25:28,994 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 19:25:28,995 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 19:25:29,069 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 19:25:29,075 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 19:25:29,076 INFO L301 CfgBuilder]: Removed 2 assume(true) statements. [2021-12-06 19:25:29,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:25:29 BoogieIcfgContainer [2021-12-06 19:25:29,078 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 19:25:29,079 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 19:25:29,079 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 19:25:29,083 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 19:25:29,084 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 19:25:29,084 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 07:25:28" (1/3) ... [2021-12-06 19:25:29,085 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6133f3f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 07:25:29, skipping insertion in model container [2021-12-06 19:25:29,085 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 19:25:29,085 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:25:28" (2/3) ... [2021-12-06 19:25:29,086 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6133f3f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 07:25:29, skipping insertion in model container [2021-12-06 19:25:29,086 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 19:25:29,086 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:25:29" (3/3) ... [2021-12-06 19:25:29,088 INFO L388 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2021-12-06 19:25:29,132 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 19:25:29,132 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 19:25:29,133 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 19:25:29,133 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 19:25:29,133 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 19:25:29,133 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 19:25:29,133 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 19:25:29,133 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 19:25:29,143 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.6363636363636365) internal successors, (18), 11 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:29,162 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2021-12-06 19:25:29,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:29,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:29,166 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 19:25:29,166 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 19:25:29,166 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 19:25:29,167 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.6363636363636365) internal successors, (18), 11 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:29,168 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2021-12-06 19:25:29,168 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:29,168 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:29,168 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 19:25:29,169 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 19:25:29,174 INFO L791 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 7#L15-3true [2021-12-06 19:25:29,174 INFO L793 eck$LassoCheckResult]: Loop: 7#L15-3true assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 13#L15-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 7#L15-3true [2021-12-06 19:25:29,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:29,179 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-12-06 19:25:29,186 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:29,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645686181] [2021-12-06 19:25:29,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:29,187 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:29,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,258 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:29,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,280 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:29,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:29,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-12-06 19:25:29,282 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:29,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611324086] [2021-12-06 19:25:29,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:29,283 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:29,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,294 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:29,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,303 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:29,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:29,304 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-12-06 19:25:29,304 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:29,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492080612] [2021-12-06 19:25:29,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:29,305 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:29,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,320 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:29,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:29,331 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:29,525 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 19:25:29,526 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 19:25:29,526 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 19:25:29,526 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 19:25:29,526 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-06 19:25:29,526 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,526 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 19:25:29,526 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 19:25:29,527 INFO L133 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2021-12-06 19:25:29,527 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 19:25:29,527 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 19:25:29,545 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,551 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,553 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,557 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,559 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,560 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,593 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,595 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,597 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,598 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,600 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,602 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 19:25:29,691 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-06 19:25:29,694 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-06 19:25:29,695 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,696 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,697 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,697 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-12-06 19:25:29,698 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,707 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,707 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:29,708 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,708 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,708 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,709 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:29,710 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:29,711 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,730 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-12-06 19:25:29,731 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,732 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-12-06 19:25:29,734 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,743 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,743 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:29,743 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,743 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,743 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,744 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:29,744 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:29,745 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,764 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2021-12-06 19:25:29,764 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,764 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,765 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,766 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-12-06 19:25:29,766 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,773 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,774 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,774 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,774 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,777 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 19:25:29,778 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 19:25:29,781 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,800 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-12-06 19:25:29,800 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,800 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,801 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,802 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-12-06 19:25:29,802 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,809 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,809 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:29,810 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,810 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,810 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,810 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:29,811 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:29,812 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,830 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2021-12-06 19:25:29,831 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,831 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,832 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,833 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-12-06 19:25:29,833 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,840 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,840 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:29,840 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,840 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,840 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,841 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:29,841 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:29,842 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,861 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2021-12-06 19:25:29,861 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,862 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-12-06 19:25:29,863 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,870 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,870 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,870 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,871 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,874 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 19:25:29,874 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 19:25:29,878 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,897 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2021-12-06 19:25:29,897 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,897 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,898 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-12-06 19:25:29,900 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,907 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,907 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,907 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,907 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,910 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 19:25:29,911 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 19:25:29,915 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,942 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2021-12-06 19:25:29,942 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,942 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,943 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-12-06 19:25:29,944 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,951 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,951 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,951 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,951 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,953 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 19:25:29,953 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 19:25:29,959 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:29,986 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-12-06 19:25:29,987 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:29,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:29,987 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:29,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-12-06 19:25:29,989 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:29,995 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:29,996 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:29,996 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:29,996 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:29,996 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:29,996 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:29,996 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:29,998 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:30,016 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2021-12-06 19:25:30,016 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:30,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,017 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-12-06 19:25:30,019 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:30,027 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:30,027 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 19:25:30,027 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:30,027 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:30,027 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:30,028 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 19:25:30,028 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 19:25:30,029 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 19:25:30,047 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-12-06 19:25:30,048 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:30,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,049 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,049 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-12-06 19:25:30,050 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 19:25:30,057 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 19:25:30,057 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 19:25:30,057 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 19:25:30,058 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 19:25:30,061 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 19:25:30,061 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 19:25:30,067 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-06 19:25:30,087 INFO L443 ModelExtractionUtils]: Simplification made 13 calls to the SMT solver. [2021-12-06 19:25:30,087 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2021-12-06 19:25:30,089 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 19:25:30,089 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,090 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-12-06 19:25:30,091 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-06 19:25:30,099 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-06 19:25:30,099 INFO L513 LassoAnalysis]: Proved termination. [2021-12-06 19:25:30,099 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2021-12-06 19:25:30,119 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2021-12-06 19:25:30,122 INFO L297 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2021-12-06 19:25:30,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,152 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:25:30,153 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:30,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,166 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 19:25:30,167 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:30,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,233 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2021-12-06 19:25:30,247 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-06 19:25:30,248 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.6363636363636365) internal successors, (18), 11 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,282 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.6363636363636365) internal successors, (18), 11 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 27 states and 45 transitions. Complement of second has 8 states. [2021-12-06 19:25:30,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-12-06 19:25:30,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 27 transitions. [2021-12-06 19:25:30,288 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 27 transitions. Stem has 2 letters. Loop has 2 letters. [2021-12-06 19:25:30,288 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 19:25:30,288 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 27 transitions. Stem has 4 letters. Loop has 2 letters. [2021-12-06 19:25:30,288 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 19:25:30,288 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 27 transitions. Stem has 2 letters. Loop has 4 letters. [2021-12-06 19:25:30,288 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 19:25:30,289 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 45 transitions. [2021-12-06 19:25:30,291 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 9 states and 12 transitions. [2021-12-06 19:25:30,294 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2021-12-06 19:25:30,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:30,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 12 transitions. [2021-12-06 19:25:30,294 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:30,295 INFO L681 BuchiCegarLoop]: Abstraction has 9 states and 12 transitions. [2021-12-06 19:25:30,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 12 transitions. [2021-12-06 19:25:30,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2021-12-06 19:25:30,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.3333333333333333) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 12 transitions. [2021-12-06 19:25:30,311 INFO L704 BuchiCegarLoop]: Abstraction has 9 states and 12 transitions. [2021-12-06 19:25:30,311 INFO L587 BuchiCegarLoop]: Abstraction has 9 states and 12 transitions. [2021-12-06 19:25:30,311 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 19:25:30,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 12 transitions. [2021-12-06 19:25:30,312 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:30,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:30,312 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-12-06 19:25:30,312 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:30,313 INFO L791 eck$LassoCheckResult]: Stem: 85#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 86#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 87#L15-3 assume !(main_~i~0#1 < 1048); 83#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 84#L20 assume !main_#t~short5#1; 90#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 91#L22-2 [2021-12-06 19:25:30,313 INFO L793 eck$LassoCheckResult]: Loop: 91#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 91#L22-2 [2021-12-06 19:25:30,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,313 INFO L85 PathProgramCache]: Analyzing trace with hash 889607089, now seen corresponding path program 1 times [2021-12-06 19:25:30,313 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,314 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832996122] [2021-12-06 19:25:30,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,314 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,340 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:30,340 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832996122] [2021-12-06 19:25:30,341 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832996122] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:25:30,341 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:25:30,341 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:25:30,341 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736699091] [2021-12-06 19:25:30,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:25:30,343 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:30,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,344 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 1 times [2021-12-06 19:25:30,344 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062555223] [2021-12-06 19:25:30,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,344 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,347 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:30,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,349 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:30,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:30,362 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:25:30,362 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:25:30,363 INFO L87 Difference]: Start difference. First operand 9 states and 12 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:30,371 INFO L93 Difference]: Finished difference Result 10 states and 12 transitions. [2021-12-06 19:25:30,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:25:30,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 12 transitions. [2021-12-06 19:25:30,372 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,373 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 12 transitions. [2021-12-06 19:25:30,373 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:30,373 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:30,373 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2021-12-06 19:25:30,373 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:30,373 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2021-12-06 19:25:30,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2021-12-06 19:25:30,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2021-12-06 19:25:30,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2021-12-06 19:25:30,374 INFO L704 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2021-12-06 19:25:30,374 INFO L587 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2021-12-06 19:25:30,374 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 19:25:30,375 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions. [2021-12-06 19:25:30,375 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,375 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:30,375 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:30,375 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:30,375 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:30,376 INFO L791 eck$LassoCheckResult]: Stem: 110#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 111#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 112#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 113#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 114#L15-3 assume !(main_~i~0#1 < 1048); 108#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 109#L20 assume !main_#t~short5#1; 115#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 116#L22-2 [2021-12-06 19:25:30,376 INFO L793 eck$LassoCheckResult]: Loop: 116#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 116#L22-2 [2021-12-06 19:25:30,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,376 INFO L85 PathProgramCache]: Analyzing trace with hash 265183027, now seen corresponding path program 1 times [2021-12-06 19:25:30,376 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120173228] [2021-12-06 19:25:30,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,377 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,401 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,401 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:30,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120173228] [2021-12-06 19:25:30,402 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2120173228] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:30,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1917718663] [2021-12-06 19:25:30,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,402 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:30,402 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,403 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,404 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-12-06 19:25:30,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,435 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:25:30,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:30,448 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-06 19:25:30,448 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:25:30,449 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1917718663] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:25:30,449 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 19:25:30,449 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2021-12-06 19:25:30,449 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635361780] [2021-12-06 19:25:30,449 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:25:30,450 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:30,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,450 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 2 times [2021-12-06 19:25:30,451 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,451 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770855284] [2021-12-06 19:25:30,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,451 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,455 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:30,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,458 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:30,468 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:30,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:25:30,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:25:30,469 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 4.0) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:30,474 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2021-12-06 19:25:30,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:25:30,474 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2021-12-06 19:25:30,475 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 9 states and 10 transitions. [2021-12-06 19:25:30,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:30,475 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:30,475 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2021-12-06 19:25:30,476 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:30,476 INFO L681 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-06 19:25:30,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2021-12-06 19:25:30,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2021-12-06 19:25:30,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2021-12-06 19:25:30,477 INFO L704 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-06 19:25:30,477 INFO L587 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-06 19:25:30,477 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 19:25:30,477 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2021-12-06 19:25:30,477 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,477 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:30,477 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:30,478 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:30,478 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:30,478 INFO L791 eck$LassoCheckResult]: Stem: 158#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 159#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 160#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 161#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 162#L15-3 assume !(main_~i~0#1 < 1048); 156#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 157#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 163#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 164#L22-2 [2021-12-06 19:25:30,478 INFO L793 eck$LassoCheckResult]: Loop: 164#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 164#L22-2 [2021-12-06 19:25:30,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,478 INFO L85 PathProgramCache]: Analyzing trace with hash 265182965, now seen corresponding path program 1 times [2021-12-06 19:25:30,478 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036824419] [2021-12-06 19:25:30,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,479 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,500 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,501 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:30,501 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036824419] [2021-12-06 19:25:30,501 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1036824419] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:30,501 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1962883120] [2021-12-06 19:25:30,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,501 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:30,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,502 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,503 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2021-12-06 19:25:30,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,532 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:25:30,532 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:30,547 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,548 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:25:30,567 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,568 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1962883120] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:25:30,568 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:25:30,568 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2021-12-06 19:25:30,568 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142811782] [2021-12-06 19:25:30,568 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:25:30,568 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:30,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,569 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 3 times [2021-12-06 19:25:30,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,569 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629478107] [2021-12-06 19:25:30,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,569 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,571 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:30,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,573 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:30,582 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:30,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 19:25:30,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:25:30,582 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:30,598 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2021-12-06 19:25:30,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:25:30,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2021-12-06 19:25:30,599 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,600 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2021-12-06 19:25:30,600 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:30,600 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:30,600 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2021-12-06 19:25:30,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:30,600 INFO L681 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-06 19:25:30,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2021-12-06 19:25:30,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2021-12-06 19:25:30,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2021-12-06 19:25:30,602 INFO L704 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-06 19:25:30,602 INFO L587 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-06 19:25:30,602 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-06 19:25:30,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2021-12-06 19:25:30,602 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,602 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:30,602 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:30,603 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:30,603 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:30,603 INFO L791 eck$LassoCheckResult]: Stem: 234#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 235#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 236#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 237#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 238#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 239#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 246#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 245#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 244#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 243#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 242#L15-3 assume !(main_~i~0#1 < 1048); 232#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 233#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 240#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 241#L22-2 [2021-12-06 19:25:30,603 INFO L793 eck$LassoCheckResult]: Loop: 241#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 241#L22-2 [2021-12-06 19:25:30,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,603 INFO L85 PathProgramCache]: Analyzing trace with hash -1745752453, now seen corresponding path program 2 times [2021-12-06 19:25:30,604 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,604 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224998533] [2021-12-06 19:25:30,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,604 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,648 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,648 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:30,648 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224998533] [2021-12-06 19:25:30,649 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224998533] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:30,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1262658059] [2021-12-06 19:25:30,649 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:25:30,649 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:30,649 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,681 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2021-12-06 19:25:30,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 19:25:30,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:25:30,716 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 19:25:30,717 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:30,750 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,750 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:25:30,800 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,800 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1262658059] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:25:30,800 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:25:30,800 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2021-12-06 19:25:30,801 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877343613] [2021-12-06 19:25:30,801 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:25:30,801 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:30,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,801 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 4 times [2021-12-06 19:25:30,801 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000267259] [2021-12-06 19:25:30,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,802 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,804 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:30,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:30,806 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:30,813 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:30,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-12-06 19:25:30,814 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-12-06 19:25:30,814 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.076923076923077) internal successors, (27), 13 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:30,841 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2021-12-06 19:25:30,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 19:25:30,842 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2021-12-06 19:25:30,843 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,843 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2021-12-06 19:25:30,843 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:30,843 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:30,843 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2021-12-06 19:25:30,844 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:30,844 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-06 19:25:30,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2021-12-06 19:25:30,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2021-12-06 19:25:30,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:30,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2021-12-06 19:25:30,846 INFO L704 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-06 19:25:30,846 INFO L587 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-06 19:25:30,846 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-06 19:25:30,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2021-12-06 19:25:30,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:30,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:30,847 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:30,847 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:30,847 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:30,848 INFO L791 eck$LassoCheckResult]: Stem: 370#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 371#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 372#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 373#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 374#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 375#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 378#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 394#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 393#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 392#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 391#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 390#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 389#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 388#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 387#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 386#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 385#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 384#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 383#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 382#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 381#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 380#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 379#L15-3 assume !(main_~i~0#1 < 1048); 368#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 369#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 376#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 377#L22-2 [2021-12-06 19:25:30,848 INFO L793 eck$LassoCheckResult]: Loop: 377#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 377#L22-2 [2021-12-06 19:25:30,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:30,848 INFO L85 PathProgramCache]: Analyzing trace with hash -95700985, now seen corresponding path program 3 times [2021-12-06 19:25:30,848 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:30,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089837867] [2021-12-06 19:25:30,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:30,848 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:30,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:30,945 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:30,945 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:30,945 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089837867] [2021-12-06 19:25:30,946 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1089837867] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:30,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1304677748] [2021-12-06 19:25:30,946 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 19:25:30,946 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:30,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:30,947 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:30,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-12-06 19:25:31,043 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-06 19:25:31,043 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:25:31,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-06 19:25:31,046 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:31,089 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:31,089 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:25:31,217 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:31,217 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1304677748] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:25:31,217 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:25:31,217 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2021-12-06 19:25:31,218 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143396863] [2021-12-06 19:25:31,218 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:25:31,218 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:31,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:31,219 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 5 times [2021-12-06 19:25:31,219 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:31,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [403024015] [2021-12-06 19:25:31,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:31,219 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:31,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:31,221 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:31,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:31,224 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:31,233 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:31,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-12-06 19:25:31,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2021-12-06 19:25:31,234 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.04) internal successors, (51), 25 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:31,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:31,294 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2021-12-06 19:25:31,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-06 19:25:31,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2021-12-06 19:25:31,297 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:31,298 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2021-12-06 19:25:31,298 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:31,298 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:31,298 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2021-12-06 19:25:31,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:31,299 INFO L681 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-06 19:25:31,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2021-12-06 19:25:31,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2021-12-06 19:25:31,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:31,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2021-12-06 19:25:31,303 INFO L704 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-06 19:25:31,303 INFO L587 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-06 19:25:31,303 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-06 19:25:31,303 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2021-12-06 19:25:31,304 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:31,304 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:31,304 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:31,306 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:31,306 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:31,306 INFO L791 eck$LassoCheckResult]: Stem: 626#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 627#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 628#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 629#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 630#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 631#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 634#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 674#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 673#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 672#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 671#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 670#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 669#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 668#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 667#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 666#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 665#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 664#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 663#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 662#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 661#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 660#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 659#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 658#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 657#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 656#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 655#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 654#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 653#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 652#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 651#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 650#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 649#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 648#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 647#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 646#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 645#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 644#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 643#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 642#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 641#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 640#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 639#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 638#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 637#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 636#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 635#L15-3 assume !(main_~i~0#1 < 1048); 624#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 625#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 632#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 633#L22-2 [2021-12-06 19:25:31,307 INFO L793 eck$LassoCheckResult]: Loop: 633#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 633#L22-2 [2021-12-06 19:25:31,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:31,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1293972767, now seen corresponding path program 4 times [2021-12-06 19:25:31,307 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:31,307 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663834427] [2021-12-06 19:25:31,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:31,308 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:31,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:31,552 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:31,552 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:31,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663834427] [2021-12-06 19:25:31,553 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1663834427] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:31,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098668772] [2021-12-06 19:25:31,553 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-06 19:25:31,553 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:31,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:31,554 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:31,555 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2021-12-06 19:25:31,611 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-06 19:25:31,612 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:25:31,613 INFO L263 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-06 19:25:31,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:31,702 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:31,702 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:25:32,156 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:32,156 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098668772] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:25:32,156 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:25:32,156 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2021-12-06 19:25:32,157 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016221767] [2021-12-06 19:25:32,157 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:25:32,157 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:32,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:32,157 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 6 times [2021-12-06 19:25:32,157 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:32,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625971538] [2021-12-06 19:25:32,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:32,158 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:32,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:32,160 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:32,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:32,161 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:32,167 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:32,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-06 19:25:32,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2021-12-06 19:25:32,169 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.020408163265306) internal successors, (99), 49 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:32,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:32,299 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2021-12-06 19:25:32,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-12-06 19:25:32,300 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2021-12-06 19:25:32,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:32,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2021-12-06 19:25:32,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:32,302 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:32,302 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2021-12-06 19:25:32,303 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:32,303 INFO L681 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-06 19:25:32,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2021-12-06 19:25:32,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2021-12-06 19:25:32,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:32,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2021-12-06 19:25:32,308 INFO L704 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-06 19:25:32,308 INFO L587 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-06 19:25:32,308 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-06 19:25:32,308 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2021-12-06 19:25:32,309 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:32,309 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:32,309 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:32,312 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:32,312 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:32,312 INFO L791 eck$LassoCheckResult]: Stem: 1122#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1123#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1124#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1125#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1126#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1127#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1130#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1218#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1217#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1216#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1215#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1214#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1213#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1212#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1211#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1210#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1209#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1208#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1207#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1206#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1205#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1204#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1203#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1202#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1201#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1200#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1199#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1198#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1197#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1196#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1195#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1194#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1193#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1192#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1191#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1190#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1189#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1188#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1187#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1186#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1185#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1184#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1183#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1182#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1181#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1180#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1179#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1178#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1177#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1176#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1175#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1174#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1173#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1172#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1171#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1170#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1169#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1168#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1167#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1166#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1165#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1164#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1163#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1162#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1161#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1160#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1159#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1158#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1157#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1156#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1155#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1154#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1153#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1152#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1151#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1150#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1149#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1148#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1147#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1146#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1145#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1144#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1143#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1142#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1141#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1140#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1139#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1138#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1137#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1136#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1135#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1134#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1133#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1132#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1131#L15-3 assume !(main_~i~0#1 < 1048); 1120#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 1121#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 1128#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 1129#L22-2 [2021-12-06 19:25:32,313 INFO L793 eck$LassoCheckResult]: Loop: 1129#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 1129#L22-2 [2021-12-06 19:25:32,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:32,313 INFO L85 PathProgramCache]: Analyzing trace with hash -675113137, now seen corresponding path program 5 times [2021-12-06 19:25:32,313 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:32,313 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215055056] [2021-12-06 19:25:32,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:32,314 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:32,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:32,932 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:32,932 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:32,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215055056] [2021-12-06 19:25:32,932 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [215055056] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:32,933 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [90056108] [2021-12-06 19:25:32,933 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-06 19:25:32,933 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:32,933 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:32,934 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:32,935 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-12-06 19:25:41,043 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2021-12-06 19:25:41,043 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:25:41,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 550 conjuncts, 48 conjunts are in the unsatisfiable core [2021-12-06 19:25:41,068 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:25:41,200 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:41,201 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:25:42,590 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:42,590 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [90056108] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:25:42,590 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:25:42,590 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2021-12-06 19:25:42,590 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323821042] [2021-12-06 19:25:42,590 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:25:42,591 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 19:25:42,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:42,591 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 7 times [2021-12-06 19:25:42,591 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:42,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276811729] [2021-12-06 19:25:42,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:42,592 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:42,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:42,594 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:25:42,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:25:42,596 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:25:42,603 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:25:42,604 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2021-12-06 19:25:42,607 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2021-12-06 19:25:42,607 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.0103092783505154) internal successors, (195), 97 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:42,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:25:42,851 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2021-12-06 19:25:42,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2021-12-06 19:25:42,852 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2021-12-06 19:25:42,854 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:42,855 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2021-12-06 19:25:42,856 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 19:25:42,856 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-06 19:25:42,856 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2021-12-06 19:25:42,857 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 19:25:42,857 INFO L681 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-06 19:25:42,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2021-12-06 19:25:42,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2021-12-06 19:25:42,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 19:25:42,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2021-12-06 19:25:42,865 INFO L704 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-06 19:25:42,865 INFO L587 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-06 19:25:42,865 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-12-06 19:25:42,865 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2021-12-06 19:25:42,866 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2021-12-06 19:25:42,866 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 19:25:42,866 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 19:25:42,868 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1] [2021-12-06 19:25:42,868 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1] [2021-12-06 19:25:42,869 INFO L791 eck$LassoCheckResult]: Stem: 2098#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2099#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet2#1, main_#t~post1#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 2100#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2101#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2102#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2103#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2106#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2290#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2289#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2288#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2287#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2286#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2285#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2284#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2283#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2282#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2281#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2280#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2279#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2278#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2277#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2276#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2275#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2274#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2273#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2272#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2271#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2270#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2269#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2268#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2267#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2266#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2265#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2264#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2263#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2262#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2261#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2260#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2259#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2258#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2257#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2256#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2255#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2254#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2253#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2252#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2251#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2250#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2249#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2248#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2247#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2246#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2245#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2244#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2243#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2242#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2241#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2240#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2239#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2238#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2237#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2236#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2235#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2234#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2233#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2232#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2231#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2230#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2229#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2228#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2227#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2226#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2225#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2224#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2223#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2222#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2221#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2220#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2219#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2218#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2217#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2216#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2215#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2214#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2213#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2212#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2211#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2210#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2209#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2208#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2207#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2206#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2205#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2204#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2203#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2202#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2201#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2200#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2199#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2198#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2197#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2196#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2195#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2194#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2193#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2192#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2191#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2190#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2189#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2188#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2187#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2186#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2185#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2184#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2183#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2182#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2181#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2180#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2179#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2178#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2177#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2176#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2175#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2174#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2173#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2172#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2171#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2170#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2169#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2168#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2167#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2166#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2165#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2164#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2163#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2162#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2161#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2160#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2159#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2158#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2157#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2156#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2155#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2154#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2153#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2152#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2151#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2150#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2149#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2148#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2147#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2146#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2145#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2144#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2143#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2142#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2141#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2140#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2139#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2138#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2137#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2136#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2135#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2134#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2133#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2132#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2131#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2130#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2129#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2128#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2127#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2126#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2125#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2124#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2123#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2122#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2121#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2120#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2119#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2118#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2117#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2116#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2115#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2114#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2113#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2112#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2111#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2110#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2109#L15-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet2#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2108#L15-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2107#L15-3 assume !(main_~i~0#1 < 1048); 2096#L15-4 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 2097#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 2104#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2105#L22-2 [2021-12-06 19:25:42,869 INFO L793 eck$LassoCheckResult]: Loop: 2105#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 2105#L22-2 [2021-12-06 19:25:42,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:25:42,869 INFO L85 PathProgramCache]: Analyzing trace with hash -1064731729, now seen corresponding path program 6 times [2021-12-06 19:25:42,869 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:25:42,869 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000913263] [2021-12-06 19:25:42,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:25:42,870 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:25:42,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:25:44,926 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:25:44,926 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:25:44,926 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000913263] [2021-12-06 19:25:44,926 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000913263] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:25:44,926 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [419099532] [2021-12-06 19:25:44,926 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-06 19:25:44,926 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:25:44,926 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:25:44,927 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:25:44,928 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5789c00e-5693-426e-8ce5-548c2760596d/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process