./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 22:40:04,268 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 22:40:04,270 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 22:40:04,292 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 22:40:04,292 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 22:40:04,293 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 22:40:04,294 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 22:40:04,296 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 22:40:04,297 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 22:40:04,298 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 22:40:04,299 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 22:40:04,300 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 22:40:04,300 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 22:40:04,301 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 22:40:04,302 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 22:40:04,303 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 22:40:04,304 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 22:40:04,305 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 22:40:04,306 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 22:40:04,308 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 22:40:04,310 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 22:40:04,311 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 22:40:04,312 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 22:40:04,313 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 22:40:04,316 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 22:40:04,316 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 22:40:04,316 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 22:40:04,317 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 22:40:04,318 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 22:40:04,318 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 22:40:04,319 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 22:40:04,319 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 22:40:04,320 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 22:40:04,321 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 22:40:04,321 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 22:40:04,322 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 22:40:04,322 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 22:40:04,322 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 22:40:04,322 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 22:40:04,323 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 22:40:04,323 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 22:40:04,324 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-12-06 22:40:04,342 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 22:40:04,342 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 22:40:04,342 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 22:40:04,342 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 22:40:04,343 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 22:40:04,343 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 22:40:04,343 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 22:40:04,344 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 22:40:04,344 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 22:40:04,344 INFO L138 SettingsManager]: * sizeof long=4 [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 22:40:04,345 INFO L138 SettingsManager]: * sizeof long double=12 [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 22:40:04,346 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 22:40:04,346 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 22:40:04,346 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 22:40:04,347 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 22:40:04,347 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 22:40:04,347 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 [2021-12-06 22:40:04,537 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 22:40:04,551 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 22:40:04,553 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 22:40:04,554 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 22:40:04,555 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 22:40:04,556 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/loop-acceleration/array_3-1.i [2021-12-06 22:40:04,598 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/data/950e56da4/f3c25fa8abfe437dab1c12cb1aebcca4/FLAG950265a2a [2021-12-06 22:40:04,978 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 22:40:04,979 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/sv-benchmarks/c/loop-acceleration/array_3-1.i [2021-12-06 22:40:04,983 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/data/950e56da4/f3c25fa8abfe437dab1c12cb1aebcca4/FLAG950265a2a [2021-12-06 22:40:04,992 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/data/950e56da4/f3c25fa8abfe437dab1c12cb1aebcca4 [2021-12-06 22:40:04,994 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 22:40:04,995 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 22:40:04,996 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 22:40:04,997 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 22:40:04,999 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 22:40:05,000 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 10:40:04" (1/1) ... [2021-12-06 22:40:05,000 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6674cdbe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05, skipping insertion in model container [2021-12-06 22:40:05,001 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 10:40:04" (1/1) ... [2021-12-06 22:40:05,005 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 22:40:05,015 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 22:40:05,133 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2021-12-06 22:40:05,142 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 22:40:05,149 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 22:40:05,161 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2021-12-06 22:40:05,165 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 22:40:05,177 INFO L208 MainTranslator]: Completed translation [2021-12-06 22:40:05,178 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05 WrapperNode [2021-12-06 22:40:05,178 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 22:40:05,179 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 22:40:05,179 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 22:40:05,179 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 22:40:05,185 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,192 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,209 INFO L137 Inliner]: procedures = 16, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 43 [2021-12-06 22:40:05,209 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 22:40:05,210 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 22:40:05,210 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 22:40:05,210 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 22:40:05,216 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,218 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,218 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,221 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,224 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,225 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,226 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 22:40:05,226 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 22:40:05,227 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 22:40:05,227 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 22:40:05,227 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (1/1) ... [2021-12-06 22:40:05,233 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:05,241 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:05,250 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:05,252 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 22:40:05,288 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-06 22:40:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 22:40:05,337 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 22:40:05,338 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 22:40:05,405 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 22:40:05,411 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 22:40:05,411 INFO L301 CfgBuilder]: Removed 2 assume(true) statements. [2021-12-06 22:40:05,413 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 10:40:05 BoogieIcfgContainer [2021-12-06 22:40:05,413 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 22:40:05,413 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 22:40:05,413 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 22:40:05,417 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 22:40:05,417 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 22:40:05,418 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 10:40:04" (1/3) ... [2021-12-06 22:40:05,419 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@11d53dfc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 10:40:05, skipping insertion in model container [2021-12-06 22:40:05,419 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 22:40:05,419 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 10:40:05" (2/3) ... [2021-12-06 22:40:05,419 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@11d53dfc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 10:40:05, skipping insertion in model container [2021-12-06 22:40:05,419 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 22:40:05,419 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 10:40:05" (3/3) ... [2021-12-06 22:40:05,420 INFO L388 chiAutomizerObserver]: Analyzing ICFG array_3-1.i [2021-12-06 22:40:05,458 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 22:40:05,458 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 22:40:05,459 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 22:40:05,459 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 22:40:05,459 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 22:40:05,459 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 22:40:05,459 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 22:40:05,459 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 22:40:05,469 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:05,486 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2021-12-06 22:40:05,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:05,487 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:05,492 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 22:40:05,493 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 22:40:05,493 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 22:40:05,493 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:05,496 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2021-12-06 22:40:05,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:05,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:05,496 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 22:40:05,496 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 22:40:05,503 INFO L791 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 14#L24-3true [2021-12-06 22:40:05,504 INFO L793 eck$LassoCheckResult]: Loop: 14#L24-3true assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 6#L24-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 14#L24-3true [2021-12-06 22:40:05,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:05,510 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-12-06 22:40:05,518 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:05,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487056428] [2021-12-06 22:40:05,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:05,520 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:05,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,599 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:05,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,625 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:05,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:05,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-12-06 22:40:05,627 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:05,627 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625683845] [2021-12-06 22:40:05,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:05,628 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:05,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,636 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:05,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,643 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:05,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:05,644 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-12-06 22:40:05,644 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:05,645 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219897600] [2021-12-06 22:40:05,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:05,645 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:05,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,661 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:05,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:05,674 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:05,896 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 22:40:05,897 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 22:40:05,897 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 22:40:05,897 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 22:40:05,898 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-06 22:40:05,898 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:05,898 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 22:40:05,898 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 22:40:05,898 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_3-1.i_Iteration1_Lasso [2021-12-06 22:40:05,898 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 22:40:05,899 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 22:40:05,918 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:05,924 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:05,926 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:06,024 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:06,026 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:06,028 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:06,030 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 22:40:06,157 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-06 22:40:06,160 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-06 22:40:06,161 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,162 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-12-06 22:40:06,164 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,171 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,171 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,171 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,171 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,175 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 22:40:06,175 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 22:40:06,178 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,197 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-12-06 22:40:06,198 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,198 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,199 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,199 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-12-06 22:40:06,200 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,208 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,209 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 22:40:06,209 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,209 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,209 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,210 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 22:40:06,210 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 22:40:06,211 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,239 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2021-12-06 22:40:06,239 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,240 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,241 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-12-06 22:40:06,242 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,248 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,249 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,249 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,249 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,251 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 22:40:06,251 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 22:40:06,254 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,273 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-12-06 22:40:06,274 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,274 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-12-06 22:40:06,275 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,282 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,283 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 22:40:06,283 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,283 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,283 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,284 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 22:40:06,284 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 22:40:06,285 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,304 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2021-12-06 22:40:06,304 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,304 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,305 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-12-06 22:40:06,306 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,313 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,314 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,314 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,314 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,317 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 22:40:06,317 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 22:40:06,320 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,339 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2021-12-06 22:40:06,340 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,340 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,340 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,341 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-12-06 22:40:06,341 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,350 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,350 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,350 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,350 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,353 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 22:40:06,353 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 22:40:06,356 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 22:40:06,387 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2021-12-06 22:40:06,387 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,388 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,388 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,389 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-12-06 22:40:06,389 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 22:40:06,398 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 22:40:06,398 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 22:40:06,398 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 22:40:06,398 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 22:40:06,402 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 22:40:06,402 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 22:40:06,409 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-06 22:40:06,428 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2021-12-06 22:40:06,428 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2021-12-06 22:40:06,429 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 22:40:06,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,430 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,436 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-12-06 22:40:06,436 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-06 22:40:06,446 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-06 22:40:06,446 INFO L513 LassoAnalysis]: Proved termination. [2021-12-06 22:40:06,447 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2047*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2021-12-06 22:40:06,479 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2021-12-06 22:40:06,490 INFO L297 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2021-12-06 22:40:06,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,523 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 22:40:06,524 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:06,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,537 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 22:40:06,538 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:06,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:06,602 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-06 22:40:06,603 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,635 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 31 states and 43 transitions. Complement of second has 8 states. [2021-12-06 22:40:06,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-12-06 22:40:06,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 21 transitions. [2021-12-06 22:40:06,641 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 2 letters. [2021-12-06 22:40:06,641 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 22:40:06,641 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 4 letters. Loop has 2 letters. [2021-12-06 22:40:06,641 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 22:40:06,641 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 4 letters. [2021-12-06 22:40:06,642 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 22:40:06,642 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 43 transitions. [2021-12-06 22:40:06,644 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 10 states and 12 transitions. [2021-12-06 22:40:06,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-06 22:40:06,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2021-12-06 22:40:06,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2021-12-06 22:40:06,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:06,648 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2021-12-06 22:40:06,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2021-12-06 22:40:06,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2021-12-06 22:40:06,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2021-12-06 22:40:06,665 INFO L704 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2021-12-06 22:40:06,665 INFO L587 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2021-12-06 22:40:06,665 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 22:40:06,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2021-12-06 22:40:06,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:06,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:06,666 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2021-12-06 22:40:06,666 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:06,666 INFO L791 eck$LassoCheckResult]: Stem: 107#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 108#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 115#L24-3 assume !(main_~i~0#1 < 1024); 116#L24-4 main_~i~0#1 := 0; 114#L28-4 [2021-12-06 22:40:06,666 INFO L793 eck$LassoCheckResult]: Loop: 114#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 111#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 112#L29 assume !(main_~i~0#1 >= 1023); 113#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 114#L28-4 [2021-12-06 22:40:06,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,667 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2021-12-06 22:40:06,667 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:06,667 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565829729] [2021-12-06 22:40:06,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,667 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:06,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:06,699 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:06,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565829729] [2021-12-06 22:40:06,700 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565829729] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 22:40:06,700 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 22:40:06,700 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 22:40:06,701 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066217937] [2021-12-06 22:40:06,702 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 22:40:06,703 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:06,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,704 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 1 times [2021-12-06 22:40:06,704 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:06,704 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787559695] [2021-12-06 22:40:06,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,705 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:06,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:06,711 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:06,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:06,717 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:06,751 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:06,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 22:40:06,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 22:40:06,755 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:06,769 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2021-12-06 22:40:06,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 22:40:06,770 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2021-12-06 22:40:06,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,772 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2021-12-06 22:40:06,772 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-12-06 22:40:06,772 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-12-06 22:40:06,772 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2021-12-06 22:40:06,772 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:06,772 INFO L681 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-06 22:40:06,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2021-12-06 22:40:06,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 10. [2021-12-06 22:40:06,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2021-12-06 22:40:06,774 INFO L704 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-12-06 22:40:06,774 INFO L587 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-12-06 22:40:06,774 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 22:40:06,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2021-12-06 22:40:06,775 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:06,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:06,775 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-12-06 22:40:06,775 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:06,776 INFO L791 eck$LassoCheckResult]: Stem: 138#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 139#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 146#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 140#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 141#L24-3 assume !(main_~i~0#1 < 1024); 147#L24-4 main_~i~0#1 := 0; 145#L28-4 [2021-12-06 22:40:06,776 INFO L793 eck$LassoCheckResult]: Loop: 145#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 142#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 143#L29 assume !(main_~i~0#1 >= 1023); 144#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 145#L28-4 [2021-12-06 22:40:06,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,776 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2021-12-06 22:40:06,776 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:06,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141454765] [2021-12-06 22:40:06,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,777 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:06,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,806 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:06,806 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:06,806 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141454765] [2021-12-06 22:40:06,806 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2141454765] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:06,807 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [783976357] [2021-12-06 22:40:06,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,807 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:06,807 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:06,808 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:06,808 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-12-06 22:40:06,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,832 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 22:40:06,832 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:06,844 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:06,844 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 22:40:06,860 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:06,861 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [783976357] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 22:40:06,861 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 22:40:06,861 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2021-12-06 22:40:06,861 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727886140] [2021-12-06 22:40:06,861 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 22:40:06,861 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:06,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,862 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 2 times [2021-12-06 22:40:06,862 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:06,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949513125] [2021-12-06 22:40:06,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,863 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:06,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:06,867 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:06,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:06,872 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:06,902 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:06,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 22:40:06,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 22:40:06,903 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:06,935 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2021-12-06 22:40:06,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 22:40:06,936 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2021-12-06 22:40:06,937 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,938 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2021-12-06 22:40:06,938 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2021-12-06 22:40:06,938 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2021-12-06 22:40:06,938 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2021-12-06 22:40:06,939 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:06,939 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-06 22:40:06,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2021-12-06 22:40:06,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 16. [2021-12-06 22:40:06,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:06,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2021-12-06 22:40:06,941 INFO L704 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-12-06 22:40:06,941 INFO L587 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-12-06 22:40:06,941 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 22:40:06,941 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2021-12-06 22:40:06,942 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:06,942 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:06,942 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:06,943 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2021-12-06 22:40:06,943 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:06,943 INFO L791 eck$LassoCheckResult]: Stem: 215#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 216#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 223#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 217#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 218#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 224#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 230#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 229#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 228#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 227#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 226#L24-3 assume !(main_~i~0#1 < 1024); 225#L24-4 main_~i~0#1 := 0; 222#L28-4 [2021-12-06 22:40:06,943 INFO L793 eck$LassoCheckResult]: Loop: 222#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 219#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 220#L29 assume !(main_~i~0#1 >= 1023); 221#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 222#L28-4 [2021-12-06 22:40:06,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:06,944 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2021-12-06 22:40:06,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:06,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808462355] [2021-12-06 22:40:06,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:06,944 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:06,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:06,985 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2021-12-06 22:40:07,005 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,005 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:07,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808462355] [2021-12-06 22:40:07,005 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808462355] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:07,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [829270239] [2021-12-06 22:40:07,006 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 22:40:07,006 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:07,006 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:07,006 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:07,007 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-12-06 22:40:07,036 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 22:40:07,036 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 22:40:07,036 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 22:40:07,037 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:07,058 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,058 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 22:40:07,101 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,101 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [829270239] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 22:40:07,102 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 22:40:07,102 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2021-12-06 22:40:07,102 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808934996] [2021-12-06 22:40:07,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 22:40:07,102 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:07,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:07,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 3 times [2021-12-06 22:40:07,103 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:07,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900524962] [2021-12-06 22:40:07,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:07,103 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:07,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:07,106 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:07,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:07,110 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:07,132 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:07,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-12-06 22:40:07,133 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-12-06 22:40:07,134 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:07,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:07,196 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2021-12-06 22:40:07,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 22:40:07,197 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2021-12-06 22:40:07,199 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:07,200 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 63 states and 64 transitions. [2021-12-06 22:40:07,200 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2021-12-06 22:40:07,200 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2021-12-06 22:40:07,200 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 64 transitions. [2021-12-06 22:40:07,200 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:07,200 INFO L681 BuchiCegarLoop]: Abstraction has 63 states and 64 transitions. [2021-12-06 22:40:07,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 64 transitions. [2021-12-06 22:40:07,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 28. [2021-12-06 22:40:07,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:07,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2021-12-06 22:40:07,203 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-12-06 22:40:07,203 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-12-06 22:40:07,203 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-06 22:40:07,203 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2021-12-06 22:40:07,203 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:07,204 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:07,204 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:07,204 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2021-12-06 22:40:07,204 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:07,204 INFO L791 eck$LassoCheckResult]: Stem: 376#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 377#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 384#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 385#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 386#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 378#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 379#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 403#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 402#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 401#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 400#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 399#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 398#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 397#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 396#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 395#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 394#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 393#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 392#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 391#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 390#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 389#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 388#L24-3 assume !(main_~i~0#1 < 1024); 387#L24-4 main_~i~0#1 := 0; 383#L28-4 [2021-12-06 22:40:07,204 INFO L793 eck$LassoCheckResult]: Loop: 383#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 380#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 381#L29 assume !(main_~i~0#1 >= 1023); 382#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 383#L28-4 [2021-12-06 22:40:07,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:07,205 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2021-12-06 22:40:07,205 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:07,205 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956709418] [2021-12-06 22:40:07,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:07,205 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:07,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:07,304 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,304 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:07,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956709418] [2021-12-06 22:40:07,305 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1956709418] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:07,305 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1103733083] [2021-12-06 22:40:07,305 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 22:40:07,305 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:07,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:07,333 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:07,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-12-06 22:40:07,427 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-06 22:40:07,427 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 22:40:07,428 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-06 22:40:07,429 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:07,471 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,471 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 22:40:07,610 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:07,610 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1103733083] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 22:40:07,610 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 22:40:07,610 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2021-12-06 22:40:07,610 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793150848] [2021-12-06 22:40:07,610 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 22:40:07,611 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:07,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:07,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 4 times [2021-12-06 22:40:07,611 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:07,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39015639] [2021-12-06 22:40:07,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:07,611 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:07,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:07,615 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:07,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:07,618 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:07,650 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:07,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-12-06 22:40:07,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2021-12-06 22:40:07,651 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:07,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:07,816 INFO L93 Difference]: Finished difference Result 135 states and 136 transitions. [2021-12-06 22:40:07,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-06 22:40:07,816 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 136 transitions. [2021-12-06 22:40:07,820 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:07,821 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 136 transitions. [2021-12-06 22:40:07,821 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2021-12-06 22:40:07,822 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2021-12-06 22:40:07,822 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 136 transitions. [2021-12-06 22:40:07,823 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:07,823 INFO L681 BuchiCegarLoop]: Abstraction has 135 states and 136 transitions. [2021-12-06 22:40:07,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 136 transitions. [2021-12-06 22:40:07,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 52. [2021-12-06 22:40:07,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:07,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2021-12-06 22:40:07,829 INFO L704 BuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2021-12-06 22:40:07,829 INFO L587 BuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2021-12-06 22:40:07,829 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-06 22:40:07,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2021-12-06 22:40:07,830 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:07,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:07,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:07,832 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2021-12-06 22:40:07,832 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:07,832 INFO L791 eck$LassoCheckResult]: Stem: 705#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 706#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 713#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 714#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 715#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 707#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 708#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 756#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 755#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 754#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 753#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 752#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 751#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 750#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 749#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 748#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 747#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 746#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 745#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 744#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 743#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 742#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 741#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 740#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 739#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 738#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 737#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 736#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 735#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 734#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 733#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 732#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 731#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 730#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 729#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 728#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 727#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 726#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 725#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 724#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 723#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 722#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 721#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 720#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 719#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 718#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 717#L24-3 assume !(main_~i~0#1 < 1024); 716#L24-4 main_~i~0#1 := 0; 712#L28-4 [2021-12-06 22:40:07,832 INFO L793 eck$LassoCheckResult]: Loop: 712#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 709#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 710#L29 assume !(main_~i~0#1 >= 1023); 711#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 712#L28-4 [2021-12-06 22:40:07,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:07,833 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2021-12-06 22:40:07,833 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:07,833 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213661597] [2021-12-06 22:40:07,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:07,834 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:07,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:08,058 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:08,058 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:08,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213661597] [2021-12-06 22:40:08,058 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213661597] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:08,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1151533562] [2021-12-06 22:40:08,059 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-06 22:40:08,059 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:08,059 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:08,060 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:08,060 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-12-06 22:40:08,117 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-06 22:40:08,117 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 22:40:08,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-06 22:40:08,121 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:08,195 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:08,195 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 22:40:08,594 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:08,594 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1151533562] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 22:40:08,594 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 22:40:08,595 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2021-12-06 22:40:08,595 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685901214] [2021-12-06 22:40:08,595 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 22:40:08,596 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:08,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:08,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 5 times [2021-12-06 22:40:08,596 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:08,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931549599] [2021-12-06 22:40:08,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:08,596 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:08,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:08,600 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:08,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:08,604 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:08,625 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:08,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-06 22:40:08,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2021-12-06 22:40:08,627 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:08,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:08,954 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2021-12-06 22:40:08,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-12-06 22:40:08,955 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 279 states and 280 transitions. [2021-12-06 22:40:08,958 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:08,960 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 279 states to 279 states and 280 transitions. [2021-12-06 22:40:08,960 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 187 [2021-12-06 22:40:08,960 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 187 [2021-12-06 22:40:08,960 INFO L73 IsDeterministic]: Start isDeterministic. Operand 279 states and 280 transitions. [2021-12-06 22:40:08,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:08,962 INFO L681 BuchiCegarLoop]: Abstraction has 279 states and 280 transitions. [2021-12-06 22:40:08,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states and 280 transitions. [2021-12-06 22:40:08,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 100. [2021-12-06 22:40:08,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:08,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2021-12-06 22:40:08,968 INFO L704 BuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2021-12-06 22:40:08,968 INFO L587 BuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2021-12-06 22:40:08,968 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-06 22:40:08,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2021-12-06 22:40:08,969 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:08,969 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:08,969 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:08,972 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2021-12-06 22:40:08,972 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:08,973 INFO L791 eck$LassoCheckResult]: Stem: 1370#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 1371#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1378#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1379#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1380#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1372#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1373#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1469#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1468#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1467#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1466#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1465#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1464#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1463#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1462#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1461#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1460#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1459#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1458#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1457#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1456#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1455#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1454#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1453#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1452#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1451#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1450#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1449#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1448#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1447#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1446#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1445#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1444#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1443#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1442#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1441#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1440#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1439#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1438#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1437#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1436#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1435#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1434#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1433#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1432#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1431#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1430#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1429#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1428#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1427#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1426#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1425#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1424#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1423#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1422#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1421#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1420#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1419#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1418#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1417#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1416#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1415#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1414#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1413#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1412#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1411#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1410#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1409#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1408#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1407#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1406#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1405#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1404#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1403#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1402#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1401#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1400#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1399#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1398#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1397#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1396#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1395#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1394#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1393#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1392#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1391#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1390#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1389#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1388#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1387#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1386#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1385#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1384#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1383#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1382#L24-3 assume !(main_~i~0#1 < 1024); 1381#L24-4 main_~i~0#1 := 0; 1377#L28-4 [2021-12-06 22:40:08,973 INFO L793 eck$LassoCheckResult]: Loop: 1377#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1374#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 1375#L29 assume !(main_~i~0#1 >= 1023); 1376#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1377#L28-4 [2021-12-06 22:40:08,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:08,974 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2021-12-06 22:40:08,974 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:08,974 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229450418] [2021-12-06 22:40:08,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:08,974 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:09,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:09,597 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:09,598 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:09,598 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229450418] [2021-12-06 22:40:09,598 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [229450418] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:09,598 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1273660885] [2021-12-06 22:40:09,598 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-06 22:40:09,598 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:09,598 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:09,599 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:09,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-12-06 22:40:18,566 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2021-12-06 22:40:18,566 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 22:40:18,585 INFO L263 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 48 conjunts are in the unsatisfiable core [2021-12-06 22:40:18,589 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 22:40:18,716 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:18,716 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 22:40:20,213 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:20,214 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1273660885] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 22:40:20,214 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 22:40:20,214 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2021-12-06 22:40:20,214 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555265351] [2021-12-06 22:40:20,214 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 22:40:20,215 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 22:40:20,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:20,215 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 6 times [2021-12-06 22:40:20,215 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:20,216 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553846115] [2021-12-06 22:40:20,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:20,216 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:20,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:20,218 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 22:40:20,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 22:40:20,221 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 22:40:20,242 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 22:40:20,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2021-12-06 22:40:20,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2021-12-06 22:40:20,246 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:21,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 22:40:21,535 INFO L93 Difference]: Finished difference Result 567 states and 568 transitions. [2021-12-06 22:40:21,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2021-12-06 22:40:21,536 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 567 states and 568 transitions. [2021-12-06 22:40:21,539 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:21,542 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 567 states to 567 states and 568 transitions. [2021-12-06 22:40:21,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 379 [2021-12-06 22:40:21,542 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 379 [2021-12-06 22:40:21,542 INFO L73 IsDeterministic]: Start isDeterministic. Operand 567 states and 568 transitions. [2021-12-06 22:40:21,544 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 22:40:21,544 INFO L681 BuchiCegarLoop]: Abstraction has 567 states and 568 transitions. [2021-12-06 22:40:21,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states and 568 transitions. [2021-12-06 22:40:21,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 196. [2021-12-06 22:40:21,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 22:40:21,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2021-12-06 22:40:21,553 INFO L704 BuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2021-12-06 22:40:21,553 INFO L587 BuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2021-12-06 22:40:21,553 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-06 22:40:21,553 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2021-12-06 22:40:21,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 22:40:21,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 22:40:21,554 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 22:40:21,556 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2021-12-06 22:40:21,556 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 22:40:21,557 INFO L791 eck$LassoCheckResult]: Stem: 2707#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 2708#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2715#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2716#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2717#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2709#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2710#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2902#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2901#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2900#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2899#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2898#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2897#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2896#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2895#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2894#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2893#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2892#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2891#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2890#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2889#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2888#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2887#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2886#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2885#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2884#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2883#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2882#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2881#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2880#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2879#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2878#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2877#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2876#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2875#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2874#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2873#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2872#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2871#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2870#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2869#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2868#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2867#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2866#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2865#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2864#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2863#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2862#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2861#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2860#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2859#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2858#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2857#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2856#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2855#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2854#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2853#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2852#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2851#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2850#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2849#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2848#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2847#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2846#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2845#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2844#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2843#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2842#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2841#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2840#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2839#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2838#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2837#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2836#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2835#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2834#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2833#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2832#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2831#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2830#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2829#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2828#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2827#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2826#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2825#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2824#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2823#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2822#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2821#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2820#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2819#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2818#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2817#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2816#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2815#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2814#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2813#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2812#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2811#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2810#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2809#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2808#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2807#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2806#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2805#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2804#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2803#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2802#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2801#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2800#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2799#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2798#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2797#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2796#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2795#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2794#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2793#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2792#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2791#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2790#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2789#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2788#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2787#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2786#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2785#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2784#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2783#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2782#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2781#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2780#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2779#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2778#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2777#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2776#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2775#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2774#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2773#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2772#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2771#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2770#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2769#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2768#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2767#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2766#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2765#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2764#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2763#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2762#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2761#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2760#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2759#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2758#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2757#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2756#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2755#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2754#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2753#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2752#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2751#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2750#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2749#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2748#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2747#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2746#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2745#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2744#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2743#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2742#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2741#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2740#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2739#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2738#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2737#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2736#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2735#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2734#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2733#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2732#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2731#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2730#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2729#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2728#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2727#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2726#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2725#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2724#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2723#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2722#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2721#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2720#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2719#L24-3 assume !(main_~i~0#1 < 1024); 2718#L24-4 main_~i~0#1 := 0; 2714#L28-4 [2021-12-06 22:40:21,557 INFO L793 eck$LassoCheckResult]: Loop: 2714#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2711#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 2712#L29 assume !(main_~i~0#1 >= 1023); 2713#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2714#L28-4 [2021-12-06 22:40:21,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 22:40:21,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2021-12-06 22:40:21,557 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 22:40:21,557 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572855204] [2021-12-06 22:40:21,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 22:40:21,557 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 22:40:21,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 22:40:23,563 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 22:40:23,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 22:40:23,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572855204] [2021-12-06 22:40:23,563 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572855204] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 22:40:23,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743402681] [2021-12-06 22:40:23,564 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-06 22:40:23,564 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 22:40:23,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 22:40:23,564 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 22:40:23,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbb20de3-00b6-4c1f-99cd-669612fbb7b3/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process