./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 23:35:28,892 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 23:35:28,893 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 23:35:28,924 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 23:35:28,924 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 23:35:28,925 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 23:35:28,926 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 23:35:28,928 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 23:35:28,930 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 23:35:28,931 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 23:35:28,936 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 23:35:28,937 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 23:35:28,938 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 23:35:28,939 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 23:35:28,940 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 23:35:28,941 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 23:35:28,941 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 23:35:28,942 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 23:35:28,944 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 23:35:28,946 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 23:35:28,947 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 23:35:28,949 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 23:35:28,950 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 23:35:28,951 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 23:35:28,958 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 23:35:28,958 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 23:35:28,959 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 23:35:28,960 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 23:35:28,960 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 23:35:28,961 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 23:35:28,962 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 23:35:28,962 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 23:35:28,963 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 23:35:28,964 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 23:35:28,965 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 23:35:28,965 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 23:35:28,966 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 23:35:28,966 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 23:35:28,966 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 23:35:28,967 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 23:35:28,968 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 23:35:28,969 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-12-06 23:35:28,993 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 23:35:28,993 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 23:35:28,994 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 23:35:28,994 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 23:35:28,994 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 23:35:28,995 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 23:35:28,995 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 23:35:28,996 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * sizeof long=4 [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 23:35:28,996 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * sizeof long double=12 [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 23:35:28,997 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 23:35:28,997 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 23:35:28,997 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 23:35:28,998 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 23:35:28,998 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 23:35:28,998 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2021-12-06 23:35:29,192 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 23:35:29,206 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 23:35:29,208 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 23:35:29,209 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 23:35:29,209 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 23:35:29,210 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/loops/eureka_05.i [2021-12-06 23:35:29,249 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/data/e367cd14c/20d16792452f482c8c5a1d8e1b252c5c/FLAGe2d65ffe6 [2021-12-06 23:35:29,614 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 23:35:29,614 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/sv-benchmarks/c/loops/eureka_05.i [2021-12-06 23:35:29,619 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/data/e367cd14c/20d16792452f482c8c5a1d8e1b252c5c/FLAGe2d65ffe6 [2021-12-06 23:35:29,630 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/data/e367cd14c/20d16792452f482c8c5a1d8e1b252c5c [2021-12-06 23:35:29,632 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 23:35:29,633 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 23:35:29,634 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 23:35:29,635 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 23:35:29,638 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 23:35:29,639 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,640 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4bcf272 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29, skipping insertion in model container [2021-12-06 23:35:29,640 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,646 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 23:35:29,659 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 23:35:29,771 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/sv-benchmarks/c/loops/eureka_05.i[810,823] [2021-12-06 23:35:29,783 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 23:35:29,790 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 23:35:29,799 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/sv-benchmarks/c/loops/eureka_05.i[810,823] [2021-12-06 23:35:29,805 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 23:35:29,816 INFO L208 MainTranslator]: Completed translation [2021-12-06 23:35:29,817 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29 WrapperNode [2021-12-06 23:35:29,817 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 23:35:29,818 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 23:35:29,818 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 23:35:29,818 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 23:35:29,824 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,831 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,853 INFO L137 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2021-12-06 23:35:29,853 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 23:35:29,854 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 23:35:29,854 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 23:35:29,854 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 23:35:29,862 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,862 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,864 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,865 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,870 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,875 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,876 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,878 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 23:35:29,879 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 23:35:29,879 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 23:35:29,879 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 23:35:29,880 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (1/1) ... [2021-12-06 23:35:29,886 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:29,895 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:29,906 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:29,909 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 23:35:29,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 23:35:29,936 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-06 23:35:29,937 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 23:35:29,983 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 23:35:29,984 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 23:35:30,074 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 23:35:30,078 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 23:35:30,078 INFO L301 CfgBuilder]: Removed 4 assume(true) statements. [2021-12-06 23:35:30,080 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 11:35:30 BoogieIcfgContainer [2021-12-06 23:35:30,080 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 23:35:30,081 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 23:35:30,081 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 23:35:30,083 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 23:35:30,084 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 23:35:30,084 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 11:35:29" (1/3) ... [2021-12-06 23:35:30,085 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d48fcff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 11:35:30, skipping insertion in model container [2021-12-06 23:35:30,085 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 23:35:30,085 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 11:35:29" (2/3) ... [2021-12-06 23:35:30,085 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d48fcff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 11:35:30, skipping insertion in model container [2021-12-06 23:35:30,085 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 23:35:30,085 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 11:35:30" (3/3) ... [2021-12-06 23:35:30,086 INFO L388 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2021-12-06 23:35:30,120 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 23:35:30,121 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 23:35:30,121 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 23:35:30,121 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 23:35:30,121 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 23:35:30,121 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 23:35:30,121 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 23:35:30,121 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 23:35:30,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:30,156 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2021-12-06 23:35:30,156 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:30,156 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:30,160 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 23:35:30,160 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 23:35:30,160 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 23:35:30,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:30,163 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2021-12-06 23:35:30,163 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:30,163 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:30,163 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-06 23:35:30,164 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-06 23:35:30,168 INFO L791 eck$LassoCheckResult]: Stem: 6#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 14#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 7#L44-3true [2021-12-06 23:35:30,168 INFO L793 eck$LassoCheckResult]: Loop: 7#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 19#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7#L44-3true [2021-12-06 23:35:30,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:30,173 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-12-06 23:35:30,179 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:30,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357750766] [2021-12-06 23:35:30,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:30,187 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:30,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,259 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:30,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,282 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:30,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:30,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2021-12-06 23:35:30,285 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:30,285 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531932704] [2021-12-06 23:35:30,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:30,285 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:30,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,293 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:30,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,299 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:30,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:30,301 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2021-12-06 23:35:30,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:30,301 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808664158] [2021-12-06 23:35:30,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:30,301 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:30,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,318 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:30,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:30,333 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:30,647 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 23:35:30,647 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 23:35:30,647 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 23:35:30,647 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 23:35:30,648 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-06 23:35:30,648 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:30,648 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 23:35:30,648 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 23:35:30,648 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2021-12-06 23:35:30,648 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 23:35:30,648 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 23:35:30,663 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,667 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,669 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,671 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,673 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,870 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,871 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:30,873 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:35:31,044 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-06 23:35:31,047 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-06 23:35:31,048 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,049 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-12-06 23:35:31,050 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,058 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,058 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:35:31,058 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,058 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,058 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,060 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:35:31,060 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:35:31,061 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,080 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-12-06 23:35:31,081 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,082 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-12-06 23:35:31,083 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,092 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,092 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,092 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,092 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,096 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,097 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,100 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,128 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2021-12-06 23:35:31,128 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,129 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-12-06 23:35:31,130 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,138 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,138 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,138 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,138 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,140 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,140 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,143 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,162 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2021-12-06 23:35:31,162 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,162 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,163 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,163 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-12-06 23:35:31,164 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,171 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,171 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:35:31,171 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,171 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,171 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,172 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:35:31,172 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:35:31,173 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,192 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2021-12-06 23:35:31,192 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,193 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,193 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-12-06 23:35:31,194 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,201 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,201 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,201 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,201 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,204 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,204 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,207 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,226 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-12-06 23:35:31,226 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,226 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,227 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,227 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-12-06 23:35:31,228 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,235 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,235 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,235 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,235 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,237 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,237 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,240 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,259 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2021-12-06 23:35:31,259 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,260 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,261 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-12-06 23:35:31,261 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,270 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,270 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,270 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,270 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,272 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,272 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,276 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-12-06 23:35:31,298 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,298 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,299 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,300 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-12-06 23:35:31,300 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,307 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,307 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,307 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,308 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,310 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,311 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,315 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,333 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2021-12-06 23:35:31,333 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,334 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-12-06 23:35:31,335 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,342 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,342 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,342 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,342 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,344 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,344 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,347 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,365 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2021-12-06 23:35:31,365 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,365 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,366 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-12-06 23:35:31,367 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,374 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,374 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,376 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,376 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,378 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,397 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2021-12-06 23:35:31,397 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,397 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,398 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-12-06 23:35:31,399 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,406 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,406 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,406 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,406 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,408 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,408 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,411 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:35:31,429 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2021-12-06 23:35:31,429 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,430 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-12-06 23:35:31,431 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:35:31,440 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:35:31,440 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:35:31,440 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:35:31,440 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:35:31,443 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:35:31,443 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:35:31,453 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-06 23:35:31,469 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2021-12-06 23:35:31,469 INFO L444 ModelExtractionUtils]: 2 out of 16 variables were initially zero. Simplification set additionally 11 variables to zero. [2021-12-06 23:35:31,470 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:35:31,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,471 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,472 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-12-06 23:35:31,473 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-06 23:35:31,482 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-06 23:35:31,483 INFO L513 LassoAnalysis]: Proved termination. [2021-12-06 23:35:31,483 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2021-12-06 23:35:31,502 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-12-06 23:35:31,552 INFO L297 tatePredicateManager]: 27 out of 27 supporting invariants were superfluous and have been removed [2021-12-06 23:35:31,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:31,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:31,578 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 23:35:31,579 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:31,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:31,589 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 23:35:31,590 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:31,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:31,643 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-06 23:35:31,644 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:31,685 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2021-12-06 23:35:31,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-12-06 23:35:31,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:31,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2021-12-06 23:35:31,691 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2021-12-06 23:35:31,691 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:35:31,691 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2021-12-06 23:35:31,691 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:35:31,691 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2021-12-06 23:35:31,692 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:35:31,692 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2021-12-06 23:35:31,695 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2021-12-06 23:35:31,697 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2021-12-06 23:35:31,698 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-06 23:35:31,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-06 23:35:31,698 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2021-12-06 23:35:31,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:31,699 INFO L681 BuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2021-12-06 23:35:31,702 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2021-12-06 23:35:31,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2021-12-06 23:35:31,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2021-12-06 23:35:31,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:31,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2021-12-06 23:35:31,717 INFO L704 BuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2021-12-06 23:35:31,717 INFO L587 BuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2021-12-06 23:35:31,717 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 23:35:31,717 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2021-12-06 23:35:31,718 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2021-12-06 23:35:31,718 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:31,718 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:31,718 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2021-12-06 23:35:31,718 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:35:31,718 INFO L791 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 223#L44-3 assume !(main_~i~1#1 >= 0); 224#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2021-12-06 23:35:31,718 INFO L793 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 233#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 234#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2021-12-06 23:35:31,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:31,719 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2021-12-06 23:35:31,719 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:31,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567736217] [2021-12-06 23:35:31,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:31,719 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:31,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:31,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:31,749 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:31,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1567736217] [2021-12-06 23:35:31,749 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1567736217] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 23:35:31,749 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 23:35:31,750 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 23:35:31,750 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041000262] [2021-12-06 23:35:31,750 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 23:35:31,752 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:35:31,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:31,752 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2021-12-06 23:35:31,752 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:31,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704179023] [2021-12-06 23:35:31,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:31,753 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:31,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:31,762 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:31,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:31,770 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:31,834 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:31,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 23:35:31,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 23:35:31,837 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:31,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:31,848 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2021-12-06 23:35:31,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 23:35:31,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2021-12-06 23:35:31,850 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:31,851 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2021-12-06 23:35:31,851 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-06 23:35:31,851 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-06 23:35:31,851 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2021-12-06 23:35:31,852 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:31,852 INFO L681 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2021-12-06 23:35:31,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2021-12-06 23:35:31,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2021-12-06 23:35:31,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:31,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2021-12-06 23:35:31,854 INFO L704 BuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2021-12-06 23:35:31,854 INFO L587 BuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2021-12-06 23:35:31,854 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 23:35:31,854 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2021-12-06 23:35:31,855 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:31,855 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:31,855 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:31,855 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-12-06 23:35:31,855 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:35:31,856 INFO L791 eck$LassoCheckResult]: Stem: 262#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 263#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 264#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 265#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 266#L44-3 assume !(main_~i~1#1 >= 0); 267#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 261#L30-3 [2021-12-06 23:35:31,856 INFO L793 eck$LassoCheckResult]: Loop: 261#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 275#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 276#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 260#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 261#L30-3 [2021-12-06 23:35:31,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:31,856 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2021-12-06 23:35:31,856 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:31,857 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111381518] [2021-12-06 23:35:31,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:31,857 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:31,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:31,887 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:31,887 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:31,887 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [111381518] [2021-12-06 23:35:31,887 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [111381518] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:31,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [651333949] [2021-12-06 23:35:31,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:31,888 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:31,888 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:31,889 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:31,890 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2021-12-06 23:35:31,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:31,917 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 23:35:31,918 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:31,927 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:31,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:35:31,943 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:31,943 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [651333949] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:35:31,943 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:35:31,943 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2021-12-06 23:35:31,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472861253] [2021-12-06 23:35:31,943 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:35:31,944 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:35:31,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:31,944 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2021-12-06 23:35:31,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:31,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528401789] [2021-12-06 23:35:31,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:31,944 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:31,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:31,951 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:31,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:31,958 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,021 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:32,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-12-06 23:35:32,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2021-12-06 23:35:32,022 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:32,045 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2021-12-06 23:35:32,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 23:35:32,045 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2021-12-06 23:35:32,046 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:32,047 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2021-12-06 23:35:32,047 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2021-12-06 23:35:32,047 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2021-12-06 23:35:32,047 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2021-12-06 23:35:32,047 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:32,047 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2021-12-06 23:35:32,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2021-12-06 23:35:32,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2021-12-06 23:35:32,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2021-12-06 23:35:32,049 INFO L704 BuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2021-12-06 23:35:32,049 INFO L587 BuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2021-12-06 23:35:32,049 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 23:35:32,049 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2021-12-06 23:35:32,050 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:32,050 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:32,050 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:32,051 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2021-12-06 23:35:32,051 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:35:32,051 INFO L791 eck$LassoCheckResult]: Stem: 345#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 346#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 347#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 348#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 349#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 350#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 365#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 364#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 363#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 362#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 361#L44-3 assume !(main_~i~1#1 >= 0); 351#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 344#L30-3 [2021-12-06 23:35:32,051 INFO L793 eck$LassoCheckResult]: Loop: 344#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 359#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 360#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 343#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 344#L30-3 [2021-12-06 23:35:32,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,051 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2021-12-06 23:35:32,051 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,051 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138229851] [2021-12-06 23:35:32,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,052 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:32,097 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:32,097 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:32,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138229851] [2021-12-06 23:35:32,097 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2138229851] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:32,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [668085926] [2021-12-06 23:35:32,098 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 23:35:32,098 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:32,098 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:32,098 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:32,099 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2021-12-06 23:35:32,137 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 23:35:32,137 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:35:32,138 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 23:35:32,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:32,161 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:32,161 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:35:32,187 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:32,187 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [668085926] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:35:32,188 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:35:32,188 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2021-12-06 23:35:32,188 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471088068] [2021-12-06 23:35:32,188 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:35:32,188 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:35:32,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,188 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2021-12-06 23:35:32,189 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232896624] [2021-12-06 23:35:32,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,189 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,195 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:32,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,201 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,264 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:32,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 23:35:32,265 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 23:35:32,265 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:32,297 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2021-12-06 23:35:32,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-12-06 23:35:32,298 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2021-12-06 23:35:32,299 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:32,300 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2021-12-06 23:35:32,300 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2021-12-06 23:35:32,300 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2021-12-06 23:35:32,300 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2021-12-06 23:35:32,300 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:32,301 INFO L681 BuchiCegarLoop]: Abstraction has 41 states and 45 transitions. [2021-12-06 23:35:32,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2021-12-06 23:35:32,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2021-12-06 23:35:32,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2021-12-06 23:35:32,303 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2021-12-06 23:35:32,303 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2021-12-06 23:35:32,303 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-06 23:35:32,303 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2021-12-06 23:35:32,303 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:32,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:32,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:32,304 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2021-12-06 23:35:32,304 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:35:32,304 INFO L791 eck$LassoCheckResult]: Stem: 485#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 486#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 487#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 488#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 489#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 490#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 507#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 506#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 505#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 504#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 503#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 502#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 501#L44-3 assume !(main_~i~1#1 >= 0); 491#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 484#L30-3 [2021-12-06 23:35:32,304 INFO L793 eck$LassoCheckResult]: Loop: 484#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 499#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 500#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 483#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 484#L30-3 [2021-12-06 23:35:32,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,304 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2021-12-06 23:35:32,305 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,305 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551334074] [2021-12-06 23:35:32,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,305 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,320 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:32,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,336 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,337 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2021-12-06 23:35:32,337 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177408199] [2021-12-06 23:35:32,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,337 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,343 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:32,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,348 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,349 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2021-12-06 23:35:32,349 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114489743] [2021-12-06 23:35:32,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,349 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:32,392 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-06 23:35:32,392 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:32,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114489743] [2021-12-06 23:35:32,392 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114489743] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 23:35:32,392 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 23:35:32,393 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 23:35:32,393 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119143383] [2021-12-06 23:35:32,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 23:35:32,451 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:32,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 23:35:32,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-12-06 23:35:32,452 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:32,475 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2021-12-06 23:35:32,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 23:35:32,476 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2021-12-06 23:35:32,477 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2021-12-06 23:35:32,477 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2021-12-06 23:35:32,477 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2021-12-06 23:35:32,477 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2021-12-06 23:35:32,477 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2021-12-06 23:35:32,478 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:32,478 INFO L681 BuchiCegarLoop]: Abstraction has 34 states and 41 transitions. [2021-12-06 23:35:32,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2021-12-06 23:35:32,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2021-12-06 23:35:32,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:32,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2021-12-06 23:35:32,479 INFO L704 BuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2021-12-06 23:35:32,479 INFO L587 BuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2021-12-06 23:35:32,480 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-06 23:35:32,480 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2021-12-06 23:35:32,480 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:32,480 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:32,480 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:32,481 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2021-12-06 23:35:32,481 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:35:32,481 INFO L791 eck$LassoCheckResult]: Stem: 556#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 557#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 558#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 559#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 560#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 561#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 580#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 579#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 578#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 577#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 576#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 575#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 574#L44-3 assume !(main_~i~1#1 >= 0); 562#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 563#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 572#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 568#L33 [2021-12-06 23:35:32,481 INFO L793 eck$LassoCheckResult]: Loop: 568#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 569#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 571#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 568#L33 [2021-12-06 23:35:32,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,482 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2021-12-06 23:35:32,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528801057] [2021-12-06 23:35:32,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,482 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,504 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:32,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,519 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,519 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2021-12-06 23:35:32,519 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124315777] [2021-12-06 23:35:32,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,519 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,523 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:32,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:32,526 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:32,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:32,527 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2021-12-06 23:35:32,527 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:32,527 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881213769] [2021-12-06 23:35:32,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,527 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:32,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:32,852 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:35:32,852 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:32,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881213769] [2021-12-06 23:35:32,853 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881213769] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:32,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1788844992] [2021-12-06 23:35:32,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:32,853 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:32,853 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:32,889 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:32,893 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-12-06 23:35:32,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:32,935 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 28 conjunts are in the unsatisfiable core [2021-12-06 23:35:32,937 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:32,990 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:35:32,990 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:35:33,022 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:35:33,048 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:35:33,075 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:35:33,097 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:35:33,128 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:35:33,264 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-12-06 23:35:33,264 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:35:33,335 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_122) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 4))))) is different from false [2021-12-06 23:35:33,399 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2021-12-06 23:35:33,400 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1788844992] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:35:33,400 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:35:33,400 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 23 [2021-12-06 23:35:33,400 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867029454] [2021-12-06 23:35:33,400 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:35:33,443 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:33,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-12-06 23:35:33,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=422, Unknown=1, NotChecked=42, Total=552 [2021-12-06 23:35:33,444 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 24 states, 24 states have (on average 1.7083333333333333) internal successors, (41), 23 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:33,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:33,922 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2021-12-06 23:35:33,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-12-06 23:35:33,923 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2021-12-06 23:35:33,924 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-12-06 23:35:33,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2021-12-06 23:35:33,924 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2021-12-06 23:35:33,924 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2021-12-06 23:35:33,924 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2021-12-06 23:35:33,925 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:33,925 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 41 transitions. [2021-12-06 23:35:33,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2021-12-06 23:35:33,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2021-12-06 23:35:33,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:33,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2021-12-06 23:35:33,926 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2021-12-06 23:35:33,926 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2021-12-06 23:35:33,927 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-06 23:35:33,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2021-12-06 23:35:33,927 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:33,927 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:33,927 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:33,927 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:35:33,928 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:35:33,928 INFO L791 eck$LassoCheckResult]: Stem: 781#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 782#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 783#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 784#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 785#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 786#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 805#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 804#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 803#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 802#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 801#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 800#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 799#L44-3 assume !(main_~i~1#1 >= 0); 787#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 788#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 797#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 793#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 794#L32-2 [2021-12-06 23:35:33,928 INFO L793 eck$LassoCheckResult]: Loop: 794#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 796#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 806#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 794#L32-2 [2021-12-06 23:35:33,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:33,928 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2021-12-06 23:35:33,928 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:33,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308363253] [2021-12-06 23:35:33,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:33,928 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:33,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:33,943 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:33,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:33,960 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:33,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:33,961 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2021-12-06 23:35:33,961 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:33,961 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455395852] [2021-12-06 23:35:33,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:33,961 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:33,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:33,965 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:33,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:33,969 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:33,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:33,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2021-12-06 23:35:33,970 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:33,970 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622035452] [2021-12-06 23:35:33,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:33,970 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:33,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:34,153 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-12-06 23:35:34,153 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:34,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622035452] [2021-12-06 23:35:34,153 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [622035452] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:34,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1096884829] [2021-12-06 23:35:34,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:34,153 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:34,153 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:34,154 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:34,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2021-12-06 23:35:34,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:34,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 25 conjunts are in the unsatisfiable core [2021-12-06 23:35:34,207 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:34,244 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:35:34,244 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:35:34,267 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:34,287 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:34,303 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:34,319 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:34,336 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:34,496 INFO L354 Elim1Store]: treesize reduction 20, result has 51.2 percent of original size [2021-12-06 23:35:34,496 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 56 treesize of output 36 [2021-12-06 23:35:34,528 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-12-06 23:35:34,529 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:35:34,693 WARN L838 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_SelectionSort_~rh~0#1| Int) (v_ArrVal_163 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_163) |c_~#array~0.base|))) (let ((.cse1 (select .cse0 (+ |c_~#array~0.offset| (* |ULTIMATE.start_SelectionSort_~rh~0#1| 4))))) (or (< (select .cse0 (+ |c_~#array~0.offset| 4)) .cse1) (<= .cse1 (select .cse0 (+ |c_~#array~0.offset| 8))))))) is different from false [2021-12-06 23:35:34,789 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2021-12-06 23:35:34,789 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1096884829] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:35:34,789 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:35:34,789 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 27 [2021-12-06 23:35:34,790 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611757733] [2021-12-06 23:35:34,790 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:35:34,826 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:34,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-12-06 23:35:34,827 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=655, Unknown=1, NotChecked=52, Total=812 [2021-12-06 23:35:34,827 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 29 states, 28 states have (on average 1.5) internal successors, (42), 28 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:35,151 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2021-12-06 23:35:35,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 23:35:35,152 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 46 transitions. [2021-12-06 23:35:35,153 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-12-06 23:35:35,154 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 46 transitions. [2021-12-06 23:35:35,154 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-12-06 23:35:35,154 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-12-06 23:35:35,154 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 46 transitions. [2021-12-06 23:35:35,154 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:35,154 INFO L681 BuchiCegarLoop]: Abstraction has 39 states and 46 transitions. [2021-12-06 23:35:35,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 46 transitions. [2021-12-06 23:35:35,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 31. [2021-12-06 23:35:35,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2021-12-06 23:35:35,157 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2021-12-06 23:35:35,157 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2021-12-06 23:35:35,157 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-06 23:35:35,158 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2021-12-06 23:35:35,158 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:35,158 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:35,158 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:35,159 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:35:35,159 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:35:35,159 INFO L791 eck$LassoCheckResult]: Stem: 1013#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1014#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1015#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1016#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1017#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1018#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1038#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1037#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1036#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1035#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1034#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1033#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1032#L44-3 assume !(main_~i~1#1 >= 0); 1019#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1020#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1029#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1030#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1041#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1040#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1031#L32-4 [2021-12-06 23:35:35,159 INFO L793 eck$LassoCheckResult]: Loop: 1031#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1011#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1012#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1028#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1031#L32-4 [2021-12-06 23:35:35,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2021-12-06 23:35:35,160 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095501782] [2021-12-06 23:35:35,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,160 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:35,194 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-06 23:35:35,194 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:35,194 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095501782] [2021-12-06 23:35:35,194 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095501782] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:35,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [529886511] [2021-12-06 23:35:35,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,195 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:35,195 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:35,196 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:35,196 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-12-06 23:35:35,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:35,236 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 23:35:35,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:35,279 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-06 23:35:35,279 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:35:35,309 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-06 23:35:35,309 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [529886511] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:35:35,309 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:35:35,309 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2021-12-06 23:35:35,309 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809849151] [2021-12-06 23:35:35,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:35:35,310 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:35:35,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,310 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2021-12-06 23:35:35,310 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,310 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517672673] [2021-12-06 23:35:35,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,310 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,314 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:35,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,319 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:35,385 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:35,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-12-06 23:35:35,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2021-12-06 23:35:35,386 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:35,455 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2021-12-06 23:35:35,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 23:35:35,456 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2021-12-06 23:35:35,456 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2021-12-06 23:35:35,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2021-12-06 23:35:35,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2021-12-06 23:35:35,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2021-12-06 23:35:35,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2021-12-06 23:35:35,457 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:35,457 INFO L681 BuchiCegarLoop]: Abstraction has 51 states and 61 transitions. [2021-12-06 23:35:35,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2021-12-06 23:35:35,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2021-12-06 23:35:35,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2021-12-06 23:35:35,460 INFO L704 BuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2021-12-06 23:35:35,460 INFO L587 BuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2021-12-06 23:35:35,460 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-12-06 23:35:35,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2021-12-06 23:35:35,461 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2021-12-06 23:35:35,461 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:35,461 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:35,461 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2021-12-06 23:35:35,461 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:35:35,461 INFO L791 eck$LassoCheckResult]: Stem: 1235#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1236#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1237#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1238#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1239#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1240#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1267#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1265#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1262#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1260#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1259#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1256#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1255#L44-3 assume !(main_~i~1#1 >= 0); 1241#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1242#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1277#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1276#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1275#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1274#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1273#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1272#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1271#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1270#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1269#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1268#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1264#L33 [2021-12-06 23:35:35,462 INFO L793 eck$LassoCheckResult]: Loop: 1264#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1266#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1263#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1264#L33 [2021-12-06 23:35:35,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,462 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2021-12-06 23:35:35,462 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205530293] [2021-12-06 23:35:35,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,462 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,473 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:35,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,484 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:35,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,485 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2021-12-06 23:35:35,485 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558882420] [2021-12-06 23:35:35,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,485 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,488 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:35,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,490 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:35,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2021-12-06 23:35:35,491 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,491 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533931004] [2021-12-06 23:35:35,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,491 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:35,533 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-06 23:35:35,533 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:35,534 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533931004] [2021-12-06 23:35:35,534 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1533931004] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 23:35:35,534 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 23:35:35,534 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-12-06 23:35:35,534 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162276488] [2021-12-06 23:35:35,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 23:35:35,573 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:35:35,573 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-06 23:35:35,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2021-12-06 23:35:35,573 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:35:35,619 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2021-12-06 23:35:35,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-06 23:35:35,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2021-12-06 23:35:35,620 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:35,621 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2021-12-06 23:35:35,621 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2021-12-06 23:35:35,621 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2021-12-06 23:35:35,621 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2021-12-06 23:35:35,621 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:35:35,622 INFO L681 BuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2021-12-06 23:35:35,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2021-12-06 23:35:35,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2021-12-06 23:35:35,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:35:35,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2021-12-06 23:35:35,624 INFO L704 BuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2021-12-06 23:35:35,624 INFO L587 BuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2021-12-06 23:35:35,624 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-12-06 23:35:35,624 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2021-12-06 23:35:35,624 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:35:35,624 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:35:35,624 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:35:35,625 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:35:35,625 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:35:35,625 INFO L791 eck$LassoCheckResult]: Stem: 1353#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1354#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1355#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1356#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1357#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1358#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1384#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1383#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1381#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1379#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1377#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1373#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1372#L44-3 assume !(main_~i~1#1 >= 0); 1359#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1360#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1371#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1396#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1368#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1369#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1365#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1366#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1395#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1394#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1393#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1392#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1391#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1390#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1389#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1370#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1351#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1352#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1388#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1387#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1386#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1385#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1380#L33 [2021-12-06 23:35:35,625 INFO L793 eck$LassoCheckResult]: Loop: 1380#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1382#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1375#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1380#L33 [2021-12-06 23:35:35,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,626 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2021-12-06 23:35:35,626 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325662207] [2021-12-06 23:35:35,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,626 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,644 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:35,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,661 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:35,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,661 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2021-12-06 23:35:35,661 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,661 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636435269] [2021-12-06 23:35:35,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,662 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,664 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:35:35,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:35:35,667 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:35:35,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:35:35,667 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2021-12-06 23:35:35,667 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:35:35,667 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642537301] [2021-12-06 23:35:35,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,667 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:35:35,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:35,946 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2021-12-06 23:35:35,946 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:35:35,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642537301] [2021-12-06 23:35:35,946 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1642537301] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:35:35,947 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1603992410] [2021-12-06 23:35:35,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:35:35,947 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:35:35,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:35:35,948 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:35:35,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-12-06 23:35:36,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:35:36,006 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 29 conjunts are in the unsatisfiable core [2021-12-06 23:35:36,009 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:35:36,036 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:35:36,036 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:35:36,059 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:36,071 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:36,085 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:36,098 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:36,111 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:35:36,294 INFO L354 Elim1Store]: treesize reduction 176, result has 17.8 percent of original size [2021-12-06 23:35:36,295 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 41 treesize of output 55 [2021-12-06 23:35:36,389 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-12-06 23:35:36,390 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 13 [2021-12-06 23:35:36,406 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2021-12-06 23:35:36,407 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:12,642 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_264 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_264) |c_~#array~0.base|))) (<= (select .cse0 (+ |c_~#array~0.offset| 4)) (select .cse0 (+ |c_~#array~0.offset| 12))))) is different from false [2021-12-06 23:36:12,692 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2021-12-06 23:36:12,693 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1603992410] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:12,693 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:12,693 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 30 [2021-12-06 23:36:12,693 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [36648961] [2021-12-06 23:36:12,693 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:12,739 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:12,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2021-12-06 23:36:12,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=778, Unknown=1, NotChecked=56, Total=930 [2021-12-06 23:36:12,740 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 31 states, 31 states have (on average 2.096774193548387) internal successors, (65), 30 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:13,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:13,294 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2021-12-06 23:36:13,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-06 23:36:13,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 68 states and 78 transitions. [2021-12-06 23:36:13,295 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-12-06 23:36:13,296 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 68 states to 68 states and 78 transitions. [2021-12-06 23:36:13,296 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2021-12-06 23:36:13,296 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 58 [2021-12-06 23:36:13,296 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 78 transitions. [2021-12-06 23:36:13,296 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:13,296 INFO L681 BuchiCegarLoop]: Abstraction has 68 states and 78 transitions. [2021-12-06 23:36:13,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 78 transitions. [2021-12-06 23:36:13,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 59. [2021-12-06 23:36:13,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.1355932203389831) internal successors, (67), 58 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:13,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 67 transitions. [2021-12-06 23:36:13,299 INFO L704 BuchiCegarLoop]: Abstraction has 59 states and 67 transitions. [2021-12-06 23:36:13,299 INFO L587 BuchiCegarLoop]: Abstraction has 59 states and 67 transitions. [2021-12-06 23:36:13,299 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-12-06 23:36:13,299 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 67 transitions. [2021-12-06 23:36:13,300 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:36:13,300 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:13,300 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:13,300 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:13,300 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:36:13,300 INFO L791 eck$LassoCheckResult]: Stem: 1748#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1749#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1750#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1751#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1752#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1753#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1781#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1780#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1779#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1778#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1776#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1772#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1771#L44-3 assume !(main_~i~1#1 >= 0); 1754#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1755#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1799#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1798#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1797#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1796#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1795#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1794#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1793#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1791#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1792#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1804#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1786#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1787#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1782#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1783#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1746#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1747#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1803#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1800#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1801#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1765#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1766#L33 [2021-12-06 23:36:13,301 INFO L793 eck$LassoCheckResult]: Loop: 1766#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1761#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1774#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1766#L33 [2021-12-06 23:36:13,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:13,301 INFO L85 PathProgramCache]: Analyzing trace with hash 322622039, now seen corresponding path program 2 times [2021-12-06 23:36:13,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:13,301 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683113044] [2021-12-06 23:36:13,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:13,301 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:13,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:13,564 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-12-06 23:36:13,564 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:13,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683113044] [2021-12-06 23:36:13,565 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683113044] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:13,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1141835683] [2021-12-06 23:36:13,565 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 23:36:13,565 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:13,565 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:13,566 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:13,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2021-12-06 23:36:13,629 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 23:36:13,629 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:13,631 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 33 conjunts are in the unsatisfiable core [2021-12-06 23:36:13,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:13,657 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:36:13,657 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:36:13,679 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:13,696 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:13,712 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:13,728 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:13,746 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:13,944 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-12-06 23:36:13,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:14,048 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_302 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_302) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 12))))) is different from false [2021-12-06 23:36:14,094 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 9 not checked. [2021-12-06 23:36:14,094 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1141835683] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:14,094 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:14,094 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 27 [2021-12-06 23:36:14,095 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659182613] [2021-12-06 23:36:14,095 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:14,095 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:36:14,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:14,095 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2021-12-06 23:36:14,095 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:14,095 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572226380] [2021-12-06 23:36:14,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:14,096 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:14,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:14,098 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:14,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:14,100 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:14,144 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:14,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2021-12-06 23:36:14,145 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=597, Unknown=1, NotChecked=50, Total=756 [2021-12-06 23:36:14,145 INFO L87 Difference]: Start difference. First operand 59 states and 67 transitions. cyclomatic complexity: 11 Second operand has 28 states, 28 states have (on average 2.0714285714285716) internal successors, (58), 27 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:14,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:14,446 INFO L93 Difference]: Finished difference Result 58 states and 64 transitions. [2021-12-06 23:36:14,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 23:36:14,446 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 64 transitions. [2021-12-06 23:36:14,447 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2021-12-06 23:36:14,447 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 64 transitions. [2021-12-06 23:36:14,447 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2021-12-06 23:36:14,448 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2021-12-06 23:36:14,448 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 64 transitions. [2021-12-06 23:36:14,448 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:14,448 INFO L681 BuchiCegarLoop]: Abstraction has 58 states and 64 transitions. [2021-12-06 23:36:14,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 64 transitions. [2021-12-06 23:36:14,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2021-12-06 23:36:14,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.1071428571428572) internal successors, (62), 55 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:14,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 62 transitions. [2021-12-06 23:36:14,450 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2021-12-06 23:36:14,450 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2021-12-06 23:36:14,451 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-12-06 23:36:14,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 62 transitions. [2021-12-06 23:36:14,451 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:36:14,451 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:14,451 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:14,452 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:14,452 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:36:14,452 INFO L791 eck$LassoCheckResult]: Stem: 2117#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2118#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2119#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2120#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2121#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2122#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2148#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2147#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2145#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2143#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2141#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2137#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2136#L44-3 assume !(main_~i~1#1 >= 0); 2123#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2124#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2170#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2169#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2132#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2133#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2168#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2167#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2166#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2165#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2164#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2163#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2162#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2160#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2159#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2135#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2115#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2116#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2134#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2129#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2130#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2152#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2144#L33 [2021-12-06 23:36:14,452 INFO L793 eck$LassoCheckResult]: Loop: 2144#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2146#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2139#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2144#L33 [2021-12-06 23:36:14,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:14,452 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 3 times [2021-12-06 23:36:14,452 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:14,453 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553005234] [2021-12-06 23:36:14,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:14,453 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:14,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:14,768 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-12-06 23:36:14,768 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:14,768 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553005234] [2021-12-06 23:36:14,769 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1553005234] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:14,769 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [505670762] [2021-12-06 23:36:14,769 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 23:36:14,769 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:14,769 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:14,770 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:14,770 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2021-12-06 23:36:14,844 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-12-06 23:36:14,844 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:14,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 30 conjunts are in the unsatisfiable core [2021-12-06 23:36:14,848 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:14,888 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-06 23:36:14,888 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2021-12-06 23:36:14,903 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:36:14,903 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:36:14,939 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:14,959 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:14,984 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:15,015 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:15,043 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:15,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:15,243 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-06 23:36:15,244 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 39 [2021-12-06 23:36:15,423 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 19 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2021-12-06 23:36:15,423 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:15,909 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 19 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2021-12-06 23:36:15,909 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [505670762] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:15,909 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:15,909 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10, 10] total 31 [2021-12-06 23:36:15,909 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417363408] [2021-12-06 23:36:15,909 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:15,910 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:36:15,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:15,910 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 6 times [2021-12-06 23:36:15,910 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:15,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865816394] [2021-12-06 23:36:15,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:15,910 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:15,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:15,912 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:15,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:15,915 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:15,952 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:15,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-12-06 23:36:15,953 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=891, Unknown=2, NotChecked=0, Total=992 [2021-12-06 23:36:15,953 INFO L87 Difference]: Start difference. First operand 56 states and 62 transitions. cyclomatic complexity: 9 Second operand has 32 states, 32 states have (on average 1.90625) internal successors, (61), 31 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:16,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:16,774 INFO L93 Difference]: Finished difference Result 53 states and 59 transitions. [2021-12-06 23:36:16,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-12-06 23:36:16,775 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 59 transitions. [2021-12-06 23:36:16,775 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-12-06 23:36:16,775 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 53 states and 59 transitions. [2021-12-06 23:36:16,776 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2021-12-06 23:36:16,776 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2021-12-06 23:36:16,776 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 59 transitions. [2021-12-06 23:36:16,776 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:16,776 INFO L681 BuchiCegarLoop]: Abstraction has 53 states and 59 transitions. [2021-12-06 23:36:16,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 59 transitions. [2021-12-06 23:36:16,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 47. [2021-12-06 23:36:16,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0851063829787233) internal successors, (51), 46 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:16,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2021-12-06 23:36:16,778 INFO L704 BuchiCegarLoop]: Abstraction has 47 states and 51 transitions. [2021-12-06 23:36:16,778 INFO L587 BuchiCegarLoop]: Abstraction has 47 states and 51 transitions. [2021-12-06 23:36:16,778 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-12-06 23:36:16,778 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 51 transitions. [2021-12-06 23:36:16,778 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:36:16,779 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:16,779 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:16,779 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:16,779 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:36:16,779 INFO L791 eck$LassoCheckResult]: Stem: 2501#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2502#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2503#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2504#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2505#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2506#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2529#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2528#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2527#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2526#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2524#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2521#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2520#L44-3 assume !(main_~i~1#1 >= 0); 2507#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2508#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2542#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2541#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2540#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2539#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2538#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2537#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2536#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2535#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2534#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2533#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2532#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2531#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2530#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2518#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2499#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2500#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2519#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2545#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2544#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2517#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2513#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2514#L32-2 [2021-12-06 23:36:16,779 INFO L793 eck$LassoCheckResult]: Loop: 2514#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2516#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2543#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2514#L32-2 [2021-12-06 23:36:16,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:16,780 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2021-12-06 23:36:16,780 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:16,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229592907] [2021-12-06 23:36:16,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:16,780 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:16,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:16,793 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:16,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:16,815 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:16,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:16,816 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 7 times [2021-12-06 23:36:16,816 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:16,816 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515933873] [2021-12-06 23:36:16,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:16,816 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:16,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:16,820 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:16,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:16,823 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:16,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:16,823 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 4 times [2021-12-06 23:36:16,823 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:16,823 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946640888] [2021-12-06 23:36:16,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:16,824 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:16,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:17,173 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2021-12-06 23:36:17,174 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:17,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946640888] [2021-12-06 23:36:17,174 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [946640888] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:17,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1804067923] [2021-12-06 23:36:17,174 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-06 23:36:17,174 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:17,174 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:17,175 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:17,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2021-12-06 23:36:17,246 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-06 23:36:17,246 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:17,248 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 59 conjunts are in the unsatisfiable core [2021-12-06 23:36:17,250 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:17,279 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:36:17,279 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:36:17,304 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:17,337 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:17,372 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:17,404 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:17,439 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2021-12-06 23:36:17,803 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:17,803 INFO L173 IndexEqualityManager]: detected equality via solver [2021-12-06 23:36:17,803 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:17,804 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:17,805 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2021-12-06 23:36:18,094 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-06 23:36:18,094 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2021-12-06 23:36:18,113 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:36:18,114 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:41,256 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 23 proven. 67 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:36:41,256 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1804067923] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:41,256 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:41,256 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 22, 22] total 56 [2021-12-06 23:36:41,256 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830121595] [2021-12-06 23:36:41,257 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:41,302 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:41,302 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2021-12-06 23:36:41,303 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=3061, Unknown=3, NotChecked=0, Total=3306 [2021-12-06 23:36:41,303 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. cyclomatic complexity: 7 Second operand has 58 states, 57 states have (on average 1.7719298245614035) internal successors, (101), 57 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:43,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:43,864 INFO L93 Difference]: Finished difference Result 59 states and 66 transitions. [2021-12-06 23:36:43,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2021-12-06 23:36:43,865 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 66 transitions. [2021-12-06 23:36:43,865 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2021-12-06 23:36:43,866 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 59 states and 66 transitions. [2021-12-06 23:36:43,866 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2021-12-06 23:36:43,866 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2021-12-06 23:36:43,866 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 66 transitions. [2021-12-06 23:36:43,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:43,866 INFO L681 BuchiCegarLoop]: Abstraction has 59 states and 66 transitions. [2021-12-06 23:36:43,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 66 transitions. [2021-12-06 23:36:43,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 50. [2021-12-06 23:36:43,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.1) internal successors, (55), 49 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:43,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 55 transitions. [2021-12-06 23:36:43,868 INFO L704 BuchiCegarLoop]: Abstraction has 50 states and 55 transitions. [2021-12-06 23:36:43,868 INFO L587 BuchiCegarLoop]: Abstraction has 50 states and 55 transitions. [2021-12-06 23:36:43,868 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-12-06 23:36:43,868 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 55 transitions. [2021-12-06 23:36:43,868 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:36:43,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:43,868 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:43,869 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:43,869 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:36:43,869 INFO L791 eck$LassoCheckResult]: Stem: 2967#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2968#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2969#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2970#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2971#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2972#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3000#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2998#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2996#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2994#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2993#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2988#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2987#L44-3 assume !(main_~i~1#1 >= 0); 2973#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2974#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3010#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3009#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3008#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3007#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3006#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3005#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3004#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3003#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3002#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3001#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2999#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2997#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2995#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2985#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2965#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2966#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2986#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3012#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2982#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2983#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2984#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3014#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3013#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2992#L32-4 [2021-12-06 23:36:43,869 INFO L793 eck$LassoCheckResult]: Loop: 2992#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2991#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2989#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2990#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2992#L32-4 [2021-12-06 23:36:43,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:43,869 INFO L85 PathProgramCache]: Analyzing trace with hash -1924676157, now seen corresponding path program 3 times [2021-12-06 23:36:43,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:43,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011536277] [2021-12-06 23:36:43,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:43,870 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:43,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:43,915 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2021-12-06 23:36:43,915 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:43,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011536277] [2021-12-06 23:36:43,915 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011536277] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:43,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1392981767] [2021-12-06 23:36:43,915 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 23:36:43,915 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:43,916 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:43,916 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:43,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-12-06 23:36:43,968 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-12-06 23:36:43,968 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:43,969 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 7 conjunts are in the unsatisfiable core [2021-12-06 23:36:43,970 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:44,092 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2021-12-06 23:36:44,092 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:44,148 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2021-12-06 23:36:44,148 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1392981767] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:44,148 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:44,148 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2021-12-06 23:36:44,148 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601273144] [2021-12-06 23:36:44,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:44,148 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:36:44,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:44,149 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2021-12-06 23:36:44,149 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:44,149 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815255452] [2021-12-06 23:36:44,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:44,149 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:44,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,152 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:44,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,155 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:44,218 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:44,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-12-06 23:36:44,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2021-12-06 23:36:44,219 INFO L87 Difference]: Start difference. First operand 50 states and 55 transitions. cyclomatic complexity: 8 Second operand has 14 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 13 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:44,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:44,315 INFO L93 Difference]: Finished difference Result 56 states and 62 transitions. [2021-12-06 23:36:44,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-06 23:36:44,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 62 transitions. [2021-12-06 23:36:44,316 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2021-12-06 23:36:44,316 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 56 states and 62 transitions. [2021-12-06 23:36:44,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2021-12-06 23:36:44,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2021-12-06 23:36:44,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 62 transitions. [2021-12-06 23:36:44,317 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:44,317 INFO L681 BuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2021-12-06 23:36:44,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 62 transitions. [2021-12-06 23:36:44,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 50. [2021-12-06 23:36:44,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.08) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:44,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2021-12-06 23:36:44,319 INFO L704 BuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2021-12-06 23:36:44,319 INFO L587 BuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2021-12-06 23:36:44,319 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-12-06 23:36:44,319 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 54 transitions. [2021-12-06 23:36:44,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-06 23:36:44,319 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:44,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:44,320 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:44,320 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 23:36:44,320 INFO L791 eck$LassoCheckResult]: Stem: 3330#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3331#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3332#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3333#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3334#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3335#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3362#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3360#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3358#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3356#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3355#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3352#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3351#L44-3 assume !(main_~i~1#1 >= 0); 3336#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3337#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3373#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3372#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3371#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3370#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3369#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3368#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3367#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3366#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3365#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3364#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3363#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3361#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3359#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3357#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3328#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3329#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3350#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3377#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3345#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3346#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3375#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3376#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3347#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3342#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3343#L32-2 [2021-12-06 23:36:44,320 INFO L793 eck$LassoCheckResult]: Loop: 3343#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3354#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3374#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3343#L32-2 [2021-12-06 23:36:44,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:44,320 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2021-12-06 23:36:44,320 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:44,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779344308] [2021-12-06 23:36:44,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:44,321 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:44,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,333 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:44,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,346 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:44,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:44,346 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 8 times [2021-12-06 23:36:44,346 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:44,347 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619658609] [2021-12-06 23:36:44,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:44,347 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:44,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,349 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:44,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:44,351 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:44,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:44,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1959183210, now seen corresponding path program 5 times [2021-12-06 23:36:44,351 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:44,351 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312468254] [2021-12-06 23:36:44,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:44,351 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:44,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:44,408 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2021-12-06 23:36:44,408 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:44,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312468254] [2021-12-06 23:36:44,409 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [312468254] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:44,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [529990117] [2021-12-06 23:36:44,409 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-06 23:36:44,409 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:44,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:44,410 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:44,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-12-06 23:36:44,480 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2021-12-06 23:36:44,480 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:44,481 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 10 conjunts are in the unsatisfiable core [2021-12-06 23:36:44,482 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:44,639 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 57 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2021-12-06 23:36:44,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:44,736 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 31 proven. 45 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2021-12-06 23:36:44,736 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [529990117] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:44,736 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:44,736 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 9] total 19 [2021-12-06 23:36:44,736 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285976739] [2021-12-06 23:36:44,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:44,781 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:44,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2021-12-06 23:36:44,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=296, Unknown=0, NotChecked=0, Total=380 [2021-12-06 23:36:44,782 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. cyclomatic complexity: 7 Second operand has 20 states, 20 states have (on average 3.5) internal successors, (70), 19 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:45,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:45,020 INFO L93 Difference]: Finished difference Result 113 states and 131 transitions. [2021-12-06 23:36:45,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-12-06 23:36:45,021 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 131 transitions. [2021-12-06 23:36:45,022 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 67 [2021-12-06 23:36:45,023 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 113 states and 131 transitions. [2021-12-06 23:36:45,023 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 103 [2021-12-06 23:36:45,023 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 103 [2021-12-06 23:36:45,024 INFO L73 IsDeterministic]: Start isDeterministic. Operand 113 states and 131 transitions. [2021-12-06 23:36:45,024 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:45,024 INFO L681 BuchiCegarLoop]: Abstraction has 113 states and 131 transitions. [2021-12-06 23:36:45,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states and 131 transitions. [2021-12-06 23:36:45,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 57. [2021-12-06 23:36:45,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 1.1403508771929824) internal successors, (65), 56 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:45,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 65 transitions. [2021-12-06 23:36:45,026 INFO L704 BuchiCegarLoop]: Abstraction has 57 states and 65 transitions. [2021-12-06 23:36:45,026 INFO L587 BuchiCegarLoop]: Abstraction has 57 states and 65 transitions. [2021-12-06 23:36:45,026 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-12-06 23:36:45,026 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 65 transitions. [2021-12-06 23:36:45,027 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2021-12-06 23:36:45,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:45,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:45,027 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:45,027 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [3, 3, 3, 1, 1, 1, 1] [2021-12-06 23:36:45,028 INFO L791 eck$LassoCheckResult]: Stem: 3798#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3799#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3800#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3801#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3802#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3803#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3817#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3825#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3824#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3823#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3822#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3821#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3820#L44-3 assume !(main_~i~1#1 >= 0); 3804#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3805#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3842#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3841#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3840#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3839#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3838#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3837#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3836#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3835#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3834#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3833#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3832#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3831#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3830#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3818#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3796#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3797#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3819#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3847#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3843#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3844#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3845#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3846#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3815#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3816#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3813#L32-2 [2021-12-06 23:36:45,028 INFO L793 eck$LassoCheckResult]: Loop: 3813#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3814#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3829#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3828#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3826#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3827#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3810#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3811#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3848#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3852#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3851#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3850#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3813#L32-2 [2021-12-06 23:36:45,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,028 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 5 times [2021-12-06 23:36:45,028 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,028 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533132404] [2021-12-06 23:36:45,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,028 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,041 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:45,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,054 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:45,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,054 INFO L85 PathProgramCache]: Analyzing trace with hash 1952620257, now seen corresponding path program 1 times [2021-12-06 23:36:45,054 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,054 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931157238] [2021-12-06 23:36:45,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,054 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,059 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:45,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,064 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:45,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,064 INFO L85 PathProgramCache]: Analyzing trace with hash 2067186242, now seen corresponding path program 6 times [2021-12-06 23:36:45,064 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,065 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060349752] [2021-12-06 23:36:45,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,065 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:45,125 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 15 proven. 103 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:36:45,125 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:45,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060349752] [2021-12-06 23:36:45,126 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1060349752] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:45,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [850923674] [2021-12-06 23:36:45,126 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-06 23:36:45,126 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:45,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:45,127 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:45,136 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-12-06 23:36:45,214 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2021-12-06 23:36:45,214 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:36:45,215 INFO L263 TraceCheckSpWp]: Trace formula consists of 217 conjuncts, 8 conjunts are in the unsatisfiable core [2021-12-06 23:36:45,216 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:45,356 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 63 proven. 55 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:36:45,357 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:36:45,415 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 63 proven. 55 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:36:45,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [850923674] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:36:45,416 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:36:45,416 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2021-12-06 23:36:45,416 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354291805] [2021-12-06 23:36:45,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:36:45,712 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:36:45,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-12-06 23:36:45,712 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2021-12-06 23:36:45,712 INFO L87 Difference]: Start difference. First operand 57 states and 65 transitions. cyclomatic complexity: 11 Second operand has 16 states, 16 states have (on average 3.75) internal successors, (60), 15 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:45,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:36:45,816 INFO L93 Difference]: Finished difference Result 80 states and 89 transitions. [2021-12-06 23:36:45,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-06 23:36:45,816 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 89 transitions. [2021-12-06 23:36:45,817 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 32 [2021-12-06 23:36:45,817 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 80 states and 89 transitions. [2021-12-06 23:36:45,817 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 70 [2021-12-06 23:36:45,817 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 70 [2021-12-06 23:36:45,818 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 89 transitions. [2021-12-06 23:36:45,818 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:36:45,818 INFO L681 BuchiCegarLoop]: Abstraction has 80 states and 89 transitions. [2021-12-06 23:36:45,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 89 transitions. [2021-12-06 23:36:45,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 54. [2021-12-06 23:36:45,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 53 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:36:45,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 60 transitions. [2021-12-06 23:36:45,819 INFO L704 BuchiCegarLoop]: Abstraction has 54 states and 60 transitions. [2021-12-06 23:36:45,819 INFO L587 BuchiCegarLoop]: Abstraction has 54 states and 60 transitions. [2021-12-06 23:36:45,819 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-12-06 23:36:45,820 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 60 transitions. [2021-12-06 23:36:45,820 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:36:45,820 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:36:45,820 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:36:45,820 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:36:45,820 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1, 1, 1] [2021-12-06 23:36:45,821 INFO L791 eck$LassoCheckResult]: Stem: 4278#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4279#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4280#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4281#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4282#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4283#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4296#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4305#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4304#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4303#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4302#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4301#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4300#L44-3 assume !(main_~i~1#1 >= 0); 4284#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4285#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4321#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4320#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4319#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4318#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4317#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4316#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4315#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4314#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4313#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4312#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4311#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4310#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4309#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4308#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4276#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4277#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4299#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4327#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4293#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4294#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4325#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4326#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4295#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4290#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4291#L32-2 [2021-12-06 23:36:45,821 INFO L793 eck$LassoCheckResult]: Loop: 4291#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4322#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4297#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4298#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4306#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4307#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4329#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4323#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4324#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4328#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4291#L32-2 [2021-12-06 23:36:45,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,821 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 6 times [2021-12-06 23:36:45,821 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10060171] [2021-12-06 23:36:45,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,821 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,833 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:45,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,846 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:45,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,847 INFO L85 PathProgramCache]: Analyzing trace with hash 372024041, now seen corresponding path program 2 times [2021-12-06 23:36:45,847 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,847 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715025022] [2021-12-06 23:36:45,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,847 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,851 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:36:45,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:36:45,855 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:36:45,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:36:45,855 INFO L85 PathProgramCache]: Analyzing trace with hash -693820632, now seen corresponding path program 7 times [2021-12-06 23:36:45,855 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:36:45,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224632928] [2021-12-06 23:36:45,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:36:45,855 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:36:45,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:46,617 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2021-12-06 23:36:46,617 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:36:46,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224632928] [2021-12-06 23:36:46,617 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224632928] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:36:46,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2085866310] [2021-12-06 23:36:46,618 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-06 23:36:46,618 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:36:46,618 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:36:46,619 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:36:46,619 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-12-06 23:36:46,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:36:46,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 48 conjunts are in the unsatisfiable core [2021-12-06 23:36:46,697 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:36:46,738 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:36:46,738 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:36:46,768 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:36:46,786 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:36:46,808 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:36:46,826 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:36:46,845 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:36:47,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,074 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2021-12-06 23:36:47,329 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,330 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,331 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,331 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,332 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:36:47,340 INFO L354 Elim1Store]: treesize reduction 29, result has 39.6 percent of original size [2021-12-06 23:36:47,340 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2021-12-06 23:36:47,564 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 16 [2021-12-06 23:36:47,589 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2021-12-06 23:36:47,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:37:08,856 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_582 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_582) |c_~#array~0.base|))) (let ((.cse1 (select .cse0 (+ |c_~#array~0.offset| 12)))) (or (<= (select .cse0 (+ |c_~#array~0.offset| 8)) .cse1) (<= .cse1 (select .cse0 (+ 16 |c_~#array~0.offset|))))))) is different from false [2021-12-06 23:37:08,969 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 50 trivial. 9 not checked. [2021-12-06 23:37:08,969 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2085866310] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:37:08,969 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:37:08,969 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 15, 13] total 47 [2021-12-06 23:37:08,969 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164429036] [2021-12-06 23:37:08,969 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:37:09,209 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:37:09,210 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-06 23:37:09,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=268, Invalid=1991, Unknown=1, NotChecked=92, Total=2352 [2021-12-06 23:37:09,210 INFO L87 Difference]: Start difference. First operand 54 states and 60 transitions. cyclomatic complexity: 9 Second operand has 49 states, 48 states have (on average 1.9791666666666667) internal successors, (95), 48 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:11,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:37:11,236 INFO L93 Difference]: Finished difference Result 127 states and 151 transitions. [2021-12-06 23:37:11,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-12-06 23:37:11,237 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 151 transitions. [2021-12-06 23:37:11,238 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 32 [2021-12-06 23:37:11,239 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 127 states and 151 transitions. [2021-12-06 23:37:11,239 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117 [2021-12-06 23:37:11,239 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117 [2021-12-06 23:37:11,239 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 151 transitions. [2021-12-06 23:37:11,239 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:37:11,239 INFO L681 BuchiCegarLoop]: Abstraction has 127 states and 151 transitions. [2021-12-06 23:37:11,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 151 transitions. [2021-12-06 23:37:11,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 74. [2021-12-06 23:37:11,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.1756756756756757) internal successors, (87), 73 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:11,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 87 transitions. [2021-12-06 23:37:11,241 INFO L704 BuchiCegarLoop]: Abstraction has 74 states and 87 transitions. [2021-12-06 23:37:11,241 INFO L587 BuchiCegarLoop]: Abstraction has 74 states and 87 transitions. [2021-12-06 23:37:11,241 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-12-06 23:37:11,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 87 transitions. [2021-12-06 23:37:11,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:37:11,242 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:37:11,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:37:11,242 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2021-12-06 23:37:11,243 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:37:11,243 INFO L791 eck$LassoCheckResult]: Stem: 4858#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4859#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4860#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4861#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4862#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4863#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4877#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4886#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4885#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4884#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4883#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4882#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4881#L44-3 assume !(main_~i~1#1 >= 0); 4864#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4865#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4902#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4901#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4900#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4899#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4898#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4897#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4896#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4895#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4894#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4893#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4892#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4891#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4890#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4889#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4856#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4857#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4880#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4910#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4906#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4907#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4908#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4909#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4875#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4876#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4922#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4921#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4920#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4919#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4918#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 4872#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 4869#L49-3 [2021-12-06 23:37:11,243 INFO L793 eck$LassoCheckResult]: Loop: 4869#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4866#L15 assume !(0 == __VERIFIER_assert_~cond#1); 4867#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 4868#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 4869#L49-3 [2021-12-06 23:37:11,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:37:11,243 INFO L85 PathProgramCache]: Analyzing trace with hash 1714859028, now seen corresponding path program 1 times [2021-12-06 23:37:11,243 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:37:11,243 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493066966] [2021-12-06 23:37:11,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:11,244 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:37:11,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:37:11,280 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:37:11,280 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:37:11,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493066966] [2021-12-06 23:37:11,280 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1493066966] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:37:11,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1065560089] [2021-12-06 23:37:11,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:11,281 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:37:11,281 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:37:11,281 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:37:11,282 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-12-06 23:37:11,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:37:11,340 INFO L263 TraceCheckSpWp]: Trace formula consists of 258 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 23:37:11,341 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:37:11,436 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:37:11,436 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:37:11,494 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2021-12-06 23:37:11,495 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1065560089] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:37:11,495 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:37:11,495 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2021-12-06 23:37:11,495 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406166829] [2021-12-06 23:37:11,495 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:37:11,495 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:37:11,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:37:11,495 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 1 times [2021-12-06 23:37:11,495 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:37:11,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018839591] [2021-12-06 23:37:11,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:11,496 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:37:11,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:37:11,499 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:37:11,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:37:11,501 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:37:11,557 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:37:11,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-12-06 23:37:11,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2021-12-06 23:37:11,557 INFO L87 Difference]: Start difference. First operand 74 states and 87 transitions. cyclomatic complexity: 16 Second operand has 12 states, 12 states have (on average 4.916666666666667) internal successors, (59), 11 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:11,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:37:11,601 INFO L93 Difference]: Finished difference Result 82 states and 95 transitions. [2021-12-06 23:37:11,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-12-06 23:37:11,602 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 95 transitions. [2021-12-06 23:37:11,602 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:37:11,603 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 82 states and 95 transitions. [2021-12-06 23:37:11,603 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72 [2021-12-06 23:37:11,603 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2021-12-06 23:37:11,603 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 95 transitions. [2021-12-06 23:37:11,603 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:37:11,603 INFO L681 BuchiCegarLoop]: Abstraction has 82 states and 95 transitions. [2021-12-06 23:37:11,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 95 transitions. [2021-12-06 23:37:11,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2021-12-06 23:37:11,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.1585365853658536) internal successors, (95), 81 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:11,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 95 transitions. [2021-12-06 23:37:11,605 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 95 transitions. [2021-12-06 23:37:11,605 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 95 transitions. [2021-12-06 23:37:11,605 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-12-06 23:37:11,605 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 95 transitions. [2021-12-06 23:37:11,605 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:37:11,606 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:37:11,606 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:37:11,606 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2021-12-06 23:37:11,606 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:37:11,606 INFO L791 eck$LassoCheckResult]: Stem: 5297#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5298#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5299#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5300#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5301#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5302#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5329#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5328#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5327#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5325#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5323#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5319#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5318#L44-3 assume !(main_~i~1#1 >= 0); 5303#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5304#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5317#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5370#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5312#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5313#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5314#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5369#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5368#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5367#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5366#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5365#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5364#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5362#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5339#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5340#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5295#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5296#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5359#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5358#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5357#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5356#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5355#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5354#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5353#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5352#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5351#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5350#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5315#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5316#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5348#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5349#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5344#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5343#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5341#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5342#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5334#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5333#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5332#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5321#L32-3 [2021-12-06 23:37:11,606 INFO L793 eck$LassoCheckResult]: Loop: 5321#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5324#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5322#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5320#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5321#L32-3 [2021-12-06 23:37:11,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:37:11,607 INFO L85 PathProgramCache]: Analyzing trace with hash 1550869743, now seen corresponding path program 7 times [2021-12-06 23:37:11,607 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:37:11,607 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051007962] [2021-12-06 23:37:11,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:11,607 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:37:11,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:37:11,649 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2021-12-06 23:37:11,649 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:37:11,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051007962] [2021-12-06 23:37:11,649 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051007962] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:37:11,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2041757764] [2021-12-06 23:37:11,649 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-06 23:37:11,649 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:37:11,649 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:37:11,650 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:37:11,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-12-06 23:37:11,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:37:11,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 304 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 23:37:11,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:37:11,828 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2021-12-06 23:37:11,828 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:37:11,888 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2021-12-06 23:37:11,889 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2041757764] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:37:11,889 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:37:11,889 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2021-12-06 23:37:11,889 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343780711] [2021-12-06 23:37:11,889 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:37:11,889 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:37:11,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:37:11,889 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2021-12-06 23:37:11,889 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:37:11,889 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224331537] [2021-12-06 23:37:11,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:11,890 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:37:11,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:37:11,892 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:37:11,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:37:11,894 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:37:11,959 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:37:11,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-12-06 23:37:11,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2021-12-06 23:37:11,959 INFO L87 Difference]: Start difference. First operand 82 states and 95 transitions. cyclomatic complexity: 16 Second operand has 14 states, 14 states have (on average 4.142857142857143) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:12,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:37:12,052 INFO L93 Difference]: Finished difference Result 82 states and 92 transitions. [2021-12-06 23:37:12,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-12-06 23:37:12,053 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 92 transitions. [2021-12-06 23:37:12,053 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:37:12,054 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 82 states and 92 transitions. [2021-12-06 23:37:12,054 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72 [2021-12-06 23:37:12,054 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2021-12-06 23:37:12,054 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 92 transitions. [2021-12-06 23:37:12,054 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:37:12,054 INFO L681 BuchiCegarLoop]: Abstraction has 82 states and 92 transitions. [2021-12-06 23:37:12,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 92 transitions. [2021-12-06 23:37:12,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2021-12-06 23:37:12,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.1219512195121952) internal successors, (92), 81 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:37:12,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 92 transitions. [2021-12-06 23:37:12,056 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 92 transitions. [2021-12-06 23:37:12,056 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 92 transitions. [2021-12-06 23:37:12,056 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-12-06 23:37:12,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 92 transitions. [2021-12-06 23:37:12,056 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:37:12,056 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:37:12,056 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:37:12,057 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 9, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1] [2021-12-06 23:37:12,057 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:37:12,057 INFO L791 eck$LassoCheckResult]: Stem: 5802#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5803#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5804#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5805#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5806#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5807#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5832#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5831#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5830#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5828#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5826#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5822#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5821#L44-3 assume !(main_~i~1#1 >= 0); 5808#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5809#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5818#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5814#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5815#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5817#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5880#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5878#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5876#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5874#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5872#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5870#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5868#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5845#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5846#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5865#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5800#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5801#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5881#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5879#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5877#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5875#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5873#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5871#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5869#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5867#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5866#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5842#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5819#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5820#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5864#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5863#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5862#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5861#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5860#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5859#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5858#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5857#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5856#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5855#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5854#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5850#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5851#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5843#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5844#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5837#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5836#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5835#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5824#L32-3 [2021-12-06 23:37:12,057 INFO L793 eck$LassoCheckResult]: Loop: 5824#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5827#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5825#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5823#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5824#L32-3 [2021-12-06 23:37:12,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:37:12,057 INFO L85 PathProgramCache]: Analyzing trace with hash 615985381, now seen corresponding path program 8 times [2021-12-06 23:37:12,058 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:37:12,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253041659] [2021-12-06 23:37:12,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:37:12,058 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:37:12,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:37:12,917 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 32 proven. 153 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2021-12-06 23:37:12,918 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:37:12,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253041659] [2021-12-06 23:37:12,918 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [253041659] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:37:12,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1694282624] [2021-12-06 23:37:12,918 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 23:37:12,918 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:37:12,918 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:37:12,919 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:37:12,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-12-06 23:37:12,993 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-06 23:37:12,993 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:37:12,995 INFO L263 TraceCheckSpWp]: Trace formula consists of 348 conjuncts, 46 conjunts are in the unsatisfiable core [2021-12-06 23:37:12,998 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:37:13,016 INFO L354 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2021-12-06 23:37:13,016 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2021-12-06 23:37:13,047 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:37:13,063 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:37:13,083 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:37:13,097 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:37:13,118 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2021-12-06 23:37:13,336 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,337 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,337 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,338 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2021-12-06 23:37:13,498 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,499 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,500 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,500 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,501 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,508 INFO L354 Elim1Store]: treesize reduction 29, result has 39.6 percent of original size [2021-12-06 23:37:13,508 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2021-12-06 23:37:13,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-06 23:37:13,670 INFO L354 Elim1Store]: treesize reduction 29, result has 39.6 percent of original size [2021-12-06 23:37:13,671 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2021-12-06 23:37:13,814 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 32 proven. 141 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2021-12-06 23:37:13,814 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:38:26,399 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_728 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_728) |c_~#array~0.base|))) (<= (select .cse0 (+ |c_~#array~0.offset| 12)) (select .cse0 (+ 16 |c_~#array~0.offset|))))) is different from false [2021-12-06 23:38:26,462 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 32 proven. 132 refuted. 0 times theorem prover too weak. 55 trivial. 9 not checked. [2021-12-06 23:38:26,462 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1694282624] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:38:26,462 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:38:26,462 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 13, 13] total 44 [2021-12-06 23:38:26,462 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258419462] [2021-12-06 23:38:26,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:38:26,463 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 23:38:26,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:26,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2021-12-06 23:38:26,463 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:26,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891611688] [2021-12-06 23:38:26,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:26,463 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:26,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:26,467 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:26,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:26,469 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:26,538 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:38:26,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2021-12-06 23:38:26,539 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=1660, Unknown=1, NotChecked=84, Total=1980 [2021-12-06 23:38:26,539 INFO L87 Difference]: Start difference. First operand 82 states and 92 transitions. cyclomatic complexity: 13 Second operand has 45 states, 45 states have (on average 2.3555555555555556) internal successors, (106), 44 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:27,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:38:27,290 INFO L93 Difference]: Finished difference Result 82 states and 90 transitions. [2021-12-06 23:38:27,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-12-06 23:38:27,290 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 90 transitions. [2021-12-06 23:38:27,291 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2021-12-06 23:38:27,291 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 82 states and 90 transitions. [2021-12-06 23:38:27,291 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72 [2021-12-06 23:38:27,292 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2021-12-06 23:38:27,292 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 90 transitions. [2021-12-06 23:38:27,292 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:38:27,292 INFO L681 BuchiCegarLoop]: Abstraction has 82 states and 90 transitions. [2021-12-06 23:38:27,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 90 transitions. [2021-12-06 23:38:27,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 79. [2021-12-06 23:38:27,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 79 states have (on average 1.1012658227848102) internal successors, (87), 78 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:27,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 87 transitions. [2021-12-06 23:38:27,293 INFO L704 BuchiCegarLoop]: Abstraction has 79 states and 87 transitions. [2021-12-06 23:38:27,293 INFO L587 BuchiCegarLoop]: Abstraction has 79 states and 87 transitions. [2021-12-06 23:38:27,293 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-12-06 23:38:27,293 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 79 states and 87 transitions. [2021-12-06 23:38:27,294 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:38:27,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:38:27,294 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:38:27,294 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2021-12-06 23:38:27,294 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:38:27,294 INFO L791 eck$LassoCheckResult]: Stem: 6408#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 6409#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6410#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6411#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6412#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6413#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6440#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6439#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6438#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6436#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6434#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6430#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6429#L44-3 assume !(main_~i~1#1 >= 0); 6414#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 6415#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6425#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6426#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6423#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6424#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6481#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6479#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6477#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6475#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6473#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6471#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6469#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6467#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6448#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6449#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6406#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6407#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6482#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6480#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6478#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6476#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6474#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6472#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6470#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6468#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6466#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6465#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6427#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6428#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6464#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6463#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6462#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6461#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6460#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6459#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6458#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6457#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6456#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6455#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6454#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6453#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6452#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6446#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6447#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6444#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6443#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6442#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6432#L32-3 [2021-12-06 23:38:27,294 INFO L793 eck$LassoCheckResult]: Loop: 6432#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6435#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6433#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6431#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6432#L32-3 [2021-12-06 23:38:27,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,295 INFO L85 PathProgramCache]: Analyzing trace with hash 673243683, now seen corresponding path program 8 times [2021-12-06 23:38:27,295 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,295 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146755378] [2021-12-06 23:38:27,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,295 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,312 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:27,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,330 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:27,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,331 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 9 times [2021-12-06 23:38:27,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322186225] [2021-12-06 23:38:27,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,331 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,334 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:27,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,336 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:27,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1965333829, now seen corresponding path program 9 times [2021-12-06 23:38:27,337 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260874616] [2021-12-06 23:38:27,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,337 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:38:27,396 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 79 proven. 111 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2021-12-06 23:38:27,397 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:38:27,397 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260874616] [2021-12-06 23:38:27,397 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1260874616] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:38:27,397 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1671674704] [2021-12-06 23:38:27,397 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 23:38:27,397 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:38:27,397 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:27,398 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:38:27,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-12-06 23:38:27,462 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-12-06 23:38:27,462 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:38:27,463 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 4 conjunts are in the unsatisfiable core [2021-12-06 23:38:27,463 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:38:27,513 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 228 trivial. 0 not checked. [2021-12-06 23:38:27,513 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 23:38:27,513 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1671674704] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 23:38:27,513 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 23:38:27,514 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 9 [2021-12-06 23:38:27,514 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419093675] [2021-12-06 23:38:27,514 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 23:38:27,577 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:38:27,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 23:38:27,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-12-06 23:38:27,578 INFO L87 Difference]: Start difference. First operand 79 states and 87 transitions. cyclomatic complexity: 11 Second operand has 5 states, 4 states have (on average 4.5) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:27,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:38:27,605 INFO L93 Difference]: Finished difference Result 87 states and 95 transitions. [2021-12-06 23:38:27,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 23:38:27,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 95 transitions. [2021-12-06 23:38:27,606 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 18 [2021-12-06 23:38:27,607 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 87 states and 95 transitions. [2021-12-06 23:38:27,607 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2021-12-06 23:38:27,607 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2021-12-06 23:38:27,607 INFO L73 IsDeterministic]: Start isDeterministic. Operand 87 states and 95 transitions. [2021-12-06 23:38:27,607 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:38:27,607 INFO L681 BuchiCegarLoop]: Abstraction has 87 states and 95 transitions. [2021-12-06 23:38:27,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states and 95 transitions. [2021-12-06 23:38:27,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 82. [2021-12-06 23:38:27,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.0975609756097562) internal successors, (90), 81 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:27,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 90 transitions. [2021-12-06 23:38:27,610 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 90 transitions. [2021-12-06 23:38:27,610 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 90 transitions. [2021-12-06 23:38:27,610 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-12-06 23:38:27,610 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 90 transitions. [2021-12-06 23:38:27,610 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-06 23:38:27,610 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:38:27,610 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:38:27,611 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2021-12-06 23:38:27,611 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-12-06 23:38:27,611 INFO L791 eck$LassoCheckResult]: Stem: 6786#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 6787#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6788#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6789#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6790#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6791#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6810#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6809#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6808#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6807#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6806#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6805#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6804#L44-3 assume !(main_~i~1#1 >= 0); 6792#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 6793#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6802#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6798#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6799#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6801#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6864#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6862#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6860#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6858#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6856#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6854#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6852#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6850#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6846#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6803#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6784#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6785#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6865#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6863#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6861#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6859#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6857#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6855#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6853#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6851#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6849#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6848#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6847#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6845#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6844#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6843#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6842#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6841#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6840#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6839#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6838#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6837#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6836#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6835#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6834#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6833#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6832#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6828#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6829#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6823#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6820#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6818#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6819#L32-3 [2021-12-06 23:38:27,611 INFO L793 eck$LassoCheckResult]: Loop: 6819#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6824#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6816#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6817#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6814#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6812#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6813#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6819#L32-3 [2021-12-06 23:38:27,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,612 INFO L85 PathProgramCache]: Analyzing trace with hash 673243683, now seen corresponding path program 10 times [2021-12-06 23:38:27,612 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521611588] [2021-12-06 23:38:27,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,612 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,638 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:27,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,657 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:27,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1117131131, now seen corresponding path program 3 times [2021-12-06 23:38:27,657 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,657 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834130191] [2021-12-06 23:38:27,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,661 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:27,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:27,664 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:27,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:27,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1274733849, now seen corresponding path program 9 times [2021-12-06 23:38:27,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:27,664 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401365790] [2021-12-06 23:38:27,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:27,664 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:27,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:38:27,724 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 108 proven. 117 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2021-12-06 23:38:27,724 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 23:38:27,724 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401365790] [2021-12-06 23:38:27,725 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [401365790] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 23:38:27,725 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1144069342] [2021-12-06 23:38:27,725 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-06 23:38:27,725 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 23:38:27,725 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:27,726 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 23:38:27,727 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-12-06 23:38:27,823 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-12-06 23:38:27,823 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 23:38:27,824 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 23:38:27,825 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:38:27,897 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 107 proven. 7 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2021-12-06 23:38:27,897 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 23:38:27,944 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 107 proven. 7 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2021-12-06 23:38:27,944 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1144069342] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 23:38:27,944 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 23:38:27,944 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 12 [2021-12-06 23:38:27,945 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558625404] [2021-12-06 23:38:27,945 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 23:38:28,096 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 23:38:28,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-12-06 23:38:28,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2021-12-06 23:38:28,097 INFO L87 Difference]: Start difference. First operand 82 states and 90 transitions. cyclomatic complexity: 11 Second operand has 12 states, 12 states have (on average 5.666666666666667) internal successors, (68), 12 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:28,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 23:38:28,257 INFO L93 Difference]: Finished difference Result 73 states and 76 transitions. [2021-12-06 23:38:28,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-12-06 23:38:28,258 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 76 transitions. [2021-12-06 23:38:28,259 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 23:38:28,259 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 73 states and 76 transitions. [2021-12-06 23:38:28,260 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2021-12-06 23:38:28,260 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2021-12-06 23:38:28,260 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 76 transitions. [2021-12-06 23:38:28,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:38:28,260 INFO L681 BuchiCegarLoop]: Abstraction has 73 states and 76 transitions. [2021-12-06 23:38:28,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 76 transitions. [2021-12-06 23:38:28,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2021-12-06 23:38:28,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.0410958904109588) internal successors, (76), 72 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:28,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 76 transitions. [2021-12-06 23:38:28,262 INFO L704 BuchiCegarLoop]: Abstraction has 73 states and 76 transitions. [2021-12-06 23:38:28,262 INFO L587 BuchiCegarLoop]: Abstraction has 73 states and 76 transitions. [2021-12-06 23:38:28,262 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-12-06 23:38:28,262 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 76 transitions. [2021-12-06 23:38:28,263 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-12-06 23:38:28,263 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 23:38:28,263 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 23:38:28,263 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2021-12-06 23:38:28,264 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-06 23:38:28,264 INFO L791 eck$LassoCheckResult]: Stem: 7396#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 7397#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 7398#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 7399#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7400#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 7401#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7426#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 7424#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7422#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 7420#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7418#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 7415#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 7414#L44-3 assume !(main_~i~1#1 >= 0); 7402#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 7403#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 7412#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7408#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7409#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7411#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7465#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7463#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7461#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7459#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7457#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7455#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7453#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7451#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7447#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 7413#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7394#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 7395#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 7466#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7464#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7462#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7460#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7458#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7456#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7454#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7452#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7450#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7449#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 7448#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7446#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 7445#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 7444#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7443#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7442#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7441#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7440#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7439#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7438#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 7437#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7436#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 7435#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 7434#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7433#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 7429#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 7430#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 7427#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7425#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 7423#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 7421#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 7419#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 7417#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 7416#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 7410#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 7407#L49-3 [2021-12-06 23:38:28,264 INFO L793 eck$LassoCheckResult]: Loop: 7407#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 7404#L15 assume !(0 == __VERIFIER_assert_~cond#1); 7405#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 7406#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 7407#L49-3 [2021-12-06 23:38:28,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:28,264 INFO L85 PathProgramCache]: Analyzing trace with hash -795806568, now seen corresponding path program 2 times [2021-12-06 23:38:28,264 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:28,264 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634898387] [2021-12-06 23:38:28,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:28,265 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:28,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,289 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:28,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,317 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:28,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:28,318 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 2 times [2021-12-06 23:38:28,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:28,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347743129] [2021-12-06 23:38:28,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:28,318 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:28,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,320 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:28,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,322 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:28,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:28,323 INFO L85 PathProgramCache]: Analyzing trace with hash 2138032737, now seen corresponding path program 1 times [2021-12-06 23:38:28,323 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 23:38:28,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442104016] [2021-12-06 23:38:28,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 23:38:28,323 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 23:38:28,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,348 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 23:38:28,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 23:38:28,368 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 23:38:44,440 WARN L227 SmtUtils]: Spent 16.01s on a formula simplification. DAG size of input: 521 DAG size of output: 350 (called from [L 234] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2021-12-06 23:38:45,810 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 23:38:45,810 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 23:38:45,811 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 23:38:45,811 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 23:38:45,811 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-06 23:38:45,811 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:45,811 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 23:38:45,811 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 23:38:45,811 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration23_Lasso [2021-12-06 23:38:45,811 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 23:38:45,811 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 23:38:45,813 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,816 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,817 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,818 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,819 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,819 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,820 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,821 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,822 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:45,823 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:47,183 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:47,184 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:47,186 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:47,187 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 23:38:47,436 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-06 23:38:47,437 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-06 23:38:47,437 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,438 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2021-12-06 23:38:47,440 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,447 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,447 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,447 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,447 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,447 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,448 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,448 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,449 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,467 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2021-12-06 23:38:47,467 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,467 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,468 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2021-12-06 23:38:47,469 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,475 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,476 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,476 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,476 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,476 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,476 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,476 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,477 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,495 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:47,495 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,496 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,496 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2021-12-06 23:38:47,497 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,504 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,504 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,504 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,504 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,504 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,504 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,504 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,505 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,523 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2021-12-06 23:38:47,523 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,524 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,525 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2021-12-06 23:38:47,525 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,532 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,532 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,532 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,532 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,532 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,533 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,533 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,533 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,554 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:47,554 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,555 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,555 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2021-12-06 23:38:47,556 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,562 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,563 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,563 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,563 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,563 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,563 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,563 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,564 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,582 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:47,582 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,583 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,584 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2021-12-06 23:38:47,584 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,591 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,591 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,591 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,591 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,592 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,592 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,592 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,593 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,610 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2021-12-06 23:38:47,611 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,612 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2021-12-06 23:38:47,612 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,619 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,620 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,620 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,620 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,620 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,620 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,620 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,621 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,640 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:47,640 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,640 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,640 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,642 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2021-12-06 23:38:47,642 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,649 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,650 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,650 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,650 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,651 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:38:47,651 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:38:47,654 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,675 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Ended with exit code 0 [2021-12-06 23:38:47,675 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,675 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,676 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,677 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2021-12-06 23:38:47,677 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,684 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,684 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-06 23:38:47,684 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,684 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,684 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,684 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-06 23:38:47,684 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-06 23:38:47,685 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-06 23:38:47,703 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2021-12-06 23:38:47,703 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,704 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,705 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2021-12-06 23:38:47,705 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-06 23:38:47,712 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-06 23:38:47,712 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-06 23:38:47,712 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-06 23:38:47,712 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-06 23:38:47,715 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-06 23:38:47,715 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-06 23:38:47,724 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-06 23:38:47,741 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2021-12-06 23:38:47,741 INFO L444 ModelExtractionUtils]: 6 out of 22 variables were initially zero. Simplification set additionally 13 variables to zero. [2021-12-06 23:38:47,742 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 23:38:47,742 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 23:38:47,742 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 23:38:47,743 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2021-12-06 23:38:47,744 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-06 23:38:47,752 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-06 23:38:47,752 INFO L513 LassoAnalysis]: Proved termination. [2021-12-06 23:38:47,752 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 9 Supporting invariants [] [2021-12-06 23:38:47,771 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:47,927 INFO L297 tatePredicateManager]: 45 out of 45 supporting invariants were superfluous and have been removed [2021-12-06 23:38:47,927 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2021-12-06 23:38:47,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 23:38:47,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:38:47,965 INFO L263 TraceCheckSpWp]: Trace formula consists of 366 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 23:38:47,966 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:38:48,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 23:38:48,032 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 4 conjunts are in the unsatisfiable core [2021-12-06 23:38:48,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 23:38:48,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 23:38:48,044 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-06 23:38:48,044 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 73 states and 76 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:48,050 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 73 states and 76 transitions. cyclomatic complexity: 5. Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 77 states and 81 transitions. Complement of second has 4 states. [2021-12-06 23:38:48,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-12-06 23:38:48,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 23:38:48,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 20 transitions. [2021-12-06 23:38:48,051 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 20 transitions. Stem has 66 letters. Loop has 4 letters. [2021-12-06 23:38:48,052 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:38:48,052 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 20 transitions. Stem has 70 letters. Loop has 4 letters. [2021-12-06 23:38:48,052 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:38:48,052 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 20 transitions. Stem has 66 letters. Loop has 8 letters. [2021-12-06 23:38:48,053 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-06 23:38:48,053 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 81 transitions. [2021-12-06 23:38:48,053 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2021-12-06 23:38:48,053 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 0 states and 0 transitions. [2021-12-06 23:38:48,053 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2021-12-06 23:38:48,053 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2021-12-06 23:38:48,053 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2021-12-06 23:38:48,054 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 23:38:48,054 INFO L681 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 23:38:48,054 INFO L704 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 23:38:48,054 INFO L587 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 23:38:48,054 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-12-06 23:38:48,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2021-12-06 23:38:48,054 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2021-12-06 23:38:48,054 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2021-12-06 23:38:48,058 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.12 11:38:48 BoogieIcfgContainer [2021-12-06 23:38:48,058 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-12-06 23:38:48,058 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-06 23:38:48,058 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-06 23:38:48,059 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-06 23:38:48,059 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 11:35:30" (3/4) ... [2021-12-06 23:38:48,061 INFO L140 WitnessPrinter]: No result that supports witness generation found [2021-12-06 23:38:48,061 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-06 23:38:48,061 INFO L158 Benchmark]: Toolchain (without parser) took 198427.87ms. Allocated memory was 90.2MB in the beginning and 161.5MB in the end (delta: 71.3MB). Free memory was 67.1MB in the beginning and 90.8MB in the end (delta: -23.7MB). Peak memory consumption was 48.6MB. Max. memory is 16.1GB. [2021-12-06 23:38:48,061 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 73.4MB. Free memory is still 43.6MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 23:38:48,061 INFO L158 Benchmark]: CACSL2BoogieTranslator took 182.51ms. Allocated memory is still 90.2MB. Free memory was 66.8MB in the beginning and 56.8MB in the end (delta: 10.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2021-12-06 23:38:48,062 INFO L158 Benchmark]: Boogie Procedure Inliner took 35.46ms. Allocated memory is still 90.2MB. Free memory was 56.8MB in the beginning and 55.2MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-12-06 23:38:48,062 INFO L158 Benchmark]: Boogie Preprocessor took 24.52ms. Allocated memory is still 90.2MB. Free memory was 55.2MB in the beginning and 53.8MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 23:38:48,062 INFO L158 Benchmark]: RCFGBuilder took 201.13ms. Allocated memory is still 90.2MB. Free memory was 53.8MB in the beginning and 43.4MB in the end (delta: 10.4MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2021-12-06 23:38:48,062 INFO L158 Benchmark]: BuchiAutomizer took 197977.56ms. Allocated memory was 90.2MB in the beginning and 161.5MB in the end (delta: 71.3MB). Free memory was 43.2MB in the beginning and 91.9MB in the end (delta: -48.6MB). Peak memory consumption was 25.5MB. Max. memory is 16.1GB. [2021-12-06 23:38:48,062 INFO L158 Benchmark]: Witness Printer took 2.39ms. Allocated memory is still 161.5MB. Free memory was 91.9MB in the beginning and 90.8MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 23:38:48,064 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 73.4MB. Free memory is still 43.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 182.51ms. Allocated memory is still 90.2MB. Free memory was 66.8MB in the beginning and 56.8MB in the end (delta: 10.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 35.46ms. Allocated memory is still 90.2MB. Free memory was 56.8MB in the beginning and 55.2MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 24.52ms. Allocated memory is still 90.2MB. Free memory was 55.2MB in the beginning and 53.8MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 201.13ms. Allocated memory is still 90.2MB. Free memory was 53.8MB in the beginning and 43.4MB in the end (delta: 10.4MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * BuchiAutomizer took 197977.56ms. Allocated memory was 90.2MB in the beginning and 161.5MB in the end (delta: 71.3MB). Free memory was 43.2MB in the beginning and 91.9MB in the end (delta: -48.6MB). Peak memory consumption was 25.5MB. Max. memory is 16.1GB. * Witness Printer took 2.39ms. Allocated memory is still 161.5MB. Free memory was 91.9MB in the beginning and 90.8MB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 23 terminating modules (21 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function unknown-#length-unknown[array] + 8 * i and consists of 5 locations. One deterministic module has affine ranking function 9 + -2 * i and consists of 3 locations. 21 modules have a trivial ranking function, the largest among these consists of 58 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 197.9s and 24 iterations. TraceHistogramMax:10. Analysis of lassos took 188.6s. Construction of modules took 2.0s. Büchi inclusion checks took 6.9s. Highest rank in rank-based complementation 3. Minimization of det autom 23. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 22 MinimizatonAttempts, 223 StatesRemovedByMinimization, 17 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 82 states and ocurred in iteration 18. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 2004 SdHoareTripleChecker+Valid, 2.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 2002 mSDsluCounter, 2295 SdHoareTripleChecker+Invalid, 2.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 764 IncrementalHoareTripleChecker+Unchecked, 1933 mSDsCounter, 887 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3397 IncrementalHoareTripleChecker+Invalid, 5048 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 887 mSolverCounterUnsat, 362 mSDtfsCounter, 3397 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc11 concLT0 SILN0 SILU10 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital1980 mio100 ax100 hnf100 lsp97 ukn44 mio100 lsp36 div100 bol100 ite100 ukn100 eq166 hnf92 smp90 dnf100 smp100 tf100 neg100 sie101 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 19ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2021-12-06 23:38:48,089 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2021-12-06 23:38:48,301 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Ended with exit code 0 [2021-12-06 23:38:48,489 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:48,692 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2021-12-06 23:38:48,895 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:49,124 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2021-12-06 23:38:49,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:49,524 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Ended with exit code 0 [2021-12-06 23:38:49,700 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:49,899 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2021-12-06 23:38:50,125 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2021-12-06 23:38:50,300 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2021-12-06 23:38:50,500 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2021-12-06 23:38:50,726 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2021-12-06 23:38:50,900 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2021-12-06 23:38:51,101 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2021-12-06 23:38:51,302 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2021-12-06 23:38:51,503 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2021-12-06 23:38:51,799 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_82cd24ce-79bf-40ed-b679-c52c910aa30f/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE