./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 20:24:24,431 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 20:24:24,432 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 20:24:24,454 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 20:24:24,455 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 20:24:24,456 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 20:24:24,457 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 20:24:24,459 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 20:24:24,460 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 20:24:24,461 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 20:24:24,462 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 20:24:24,463 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 20:24:24,464 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 20:24:24,465 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 20:24:24,466 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 20:24:24,467 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 20:24:24,468 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 20:24:24,469 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 20:24:24,471 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 20:24:24,472 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 20:24:24,474 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 20:24:24,476 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 20:24:24,477 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 20:24:24,478 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 20:24:24,482 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 20:24:24,483 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 20:24:24,483 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 20:24:24,484 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 20:24:24,485 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 20:24:24,486 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 20:24:24,486 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 20:24:24,487 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 20:24:24,487 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 20:24:24,488 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 20:24:24,489 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 20:24:24,490 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 20:24:24,490 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 20:24:24,490 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 20:24:24,490 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 20:24:24,491 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 20:24:24,492 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 20:24:24,492 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-12-06 20:24:24,517 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 20:24:24,518 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 20:24:24,518 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 20:24:24,518 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 20:24:24,519 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 20:24:24,519 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 20:24:24,520 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 20:24:24,520 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 20:24:24,521 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 20:24:24,521 INFO L138 SettingsManager]: * sizeof long=4 [2021-12-06 20:24:24,521 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 20:24:24,521 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 20:24:24,521 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-12-06 20:24:24,521 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * sizeof long double=12 [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 20:24:24,522 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 20:24:24,523 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 20:24:24,523 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 20:24:24,523 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 20:24:24,523 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 20:24:24,523 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 20:24:24,524 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 20:24:24,525 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 [2021-12-06 20:24:24,713 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 20:24:24,728 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 20:24:24,730 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 20:24:24,731 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 20:24:24,731 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 20:24:24,732 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2021-12-06 20:24:24,775 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/data/8f9fc3d7b/2b9827b946cb44aaabc125457db70c26/FLAG1ef533fe9 [2021-12-06 20:24:25,204 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 20:24:25,205 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2021-12-06 20:24:25,213 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/data/8f9fc3d7b/2b9827b946cb44aaabc125457db70c26/FLAG1ef533fe9 [2021-12-06 20:24:25,549 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/data/8f9fc3d7b/2b9827b946cb44aaabc125457db70c26 [2021-12-06 20:24:25,551 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 20:24:25,552 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 20:24:25,553 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 20:24:25,553 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 20:24:25,555 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 20:24:25,556 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,556 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@43b80ea1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25, skipping insertion in model container [2021-12-06 20:24:25,556 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,563 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 20:24:25,590 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 20:24:25,769 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2021-12-06 20:24:25,771 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 20:24:25,782 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 20:24:25,837 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2021-12-06 20:24:25,838 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 20:24:25,851 INFO L208 MainTranslator]: Completed translation [2021-12-06 20:24:25,851 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25 WrapperNode [2021-12-06 20:24:25,851 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 20:24:25,852 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 20:24:25,852 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 20:24:25,852 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 20:24:25,858 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,870 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,903 INFO L137 Inliner]: procedures = 28, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 496 [2021-12-06 20:24:25,904 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 20:24:25,904 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 20:24:25,905 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 20:24:25,905 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 20:24:25,913 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,914 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,918 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,919 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,931 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,940 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,942 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,947 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 20:24:25,948 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 20:24:25,948 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 20:24:25,948 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 20:24:25,949 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (1/1) ... [2021-12-06 20:24:25,956 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 20:24:25,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 20:24:25,974 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 20:24:25,976 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb9c51bb-3917-416f-9a21-74e7f06d4f37/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 20:24:26,007 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 20:24:26,007 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-06 20:24:26,007 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 20:24:26,007 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 20:24:26,092 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 20:24:26,093 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 20:24:26,423 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 20:24:26,432 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 20:24:26,432 INFO L301 CfgBuilder]: Removed 1 assume(true) statements. [2021-12-06 20:24:26,434 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 08:24:26 BoogieIcfgContainer [2021-12-06 20:24:26,435 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 20:24:26,436 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 20:24:26,436 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 20:24:26,439 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 20:24:26,439 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 20:24:26,439 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 08:24:25" (1/3) ... [2021-12-06 20:24:26,440 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59e3a974 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 08:24:26, skipping insertion in model container [2021-12-06 20:24:26,440 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 20:24:26,441 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 08:24:25" (2/3) ... [2021-12-06 20:24:26,441 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59e3a974 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 08:24:26, skipping insertion in model container [2021-12-06 20:24:26,441 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 20:24:26,441 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 08:24:26" (3/3) ... [2021-12-06 20:24:26,442 INFO L388 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.ufo.UNBOUNDED.pals.c [2021-12-06 20:24:26,472 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 20:24:26,472 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 20:24:26,472 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 20:24:26,472 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 20:24:26,472 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 20:24:26,472 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 20:24:26,473 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 20:24:26,473 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 20:24:26,486 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 148 states, 147 states have (on average 1.7551020408163265) internal successors, (258), 147 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:26,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 77 [2021-12-06 20:24:26,507 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 20:24:26,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 20:24:26,514 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,514 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,514 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 20:24:26,515 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 148 states, 147 states have (on average 1.7551020408163265) internal successors, (258), 147 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:26,522 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 77 [2021-12-06 20:24:26,522 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 20:24:26,522 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 20:24:26,523 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,523 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,529 INFO L791 eck$LassoCheckResult]: Stem: 132#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 43#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~ret45#1, main_#t~ret46#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode1~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode2~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode3~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode4~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode5~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode6~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~id7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~st7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~send7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~mode7~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~id8~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~st8~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~send8~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~mode8~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 30#L298true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 48#L298-1true init_#res#1 := init_~tmp~0#1; 50#L543true main_#t~ret45#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret45#1;havoc main_#t~ret45#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 45#L22true assume !(0 == assume_abort_if_not_~cond#1); 108#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 95#L633-2true [2021-12-06 20:24:26,530 INFO L793 eck$LassoCheckResult]: Loop: 95#L633-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 124#L92true assume !(0 != ~mode1~0 % 256); 123#L109true assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 141#L109-2true ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 61#L92-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 24#L121true assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 83#L124true assume !(node2_~m2~0#1 != ~nomsg~0); 42#L124-1true ~mode2~0 := 0; 9#L121-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 96#L146true assume !(0 != ~mode3~0 % 256); 76#L159true assume ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0;node3_#t~ite6#1 := ~send3~0; 101#L159-2true ~p3_new~0 := (if node3_#t~ite6#1 % 256 <= 127 then node3_#t~ite6#1 % 256 else node3_#t~ite6#1 % 256 - 256);havoc node3_#t~ite6#1;~mode3~0 := 1; 126#L146-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 122#L171true assume !(0 != ~mode4~0 % 256); 88#L184true assume ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0;node4_#t~ite7#1 := ~send4~0; 80#L184-2true ~p4_new~0 := (if node4_#t~ite7#1 % 256 <= 127 then node4_#t~ite7#1 % 256 else node4_#t~ite7#1 % 256 - 256);havoc node4_#t~ite7#1;~mode4~0 := 1; 84#L171-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 65#L196true assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 53#L199true assume !(node5_~m5~0#1 != ~nomsg~0); 148#L199-1true ~mode5~0 := 0; 139#L196-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 90#L221true assume !(0 != ~mode6~0 % 256); 74#L234true assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 7#L234-2true ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 59#L221-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 66#L246true assume !(0 != ~mode7~0 % 256); 72#L259true assume ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0;node7_#t~ite10#1 := ~send7~0; 127#L259-2true ~p7_new~0 := (if node7_#t~ite10#1 % 256 <= 127 then node7_#t~ite10#1 % 256 else node7_#t~ite10#1 % 256 - 256);havoc node7_#t~ite10#1;~mode7~0 := 1; 15#L246-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_#t~ite11#1, node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 33#L271true assume 0 != ~mode8~0 % 256;node8_~m8~0#1 := ~p7_old~0;~p7_old~0 := ~nomsg~0; 98#L274true assume !(node8_~m8~0#1 != ~nomsg~0); 81#L274-1true ~mode8~0 := 0; 85#L271-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 32#L551true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 20#L551-1true check_#res#1 := check_~tmp~1#1; 135#L571true main_#t~ret46#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret46#1;havoc main_#t~ret46#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 130#L671true assume !(0 == assert_~arg#1 % 256); 14#L666true assume { :end_inline_assert } true; 95#L633-2true [2021-12-06 20:24:26,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:26,534 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2021-12-06 20:24:26,540 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:26,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657456504] [2021-12-06 20:24:26,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:26,541 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:26,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 20:24:26,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 20:24:26,713 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 20:24:26,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1657456504] [2021-12-06 20:24:26,714 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1657456504] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 20:24:26,714 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 20:24:26,714 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 20:24:26,715 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135986918] [2021-12-06 20:24:26,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 20:24:26,719 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 20:24:26,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:26,720 INFO L85 PathProgramCache]: Analyzing trace with hash -1609448354, now seen corresponding path program 1 times [2021-12-06 20:24:26,720 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:26,720 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768927507] [2021-12-06 20:24:26,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:26,720 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:26,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 20:24:26,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 20:24:26,832 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 20:24:26,832 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768927507] [2021-12-06 20:24:26,833 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1768927507] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 20:24:26,833 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 20:24:26,833 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 20:24:26,833 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609284971] [2021-12-06 20:24:26,833 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 20:24:26,835 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-06 20:24:26,836 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 20:24:26,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 20:24:26,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 20:24:26,860 INFO L87 Difference]: Start difference. First operand has 148 states, 147 states have (on average 1.7551020408163265) internal successors, (258), 147 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:26,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 20:24:26,945 INFO L93 Difference]: Finished difference Result 147 states and 253 transitions. [2021-12-06 20:24:26,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 20:24:26,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 147 states and 253 transitions. [2021-12-06 20:24:26,955 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2021-12-06 20:24:26,959 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 147 states to 143 states and 189 transitions. [2021-12-06 20:24:26,960 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2021-12-06 20:24:26,960 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2021-12-06 20:24:26,961 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143 states and 189 transitions. [2021-12-06 20:24:26,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 20:24:26,962 INFO L681 BuchiCegarLoop]: Abstraction has 143 states and 189 transitions. [2021-12-06 20:24:26,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states and 189 transitions. [2021-12-06 20:24:26,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2021-12-06 20:24:26,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 143 states have (on average 1.3216783216783217) internal successors, (189), 142 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:26,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 189 transitions. [2021-12-06 20:24:26,987 INFO L704 BuchiCegarLoop]: Abstraction has 143 states and 189 transitions. [2021-12-06 20:24:26,987 INFO L587 BuchiCegarLoop]: Abstraction has 143 states and 189 transitions. [2021-12-06 20:24:26,987 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 20:24:26,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 189 transitions. [2021-12-06 20:24:26,989 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2021-12-06 20:24:26,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 20:24:26,990 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 20:24:26,992 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,992 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:26,993 INFO L791 eck$LassoCheckResult]: Stem: 454#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 380#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~ret45#1, main_#t~ret46#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode1~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode2~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode3~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode4~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode5~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode6~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~id7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~st7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~send7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~mode7~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~id8~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~st8~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~send8~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~mode8~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 358#L298 assume 0 == ~r1~0 % 256; 359#L299 assume ~id1~0 >= 0; 375#L300 assume 0 == ~st1~0; 412#L301 assume ~send1~0 == ~id1~0; 428#L302 assume 0 == ~mode1~0 % 256; 429#L303 assume ~id2~0 >= 0; 442#L304 assume 0 == ~st2~0; 404#L305 assume ~send2~0 == ~id2~0; 405#L306 assume 0 == ~mode2~0 % 256; 421#L307 assume ~id3~0 >= 0; 331#L308 assume 0 == ~st3~0; 332#L309 assume ~send3~0 == ~id3~0; 417#L310 assume 0 == ~mode3~0 % 256; 392#L311 assume ~id4~0 >= 0; 393#L312 assume 0 == ~st4~0; 349#L313 assume ~send4~0 == ~id4~0; 350#L314 assume 0 == ~mode4~0 % 256; 385#L315 assume ~id5~0 >= 0; 386#L316 assume 0 == ~st5~0; 318#L317 assume ~send5~0 == ~id5~0; 319#L318 assume 0 == ~mode5~0 % 256; 455#L319 assume ~id6~0 >= 0; 427#L320 assume 0 == ~st6~0; 410#L321 assume ~send6~0 == ~id6~0; 411#L322 assume 0 == ~mode6~0 % 256; 316#L323 assume ~id7~0 >= 0; 317#L324 assume 0 == ~st7~0; 339#L325 assume ~send7~0 == ~id7~0; 357#L326 assume 0 == ~mode7~0 % 256; 340#L327 assume ~id8~0 >= 0; 341#L328 assume 0 == ~st8~0; 367#L329 assume ~send8~0 == ~id8~0; 368#L330 assume 0 == ~mode8~0 % 256; 329#L331 assume ~id1~0 != ~id2~0; 330#L332 assume ~id1~0 != ~id3~0; 356#L333 assume ~id1~0 != ~id4~0; 366#L334 assume ~id1~0 != ~id5~0; 345#L335 assume ~id1~0 != ~id6~0; 346#L336 assume ~id1~0 != ~id7~0; 420#L337 assume ~id1~0 != ~id8~0; 396#L338 assume ~id2~0 != ~id3~0; 397#L339 assume ~id2~0 != ~id4~0; 444#L340 assume ~id2~0 != ~id5~0; 439#L341 assume ~id2~0 != ~id6~0; 369#L342 assume ~id2~0 != ~id7~0; 370#L343 assume ~id2~0 != ~id8~0; 360#L344 assume ~id3~0 != ~id4~0; 361#L345 assume ~id3~0 != ~id5~0; 387#L346 assume ~id3~0 != ~id6~0; 388#L347 assume ~id3~0 != ~id7~0; 452#L348 assume ~id3~0 != ~id8~0; 433#L349 assume ~id4~0 != ~id5~0; 434#L350 assume ~id4~0 != ~id6~0; 414#L351 assume ~id4~0 != ~id7~0; 415#L352 assume ~id4~0 != ~id8~0; 441#L353 assume ~id5~0 != ~id6~0; 402#L354 assume ~id5~0 != ~id7~0; 371#L355 assume ~id5~0 != ~id8~0; 372#L356 assume ~id6~0 != ~id7~0; 399#L357 assume ~id6~0 != ~id8~0; 333#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 334#L298-1 init_#res#1 := init_~tmp~0#1; 389#L543 main_#t~ret45#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret45#1;havoc main_#t~ret45#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 383#L22 assume !(0 == assume_abort_if_not_~cond#1); 384#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 336#L633-2 [2021-12-06 20:24:26,993 INFO L793 eck$LassoCheckResult]: Loop: 336#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 435#L92 assume !(0 != ~mode1~0 % 256); 450#L109 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 451#L109-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 391#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 351#L121 assume !(0 != ~mode2~0 % 256); 352#L134 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 406#L134-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 327#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 328#L146 assume !(0 != ~mode3~0 % 256); 418#L159 assume ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0;node3_#t~ite6#1 := ~send3~0; 419#L159-2 ~p3_new~0 := (if node3_#t~ite6#1 % 256 <= 127 then node3_#t~ite6#1 % 256 else node3_#t~ite6#1 % 256 - 256);havoc node3_#t~ite6#1;~mode3~0 := 1; 438#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 448#L171 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 449#L174 assume !(node4_~m4~0#1 != ~nomsg~0); 314#L174-1 ~mode4~0 := 0; 423#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 407#L196 assume !(0 != ~mode5~0 % 256); 408#L209 assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 445#L209-2 ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 446#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 431#L221 assume !(0 != ~mode6~0 % 256); 416#L234 assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 320#L234-2 ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 321#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 403#L246 assume 0 != ~mode7~0 % 256;node7_~m7~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 322#L249 assume !(node7_~m7~0#1 != ~nomsg~0); 323#L249-1 ~mode7~0 := 0; 337#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_#t~ite11#1, node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 338#L271 assume 0 != ~mode8~0 % 256;node8_~m8~0#1 := ~p7_old~0;~p7_old~0 := ~nomsg~0; 364#L274 assume !(node8_~m8~0#1 != ~nomsg~0); 424#L274-1 ~mode8~0 := 0; 348#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 362#L551 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 343#L551-1 check_#res#1 := check_~tmp~1#1; 344#L571 main_#t~ret46#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret46#1;havoc main_#t~ret46#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 453#L671 assume !(0 == assert_~arg#1 % 256); 335#L666 assume { :end_inline_assert } true; 336#L633-2 [2021-12-06 20:24:26,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:26,994 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2021-12-06 20:24:26,994 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:26,994 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350015391] [2021-12-06 20:24:26,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:26,994 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,042 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 20:24:27,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,113 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 20:24:27,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1894180770, now seen corresponding path program 1 times [2021-12-06 20:24:27,114 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,114 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499889526] [2021-12-06 20:24:27,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,114 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 20:24:27,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 20:24:27,183 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 20:24:27,183 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499889526] [2021-12-06 20:24:27,183 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1499889526] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 20:24:27,184 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 20:24:27,184 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 20:24:27,184 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076089511] [2021-12-06 20:24:27,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 20:24:27,184 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-06 20:24:27,184 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 20:24:27,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 20:24:27,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 20:24:27,194 INFO L87 Difference]: Start difference. First operand 143 states and 189 transitions. cyclomatic complexity: 47 Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:27,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 20:24:27,226 INFO L93 Difference]: Finished difference Result 146 states and 191 transitions. [2021-12-06 20:24:27,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 20:24:27,227 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 191 transitions. [2021-12-06 20:24:27,229 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2021-12-06 20:24:27,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 143 states and 186 transitions. [2021-12-06 20:24:27,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2021-12-06 20:24:27,231 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2021-12-06 20:24:27,231 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143 states and 186 transitions. [2021-12-06 20:24:27,232 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 20:24:27,232 INFO L681 BuchiCegarLoop]: Abstraction has 143 states and 186 transitions. [2021-12-06 20:24:27,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states and 186 transitions. [2021-12-06 20:24:27,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2021-12-06 20:24:27,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 143 states have (on average 1.3006993006993006) internal successors, (186), 142 states have internal predecessors, (186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:27,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 186 transitions. [2021-12-06 20:24:27,238 INFO L704 BuchiCegarLoop]: Abstraction has 143 states and 186 transitions. [2021-12-06 20:24:27,238 INFO L587 BuchiCegarLoop]: Abstraction has 143 states and 186 transitions. [2021-12-06 20:24:27,238 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 20:24:27,238 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 186 transitions. [2021-12-06 20:24:27,239 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2021-12-06 20:24:27,239 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 20:24:27,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 20:24:27,242 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:27,242 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:27,242 INFO L791 eck$LassoCheckResult]: Stem: 755#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 681#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~ret45#1, main_#t~ret46#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode1~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode2~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode3~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode4~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode5~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode6~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~id7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~st7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~send7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~mode7~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~id8~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~st8~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~send8~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~mode8~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 661#L298 assume 0 == ~r1~0 % 256; 662#L299 assume ~id1~0 >= 0; 676#L300 assume 0 == ~st1~0; 713#L301 assume ~send1~0 == ~id1~0; 729#L302 assume 0 == ~mode1~0 % 256; 730#L303 assume ~id2~0 >= 0; 744#L304 assume 0 == ~st2~0; 705#L305 assume ~send2~0 == ~id2~0; 706#L306 assume 0 == ~mode2~0 % 256; 722#L307 assume ~id3~0 >= 0; 632#L308 assume 0 == ~st3~0; 633#L309 assume ~send3~0 == ~id3~0; 718#L310 assume 0 == ~mode3~0 % 256; 693#L311 assume ~id4~0 >= 0; 694#L312 assume 0 == ~st4~0; 650#L313 assume ~send4~0 == ~id4~0; 651#L314 assume 0 == ~mode4~0 % 256; 686#L315 assume ~id5~0 >= 0; 687#L316 assume 0 == ~st5~0; 619#L317 assume ~send5~0 == ~id5~0; 620#L318 assume 0 == ~mode5~0 % 256; 756#L319 assume ~id6~0 >= 0; 728#L320 assume 0 == ~st6~0; 711#L321 assume ~send6~0 == ~id6~0; 712#L322 assume 0 == ~mode6~0 % 256; 617#L323 assume ~id7~0 >= 0; 618#L324 assume 0 == ~st7~0; 640#L325 assume ~send7~0 == ~id7~0; 658#L326 assume 0 == ~mode7~0 % 256; 641#L327 assume ~id8~0 >= 0; 642#L328 assume 0 == ~st8~0; 668#L329 assume ~send8~0 == ~id8~0; 669#L330 assume 0 == ~mode8~0 % 256; 630#L331 assume ~id1~0 != ~id2~0; 631#L332 assume ~id1~0 != ~id3~0; 657#L333 assume ~id1~0 != ~id4~0; 667#L334 assume ~id1~0 != ~id5~0; 646#L335 assume ~id1~0 != ~id6~0; 647#L336 assume ~id1~0 != ~id7~0; 721#L337 assume ~id1~0 != ~id8~0; 697#L338 assume ~id2~0 != ~id3~0; 698#L339 assume ~id2~0 != ~id4~0; 745#L340 assume ~id2~0 != ~id5~0; 740#L341 assume ~id2~0 != ~id6~0; 670#L342 assume ~id2~0 != ~id7~0; 671#L343 assume ~id2~0 != ~id8~0; 659#L344 assume ~id3~0 != ~id4~0; 660#L345 assume ~id3~0 != ~id5~0; 688#L346 assume ~id3~0 != ~id6~0; 689#L347 assume ~id3~0 != ~id7~0; 753#L348 assume ~id3~0 != ~id8~0; 734#L349 assume ~id4~0 != ~id5~0; 735#L350 assume ~id4~0 != ~id6~0; 714#L351 assume ~id4~0 != ~id7~0; 715#L352 assume ~id4~0 != ~id8~0; 742#L353 assume ~id5~0 != ~id6~0; 703#L354 assume ~id5~0 != ~id7~0; 672#L355 assume ~id5~0 != ~id8~0; 673#L356 assume ~id6~0 != ~id7~0; 700#L357 assume ~id6~0 != ~id8~0; 634#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 635#L298-1 init_#res#1 := init_~tmp~0#1; 690#L543 main_#t~ret45#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret45#1;havoc main_#t~ret45#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 684#L22 assume !(0 == assume_abort_if_not_~cond#1); 685#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 637#L633-2 [2021-12-06 20:24:27,242 INFO L793 eck$LassoCheckResult]: Loop: 637#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 736#L92 assume !(0 != ~mode1~0 % 256); 751#L109 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 752#L109-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 692#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 652#L121 assume !(0 != ~mode2~0 % 256); 653#L134 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 707#L134-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 626#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 627#L146 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 737#L149 assume !(node3_~m3~0#1 != ~nomsg~0); 629#L149-1 ~mode3~0 := 0; 739#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 749#L171 assume !(0 != ~mode4~0 % 256); 731#L184 assume ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0;node4_#t~ite7#1 := ~send4~0; 723#L184-2 ~p4_new~0 := (if node4_#t~ite7#1 % 256 <= 127 then node4_#t~ite7#1 % 256 else node4_#t~ite7#1 % 256 - 256);havoc node4_#t~ite7#1;~mode4~0 := 1; 724#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 708#L196 assume !(0 != ~mode5~0 % 256); 709#L209 assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 746#L209-2 ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 747#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 732#L221 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 726#L224 assume !(node6_~m6~0#1 != ~nomsg~0); 678#L224-1 ~mode6~0 := 0; 622#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 704#L246 assume !(0 != ~mode7~0 % 256); 710#L259 assume ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0;node7_#t~ite10#1 := ~send7~0; 716#L259-2 ~p7_new~0 := (if node7_#t~ite10#1 % 256 <= 127 then node7_#t~ite10#1 % 256 else node7_#t~ite10#1 % 256 - 256);havoc node7_#t~ite10#1;~mode7~0 := 1; 638#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_#t~ite11#1, node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 639#L271 assume 0 != ~mode8~0 % 256;node8_~m8~0#1 := ~p7_old~0;~p7_old~0 := ~nomsg~0; 665#L274 assume !(node8_~m8~0#1 != ~nomsg~0); 725#L274-1 ~mode8~0 := 0; 649#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 663#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 664#L552 assume ~r1~0 % 256 >= 8; 682#L556 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 644#L551-1 check_#res#1 := check_~tmp~1#1; 645#L571 main_#t~ret46#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret46#1;havoc main_#t~ret46#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 754#L671 assume !(0 == assert_~arg#1 % 256); 636#L666 assume { :end_inline_assert } true; 637#L633-2 [2021-12-06 20:24:27,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,243 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2021-12-06 20:24:27,243 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,243 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599275024] [2021-12-06 20:24:27,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,243 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,276 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 20:24:27,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,315 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 20:24:27,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,315 INFO L85 PathProgramCache]: Analyzing trace with hash 949830926, now seen corresponding path program 1 times [2021-12-06 20:24:27,316 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659624854] [2021-12-06 20:24:27,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,316 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 20:24:27,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 20:24:27,345 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 20:24:27,345 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [659624854] [2021-12-06 20:24:27,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [659624854] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 20:24:27,345 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 20:24:27,346 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 20:24:27,346 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602830114] [2021-12-06 20:24:27,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 20:24:27,346 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-06 20:24:27,346 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 20:24:27,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 20:24:27,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 20:24:27,347 INFO L87 Difference]: Start difference. First operand 143 states and 186 transitions. cyclomatic complexity: 44 Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:27,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 20:24:27,374 INFO L93 Difference]: Finished difference Result 213 states and 294 transitions. [2021-12-06 20:24:27,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 20:24:27,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 213 states and 294 transitions. [2021-12-06 20:24:27,377 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 146 [2021-12-06 20:24:27,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 213 states to 213 states and 294 transitions. [2021-12-06 20:24:27,379 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 213 [2021-12-06 20:24:27,379 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 213 [2021-12-06 20:24:27,379 INFO L73 IsDeterministic]: Start isDeterministic. Operand 213 states and 294 transitions. [2021-12-06 20:24:27,380 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 20:24:27,380 INFO L681 BuchiCegarLoop]: Abstraction has 213 states and 294 transitions. [2021-12-06 20:24:27,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states and 294 transitions. [2021-12-06 20:24:27,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 211. [2021-12-06 20:24:27,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 211 states, 211 states have (on average 1.3791469194312795) internal successors, (291), 210 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 20:24:27,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 291 transitions. [2021-12-06 20:24:27,389 INFO L704 BuchiCegarLoop]: Abstraction has 211 states and 291 transitions. [2021-12-06 20:24:27,389 INFO L587 BuchiCegarLoop]: Abstraction has 211 states and 291 transitions. [2021-12-06 20:24:27,389 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 20:24:27,389 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 211 states and 291 transitions. [2021-12-06 20:24:27,390 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 144 [2021-12-06 20:24:27,390 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 20:24:27,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 20:24:27,392 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:27,392 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 20:24:27,392 INFO L791 eck$LassoCheckResult]: Stem: 1118#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 1043#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~ret45#1, main_#t~ret46#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode1~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode2~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode3~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode4~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode5~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode6~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~id7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~st7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~send7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;~mode7~0 := main_#t~nondet40#1;havoc main_#t~nondet40#1;~id8~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;~st8~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;~send8~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;~mode8~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 1021#L298 assume 0 == ~r1~0 % 256; 1022#L299 assume ~id1~0 >= 0; 1038#L300 assume 0 == ~st1~0; 1075#L301 assume ~send1~0 == ~id1~0; 1091#L302 assume 0 == ~mode1~0 % 256; 1092#L303 assume ~id2~0 >= 0; 1106#L304 assume 0 == ~st2~0; 1066#L305 assume ~send2~0 == ~id2~0; 1067#L306 assume 0 == ~mode2~0 % 256; 1084#L307 assume ~id3~0 >= 0; 994#L308 assume 0 == ~st3~0; 995#L309 assume ~send3~0 == ~id3~0; 1080#L310 assume 0 == ~mode3~0 % 256; 1054#L311 assume ~id4~0 >= 0; 1055#L312 assume 0 == ~st4~0; 1010#L313 assume ~send4~0 == ~id4~0; 1011#L314 assume 0 == ~mode4~0 % 256; 1047#L315 assume ~id5~0 >= 0; 1048#L316 assume 0 == ~st5~0; 981#L317 assume ~send5~0 == ~id5~0; 982#L318 assume 0 == ~mode5~0 % 256; 1119#L319 assume ~id6~0 >= 0; 1090#L320 assume 0 == ~st6~0; 1073#L321 assume ~send6~0 == ~id6~0; 1074#L322 assume 0 == ~mode6~0 % 256; 976#L323 assume ~id7~0 >= 0; 977#L324 assume 0 == ~st7~0; 1002#L325 assume ~send7~0 == ~id7~0; 1020#L326 assume 0 == ~mode7~0 % 256; 1003#L327 assume ~id8~0 >= 0; 1004#L328 assume 0 == ~st8~0; 1030#L329 assume ~send8~0 == ~id8~0; 1031#L330 assume 0 == ~mode8~0 % 256; 992#L331 assume ~id1~0 != ~id2~0; 993#L332 assume ~id1~0 != ~id3~0; 1017#L333 assume ~id1~0 != ~id4~0; 1027#L334 assume ~id1~0 != ~id5~0; 1008#L335 assume ~id1~0 != ~id6~0; 1009#L336 assume ~id1~0 != ~id7~0; 1083#L337 assume ~id1~0 != ~id8~0; 1058#L338 assume ~id2~0 != ~id3~0; 1059#L339 assume ~id2~0 != ~id4~0; 1108#L340 assume ~id2~0 != ~id5~0; 1102#L341 assume ~id2~0 != ~id6~0; 1032#L342 assume ~id2~0 != ~id7~0; 1033#L343 assume ~id2~0 != ~id8~0; 1023#L344 assume ~id3~0 != ~id4~0; 1024#L345 assume ~id3~0 != ~id5~0; 1049#L346 assume ~id3~0 != ~id6~0; 1050#L347 assume ~id3~0 != ~id7~0; 1116#L348 assume ~id3~0 != ~id8~0; 1096#L349 assume ~id4~0 != ~id5~0; 1097#L350 assume ~id4~0 != ~id6~0; 1076#L351 assume ~id4~0 != ~id7~0; 1077#L352 assume ~id4~0 != ~id8~0; 1104#L353 assume ~id5~0 != ~id6~0; 1064#L354 assume ~id5~0 != ~id7~0; 1034#L355 assume ~id5~0 != ~id8~0; 1035#L356 assume ~id6~0 != ~id7~0; 1061#L357 assume ~id6~0 != ~id8~0; 996#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 997#L298-1 init_#res#1 := init_~tmp~0#1; 1051#L543 main_#t~ret45#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret45#1;havoc main_#t~ret45#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1045#L22 assume !(0 == assume_abort_if_not_~cond#1); 1046#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 1105#L633-2 [2021-12-06 20:24:27,393 INFO L793 eck$LassoCheckResult]: Loop: 1105#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1182#L92 assume !(0 != ~mode1~0 % 256); 1181#L109 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 1180#L109-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 1053#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 1179#L121 assume !(0 != ~mode2~0 % 256); 1175#L134 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 1174#L134-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 1172#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 1171#L146 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 1170#L149 assume !(node3_~m3~0#1 != ~nomsg~0); 1165#L149-1 ~mode3~0 := 0; 1164#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 1163#L171 assume !(0 != ~mode4~0 % 256); 1159#L184 assume ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0;node4_#t~ite7#1 := ~send4~0; 1158#L184-2 ~p4_new~0 := (if node4_#t~ite7#1 % 256 <= 127 then node4_#t~ite7#1 % 256 else node4_#t~ite7#1 % 256 - 256);havoc node4_#t~ite7#1;~mode4~0 := 1; 1156#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1155#L196 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 1152#L199 assume !(node5_~m5~0#1 != ~nomsg~0); 1149#L199-1 ~mode5~0 := 0; 1148#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 1147#L221 assume !(0 != ~mode6~0 % 256); 1143#L234 assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 1142#L234-2 ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 1140#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 1139#L246 assume 0 != ~mode7~0 % 256;node7_~m7~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 1137#L249 assume !(node7_~m7~0#1 != ~nomsg~0); 1133#L249-1 ~mode7~0 := 0; 1132#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_#t~ite11#1, node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 1131#L271 assume !(0 != ~mode8~0 % 256); 1127#L284 assume ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0;node8_#t~ite11#1 := ~send8~0; 1126#L284-2 ~p8_new~0 := (if node8_#t~ite11#1 % 256 <= 127 then node8_#t~ite11#1 % 256 else node8_#t~ite11#1 % 256 - 256);havoc node8_#t~ite11#1;~mode8~0 := 1; 1124#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 1123#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 1122#L552 assume !(~r1~0 % 256 >= 8); 1120#L555 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 1121#L556 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 1186#L551-1 check_#res#1 := check_~tmp~1#1; 1185#L571 main_#t~ret46#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret46#1;havoc main_#t~ret46#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1184#L671 assume !(0 == assert_~arg#1 % 256); 1183#L666 assume { :end_inline_assert } true; 1105#L633-2 [2021-12-06 20:24:27,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,393 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2021-12-06 20:24:27,393 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,393 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692039808] [2021-12-06 20:24:27,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,394 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,417 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 20:24:27,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,447 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 20:24:27,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1443497567, now seen corresponding path program 1 times [2021-12-06 20:24:27,448 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462376387] [2021-12-06 20:24:27,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,449 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,461 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 20:24:27,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 20:24:27,475 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 20:24:27,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 20:24:27,476 INFO L85 PathProgramCache]: Analyzing trace with hash 2030957026, now seen corresponding path program 1 times [2021-12-06 20:24:27,476 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 20:24:27,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469293644] [2021-12-06 20:24:27,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 20:24:27,476 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 20:24:27,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 20:24:27,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 20:24:27,553 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 20:24:27,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469293644] [2021-12-06 20:24:27,553 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [469293644] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 20:24:27,553 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 20:24:27,553 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 20:24:27,554 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607636215] [2021-12-06 20:24:27,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 20:24:29,034 INFO L210 LassoAnalysis]: Preferences: [2021-12-06 20:24:29,034 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-06 20:24:29,034 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-06 20:24:29,034 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-06 20:24:29,034 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-12-06 20:24:29,035 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 20:24:29,035 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-06 20:24:29,035 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-06 20:24:29,035 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2021-12-06 20:24:29,035 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-06 20:24:29,035 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-06 20:24:29,060 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,351 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,354 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,355 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,356 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,360 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,364 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,367 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,368 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,369 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,370 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,371 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,374 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,375 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,376 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,377 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,378 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,379 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,382 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,383 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,384 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,387 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,388 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,389 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,390 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,391 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,393 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,394 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,395 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,398 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,400 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,401 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,402 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,404 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,405 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,407 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,408 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,410 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-06 20:24:29,894 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2021-12-06 20:24:30,925 WARN L176 XnfTransformerHelper]: Simplifying disjunction of 32768 conjuctions. This might take some time... [2021-12-06 20:29:59,872 INFO L192 XnfTransformerHelper]: Simplified to disjunction of 32768 conjuctions.