./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 18:09:28,119 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 18:09:28,121 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 18:09:28,142 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 18:09:28,143 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 18:09:28,144 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 18:09:28,145 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 18:09:28,146 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 18:09:28,148 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 18:09:28,149 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 18:09:28,149 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 18:09:28,150 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 18:09:28,151 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 18:09:28,152 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 18:09:28,153 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 18:09:28,154 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 18:09:28,155 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 18:09:28,155 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 18:09:28,157 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 18:09:28,158 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 18:09:28,160 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 18:09:28,161 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 18:09:28,162 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 18:09:28,163 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 18:09:28,165 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 18:09:28,165 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 18:09:28,166 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 18:09:28,167 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 18:09:28,167 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 18:09:28,168 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 18:09:28,168 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 18:09:28,169 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 18:09:28,169 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 18:09:28,170 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 18:09:28,171 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 18:09:28,171 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 18:09:28,171 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 18:09:28,171 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 18:09:28,171 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 18:09:28,172 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 18:09:28,173 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 18:09:28,173 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-12-06 18:09:28,190 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 18:09:28,190 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 18:09:28,190 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 18:09:28,190 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 18:09:28,191 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 18:09:28,191 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 18:09:28,191 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 18:09:28,191 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-06 18:09:28,191 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-06 18:09:28,192 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * sizeof long=4 [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 18:09:28,192 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * sizeof long double=12 [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 18:09:28,193 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-06 18:09:28,193 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 18:09:28,194 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 18:09:28,194 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 18:09:28,194 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 18:09:28,194 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 18:09:28,195 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-06 18:09:28,195 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 [2021-12-06 18:09:28,362 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 18:09:28,377 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 18:09:28,379 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 18:09:28,380 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 18:09:28,380 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 18:09:28,381 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2021-12-06 18:09:28,423 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/data/14da91c54/a04ad2c13381468e93ed40c0a10d9091/FLAG704d1be90 [2021-12-06 18:09:28,851 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 18:09:28,852 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2021-12-06 18:09:28,865 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/data/14da91c54/a04ad2c13381468e93ed40c0a10d9091/FLAG704d1be90 [2021-12-06 18:09:28,875 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/data/14da91c54/a04ad2c13381468e93ed40c0a10d9091 [2021-12-06 18:09:28,877 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 18:09:28,878 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 18:09:28,879 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 18:09:28,879 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 18:09:28,882 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 18:09:28,882 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 06:09:28" (1/1) ... [2021-12-06 18:09:28,883 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4dab4e34 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:28, skipping insertion in model container [2021-12-06 18:09:28,883 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 06:09:28" (1/1) ... [2021-12-06 18:09:28,888 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 18:09:28,915 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 18:09:29,131 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25842,25855] [2021-12-06 18:09:29,132 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25967,25980] [2021-12-06 18:09:29,133 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[26082,26095] [2021-12-06 18:09:29,135 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 18:09:29,141 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 18:09:29,175 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25842,25855] [2021-12-06 18:09:29,176 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[25967,25980] [2021-12-06 18:09:29,176 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i[26082,26095] [2021-12-06 18:09:29,177 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 18:09:29,202 INFO L208 MainTranslator]: Completed translation [2021-12-06 18:09:29,203 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29 WrapperNode [2021-12-06 18:09:29,203 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 18:09:29,204 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 18:09:29,204 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 18:09:29,204 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 18:09:29,209 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,221 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,249 INFO L137 Inliner]: procedures = 139, calls = 57, calls flagged for inlining = 26, calls inlined = 37, statements flattened = 376 [2021-12-06 18:09:29,250 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 18:09:29,250 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 18:09:29,250 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 18:09:29,251 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 18:09:29,257 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,257 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,262 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,262 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,277 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,282 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,285 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,289 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 18:09:29,290 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 18:09:29,290 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 18:09:29,290 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 18:09:29,291 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (1/1) ... [2021-12-06 18:09:29,298 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-06 18:09:29,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 18:09:29,319 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-06 18:09:29,321 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-06 18:09:29,349 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-12-06 18:09:29,349 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 18:09:29,349 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-12-06 18:09:29,349 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-12-06 18:09:29,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 18:09:29,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-12-06 18:09:29,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-06 18:09:29,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 18:09:29,350 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 18:09:29,431 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 18:09:29,432 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 18:09:29,835 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 18:09:29,843 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 18:09:29,843 INFO L301 CfgBuilder]: Removed 8 assume(true) statements. [2021-12-06 18:09:29,845 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:09:29 BoogieIcfgContainer [2021-12-06 18:09:29,845 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 18:09:29,846 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-06 18:09:29,847 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-06 18:09:29,850 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-06 18:09:29,850 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 18:09:29,850 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.12 06:09:28" (1/3) ... [2021-12-06 18:09:29,851 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c506ef9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 06:09:29, skipping insertion in model container [2021-12-06 18:09:29,852 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 18:09:29,852 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 06:09:29" (2/3) ... [2021-12-06 18:09:29,852 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c506ef9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.12 06:09:29, skipping insertion in model container [2021-12-06 18:09:29,852 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-06 18:09:29,852 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:09:29" (3/3) ... [2021-12-06 18:09:29,854 INFO L388 chiAutomizerObserver]: Analyzing ICFG test_mutex_double_lock.i [2021-12-06 18:09:29,888 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-06 18:09:29,888 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-06 18:09:29,888 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-06 18:09:29,888 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-06 18:09:29,888 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-06 18:09:29,889 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-06 18:09:29,889 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-06 18:09:29,889 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-06 18:09:29,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:29,917 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2021-12-06 18:09:29,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:29,918 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:29,922 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:29,922 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:29,923 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-06 18:09:29,923 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:29,930 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2021-12-06 18:09:29,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:29,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:29,930 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:29,931 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:29,937 INFO L791 eck$LassoCheckResult]: Stem: 69#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 53#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 12#L666true assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 23#L565true assume !(0 == assume_abort_if_not_~cond#1); 15#L564true assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 62#L578true foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 81#L565-2true assume !(0 == assume_abort_if_not_~cond#1); 4#L564-1true assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 64#L578-1true foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 66#L655-3true [2021-12-06 18:09:29,938 INFO L793 eck$LassoCheckResult]: Loop: 66#L655-3true assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 37#L656true assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 48#L655-2true call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 66#L655-3true [2021-12-06 18:09:29,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:29,943 INFO L85 PathProgramCache]: Analyzing trace with hash -1482586390, now seen corresponding path program 1 times [2021-12-06 18:09:29,949 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:29,950 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532217342] [2021-12-06 18:09:29,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:29,950 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,039 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:30,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,078 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:30,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:30,080 INFO L85 PathProgramCache]: Analyzing trace with hash 59743, now seen corresponding path program 1 times [2021-12-06 18:09:30,080 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:30,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253670407] [2021-12-06 18:09:30,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:30,080 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,087 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:30,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,095 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:30,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:30,097 INFO L85 PathProgramCache]: Analyzing trace with hash 1712557526, now seen corresponding path program 1 times [2021-12-06 18:09:30,097 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:30,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420579121] [2021-12-06 18:09:30,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:30,097 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 18:09:30,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 18:09:30,191 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 18:09:30,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420579121] [2021-12-06 18:09:30,191 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1420579121] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 18:09:30,192 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 18:09:30,192 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 18:09:30,192 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240902481] [2021-12-06 18:09:30,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 18:09:30,309 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 18:09:30,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 18:09:30,331 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 18:09:30,333 INFO L87 Difference]: Start difference. First operand has 85 states, 84 states have (on average 1.4166666666666667) internal successors, (119), 84 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:30,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 18:09:30,487 INFO L93 Difference]: Finished difference Result 151 states and 171 transitions. [2021-12-06 18:09:30,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 18:09:30,491 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 151 states and 171 transitions. [2021-12-06 18:09:30,496 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 38 [2021-12-06 18:09:30,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 151 states to 121 states and 141 transitions. [2021-12-06 18:09:30,501 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 121 [2021-12-06 18:09:30,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 121 [2021-12-06 18:09:30,503 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 141 transitions. [2021-12-06 18:09:30,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 18:09:30,504 INFO L681 BuchiCegarLoop]: Abstraction has 121 states and 141 transitions. [2021-12-06 18:09:30,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 141 transitions. [2021-12-06 18:09:30,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 95. [2021-12-06 18:09:30,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.168421052631579) internal successors, (111), 94 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:30,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 111 transitions. [2021-12-06 18:09:30,528 INFO L704 BuchiCegarLoop]: Abstraction has 95 states and 111 transitions. [2021-12-06 18:09:30,528 INFO L587 BuchiCegarLoop]: Abstraction has 95 states and 111 transitions. [2021-12-06 18:09:30,528 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-06 18:09:30,528 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 111 transitions. [2021-12-06 18:09:30,530 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 25 [2021-12-06 18:09:30,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:30,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:30,530 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:30,531 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:30,531 INFO L791 eck$LassoCheckResult]: Stem: 322#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 311#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 265#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 266#L565 assume !(0 == assume_abort_if_not_~cond#1); 269#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 270#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 319#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 250#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 251#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 320#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 307#L655-4 ldv_is_in_set_#res#1 := 0; 291#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 292#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 316#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 301#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 288#L655-9 ldv_is_in_set_#res#1 := 0; 289#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 293#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 290#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 271#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 272#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 275#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 276#L606 assume { :end_inline_ldv_list_add } true; 277#L635 assume { :end_inline_ldv_set_add } true; 331#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 255#L655-13 [2021-12-06 18:09:30,531 INFO L793 eck$LassoCheckResult]: Loop: 255#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 314#L656-2 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 254#L655-12 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 255#L655-13 [2021-12-06 18:09:30,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:30,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1768300753, now seen corresponding path program 1 times [2021-12-06 18:09:30,532 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:30,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695529329] [2021-12-06 18:09:30,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:30,532 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,606 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:30,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,667 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:30,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:30,667 INFO L85 PathProgramCache]: Analyzing trace with hash 130246, now seen corresponding path program 1 times [2021-12-06 18:09:30,668 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:30,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929263375] [2021-12-06 18:09:30,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:30,668 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,673 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:30,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:30,678 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:30,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:30,679 INFO L85 PathProgramCache]: Analyzing trace with hash -1673746728, now seen corresponding path program 1 times [2021-12-06 18:09:30,679 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:30,679 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061872765] [2021-12-06 18:09:30,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:30,679 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:30,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 18:09:31,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 18:09:31,003 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 18:09:31,003 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061872765] [2021-12-06 18:09:31,004 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1061872765] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 18:09:31,004 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 18:09:31,004 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2021-12-06 18:09:31,004 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336305857] [2021-12-06 18:09:31,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 18:09:31,086 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 18:09:31,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-12-06 18:09:31,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2021-12-06 18:09:31,087 INFO L87 Difference]: Start difference. First operand 95 states and 111 transitions. cyclomatic complexity: 23 Second operand has 12 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 11 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:31,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 18:09:31,868 INFO L93 Difference]: Finished difference Result 123 states and 142 transitions. [2021-12-06 18:09:31,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-06 18:09:31,869 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 123 states and 142 transitions. [2021-12-06 18:09:31,870 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 28 [2021-12-06 18:09:31,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 123 states to 123 states and 142 transitions. [2021-12-06 18:09:31,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 123 [2021-12-06 18:09:31,872 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 123 [2021-12-06 18:09:31,872 INFO L73 IsDeterministic]: Start isDeterministic. Operand 123 states and 142 transitions. [2021-12-06 18:09:31,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 18:09:31,873 INFO L681 BuchiCegarLoop]: Abstraction has 123 states and 142 transitions. [2021-12-06 18:09:31,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states and 142 transitions. [2021-12-06 18:09:31,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 100. [2021-12-06 18:09:31,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.17) internal successors, (117), 99 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:31,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 117 transitions. [2021-12-06 18:09:31,878 INFO L704 BuchiCegarLoop]: Abstraction has 100 states and 117 transitions. [2021-12-06 18:09:31,878 INFO L587 BuchiCegarLoop]: Abstraction has 100 states and 117 transitions. [2021-12-06 18:09:31,878 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-06 18:09:31,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 117 transitions. [2021-12-06 18:09:31,879 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 22 [2021-12-06 18:09:31,879 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:31,879 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:31,880 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:31,880 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:31,881 INFO L791 eck$LassoCheckResult]: Stem: 576#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 562#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 516#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 517#L565 assume !(0 == assume_abort_if_not_~cond#1); 520#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 521#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 572#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 505#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 506#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 573#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 559#L655-4 ldv_is_in_set_#res#1 := 0; 542#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 543#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 569#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 552#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 539#L655-9 ldv_is_in_set_#res#1 := 0; 540#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 544#L636 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 537#L635 assume { :end_inline_ldv_set_add } true; 538#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 509#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 510#L655-14 ldv_is_in_set_#res#1 := 0; 507#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 508#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 533#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 534#L655-18 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 560#L655-19 ldv_is_in_set_#res#1 := 0; 595#L660-3 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 594#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 591#L635-1 assume { :end_inline_ldv_set_add } true; 577#L668-1 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret28#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 570#L655-23 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 548#L655-24 ldv_is_in_set_#res#1 := 0; 549#L660-4 mutex_unlock_#t~ret28#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 545#L673 assume !(0 == mutex_unlock_#t~ret28#1);havoc mutex_unlock_#t~ret28#1; 546#L673-2 assume { :begin_inline_ldv_set_del } true;ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset, ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset, ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset, ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset, ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset, ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset, ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset, ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset, ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset, ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset := ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset;ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset := ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset;havoc ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset;havoc ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset := read~$Pointer$(ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, 4);ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset := ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset - 4;call ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset := read~$Pointer$(ldv_set_del_~m~0#1.base, 4 + ldv_set_del_~m~0#1.offset, 4);ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset := ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset;havoc ldv_set_del_#t~mem20#1.base, ldv_set_del_#t~mem20#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset - 4; 513#L646-3 [2021-12-06 18:09:31,881 INFO L793 eck$LassoCheckResult]: Loop: 513#L646-3 assume !!(ldv_set_del_~m~0#1.base != ldv_set_del_~s#1.base || 4 + ldv_set_del_~m~0#1.offset != ldv_set_del_~s#1.offset);call ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset := read~$Pointer$(ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, 4); 515#L647 assume !(ldv_set_del_#t~mem22#1.base == ldv_set_del_~e#1.base && ldv_set_del_#t~mem22#1.offset == ldv_set_del_~e#1.offset);havoc ldv_set_del_#t~mem22#1.base, ldv_set_del_#t~mem22#1.offset; 547#L646-2 ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset := read~$Pointer$(ldv_set_del_~n~0#1.base, 4 + ldv_set_del_~n~0#1.offset, 4);ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset := ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;havoc ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset - 4; 513#L646-3 [2021-12-06 18:09:31,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:31,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1127351229, now seen corresponding path program 1 times [2021-12-06 18:09:31,882 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:31,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411231389] [2021-12-06 18:09:31,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:31,882 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:31,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 18:09:31,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 18:09:31,912 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 18:09:31,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411231389] [2021-12-06 18:09:31,912 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [411231389] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 18:09:31,912 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 18:09:31,913 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 18:09:31,913 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229815642] [2021-12-06 18:09:31,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 18:09:31,913 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 18:09:31,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:31,914 INFO L85 PathProgramCache]: Analyzing trace with hash 228681, now seen corresponding path program 1 times [2021-12-06 18:09:31,914 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:31,914 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52261419] [2021-12-06 18:09:31,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:31,914 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:31,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:31,919 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:31,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:31,925 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:32,015 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 18:09:32,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 18:09:32,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 18:09:32,016 INFO L87 Difference]: Start difference. First operand 100 states and 117 transitions. cyclomatic complexity: 23 Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:32,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 18:09:32,043 INFO L93 Difference]: Finished difference Result 111 states and 129 transitions. [2021-12-06 18:09:32,043 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 18:09:32,044 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 129 transitions. [2021-12-06 18:09:32,045 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 32 [2021-12-06 18:09:32,046 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 111 states and 129 transitions. [2021-12-06 18:09:32,046 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2021-12-06 18:09:32,046 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2021-12-06 18:09:32,046 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 129 transitions. [2021-12-06 18:09:32,047 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 18:09:32,047 INFO L681 BuchiCegarLoop]: Abstraction has 111 states and 129 transitions. [2021-12-06 18:09:32,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 129 transitions. [2021-12-06 18:09:32,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 78. [2021-12-06 18:09:32,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.1666666666666667) internal successors, (91), 77 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:32,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 91 transitions. [2021-12-06 18:09:32,051 INFO L704 BuchiCegarLoop]: Abstraction has 78 states and 91 transitions. [2021-12-06 18:09:32,051 INFO L587 BuchiCegarLoop]: Abstraction has 78 states and 91 transitions. [2021-12-06 18:09:32,051 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-06 18:09:32,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 91 transitions. [2021-12-06 18:09:32,051 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 19 [2021-12-06 18:09:32,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:32,051 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:32,052 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:32,052 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:32,052 INFO L791 eck$LassoCheckResult]: Stem: 794#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 783#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 737#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 738#L565 assume !(0 == assume_abort_if_not_~cond#1); 741#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 742#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 792#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 725#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 726#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 793#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 779#L655-4 ldv_is_in_set_#res#1 := 0; 762#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 763#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 789#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 773#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 759#L655-9 ldv_is_in_set_#res#1 := 0; 760#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 764#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 761#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 743#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 744#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 747#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 748#L606 assume { :end_inline_ldv_list_add } true; 749#L635 assume { :end_inline_ldv_set_add } true; 758#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 729#L655-13 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 730#L655-14 ldv_is_in_set_#res#1 := 0; 727#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 728#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 754#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 755#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 780#L656-3 assume ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset;ldv_is_in_set_#res#1 := 1; 739#L660-3 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 740#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 798#L635-1 assume { :end_inline_ldv_set_add } true; 795#L668-1 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret28#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 757#L655-23 [2021-12-06 18:09:32,053 INFO L793 eck$LassoCheckResult]: Loop: 757#L655-23 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 790#L656-4 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 756#L655-22 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 757#L655-23 [2021-12-06 18:09:32,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:32,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1369720751, now seen corresponding path program 1 times [2021-12-06 18:09:32,053 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:32,053 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660313] [2021-12-06 18:09:32,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:32,053 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:32,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 18:09:32,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 18:09:32,142 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 18:09:32,143 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660313] [2021-12-06 18:09:32,143 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1660313] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 18:09:32,143 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 18:09:32,143 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2021-12-06 18:09:32,143 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140539432] [2021-12-06 18:09:32,143 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 18:09:32,144 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 18:09:32,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:32,144 INFO L85 PathProgramCache]: Analyzing trace with hash 200749, now seen corresponding path program 1 times [2021-12-06 18:09:32,144 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:32,145 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269565399] [2021-12-06 18:09:32,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:32,145 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:32,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:32,150 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:32,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:32,155 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:32,232 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 18:09:32,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-06 18:09:32,233 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2021-12-06 18:09:32,233 INFO L87 Difference]: Start difference. First operand 78 states and 91 transitions. cyclomatic complexity: 18 Second operand has 9 states, 9 states have (on average 4.0) internal successors, (36), 9 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:32,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 18:09:32,577 INFO L93 Difference]: Finished difference Result 114 states and 132 transitions. [2021-12-06 18:09:32,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-06 18:09:32,578 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 132 transitions. [2021-12-06 18:09:32,579 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 38 [2021-12-06 18:09:32,580 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 132 transitions. [2021-12-06 18:09:32,580 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 114 [2021-12-06 18:09:32,581 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 114 [2021-12-06 18:09:32,581 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 132 transitions. [2021-12-06 18:09:32,581 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 18:09:32,581 INFO L681 BuchiCegarLoop]: Abstraction has 114 states and 132 transitions. [2021-12-06 18:09:32,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 132 transitions. [2021-12-06 18:09:32,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 75. [2021-12-06 18:09:32,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.1333333333333333) internal successors, (85), 74 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:32,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 85 transitions. [2021-12-06 18:09:32,586 INFO L704 BuchiCegarLoop]: Abstraction has 75 states and 85 transitions. [2021-12-06 18:09:32,586 INFO L587 BuchiCegarLoop]: Abstraction has 75 states and 85 transitions. [2021-12-06 18:09:32,586 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-06 18:09:32,586 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 85 transitions. [2021-12-06 18:09:32,587 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 19 [2021-12-06 18:09:32,587 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-06 18:09:32,587 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-06 18:09:32,588 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 18:09:32,588 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-06 18:09:32,588 INFO L791 eck$LassoCheckResult]: Stem: 1014#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call #Ultimate.allocInit(8, 3);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 1003#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset, foo_#t~ret31#1.base, foo_#t~ret31#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 958#L666 assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 959#L565 assume !(0 == assume_abort_if_not_~cond#1); 962#L564 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 963#L578 foo_#t~ret30#1.base, foo_#t~ret30#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret30#1.base, foo_#t~ret30#1.offset;havoc foo_#t~ret30#1.base, foo_#t~ret30#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1012#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 947#L564-1 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 948#L578-1 foo_#t~ret31#1.base, foo_#t~ret31#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret31#1.base, foo_#t~ret31#1.offset;havoc foo_#t~ret31#1.base, foo_#t~ret31#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1013#L655-3 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1000#L655-4 ldv_is_in_set_#res#1 := 0; 983#L660 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 984#L669 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 1009#L669-2 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 994#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 980#L655-9 ldv_is_in_set_#res#1 := 0; 981#L660-1 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 985#L636 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 982#L565-4 assume !(0 == assume_abort_if_not_~cond#1); 964#L564-2 assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 965#L578-2 ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 968#L592 assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 969#L606 assume { :end_inline_ldv_list_add } true; 970#L635 assume { :end_inline_ldv_set_add } true; 979#L668 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret27#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 951#L655-13 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 952#L656-2 assume ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset;ldv_is_in_set_#res#1 := 1; 949#L660-2 mutex_lock_#t~ret27#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 950#L669-3 assume !(0 != mutex_lock_#t~ret27#1);havoc mutex_lock_#t~ret27#1; 975#L669-5 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 976#L655-18 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 1001#L656-3 assume ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset;ldv_is_in_set_#res#1 := 1; 960#L660-3 ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;assume { :end_inline_ldv_is_in_set } true; 961#L636-2 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 997#L635-1 assume { :end_inline_ldv_set_add } true; 1015#L668-1 assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret28#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset, ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset := read~$Pointer$(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;havoc ldv_is_in_set_#t~mem23#1.base, ldv_is_in_set_#t~mem23#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4; 1010#L655-23 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 1011#L656-4 [2021-12-06 18:09:32,588 INFO L793 eck$LassoCheckResult]: Loop: 1011#L656-4 assume !(ldv_is_in_set_#t~mem25#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem25#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset; 977#L655-22 call ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;havoc ldv_is_in_set_#t~mem24#1.base, ldv_is_in_set_#t~mem24#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4; 978#L655-23 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem25#1.base, ldv_is_in_set_#t~mem25#1.offset := read~$Pointer$(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 1011#L656-4 [2021-12-06 18:09:32,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:32,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1260544915, now seen corresponding path program 1 times [2021-12-06 18:09:32,589 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:32,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125817353] [2021-12-06 18:09:32,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:32,589 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:32,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 18:09:32,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 18:09:32,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 18:09:32,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125817353] [2021-12-06 18:09:32,630 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125817353] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 18:09:32,630 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 18:09:32,630 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 18:09:32,630 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465256239] [2021-12-06 18:09:32,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 18:09:32,631 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-06 18:09:32,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 18:09:32,631 INFO L85 PathProgramCache]: Analyzing trace with hash 205609, now seen corresponding path program 2 times [2021-12-06 18:09:32,631 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 18:09:32,631 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965258704] [2021-12-06 18:09:32,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 18:09:32,631 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 18:09:32,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:32,635 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 18:09:32,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 18:09:32,638 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 18:09:32,727 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 18:09:32,727 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 18:09:32,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 18:09:32,728 INFO L87 Difference]: Start difference. First operand 75 states and 85 transitions. cyclomatic complexity: 15 Second operand has 4 states, 4 states have (on average 9.25) internal successors, (37), 4 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-06 18:09:32,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 18:09:32,740 INFO L93 Difference]: Finished difference Result 29 states and 28 transitions. [2021-12-06 18:09:32,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 18:09:32,741 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 28 transitions. [2021-12-06 18:09:32,742 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2021-12-06 18:09:32,742 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 0 states and 0 transitions. [2021-12-06 18:09:32,742 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2021-12-06 18:09:32,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2021-12-06 18:09:32,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2021-12-06 18:09:32,742 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-06 18:09:32,742 INFO L681 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 18:09:32,742 INFO L704 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 18:09:32,742 INFO L587 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2021-12-06 18:09:32,742 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-06 18:09:32,742 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2021-12-06 18:09:32,743 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2021-12-06 18:09:32,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2021-12-06 18:09:32,749 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.12 06:09:32 BoogieIcfgContainer [2021-12-06 18:09:32,749 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-12-06 18:09:32,749 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-06 18:09:32,749 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-06 18:09:32,749 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-06 18:09:32,750 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 06:09:29" (3/4) ... [2021-12-06 18:09:32,753 INFO L140 WitnessPrinter]: No result that supports witness generation found [2021-12-06 18:09:32,753 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-06 18:09:32,754 INFO L158 Benchmark]: Toolchain (without parser) took 3875.42ms. Allocated memory was 102.8MB in the beginning and 123.7MB in the end (delta: 21.0MB). Free memory was 80.3MB in the beginning and 44.1MB in the end (delta: 36.2MB). Peak memory consumption was 57.1MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,754 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 73.4MB. Free memory is still 49.8MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 18:09:32,755 INFO L158 Benchmark]: CACSL2BoogieTranslator took 324.08ms. Allocated memory is still 102.8MB. Free memory was 80.0MB in the beginning and 70.2MB in the end (delta: 9.7MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,755 INFO L158 Benchmark]: Boogie Procedure Inliner took 46.23ms. Allocated memory is still 102.8MB. Free memory was 69.9MB in the beginning and 66.7MB in the end (delta: 3.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,756 INFO L158 Benchmark]: Boogie Preprocessor took 38.93ms. Allocated memory is still 102.8MB. Free memory was 66.7MB in the beginning and 63.4MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,756 INFO L158 Benchmark]: RCFGBuilder took 555.79ms. Allocated memory is still 102.8MB. Free memory was 63.4MB in the beginning and 59.2MB in the end (delta: 4.2MB). Peak memory consumption was 18.4MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,757 INFO L158 Benchmark]: BuchiAutomizer took 2902.49ms. Allocated memory was 102.8MB in the beginning and 123.7MB in the end (delta: 21.0MB). Free memory was 58.6MB in the beginning and 44.1MB in the end (delta: 14.6MB). Peak memory consumption was 36.1MB. Max. memory is 16.1GB. [2021-12-06 18:09:32,757 INFO L158 Benchmark]: Witness Printer took 3.48ms. Allocated memory is still 123.7MB. Free memory is still 44.1MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 18:09:32,760 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 73.4MB. Free memory is still 49.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 324.08ms. Allocated memory is still 102.8MB. Free memory was 80.0MB in the beginning and 70.2MB in the end (delta: 9.7MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 46.23ms. Allocated memory is still 102.8MB. Free memory was 69.9MB in the beginning and 66.7MB in the end (delta: 3.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 38.93ms. Allocated memory is still 102.8MB. Free memory was 66.7MB in the beginning and 63.4MB in the end (delta: 3.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 555.79ms. Allocated memory is still 102.8MB. Free memory was 63.4MB in the beginning and 59.2MB in the end (delta: 4.2MB). Peak memory consumption was 18.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 2902.49ms. Allocated memory was 102.8MB in the beginning and 123.7MB in the end (delta: 21.0MB). Free memory was 58.6MB in the beginning and 44.1MB in the end (delta: 14.6MB). Peak memory consumption was 36.1MB. Max. memory is 16.1GB. * Witness Printer took 3.48ms. Allocated memory is still 123.7MB. Free memory is still 44.1MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic). 5 modules have a trivial ranking function, the largest among these consists of 12 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.8s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 1.3s. Construction of modules took 0.8s. Büchi inclusion checks took 0.5s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 4 MinimizatonAttempts, 121 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 100 states and ocurred in iteration 2. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 999 SdHoareTripleChecker+Valid, 0.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 999 mSDsluCounter, 1000 SdHoareTripleChecker+Invalid, 0.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 707 mSDsCounter, 207 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 624 IncrementalHoareTripleChecker+Invalid, 831 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 207 mSolverCounterUnsat, 293 mSDtfsCounter, 624 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU3 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2021-12-06 18:09:32,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_95b5fcd7-9bf2-4ba6-a7c6-af47399119b0/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE