./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-07 00:39:12,183 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-07 00:39:12,184 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-07 00:39:12,206 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-07 00:39:12,206 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-07 00:39:12,207 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-07 00:39:12,209 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-07 00:39:12,210 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-07 00:39:12,212 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-07 00:39:12,213 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-07 00:39:12,213 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-07 00:39:12,214 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-07 00:39:12,215 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-07 00:39:12,216 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-07 00:39:12,217 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-07 00:39:12,218 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-07 00:39:12,219 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-07 00:39:12,219 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-07 00:39:12,221 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-07 00:39:12,223 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-07 00:39:12,224 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-07 00:39:12,226 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-07 00:39:12,227 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-07 00:39:12,228 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-07 00:39:12,232 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-07 00:39:12,232 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-07 00:39:12,232 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-07 00:39:12,233 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-07 00:39:12,234 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-07 00:39:12,235 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-07 00:39:12,235 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-07 00:39:12,236 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-07 00:39:12,237 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-07 00:39:12,238 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-07 00:39:12,239 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-07 00:39:12,239 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-07 00:39:12,240 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-07 00:39:12,240 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-07 00:39:12,240 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-07 00:39:12,241 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-07 00:39:12,241 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-07 00:39:12,242 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-12-07 00:39:12,266 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-07 00:39:12,266 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-07 00:39:12,266 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-07 00:39:12,266 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-07 00:39:12,267 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-12-07 00:39:12,267 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-12-07 00:39:12,268 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-07 00:39:12,268 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-07 00:39:12,268 INFO L138 SettingsManager]: * Use SBE=true [2021-12-07 00:39:12,268 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-07 00:39:12,268 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-07 00:39:12,268 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-07 00:39:12,268 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-12-07 00:39:12,269 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-07 00:39:12,269 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-07 00:39:12,270 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-12-07 00:39:12,270 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-12-07 00:39:12,271 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-12-07 00:39:12,271 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-07 00:39:12,271 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 [2021-12-07 00:39:12,462 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-07 00:39:12,477 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-07 00:39:12,479 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-07 00:39:12,480 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-07 00:39:12,480 INFO L275 PluginConnector]: CDTParser initialized [2021-12-07 00:39:12,481 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-07 00:39:12,522 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/data/904d81338/b7c9dfb86d9a4d7dafba5d5e7747d6e7/FLAG20baf6d9c [2021-12-07 00:39:13,107 INFO L306 CDTParser]: Found 1 translation units. [2021-12-07 00:39:13,108 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-07 00:39:13,130 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/data/904d81338/b7c9dfb86d9a4d7dafba5d5e7747d6e7/FLAG20baf6d9c [2021-12-07 00:39:13,509 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/data/904d81338/b7c9dfb86d9a4d7dafba5d5e7747d6e7 [2021-12-07 00:39:13,512 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-07 00:39:13,513 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-07 00:39:13,515 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-07 00:39:13,515 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-07 00:39:13,518 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-07 00:39:13,518 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:39:13" (1/1) ... [2021-12-07 00:39:13,519 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ecd8121 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:13, skipping insertion in model container [2021-12-07 00:39:13,519 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:39:13" (1/1) ... [2021-12-07 00:39:13,525 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-07 00:39:13,598 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-07 00:39:13,978 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-12-07 00:39:14,350 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-07 00:39:14,366 INFO L203 MainTranslator]: Completed pre-run [2021-12-07 00:39:14,452 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-12-07 00:39:14,562 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-07 00:39:14,639 INFO L208 MainTranslator]: Completed translation [2021-12-07 00:39:14,640 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14 WrapperNode [2021-12-07 00:39:14,640 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-07 00:39:14,641 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-07 00:39:14,641 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-07 00:39:14,642 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-07 00:39:14,647 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,687 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,773 INFO L137 Inliner]: procedures = 160, calls = 1221, calls flagged for inlining = 70, calls inlined = 70, statements flattened = 3023 [2021-12-07 00:39:14,774 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-07 00:39:14,774 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-07 00:39:14,775 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-07 00:39:14,775 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-07 00:39:14,783 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,783 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,798 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,799 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,866 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,884 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,897 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,914 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-07 00:39:14,915 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-07 00:39:14,915 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-07 00:39:14,915 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-07 00:39:14,916 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (1/1) ... [2021-12-07 00:39:14,922 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-07 00:39:14,930 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:39:14,940 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-12-07 00:39:14,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_rds_radio_text [2021-12-07 00:39:14,969 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_rds_radio_text [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2021-12-07 00:39:14,969 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-07 00:39:14,969 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_is_valid [2021-12-07 00:39:14,969 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_is_valid [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_wait_stc [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_wait_stc [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_usecs [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_usecs [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_mute [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_mute [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure wait_for_completion_timeout [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure wait_for_completion_timeout [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2021-12-07 00:39:14,970 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2021-12-07 00:39:14,970 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_power_state [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_power_state [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_choose_econtrol_action [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_choose_econtrol_action [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_len [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_len [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_econtrol_tune [2021-12-07 00:39:14,971 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_econtrol_tune [2021-12-07 00:39:14,971 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__copy_from_user_1 [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__copy_from_user_1 [2021-12-07 00:39:14,972 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2021-12-07 00:39:14,972 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_strlen [2021-12-07 00:39:14,973 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_strlen [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_set_value [2021-12-07 00:39:14,973 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_set_value [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_tx_rds_buff [2021-12-07 00:39:14,973 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_tx_rds_buff [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2021-12-07 00:39:14,973 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure v4l2_ctrl_query_fill [2021-12-07 00:39:14,973 INFO L138 BoogieDeclarations]: Found implementation of procedure v4l2_ctrl_query_fill [2021-12-07 00:39:14,973 INFO L130 BoogieDeclarations]: Found specification of procedure validate_range [2021-12-07 00:39:14,974 INFO L138 BoogieDeclarations]: Found implementation of procedure validate_range [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_bulk_free [2021-12-07 00:39:14,974 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_bulk_free [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_econtrol_integers [2021-12-07 00:39:14,974 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_econtrol_integers [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2021-12-07 00:39:14,974 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_bulk_disable [2021-12-07 00:39:14,974 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_bulk_disable [2021-12-07 00:39:14,974 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_free [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_free [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_send_command [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_send_command [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure v4l2_get_subdevdata [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure v4l2_get_subdevdata [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure usecs_to_jiffies [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure usecs_to_jiffies [2021-12-07 00:39:14,975 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_property [2021-12-07 00:39:14,975 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_property [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2021-12-07 00:39:14,976 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_read_property [2021-12-07 00:39:14,976 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_read_property [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2021-12-07 00:39:14,976 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_s_frequency [2021-12-07 00:39:14,976 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_s_frequency [2021-12-07 00:39:14,976 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_copy_from_user_7 [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_copy_from_user_7 [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_nested [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock_nested [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_tx_tune_status [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_tx_tune_status [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_ret_val [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_ret_val [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_update_tune_status [2021-12-07 00:39:14,977 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_update_tune_status [2021-12-07 00:39:14,977 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_rds_ps_name [2021-12-07 00:39:14,978 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_rds_ps_name [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_queryctrl [2021-12-07 00:39:14,978 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_queryctrl [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_s_modulator [2021-12-07 00:39:14,978 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_s_modulator [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2021-12-07 00:39:14,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure strncpy [2021-12-07 00:39:14,978 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-07 00:39:14,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-07 00:39:15,372 INFO L236 CfgBuilder]: Building ICFG [2021-12-07 00:39:15,375 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-07 00:39:15,566 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2021-12-07 00:39:18,635 INFO L277 CfgBuilder]: Performing block encoding [2021-12-07 00:39:18,650 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-07 00:39:18,650 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-12-07 00:39:18,653 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:39:18 BoogieIcfgContainer [2021-12-07 00:39:18,653 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-07 00:39:18,654 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-12-07 00:39:18,655 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-12-07 00:39:18,657 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-12-07 00:39:18,657 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:39:13" (1/3) ... [2021-12-07 00:39:18,658 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a48ce3c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:39:18, skipping insertion in model container [2021-12-07 00:39:18,658 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:39:14" (2/3) ... [2021-12-07 00:39:18,658 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a48ce3c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:39:18, skipping insertion in model container [2021-12-07 00:39:18,658 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:39:18" (3/3) ... [2021-12-07 00:39:18,659 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-07 00:39:18,663 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-12-07 00:39:18,663 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-12-07 00:39:18,705 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-12-07 00:39:18,710 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-12-07 00:39:18,710 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-12-07 00:39:18,743 INFO L276 IsEmpty]: Start isEmpty. Operand has 1040 states, 771 states have (on average 1.404669260700389) internal successors, (1083), 787 states have internal predecessors, (1083), 217 states have call successors, (217), 51 states have call predecessors, (217), 50 states have return successors, (210), 210 states have call predecessors, (210), 210 states have call successors, (210) [2021-12-07 00:39:18,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-12-07 00:39:18,761 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:39:18,761 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:39:18,762 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:39:18,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:39:18,766 INFO L85 PathProgramCache]: Analyzing trace with hash 1678977370, now seen corresponding path program 1 times [2021-12-07 00:39:18,772 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:39:18,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207066318] [2021-12-07 00:39:18,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:39:18,774 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:39:19,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:19,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-07 00:39:19,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-07 00:39:19,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2021-12-07 00:39:19,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:19,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:19,224 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-12-07 00:39:19,224 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:39:19,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207066318] [2021-12-07 00:39:19,225 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1207066318] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:39:19,225 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:39:19,225 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-07 00:39:19,226 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283100201] [2021-12-07 00:39:19,227 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:39:19,230 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:39:19,230 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:39:19,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:39:19,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:39:19,254 INFO L87 Difference]: Start difference. First operand has 1040 states, 771 states have (on average 1.404669260700389) internal successors, (1083), 787 states have internal predecessors, (1083), 217 states have call successors, (217), 51 states have call predecessors, (217), 50 states have return successors, (210), 210 states have call predecessors, (210), 210 states have call successors, (210) Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-07 00:39:22,258 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.33s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:22,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:39:22,573 INFO L93 Difference]: Finished difference Result 2587 states and 3777 transitions. [2021-12-07 00:39:22,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-07 00:39:22,575 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 58 [2021-12-07 00:39:22,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:39:22,596 INFO L225 Difference]: With dead ends: 2587 [2021-12-07 00:39:22,596 INFO L226 Difference]: Without dead ends: 1520 [2021-12-07 00:39:22,605 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:39:22,608 INFO L933 BasicCegarLoop]: 1518 mSDtfsCounter, 910 mSDsluCounter, 1889 mSDsCounter, 0 mSdLazyCounter, 838 mSolverCounterSat, 325 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1008 SdHoareTripleChecker+Valid, 3407 SdHoareTripleChecker+Invalid, 1163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 325 IncrementalHoareTripleChecker+Valid, 838 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:39:22,609 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1008 Valid, 3407 Invalid, 1163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [325 Valid, 838 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2021-12-07 00:39:22,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1520 states. [2021-12-07 00:39:22,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1520 to 1462. [2021-12-07 00:39:22,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1462 states, 1098 states have (on average 1.3852459016393444) internal successors, (1521), 1110 states have internal predecessors, (1521), 286 states have call successors, (286), 78 states have call predecessors, (286), 77 states have return successors, (285), 284 states have call predecessors, (285), 285 states have call successors, (285) [2021-12-07 00:39:22,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1462 states to 1462 states and 2092 transitions. [2021-12-07 00:39:22,727 INFO L78 Accepts]: Start accepts. Automaton has 1462 states and 2092 transitions. Word has length 58 [2021-12-07 00:39:22,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:39:22,728 INFO L470 AbstractCegarLoop]: Abstraction has 1462 states and 2092 transitions. [2021-12-07 00:39:22,728 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-07 00:39:22,728 INFO L276 IsEmpty]: Start isEmpty. Operand 1462 states and 2092 transitions. [2021-12-07 00:39:22,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-12-07 00:39:22,738 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:39:22,739 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:39:22,739 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-12-07 00:39:22,739 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:39:22,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:39:22,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1282308759, now seen corresponding path program 1 times [2021-12-07 00:39:22,740 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:39:22,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84672965] [2021-12-07 00:39:22,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:39:22,740 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:39:22,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:22,984 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:22,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:22,996 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-07 00:39:22,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,008 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-07 00:39:23,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,018 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-07 00:39:23,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,029 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-07 00:39:23,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-07 00:39:23,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-07 00:39:23,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,062 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-07 00:39:23,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,073 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-07 00:39:23,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,084 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-07 00:39:23,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-07 00:39:23,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,155 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:23,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:23,164 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-07 00:39:23,164 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:39:23,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84672965] [2021-12-07 00:39:23,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84672965] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:39:23,165 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:39:23,165 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2021-12-07 00:39:23,165 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712273629] [2021-12-07 00:39:23,165 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:39:23,166 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2021-12-07 00:39:23,166 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:39:23,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-07 00:39:23,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2021-12-07 00:39:23,167 INFO L87 Difference]: Start difference. First operand 1462 states and 2092 transitions. Second operand has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:39:28,939 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:31,031 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.09s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:33,121 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.09s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:35,211 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.09s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:39,604 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.42s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:41,203 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.60s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:42,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:39:42,102 INFO L93 Difference]: Finished difference Result 3431 states and 5003 transitions. [2021-12-07 00:39:42,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-07 00:39:42,102 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 116 [2021-12-07 00:39:42,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:39:42,114 INFO L225 Difference]: With dead ends: 3431 [2021-12-07 00:39:42,114 INFO L226 Difference]: Without dead ends: 1978 [2021-12-07 00:39:42,119 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2021-12-07 00:39:42,120 INFO L933 BasicCegarLoop]: 1748 mSDtfsCounter, 606 mSDsluCounter, 6866 mSDsCounter, 0 mSdLazyCounter, 4117 mSolverCounterSat, 242 mSolverCounterUnsat, 4 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 17.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 688 SdHoareTripleChecker+Valid, 8614 SdHoareTripleChecker+Invalid, 4363 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 242 IncrementalHoareTripleChecker+Valid, 4117 IncrementalHoareTripleChecker+Invalid, 4 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 18.7s IncrementalHoareTripleChecker+Time [2021-12-07 00:39:42,120 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [688 Valid, 8614 Invalid, 4363 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [242 Valid, 4117 Invalid, 4 Unknown, 0 Unchecked, 18.7s Time] [2021-12-07 00:39:42,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1978 states. [2021-12-07 00:39:42,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1978 to 1468. [2021-12-07 00:39:42,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1468 states, 1103 states have (on average 1.3844061650045332) internal successors, (1527), 1115 states have internal predecessors, (1527), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-07 00:39:42,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1468 states to 1468 states and 2101 transitions. [2021-12-07 00:39:42,182 INFO L78 Accepts]: Start accepts. Automaton has 1468 states and 2101 transitions. Word has length 116 [2021-12-07 00:39:42,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:39:42,182 INFO L470 AbstractCegarLoop]: Abstraction has 1468 states and 2101 transitions. [2021-12-07 00:39:42,182 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:39:42,183 INFO L276 IsEmpty]: Start isEmpty. Operand 1468 states and 2101 transitions. [2021-12-07 00:39:42,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-12-07 00:39:42,187 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:39:42,187 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:39:42,187 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-12-07 00:39:42,187 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:39:42,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:39:42,188 INFO L85 PathProgramCache]: Analyzing trace with hash -942216361, now seen corresponding path program 1 times [2021-12-07 00:39:42,188 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:39:42,188 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575966733] [2021-12-07 00:39:42,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:39:42,188 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:39:42,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,323 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:42,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,332 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-07 00:39:42,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,342 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-07 00:39:42,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,351 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-07 00:39:42,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,361 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-07 00:39:42,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-07 00:39:42,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,380 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-07 00:39:42,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,389 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-07 00:39:42,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,400 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-07 00:39:42,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,409 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-07 00:39:42,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,419 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-07 00:39:42,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,523 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2021-12-07 00:39:42,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:42,535 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-07 00:39:42,536 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:39:42,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575966733] [2021-12-07 00:39:42,536 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1575966733] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:39:42,536 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:39:42,536 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-07 00:39:42,536 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498129864] [2021-12-07 00:39:42,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:39:42,537 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-07 00:39:42,537 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:39:42,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-07 00:39:42,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-07 00:39:42,538 INFO L87 Difference]: Start difference. First operand 1468 states and 2101 transitions. Second operand has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:39:49,641 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:55,819 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:56,990 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.17s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:39:58,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:39:58,911 INFO L93 Difference]: Finished difference Result 3446 states and 5028 transitions. [2021-12-07 00:39:58,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-07 00:39:58,911 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 117 [2021-12-07 00:39:58,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:39:58,921 INFO L225 Difference]: With dead ends: 3446 [2021-12-07 00:39:58,921 INFO L226 Difference]: Without dead ends: 1987 [2021-12-07 00:39:58,925 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2021-12-07 00:39:58,926 INFO L933 BasicCegarLoop]: 1714 mSDtfsCounter, 655 mSDsluCounter, 9232 mSDsCounter, 0 mSdLazyCounter, 5446 mSolverCounterSat, 370 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 15.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 719 SdHoareTripleChecker+Valid, 10946 SdHoareTripleChecker+Invalid, 5818 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 370 IncrementalHoareTripleChecker+Valid, 5446 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 16.2s IncrementalHoareTripleChecker+Time [2021-12-07 00:39:58,926 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [719 Valid, 10946 Invalid, 5818 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [370 Valid, 5446 Invalid, 2 Unknown, 0 Unchecked, 16.2s Time] [2021-12-07 00:39:58,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1987 states. [2021-12-07 00:39:58,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1987 to 1468. [2021-12-07 00:39:58,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1468 states, 1103 states have (on average 1.3844061650045332) internal successors, (1527), 1115 states have internal predecessors, (1527), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-07 00:39:58,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1468 states to 1468 states and 2101 transitions. [2021-12-07 00:39:58,977 INFO L78 Accepts]: Start accepts. Automaton has 1468 states and 2101 transitions. Word has length 117 [2021-12-07 00:39:58,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:39:58,978 INFO L470 AbstractCegarLoop]: Abstraction has 1468 states and 2101 transitions. [2021-12-07 00:39:58,978 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:39:58,978 INFO L276 IsEmpty]: Start isEmpty. Operand 1468 states and 2101 transitions. [2021-12-07 00:39:58,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-12-07 00:39:58,982 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:39:58,982 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:39:58,982 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-12-07 00:39:58,982 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:39:58,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:39:58,983 INFO L85 PathProgramCache]: Analyzing trace with hash -1025870257, now seen corresponding path program 1 times [2021-12-07 00:39:58,983 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:39:58,983 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143019777] [2021-12-07 00:39:58,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:39:58,983 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:39:59,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:59,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,128 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-07 00:39:59,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-07 00:39:59,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,140 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-07 00:39:59,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-07 00:39:59,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,152 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-07 00:39:59,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-07 00:39:59,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-07 00:39:59,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-07 00:39:59,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,177 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-07 00:39:59,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,183 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-07 00:39:59,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,239 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:39:59,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:39:59,247 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-07 00:39:59,247 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:39:59,247 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143019777] [2021-12-07 00:39:59,247 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1143019777] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:39:59,247 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:39:59,248 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-07 00:39:59,248 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310044299] [2021-12-07 00:39:59,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:39:59,248 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-07 00:39:59,248 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:39:59,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-07 00:39:59,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-07 00:39:59,249 INFO L87 Difference]: Start difference. First operand 1468 states and 2101 transitions. Second operand has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:40:07,785 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:08,942 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.16s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:11,471 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.78s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:13,250 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.78s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:16,550 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.10s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:19,909 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.62s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:20,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:40:20,271 INFO L93 Difference]: Finished difference Result 4491 states and 6700 transitions. [2021-12-07 00:40:20,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-07 00:40:20,271 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 117 [2021-12-07 00:40:20,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:40:20,286 INFO L225 Difference]: With dead ends: 4491 [2021-12-07 00:40:20,286 INFO L226 Difference]: Without dead ends: 3032 [2021-12-07 00:40:20,290 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2021-12-07 00:40:20,291 INFO L933 BasicCegarLoop]: 2552 mSDtfsCounter, 1227 mSDsluCounter, 12195 mSDsCounter, 0 mSdLazyCounter, 5921 mSolverCounterSat, 360 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 19.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1424 SdHoareTripleChecker+Valid, 14747 SdHoareTripleChecker+Invalid, 6282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 360 IncrementalHoareTripleChecker+Valid, 5921 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 20.8s IncrementalHoareTripleChecker+Time [2021-12-07 00:40:20,291 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1424 Valid, 14747 Invalid, 6282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [360 Valid, 5921 Invalid, 1 Unknown, 0 Unchecked, 20.8s Time] [2021-12-07 00:40:20,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3032 states. [2021-12-07 00:40:20,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3032 to 1475. [2021-12-07 00:40:20,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1475 states, 1109 states have (on average 1.3832281334535617) internal successors, (1534), 1121 states have internal predecessors, (1534), 286 states have call successors, (286), 78 states have call predecessors, (286), 79 states have return successors, (291), 286 states have call predecessors, (291), 285 states have call successors, (291) [2021-12-07 00:40:20,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 1475 states and 2111 transitions. [2021-12-07 00:40:20,353 INFO L78 Accepts]: Start accepts. Automaton has 1475 states and 2111 transitions. Word has length 117 [2021-12-07 00:40:20,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:40:20,354 INFO L470 AbstractCegarLoop]: Abstraction has 1475 states and 2111 transitions. [2021-12-07 00:40:20,354 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:40:20,354 INFO L276 IsEmpty]: Start isEmpty. Operand 1475 states and 2111 transitions. [2021-12-07 00:40:20,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-12-07 00:40:20,358 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:40:20,358 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:40:20,358 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-12-07 00:40:20,359 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:40:20,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:40:20,359 INFO L85 PathProgramCache]: Analyzing trace with hash -1266672241, now seen corresponding path program 1 times [2021-12-07 00:40:20,359 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:40:20,359 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467737966] [2021-12-07 00:40:20,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:40:20,359 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:40:20,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,488 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-07 00:40:20,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,494 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-07 00:40:20,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,499 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-07 00:40:20,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,504 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-07 00:40:20,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,510 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-07 00:40:20,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,515 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-07 00:40:20,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-07 00:40:20,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-07 00:40:20,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,532 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-07 00:40:20,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,553 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-07 00:40:20,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,559 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-07 00:40:20,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,639 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2021-12-07 00:40:20,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:40:20,646 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-07 00:40:20,646 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:40:20,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467737966] [2021-12-07 00:40:20,647 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467737966] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:40:20,647 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:40:20,647 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2021-12-07 00:40:20,647 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894670597] [2021-12-07 00:40:20,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:40:20,647 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-12-07 00:40:20,647 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:40:20,648 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-12-07 00:40:20,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2021-12-07 00:40:20,648 INFO L87 Difference]: Start difference. First operand 1475 states and 2111 transitions. Second operand has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:40:29,734 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:31,841 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:34,734 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.28s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:41,051 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:43,743 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.32s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:45,758 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.24s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:47,907 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.30s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-07 00:40:49,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:40:49,270 INFO L93 Difference]: Finished difference Result 4527 states and 6764 transitions. [2021-12-07 00:40:49,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-07 00:40:49,271 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 118 [2021-12-07 00:40:49,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:40:49,285 INFO L225 Difference]: With dead ends: 4527 [2021-12-07 00:40:49,285 INFO L226 Difference]: Without dead ends: 3061 [2021-12-07 00:40:49,289 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2021-12-07 00:40:49,290 INFO L933 BasicCegarLoop]: 2618 mSDtfsCounter, 1209 mSDsluCounter, 16453 mSDsCounter, 0 mSdLazyCounter, 7954 mSolverCounterSat, 499 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 26.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1390 SdHoareTripleChecker+Valid, 19071 SdHoareTripleChecker+Invalid, 8456 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 499 IncrementalHoareTripleChecker+Valid, 7954 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 28.3s IncrementalHoareTripleChecker+Time [2021-12-07 00:40:49,290 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1390 Valid, 19071 Invalid, 8456 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [499 Valid, 7954 Invalid, 3 Unknown, 0 Unchecked, 28.3s Time] [2021-12-07 00:40:49,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3061 states. [2021-12-07 00:40:49,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3061 to 1481. [2021-12-07 00:40:49,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1481 states, 1114 states have (on average 1.3833034111310591) internal successors, (1541), 1126 states have internal predecessors, (1541), 286 states have call successors, (286), 78 states have call predecessors, (286), 80 states have return successors, (294), 287 states have call predecessors, (294), 285 states have call successors, (294) [2021-12-07 00:40:49,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1481 states to 1481 states and 2121 transitions. [2021-12-07 00:40:49,352 INFO L78 Accepts]: Start accepts. Automaton has 1481 states and 2121 transitions. Word has length 118 [2021-12-07 00:40:49,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:40:49,352 INFO L470 AbstractCegarLoop]: Abstraction has 1481 states and 2121 transitions. [2021-12-07 00:40:49,352 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-07 00:40:49,352 INFO L276 IsEmpty]: Start isEmpty. Operand 1481 states and 2121 transitions. [2021-12-07 00:40:49,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2021-12-07 00:40:49,357 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:40:49,357 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:40:49,357 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-12-07 00:40:49,357 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-07 00:40:49,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:40:49,357 INFO L85 PathProgramCache]: Analyzing trace with hash 2033015333, now seen corresponding path program 1 times [2021-12-07 00:40:49,357 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:40:49,357 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357179640] [2021-12-07 00:40:49,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:40:49,358 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:40:49,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-07 00:40:49,498 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-07 00:40:49,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-07 00:40:49,668 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-07 00:40:49,669 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-12-07 00:40:49,669 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-12-07 00:40:49,671 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-12-07 00:40:49,673 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1] [2021-12-07 00:40:49,676 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-12-07 00:40:49,813 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:40:49 BoogieIcfgContainer [2021-12-07 00:40:49,813 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-12-07 00:40:49,814 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-07 00:40:49,814 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-07 00:40:49,814 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-07 00:40:49,814 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:39:18" (3/4) ... [2021-12-07 00:40:49,816 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-12-07 00:40:49,929 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/witness.graphml [2021-12-07 00:40:49,930 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-07 00:40:49,930 INFO L158 Benchmark]: Toolchain (without parser) took 96417.11ms. Allocated memory was 117.4MB in the beginning and 262.1MB in the end (delta: 144.7MB). Free memory was 77.4MB in the beginning and 75.9MB in the end (delta: 1.4MB). Peak memory consumption was 147.1MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,930 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 77.6MB. Free memory is still 34.6MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-07 00:40:49,930 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1125.88ms. Allocated memory was 117.4MB in the beginning and 142.6MB in the end (delta: 25.2MB). Free memory was 77.4MB in the beginning and 78.6MB in the end (delta: -1.2MB). Peak memory consumption was 59.6MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,931 INFO L158 Benchmark]: Boogie Procedure Inliner took 132.63ms. Allocated memory is still 142.6MB. Free memory was 78.6MB in the beginning and 61.8MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,931 INFO L158 Benchmark]: Boogie Preprocessor took 140.04ms. Allocated memory is still 142.6MB. Free memory was 61.8MB in the beginning and 76.3MB in the end (delta: -14.5MB). Peak memory consumption was 17.7MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,931 INFO L158 Benchmark]: RCFGBuilder took 3738.04ms. Allocated memory was 142.6MB in the beginning and 218.1MB in the end (delta: 75.5MB). Free memory was 76.3MB in the beginning and 113.5MB in the end (delta: -37.2MB). Peak memory consumption was 121.7MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,931 INFO L158 Benchmark]: TraceAbstraction took 91159.10ms. Allocated memory was 218.1MB in the beginning and 262.1MB in the end (delta: 44.0MB). Free memory was 112.4MB in the beginning and 127.4MB in the end (delta: -15.0MB). Peak memory consumption was 114.4MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,932 INFO L158 Benchmark]: Witness Printer took 115.76ms. Allocated memory is still 262.1MB. Free memory was 127.4MB in the beginning and 75.9MB in the end (delta: 51.5MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. [2021-12-07 00:40:49,933 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 77.6MB. Free memory is still 34.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1125.88ms. Allocated memory was 117.4MB in the beginning and 142.6MB in the end (delta: 25.2MB). Free memory was 77.4MB in the beginning and 78.6MB in the end (delta: -1.2MB). Peak memory consumption was 59.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 132.63ms. Allocated memory is still 142.6MB. Free memory was 78.6MB in the beginning and 61.8MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 140.04ms. Allocated memory is still 142.6MB. Free memory was 61.8MB in the beginning and 76.3MB in the end (delta: -14.5MB). Peak memory consumption was 17.7MB. Max. memory is 16.1GB. * RCFGBuilder took 3738.04ms. Allocated memory was 142.6MB in the beginning and 218.1MB in the end (delta: 75.5MB). Free memory was 76.3MB in the beginning and 113.5MB in the end (delta: -37.2MB). Peak memory consumption was 121.7MB. Max. memory is 16.1GB. * TraceAbstraction took 91159.10ms. Allocated memory was 218.1MB in the beginning and 262.1MB in the end (delta: 44.0MB). Free memory was 112.4MB in the beginning and 127.4MB in the end (delta: -15.0MB). Peak memory consumption was 114.4MB. Max. memory is 16.1GB. * Witness Printer took 115.76ms. Allocated memory is still 262.1MB. Free memory was 127.4MB in the beginning and 75.9MB in the end (delta: 51.5MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 3957]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L3980] struct v4l2_subdev *si4713_subdev_tuner_ops_group1 ; [L3981] int ldv_irq_1_3 = 0; [L3982] void *ldv_irq_data_1_1 ; [L3983] int ldv_irq_1_0 = 0; [L3984] void *ldv_irq_data_1_0 ; [L3985] int ldv_state_variable_0 ; [L3986] struct v4l2_frequency *si4713_subdev_tuner_ops_group0 ; [L3987] struct v4l2_control *si4713_subdev_core_ops_group2 ; [L3988] int ldv_state_variable_2 ; [L3989] void *ldv_irq_data_1_3 ; [L3990] void *ldv_irq_data_1_2 ; [L3991] int ldv_irq_1_2 = 0; [L3992] int LDV_IN_INTERRUPT = 1; [L3993] int ldv_irq_1_1 = 0; [L3994] int ldv_irq_line_1_3 ; [L3995] struct v4l2_subdev *si4713_subdev_core_ops_group1 ; [L3996] struct v4l2_ext_controls *si4713_subdev_core_ops_group0 ; [L3997] int ldv_state_variable_3 ; [L3998] int ldv_irq_line_1_0 ; [L3999] int ref_cnt ; [L4000] struct v4l2_modulator *si4713_subdev_tuner_ops_group2 ; [L4001] int ldv_irq_line_1_1 ; [L4002] struct i2c_client *si4713_i2c_driver_group0 ; [L4003] int ldv_state_variable_1 ; [L4004] int ldv_irq_line_1_2 ; [L4005] int ldv_state_variable_4 ; [L4144] static int debug ; [L4145] static char const *si4713_supply_names[2U] = { "vio", "vdd"}; [L4146-L4156] static long limiter_times[40U] = { 2000L, 250L, 1000L, 500L, 510L, 1000L, 255L, 2000L, 170L, 3000L, 127L, 4020L, 102L, 5010L, 85L, 6020L, 73L, 7010L, 64L, 7990L, 57L, 8970L, 51L, 10030L, 25L, 20470L, 17L, 30110L, 13L, 39380L, 10L, 51190L, 8L, 63690L, 7L, 73140L, 6L, 85330L, 5L, 102390L}; [L4157-L4160] static unsigned long acomp_rtimes[10U] = { 0UL, 100000UL, 1UL, 200000UL, 2UL, 350000UL, 3UL, 525000UL, 4UL, 1000000UL}; [L4161-L4162] static unsigned long preemphasis_values[6U] = { 2UL, 0UL, 1UL, 1UL, 0UL, 2UL}; [L5779-L5781] static struct v4l2_subdev_core_ops const si4713_subdev_core_ops = {0, 0, 0, 0, 0, 0, 0, & si4713_queryctrl, & si4713_g_ctrl, & si4713_s_ctrl, & si4713_g_ext_ctrls, & si4713_s_ext_ctrls, 0, 0, 0, & si4713_ioctl, 0, 0, 0, 0, 0, 0}; [L5949-L5951] static struct v4l2_subdev_tuner_ops const si4713_subdev_tuner_ops = {0, 0, & si4713_s_frequency, & si4713_g_frequency, 0, 0, & si4713_g_modulator, & si4713_s_modulator, 0, 0}; [L5952-L5953] static struct v4l2_subdev_ops const si4713_subdev_ops = {& si4713_subdev_core_ops, & si4713_subdev_tuner_ops, 0, 0, 0, 0, 0, 0}; [L6083] static struct i2c_device_id const si4713_id[2U] = { {{'s', 'i', '4', '7', '1', '3', '\000'}, 0UL}}; [L6084] struct i2c_device_id const __mod_i2c_device_table ; [L6085-L6089] static struct i2c_driver si4713_i2c_driver = {0U, 0, 0, & si4713_probe, & si4713_remove, 0, 0, 0, 0, 0, {"si4713", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, (struct i2c_device_id const *)(& si4713_id), 0, 0, {0, 0}}; [L6105] int ldv_retval_0 ; [L6106] int ldv_retval_1 ; VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6271] unsigned int ldvarg1 ; [L6272] unsigned int tmp ; [L6273] void *ldvarg0 ; [L6274] void *tmp___0 ; [L6275] struct v4l2_queryctrl *ldvarg2 ; [L6276] void *tmp___1 ; [L6277] struct i2c_device_id *ldvarg3 ; [L6278] void *tmp___2 ; [L6279] int tmp___3 ; [L6280] int tmp___4 ; [L6281] int tmp___5 ; [L6282] int tmp___6 ; [L6283] int tmp___7 ; [L6285] tmp = __VERIFIER_nondet_uint() [L6286] ldvarg1 = tmp VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22] [L6287] CALL, EXPR ldv_zalloc(1UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1, tmp___0=-2] [L6287] RET, EXPR ldv_zalloc(1UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(1UL)={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22] [L6287] tmp___0 = ldv_zalloc(1UL) [L6288] ldvarg0 = tmp___0 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}] [L6289] CALL, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=68, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=68, tmp___0=-3] [L6289] RET, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(68UL)={0:0}, ldvarg0={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}] [L6289] tmp___1 = ldv_zalloc(68UL) [L6290] ldvarg2 = (struct v4l2_queryctrl *)tmp___1 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}] [L6291] CALL, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=32, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=32, tmp___0=-4] [L6291] RET, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(32UL)={0:0}, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}] [L6291] tmp___2 = ldv_zalloc(32UL) [L6292] ldvarg3 = (struct i2c_device_id *)tmp___2 [L6293] FCALL ldv_initialize() [L6294] ldv_state_variable_4 = 0 [L6295] ldv_state_variable_1 = 1 [L6296] ref_cnt = 0 [L6297] ldv_state_variable_0 = 1 [L6298] ldv_state_variable_3 = 0 [L6299] ldv_state_variable_2 = 0 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: [L6356] case 1: [L6362] case 2: VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2] [L6363] COND TRUE ldv_state_variable_0 != 0 [L6364] tmp___5 = __VERIFIER_nondet_int() [L6366] case 0: [L6374] case 1: VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2, tmp___5=1] [L6375] COND TRUE ldv_state_variable_0 == 1 [L6376] CALL, EXPR si4713_module_init() [L6092] int tmp ; [L6094] CALL, EXPR i2c_add_driver(& si4713_i2c_driver) [L4108] int tmp ; [L4110] CALL, EXPR i2c_register_driver(& __this_module, driver) [L6677] return __VERIFIER_nondet_int(); [L4110] RET, EXPR i2c_register_driver(& __this_module, driver) [L4110] tmp = i2c_register_driver(& __this_module, driver) [L4111] return (tmp); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, driver={67:0}, driver={67:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=0] [L6094] RET, EXPR i2c_add_driver(& si4713_i2c_driver) [L6094] tmp = i2c_add_driver(& si4713_i2c_driver) [L6095] return (tmp); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=0] [L6376] RET, EXPR si4713_module_init() [L6376] ldv_retval_0 = si4713_module_init() [L6377] COND TRUE ldv_retval_0 == 0 [L6378] ldv_state_variable_0 = 3 [L6379] ldv_state_variable_2 = 1 [L6380] CALL ldv_initialize_i2c_driver_2() [L6111] void *tmp ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6113] CALL, EXPR ldv_zalloc(1168UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1168, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1168, tmp___0=-5] [L6113] RET, EXPR ldv_zalloc(1168UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(1168UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6113] tmp = ldv_zalloc(1168UL) [L6114] si4713_i2c_driver_group0 = (struct i2c_client *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6380] RET ldv_initialize_i2c_driver_2() [L6381] ldv_state_variable_3 = 1 [L6382] CALL ldv_initialize_v4l2_subdev_tuner_ops_3() [L6256] void *tmp ; [L6257] void *tmp___0 ; [L6258] void *tmp___1 ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6260] CALL, EXPR ldv_zalloc(44UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=44, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=44, tmp___0=-6] [L6260] RET, EXPR ldv_zalloc(44UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(44UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6260] tmp = ldv_zalloc(44UL) [L6261] si4713_subdev_tuner_ops_group0 = (struct v4l2_frequency *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6262] CALL, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1736, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1736, tmp___0=-7] [L6262] RET, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(1736UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6262] tmp___0 = ldv_zalloc(1736UL) [L6263] si4713_subdev_tuner_ops_group1 = (struct v4l2_subdev *)tmp___0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6264] CALL, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=68, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=68, tmp___0=-8] [L6264] RET, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(68UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6264] tmp___1 = ldv_zalloc(68UL) [L6265] si4713_subdev_tuner_ops_group2 = (struct v4l2_modulator *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}, tmp___1={0:0}] [L6382] RET ldv_initialize_v4l2_subdev_tuner_ops_3() [L6383] ldv_state_variable_4 = 1 [L6384] CALL ldv_initialize_v4l2_subdev_core_ops_4() [L6120] void *tmp ; [L6121] void *tmp___0 ; [L6122] void *tmp___1 ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6124] CALL, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=32, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=32, tmp___0=-9] [L6124] RET, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(32UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6124] tmp = ldv_zalloc(32UL) [L6125] si4713_subdev_core_ops_group0 = (struct v4l2_ext_controls *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6126] CALL, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1736, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1736, tmp___0=-10] [L6126] RET, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(1736UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6126] tmp___0 = ldv_zalloc(1736UL) [L6127] si4713_subdev_core_ops_group1 = (struct v4l2_subdev *)tmp___0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6128] CALL, EXPR ldv_zalloc(8UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=8, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=8, tmp___0=-11] [L6128] RET, EXPR ldv_zalloc(8UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(8UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6128] tmp___1 = ldv_zalloc(8UL) [L6129] si4713_subdev_core_ops_group2 = (struct v4l2_control *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}, tmp___1={0:0}] [L6384] RET ldv_initialize_v4l2_subdev_core_ops_4() [L6387] COND FALSE !(ldv_retval_0 != 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2, tmp___5=1] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=0, tmp___5=1] [L6304] COND TRUE ldv_state_variable_4 != 0 [L6305] tmp___4 = __VERIFIER_nondet_int() [L6307] case 0: [L6314] case 1: [L6321] case 2: [L6328] case 3: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=0, tmp___4=3, tmp___5=1] [L6329] COND TRUE ldv_state_variable_4 == 1 [L6330] CALL si4713_s_ext_ctrls(si4713_subdev_core_ops_group1, si4713_subdev_core_ops_group0) [L5502] struct si4713_device *sdev ; [L5503] struct v4l2_subdev const *__mptr ; [L5504] int i ; [L5505] int err ; [L5507] __mptr = (struct v4l2_subdev const *)sd [L5508] sdev = (struct si4713_device *)__mptr [L5509] EXPR ctrls->ctrl_class VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->ctrl_class=10158080, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5509] COND FALSE !(ctrls->ctrl_class != 10158080U) [L5513] i = 0 VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5536] EXPR ctrls->count VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->count=4294967297, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5536] COND TRUE (__u32 )i < ctrls->count [L5516] EXPR ctrls->controls [L5516] (ctrls->controls + (unsigned long )i)->id [L5517] case 10160389U: VAL [(ctrls->controls + (unsigned long )i)->id=10160389, __mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->controls={4294967300:0}, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5518] case 10160390U: [L5519] EXPR ctrls->controls [L5519] CALL si4713_write_econtrol_string(sdev, ctrls->controls + (unsigned long )i) [L4924] struct v4l2_queryctrl vqc ; [L4925] int len ; [L4926] s32 rval ; [L4927] char ps_name[97U] ; [L4928] unsigned long tmp ; [L4929] size_t tmp___0 ; [L4930] char radio_text[385U] ; [L4931] unsigned long tmp___1 ; [L4932] size_t tmp___2 ; [L4934] rval = 0 [L4935] EXPR control->id [L4935] vqc.id = control->id [L4936] CALL, EXPR si4713_queryctrl(& sdev->sd, & vqc) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={69:0}, ref_cnt=0, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5588] int rval ; [L5590] rval = 0 [L5591] qc->id [L5592] case 9963785U: [L5595] case 10160386U: [L5598] case 10160387U: [L5601] case 10160385U: [L5604] case 10160389U: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={69:0}, qc={69:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5605] CALL, EXPR v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) VAL [\old(arg1)=0, \old(arg2)=96, \old(arg3)=8, \old(arg4)=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, arg0={69:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6730] return __VERIFIER_nondet_int(); [L5605] RET, EXPR v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={69:0}, qc={69:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, v4l2_ctrl_query_fill(qc, 0, 96, 8, 0)=0] [L5605] rval = v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) [L5657] return (rval); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={69:0}, qc={69:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L4936] RET, EXPR si4713_queryctrl(& sdev->sd, & vqc) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, control={4294967300:0}, control={4294967300:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ps_name={71:0}, radio_text={70:0}, ref_cnt=0, rval=0, sdev={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_queryctrl(& sdev->sd, & vqc)=0, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, vqc={69:0}] [L4936] rval = si4713_queryctrl(& sdev->sd, & vqc) [L4937] COND FALSE !(rval < 0) [L4941] control->id [L4942] case 10160389U: [L4943] EXPR control->size [L4943] len = (int )(control->size - 1U) [L4944] COND FALSE !(len > 96) [L4949] EXPR control->ldv_23757.string VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, control={4294967300:0}, control={4294967300:0}, control->id=10160389, control->ldv_23757.string={4294967310:4294967308}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, len=-2147483648, limiter_times={60:0}, preemphasis_values={62:0}, ps_name={71:0}, radio_text={70:0}, ref_cnt=0, rval=0, sdev={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, vqc={69:0}] [L4949-L4950] CALL ldv_copy_from_user_7((void *)(& ps_name), (void const *)control->ldv_23757.string, (unsigned long )len) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6524] unsigned long tmp ; VAL [\old(n)=-2147483648, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, from={4294967310:4294967308}, from={4294967310:4294967308}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, n=-2147483648, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, to={71:0}, to={71:0}] [L6526] CALL ldv_check_len((long )n) VAL [\old(n)=-2147483648, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6599] COND FALSE !(n >= 0L) VAL [\old(n)=-2147483648, __mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, n=-2147483648, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6601] CALL ldv_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3957] reach_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967304}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 52 procedures, 1041 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 91.0s, OverallIterations: 6, TraceHistogramMax: 10, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 88.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 10 mSolverCounterUnknown, 5229 SdHoareTripleChecker+Valid, 87.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 4607 mSDsluCounter, 56785 SdHoareTripleChecker+Invalid, 81.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 46635 mSDsCounter, 1796 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 24276 IncrementalHoareTripleChecker+Invalid, 26082 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1796 mSolverCounterUnsat, 10150 mSDtfsCounter, 24276 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 175 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1481occurred in iteration=5, InterpolantAutomatonStates: 53, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 5 MinimizatonAttempts, 4224 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 646 NumberOfCodeBlocks, 646 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 521 ConstructedInterpolants, 0 QuantifiedInterpolants, 1290 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 740/740 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-12-07 00:40:50,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_faaa6db7-54ce-40b8-93fc-940379b690fe/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE