./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 19:57:18,661 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 19:57:18,663 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 19:57:18,687 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 19:57:18,687 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 19:57:18,688 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 19:57:18,690 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 19:57:18,691 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 19:57:18,693 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 19:57:18,694 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 19:57:18,695 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 19:57:18,696 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 19:57:18,696 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 19:57:18,697 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 19:57:18,698 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 19:57:18,699 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 19:57:18,700 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 19:57:18,701 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 19:57:18,702 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 19:57:18,704 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 19:57:18,705 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 19:57:18,707 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 19:57:18,708 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 19:57:18,709 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 19:57:18,713 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 19:57:18,714 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 19:57:18,714 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 19:57:18,715 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 19:57:18,716 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 19:57:18,717 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 19:57:18,717 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 19:57:18,718 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 19:57:18,719 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 19:57:18,719 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 19:57:18,720 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 19:57:18,721 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 19:57:18,721 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 19:57:18,721 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 19:57:18,722 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 19:57:18,722 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 19:57:18,723 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 19:57:18,724 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-12-06 19:57:18,747 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 19:57:18,748 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 19:57:18,748 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 19:57:18,748 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 19:57:18,749 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-12-06 19:57:18,749 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-12-06 19:57:18,749 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 19:57:18,750 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 19:57:18,750 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 19:57:18,750 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 19:57:18,750 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-06 19:57:18,750 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 19:57:18,751 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-12-06 19:57:18,752 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 19:57:18,752 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 19:57:18,752 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-12-06 19:57:18,752 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-06 19:57:18,752 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-12-06 19:57:18,753 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-12-06 19:57:18,754 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-12-06 19:57:18,754 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 19:57:18,754 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2021-12-06 19:57:18,944 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 19:57:18,959 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 19:57:18,961 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 19:57:18,962 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 19:57:18,963 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 19:57:18,964 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:57:19,005 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/83ae7c20a/fb7e2b72f6f5404b86e89ac0063c3d82/FLAG835d7a08f [2021-12-06 19:57:19,635 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 19:57:19,635 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:57:19,664 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/83ae7c20a/fb7e2b72f6f5404b86e89ac0063c3d82/FLAG835d7a08f [2021-12-06 19:57:20,061 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/83ae7c20a/fb7e2b72f6f5404b86e89ac0063c3d82 [2021-12-06 19:57:20,065 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 19:57:20,067 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 19:57:20,069 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 19:57:20,069 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 19:57:20,072 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 19:57:20,072 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:57:20" (1/1) ... [2021-12-06 19:57:20,073 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@522fb1a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:20, skipping insertion in model container [2021-12-06 19:57:20,074 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:57:20" (1/1) ... [2021-12-06 19:57:20,078 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 19:57:20,144 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 19:57:21,102 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2021-12-06 19:57:21,129 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:57:21,146 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 19:57:21,387 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2021-12-06 19:57:21,392 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:57:21,532 INFO L208 MainTranslator]: Completed translation [2021-12-06 19:57:21,532 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21 WrapperNode [2021-12-06 19:57:21,533 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 19:57:21,534 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 19:57:21,534 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 19:57:21,534 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 19:57:21,539 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,593 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,678 INFO L137 Inliner]: procedures = 200, calls = 1489, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3293 [2021-12-06 19:57:21,678 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 19:57:21,679 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 19:57:21,679 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 19:57:21,679 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 19:57:21,685 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,685 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,701 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,701 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,764 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,774 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,788 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 19:57:21,789 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 19:57:21,789 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 19:57:21,789 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 19:57:21,790 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (1/1) ... [2021-12-06 19:57:21,796 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-06 19:57:21,805 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:21,829 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-12-06 19:57:21,837 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-12-06 19:57:21,866 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-12-06 19:57:21,866 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-12-06 19:57:21,866 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2021-12-06 19:57:21,867 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2021-12-06 19:57:21,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2021-12-06 19:57:21,868 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-12-06 19:57:21,868 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2021-12-06 19:57:21,869 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2021-12-06 19:57:21,869 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2021-12-06 19:57:21,869 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2021-12-06 19:57:21,869 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2021-12-06 19:57:21,869 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2021-12-06 19:57:21,869 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2021-12-06 19:57:21,870 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2021-12-06 19:57:21,870 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2021-12-06 19:57:21,871 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2021-12-06 19:57:21,871 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2021-12-06 19:57:21,871 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2021-12-06 19:57:21,871 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2021-12-06 19:57:21,871 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2021-12-06 19:57:21,871 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2021-12-06 19:57:21,871 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2021-12-06 19:57:21,871 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2021-12-06 19:57:21,872 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2021-12-06 19:57:21,872 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2021-12-06 19:57:21,872 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2021-12-06 19:57:21,872 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2021-12-06 19:57:21,872 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2021-12-06 19:57:21,872 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2021-12-06 19:57:21,873 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2021-12-06 19:57:21,873 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2021-12-06 19:57:21,873 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2021-12-06 19:57:21,873 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-12-06 19:57:21,873 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2021-12-06 19:57:21,874 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2021-12-06 19:57:21,874 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2021-12-06 19:57:21,874 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2021-12-06 19:57:21,874 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2021-12-06 19:57:21,874 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2021-12-06 19:57:21,875 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2021-12-06 19:57:21,875 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2021-12-06 19:57:21,875 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2021-12-06 19:57:21,875 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2021-12-06 19:57:21,875 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2021-12-06 19:57:21,875 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2021-12-06 19:57:21,875 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2021-12-06 19:57:21,875 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2021-12-06 19:57:21,875 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2021-12-06 19:57:21,875 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-06 19:57:21,876 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2021-12-06 19:57:21,876 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2021-12-06 19:57:21,877 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2021-12-06 19:57:21,877 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2021-12-06 19:57:21,877 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2021-12-06 19:57:21,877 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2021-12-06 19:57:21,877 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2021-12-06 19:57:21,877 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2021-12-06 19:57:21,877 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 19:57:21,877 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 19:57:21,877 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2021-12-06 19:57:21,878 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2021-12-06 19:57:22,202 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 19:57:22,204 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 19:57:22,718 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,723 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,730 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,731 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,733 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,733 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:22,739 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:57:24,346 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##258: assume false; [2021-12-06 19:57:24,346 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##259: assume !false; [2021-12-06 19:57:24,346 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##265: assume !false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##264: assume false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##214: assume !false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##213: assume false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##228: assume !false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##227: assume false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##92: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##91: assume false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##391: assume !false; [2021-12-06 19:57:24,347 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##390: assume false; [2021-12-06 19:57:24,378 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 19:57:24,393 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 19:57:24,393 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-12-06 19:57:24,396 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:57:24 BoogieIcfgContainer [2021-12-06 19:57:24,396 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 19:57:24,397 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-12-06 19:57:24,397 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-12-06 19:57:24,399 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-12-06 19:57:24,400 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.12 07:57:20" (1/3) ... [2021-12-06 19:57:24,400 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@136cb383 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.12 07:57:24, skipping insertion in model container [2021-12-06 19:57:24,400 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:21" (2/3) ... [2021-12-06 19:57:24,400 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@136cb383 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.12 07:57:24, skipping insertion in model container [2021-12-06 19:57:24,400 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:57:24" (3/3) ... [2021-12-06 19:57:24,401 INFO L111 eAbstractionObserver]: Analyzing ICFG module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:57:24,405 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-12-06 19:57:24,405 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-12-06 19:57:24,453 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-12-06 19:57:24,458 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-12-06 19:57:24,458 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-12-06 19:57:24,489 INFO L276 IsEmpty]: Start isEmpty. Operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) [2021-12-06 19:57:24,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2021-12-06 19:57:24,493 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:24,493 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:24,494 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:24,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:24,498 INFO L85 PathProgramCache]: Analyzing trace with hash 953068106, now seen corresponding path program 1 times [2021-12-06 19:57:24,504 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:24,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122523349] [2021-12-06 19:57:24,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:24,505 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:24,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:24,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2021-12-06 19:57:24,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:24,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 9 [2021-12-06 19:57:24,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:24,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:24,798 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:24,798 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122523349] [2021-12-06 19:57:24,798 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2122523349] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:24,798 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:24,799 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:57:24,800 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884891426] [2021-12-06 19:57:24,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:24,804 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:57:24,804 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:24,824 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:57:24,824 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:57:24,827 INFO L87 Difference]: Start difference. First operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:57:24,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:24,941 INFO L93 Difference]: Finished difference Result 2123 states and 2971 transitions. [2021-12-06 19:57:24,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:57:24,944 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 21 [2021-12-06 19:57:24,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:24,964 INFO L225 Difference]: With dead ends: 2123 [2021-12-06 19:57:24,964 INFO L226 Difference]: Without dead ends: 1060 [2021-12-06 19:57:24,972 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:57:24,975 INFO L933 BasicCegarLoop]: 1475 mSDtfsCounter, 1 mSDsluCounter, 1473 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2948 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:24,976 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 2948 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:24,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1060 states. [2021-12-06 19:57:25,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1060 to 1059. [2021-12-06 19:57:25,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 743 states have (on average 1.2866756393001346) internal successors, (956), 749 states have internal predecessors, (956), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2021-12-06 19:57:25,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1474 transitions. [2021-12-06 19:57:25,076 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1474 transitions. Word has length 21 [2021-12-06 19:57:25,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:25,076 INFO L470 AbstractCegarLoop]: Abstraction has 1059 states and 1474 transitions. [2021-12-06 19:57:25,076 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:57:25,077 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1474 transitions. [2021-12-06 19:57:25,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2021-12-06 19:57:25,078 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:25,078 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:25,078 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-12-06 19:57:25,078 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:25,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:25,078 INFO L85 PathProgramCache]: Analyzing trace with hash 172351718, now seen corresponding path program 1 times [2021-12-06 19:57:25,079 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:25,079 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095850200] [2021-12-06 19:57:25,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:25,079 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:25,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:25,163 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2021-12-06 19:57:25,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:25,169 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2021-12-06 19:57:25,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:25,176 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:25,176 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:25,177 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095850200] [2021-12-06 19:57:25,177 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095850200] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:25,177 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1661766470] [2021-12-06 19:57:25,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:25,177 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:25,177 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:25,178 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:25,179 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-12-06 19:57:25,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:25,444 INFO L263 TraceCheckSpWp]: Trace formula consists of 957 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:57:25,448 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:25,501 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-06 19:57:25,502 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:57:25,502 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1661766470] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:25,502 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 19:57:25,502 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2021-12-06 19:57:25,503 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045924396] [2021-12-06 19:57:25,504 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:25,505 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:57:25,505 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:25,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:57:25,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:25,506 INFO L87 Difference]: Start difference. First operand 1059 states and 1474 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:57:25,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:25,635 INFO L93 Difference]: Finished difference Result 3149 states and 4388 transitions. [2021-12-06 19:57:25,635 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:57:25,636 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 23 [2021-12-06 19:57:25,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:25,648 INFO L225 Difference]: With dead ends: 3149 [2021-12-06 19:57:25,648 INFO L226 Difference]: Without dead ends: 2098 [2021-12-06 19:57:25,651 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:25,652 INFO L933 BasicCegarLoop]: 1973 mSDtfsCounter, 1448 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1448 SdHoareTripleChecker+Valid, 3425 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:25,653 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1448 Valid, 3425 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:25,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2098 states. [2021-12-06 19:57:25,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2098 to 2095. [2021-12-06 19:57:25,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2095 states, 1468 states have (on average 1.284741144414169) internal successors, (1886), 1479 states have internal predecessors, (1886), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2021-12-06 19:57:25,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2095 states to 2095 states and 2916 transitions. [2021-12-06 19:57:25,750 INFO L78 Accepts]: Start accepts. Automaton has 2095 states and 2916 transitions. Word has length 23 [2021-12-06 19:57:25,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:25,751 INFO L470 AbstractCegarLoop]: Abstraction has 2095 states and 2916 transitions. [2021-12-06 19:57:25,751 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:57:25,751 INFO L276 IsEmpty]: Start isEmpty. Operand 2095 states and 2916 transitions. [2021-12-06 19:57:25,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2021-12-06 19:57:25,754 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:25,755 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:25,786 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-12-06 19:57:25,955 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:25,957 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:25,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:25,959 INFO L85 PathProgramCache]: Analyzing trace with hash -1037625081, now seen corresponding path program 1 times [2021-12-06 19:57:25,959 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:25,960 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110808132] [2021-12-06 19:57:25,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:25,961 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:26,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:26,126 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 6 [2021-12-06 19:57:26,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:26,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2021-12-06 19:57:26,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:26,140 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2021-12-06 19:57:26,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:26,148 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:26,148 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:26,148 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110808132] [2021-12-06 19:57:26,148 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110808132] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:26,149 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1025487681] [2021-12-06 19:57:26,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:26,149 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:26,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:26,150 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:26,151 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-12-06 19:57:26,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:26,417 INFO L263 TraceCheckSpWp]: Trace formula consists of 1091 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:57:26,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:26,483 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:26,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:57:26,544 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:26,544 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1025487681] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:57:26,544 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:57:26,545 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2021-12-06 19:57:26,545 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [93659913] [2021-12-06 19:57:26,545 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:57:26,545 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-12-06 19:57:26,545 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:26,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 19:57:26,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:26,546 INFO L87 Difference]: Start difference. First operand 2095 states and 2916 transitions. Second operand has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:57:26,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:26,632 INFO L93 Difference]: Finished difference Result 4190 states and 5834 transitions. [2021-12-06 19:57:26,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:57:26,633 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 43 [2021-12-06 19:57:26,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:26,644 INFO L225 Difference]: With dead ends: 4190 [2021-12-06 19:57:26,644 INFO L226 Difference]: Without dead ends: 2101 [2021-12-06 19:57:26,649 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:26,650 INFO L933 BasicCegarLoop]: 1470 mSDtfsCounter, 6 mSDsluCounter, 2936 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 4406 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:26,651 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 4406 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:26,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2101 states. [2021-12-06 19:57:26,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2101 to 2101. [2021-12-06 19:57:26,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2101 states, 1474 states have (on average 1.2835820895522387) internal successors, (1892), 1485 states have internal predecessors, (1892), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2021-12-06 19:57:26,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2101 states to 2101 states and 2922 transitions. [2021-12-06 19:57:26,733 INFO L78 Accepts]: Start accepts. Automaton has 2101 states and 2922 transitions. Word has length 43 [2021-12-06 19:57:26,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:26,733 INFO L470 AbstractCegarLoop]: Abstraction has 2101 states and 2922 transitions. [2021-12-06 19:57:26,733 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:57:26,733 INFO L276 IsEmpty]: Start isEmpty. Operand 2101 states and 2922 transitions. [2021-12-06 19:57:26,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-12-06 19:57:26,736 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:26,736 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:26,764 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-12-06 19:57:26,936 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2021-12-06 19:57:26,937 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:26,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:26,937 INFO L85 PathProgramCache]: Analyzing trace with hash 2025144539, now seen corresponding path program 2 times [2021-12-06 19:57:26,937 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:26,937 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706816850] [2021-12-06 19:57:26,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:26,937 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:26,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,025 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2021-12-06 19:57:27,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,030 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2021-12-06 19:57:27,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2021-12-06 19:57:27,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,041 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-12-06 19:57:27,041 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:27,041 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706816850] [2021-12-06 19:57:27,041 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1706816850] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:27,041 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:27,041 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 19:57:27,041 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057418028] [2021-12-06 19:57:27,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:27,042 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-06 19:57:27,042 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:27,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 19:57:27,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:27,042 INFO L87 Difference]: Start difference. First operand 2101 states and 2922 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:57:27,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:27,646 INFO L93 Difference]: Finished difference Result 6065 states and 8726 transitions. [2021-12-06 19:57:27,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:57:27,647 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 49 [2021-12-06 19:57:27,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:27,677 INFO L225 Difference]: With dead ends: 6065 [2021-12-06 19:57:27,677 INFO L226 Difference]: Without dead ends: 3983 [2021-12-06 19:57:27,686 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:27,687 INFO L933 BasicCegarLoop]: 2800 mSDtfsCounter, 2190 mSDsluCounter, 6447 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 583 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2383 SdHoareTripleChecker+Valid, 9247 SdHoareTripleChecker+Invalid, 599 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 583 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:27,688 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2383 Valid, 9247 Invalid, 599 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [583 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-12-06 19:57:27,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3983 states. [2021-12-06 19:57:27,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3983 to 2035. [2021-12-06 19:57:27,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2035 states, 1433 states have (on average 1.2840195394277738) internal successors, (1840), 1443 states have internal predecessors, (1840), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2021-12-06 19:57:27,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2035 states to 2035 states and 2820 transitions. [2021-12-06 19:57:27,824 INFO L78 Accepts]: Start accepts. Automaton has 2035 states and 2820 transitions. Word has length 49 [2021-12-06 19:57:27,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:27,824 INFO L470 AbstractCegarLoop]: Abstraction has 2035 states and 2820 transitions. [2021-12-06 19:57:27,824 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:57:27,824 INFO L276 IsEmpty]: Start isEmpty. Operand 2035 states and 2820 transitions. [2021-12-06 19:57:27,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2021-12-06 19:57:27,827 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:27,827 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:27,827 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-12-06 19:57:27,827 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:27,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:27,827 INFO L85 PathProgramCache]: Analyzing trace with hash -252131403, now seen corresponding path program 1 times [2021-12-06 19:57:27,828 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:27,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999842548] [2021-12-06 19:57:27,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:27,828 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:27,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2021-12-06 19:57:27,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,943 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2021-12-06 19:57:27,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,949 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2021-12-06 19:57:27,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:27,957 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:27,957 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:27,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999842548] [2021-12-06 19:57:27,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1999842548] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:27,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1843078972] [2021-12-06 19:57:27,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:27,957 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:27,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:27,958 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:27,966 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-12-06 19:57:28,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:28,212 INFO L263 TraceCheckSpWp]: Trace formula consists of 1145 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 19:57:28,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:28,262 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:28,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:57:28,337 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:28,337 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1843078972] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:57:28,337 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:57:28,337 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2021-12-06 19:57:28,337 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387136680] [2021-12-06 19:57:28,337 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:57:28,338 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-12-06 19:57:28,338 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:28,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-12-06 19:57:28,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-12-06 19:57:28,339 INFO L87 Difference]: Start difference. First operand 2035 states and 2820 transitions. Second operand has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:57:28,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:28,471 INFO L93 Difference]: Finished difference Result 4070 states and 5645 transitions. [2021-12-06 19:57:28,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 19:57:28,471 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 51 [2021-12-06 19:57:28,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:28,485 INFO L225 Difference]: With dead ends: 4070 [2021-12-06 19:57:28,486 INFO L226 Difference]: Without dead ends: 2047 [2021-12-06 19:57:28,493 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 102 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-12-06 19:57:28,494 INFO L933 BasicCegarLoop]: 1470 mSDtfsCounter, 10 mSDsluCounter, 7340 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 8810 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:28,494 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 8810 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:28,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2047 states. [2021-12-06 19:57:28,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2047 to 2047. [2021-12-06 19:57:28,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2047 states, 1445 states have (on average 1.2816608996539793) internal successors, (1852), 1455 states have internal predecessors, (1852), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2021-12-06 19:57:28,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2047 states to 2047 states and 2832 transitions. [2021-12-06 19:57:28,596 INFO L78 Accepts]: Start accepts. Automaton has 2047 states and 2832 transitions. Word has length 51 [2021-12-06 19:57:28,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:28,596 INFO L470 AbstractCegarLoop]: Abstraction has 2047 states and 2832 transitions. [2021-12-06 19:57:28,596 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.846153846153846) internal successors, (63), 13 states have internal predecessors, (63), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:57:28,596 INFO L276 IsEmpty]: Start isEmpty. Operand 2047 states and 2832 transitions. [2021-12-06 19:57:28,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-12-06 19:57:28,598 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:28,598 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:28,632 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2021-12-06 19:57:28,798 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:28,799 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:28,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:28,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1812840541, now seen corresponding path program 2 times [2021-12-06 19:57:28,799 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:28,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443734086] [2021-12-06 19:57:28,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:28,800 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:28,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:28,964 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2021-12-06 19:57:28,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:28,970 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2021-12-06 19:57:28,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:28,976 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2021-12-06 19:57:28,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:28,983 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:28,983 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:28,983 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443734086] [2021-12-06 19:57:28,983 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1443734086] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:28,983 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [365322295] [2021-12-06 19:57:28,983 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:57:28,983 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:28,984 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:28,984 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:28,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-12-06 19:57:29,239 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:57:29,240 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:57:29,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 1085 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 19:57:29,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:29,349 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-12-06 19:57:29,349 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:57:29,349 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [365322295] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:29,349 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 19:57:29,349 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [13] total 15 [2021-12-06 19:57:29,349 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423588124] [2021-12-06 19:57:29,350 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:29,350 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:57:29,350 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:29,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:57:29,351 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=127, Unknown=0, NotChecked=0, Total=210 [2021-12-06 19:57:29,351 INFO L87 Difference]: Start difference. First operand 2047 states and 2832 transitions. Second operand has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:57:30,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:30,275 INFO L93 Difference]: Finished difference Result 3025 states and 4186 transitions. [2021-12-06 19:57:30,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:57:30,276 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 63 [2021-12-06 19:57:30,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:30,292 INFO L225 Difference]: With dead ends: 3025 [2021-12-06 19:57:30,292 INFO L226 Difference]: Without dead ends: 3022 [2021-12-06 19:57:30,293 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=127, Unknown=0, NotChecked=0, Total=210 [2021-12-06 19:57:30,294 INFO L933 BasicCegarLoop]: 2597 mSDtfsCounter, 3010 mSDsluCounter, 894 mSDsCounter, 0 mSdLazyCounter, 478 mSolverCounterSat, 326 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3010 SdHoareTripleChecker+Valid, 3491 SdHoareTripleChecker+Invalid, 804 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 326 IncrementalHoareTripleChecker+Valid, 478 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:30,295 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3010 Valid, 3491 Invalid, 804 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [326 Valid, 478 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2021-12-06 19:57:30,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3022 states. [2021-12-06 19:57:30,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3022 to 3015. [2021-12-06 19:57:30,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3015 states, 2127 states have (on average 1.2849083215796897) internal successors, (2733), 2140 states have internal predecessors, (2733), 722 states have call successors, (722), 166 states have call predecessors, (722), 165 states have return successors, (722), 721 states have call predecessors, (722), 720 states have call successors, (722) [2021-12-06 19:57:30,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3015 states to 3015 states and 4177 transitions. [2021-12-06 19:57:30,411 INFO L78 Accepts]: Start accepts. Automaton has 3015 states and 4177 transitions. Word has length 63 [2021-12-06 19:57:30,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:30,411 INFO L470 AbstractCegarLoop]: Abstraction has 3015 states and 4177 transitions. [2021-12-06 19:57:30,411 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:57:30,411 INFO L276 IsEmpty]: Start isEmpty. Operand 3015 states and 4177 transitions. [2021-12-06 19:57:30,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-12-06 19:57:30,413 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:30,413 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:30,447 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-12-06 19:57:30,614 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:30,615 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:30,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:30,616 INFO L85 PathProgramCache]: Analyzing trace with hash -683773550, now seen corresponding path program 1 times [2021-12-06 19:57:30,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:30,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144614975] [2021-12-06 19:57:30,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:30,617 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:30,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:30,833 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2021-12-06 19:57:30,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:30,838 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2021-12-06 19:57:30,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:30,842 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2021-12-06 19:57:30,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:30,847 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2021-12-06 19:57:30,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:30,851 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-12-06 19:57:30,852 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:30,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144614975] [2021-12-06 19:57:30,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1144614975] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:30,852 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:30,852 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 19:57:30,852 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590977183] [2021-12-06 19:57:30,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:30,853 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-06 19:57:30,853 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:30,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 19:57:30,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:30,853 INFO L87 Difference]: Start difference. First operand 3015 states and 4177 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2021-12-06 19:57:31,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:31,313 INFO L93 Difference]: Finished difference Result 6332 states and 8991 transitions. [2021-12-06 19:57:31,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 19:57:31,313 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 67 [2021-12-06 19:57:31,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:31,334 INFO L225 Difference]: With dead ends: 6332 [2021-12-06 19:57:31,334 INFO L226 Difference]: Without dead ends: 4315 [2021-12-06 19:57:31,349 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:31,349 INFO L933 BasicCegarLoop]: 2196 mSDtfsCounter, 2018 mSDsluCounter, 4533 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 656 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2018 SdHoareTripleChecker+Valid, 6729 SdHoareTripleChecker+Invalid, 673 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 656 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:31,349 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2018 Valid, 6729 Invalid, 673 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [656 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-12-06 19:57:31,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4315 states. [2021-12-06 19:57:31,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4315 to 3015. [2021-12-06 19:57:31,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3015 states, 2127 states have (on average 1.2844381758345087) internal successors, (2732), 2140 states have internal predecessors, (2732), 722 states have call successors, (722), 166 states have call predecessors, (722), 165 states have return successors, (722), 721 states have call predecessors, (722), 720 states have call successors, (722) [2021-12-06 19:57:31,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3015 states to 3015 states and 4176 transitions. [2021-12-06 19:57:31,456 INFO L78 Accepts]: Start accepts. Automaton has 3015 states and 4176 transitions. Word has length 67 [2021-12-06 19:57:31,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:31,457 INFO L470 AbstractCegarLoop]: Abstraction has 3015 states and 4176 transitions. [2021-12-06 19:57:31,457 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2021-12-06 19:57:31,457 INFO L276 IsEmpty]: Start isEmpty. Operand 3015 states and 4176 transitions. [2021-12-06 19:57:31,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-12-06 19:57:31,459 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:31,459 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:31,459 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-12-06 19:57:31,459 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:31,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:31,459 INFO L85 PathProgramCache]: Analyzing trace with hash -2088815525, now seen corresponding path program 1 times [2021-12-06 19:57:31,459 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:31,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690761679] [2021-12-06 19:57:31,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:31,460 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:31,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2021-12-06 19:57:31,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,605 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2021-12-06 19:57:31,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,609 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2021-12-06 19:57:31,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,618 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2021-12-06 19:57:31,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,623 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2021-12-06 19:57:31,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,627 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:31,627 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:31,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690761679] [2021-12-06 19:57:31,627 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690761679] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:31,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1485846604] [2021-12-06 19:57:31,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:31,627 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:31,627 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:31,628 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:31,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-12-06 19:57:31,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:31,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 1264 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-06 19:57:31,885 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:31,973 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:31,973 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:57:32,140 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:32,140 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1485846604] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:57:32,140 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:57:32,140 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2021-12-06 19:57:32,140 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355860367] [2021-12-06 19:57:32,140 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:57:32,141 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2021-12-06 19:57:32,141 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:32,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-12-06 19:57:32,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2021-12-06 19:57:32,141 INFO L87 Difference]: Start difference. First operand 3015 states and 4176 transitions. Second operand has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2021-12-06 19:57:33,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:33,134 INFO L93 Difference]: Finished difference Result 6032 states and 8365 transitions. [2021-12-06 19:57:33,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-12-06 19:57:33,134 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 76 [2021-12-06 19:57:33,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:33,147 INFO L225 Difference]: With dead ends: 6032 [2021-12-06 19:57:33,147 INFO L226 Difference]: Without dead ends: 3041 [2021-12-06 19:57:33,152 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2021-12-06 19:57:33,153 INFO L933 BasicCegarLoop]: 1430 mSDtfsCounter, 283 mSDsluCounter, 4207 mSDsCounter, 0 mSdLazyCounter, 1202 mSolverCounterSat, 276 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 320 SdHoareTripleChecker+Valid, 5637 SdHoareTripleChecker+Invalid, 1478 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 276 IncrementalHoareTripleChecker+Valid, 1202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:33,153 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [320 Valid, 5637 Invalid, 1478 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [276 Valid, 1202 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2021-12-06 19:57:33,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3041 states. [2021-12-06 19:57:33,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3041 to 3041. [2021-12-06 19:57:33,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3041 states, 2152 states have (on average 1.2811338289962826) internal successors, (2757), 2166 states have internal predecessors, (2757), 722 states have call successors, (722), 166 states have call predecessors, (722), 166 states have return successors, (723), 721 states have call predecessors, (723), 720 states have call successors, (723) [2021-12-06 19:57:33,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3041 states to 3041 states and 4202 transitions. [2021-12-06 19:57:33,247 INFO L78 Accepts]: Start accepts. Automaton has 3041 states and 4202 transitions. Word has length 76 [2021-12-06 19:57:33,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:33,247 INFO L470 AbstractCegarLoop]: Abstraction has 3041 states and 4202 transitions. [2021-12-06 19:57:33,247 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2021-12-06 19:57:33,247 INFO L276 IsEmpty]: Start isEmpty. Operand 3041 states and 4202 transitions. [2021-12-06 19:57:33,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2021-12-06 19:57:33,249 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:33,249 INFO L514 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:33,271 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2021-12-06 19:57:33,449 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2021-12-06 19:57:33,450 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:33,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:33,451 INFO L85 PathProgramCache]: Analyzing trace with hash 762091787, now seen corresponding path program 2 times [2021-12-06 19:57:33,451 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:33,451 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185946819] [2021-12-06 19:57:33,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:33,452 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:33,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,811 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2021-12-06 19:57:33,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,817 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2021-12-06 19:57:33,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2021-12-06 19:57:33,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2021-12-06 19:57:33,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,841 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2021-12-06 19:57:33,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:33,846 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:33,846 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:33,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185946819] [2021-12-06 19:57:33,847 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185946819] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:33,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1743725359] [2021-12-06 19:57:33,847 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:57:33,847 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:33,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:33,848 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:33,849 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-12-06 19:57:34,127 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:57:34,128 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:57:34,132 INFO L263 TraceCheckSpWp]: Trace formula consists of 1114 conjuncts, 34 conjunts are in the unsatisfiable core [2021-12-06 19:57:34,135 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:34,361 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2021-12-06 19:57:34,362 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:57:34,362 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1743725359] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:34,362 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 19:57:34,362 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [26] total 31 [2021-12-06 19:57:34,362 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653328012] [2021-12-06 19:57:34,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:34,363 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-12-06 19:57:34,363 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:34,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 19:57:34,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=618, Unknown=0, NotChecked=0, Total=930 [2021-12-06 19:57:34,364 INFO L87 Difference]: Start difference. First operand 3041 states and 4202 transitions. Second operand has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2021-12-06 19:57:37,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:37,010 INFO L93 Difference]: Finished difference Result 9020 states and 12805 transitions. [2021-12-06 19:57:37,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-06 19:57:37,010 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 100 [2021-12-06 19:57:37,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:37,037 INFO L225 Difference]: With dead ends: 9020 [2021-12-06 19:57:37,037 INFO L226 Difference]: Without dead ends: 6034 [2021-12-06 19:57:37,044 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=337, Invalid=923, Unknown=0, NotChecked=0, Total=1260 [2021-12-06 19:57:37,044 INFO L933 BasicCegarLoop]: 3463 mSDtfsCounter, 3145 mSDsluCounter, 12934 mSDsCounter, 0 mSdLazyCounter, 2560 mSolverCounterSat, 919 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3339 SdHoareTripleChecker+Valid, 16397 SdHoareTripleChecker+Invalid, 3479 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 919 IncrementalHoareTripleChecker+Valid, 2560 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:37,045 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3339 Valid, 16397 Invalid, 3479 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [919 Valid, 2560 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2021-12-06 19:57:37,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6034 states. [2021-12-06 19:57:37,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6034 to 4004. [2021-12-06 19:57:37,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4004 states, 2829 states have (on average 1.2813715093672675) internal successors, (3625), 2848 states have internal predecessors, (3625), 953 states have call successors, (953), 221 states have call predecessors, (953), 221 states have return successors, (953), 951 states have call predecessors, (953), 951 states have call successors, (953) [2021-12-06 19:57:37,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4004 states to 4004 states and 5531 transitions. [2021-12-06 19:57:37,221 INFO L78 Accepts]: Start accepts. Automaton has 4004 states and 5531 transitions. Word has length 100 [2021-12-06 19:57:37,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:37,221 INFO L470 AbstractCegarLoop]: Abstraction has 4004 states and 5531 transitions. [2021-12-06 19:57:37,222 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2021-12-06 19:57:37,222 INFO L276 IsEmpty]: Start isEmpty. Operand 4004 states and 5531 transitions. [2021-12-06 19:57:37,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2021-12-06 19:57:37,223 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:37,224 INFO L514 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:37,255 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-12-06 19:57:37,424 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:37,425 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:37,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:37,427 INFO L85 PathProgramCache]: Analyzing trace with hash -936469693, now seen corresponding path program 1 times [2021-12-06 19:57:37,427 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:37,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492104425] [2021-12-06 19:57:37,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:37,428 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:37,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2021-12-06 19:57:37,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,817 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2021-12-06 19:57:37,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2021-12-06 19:57:37,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2021-12-06 19:57:37,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,841 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2021-12-06 19:57:37,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:37,846 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:37,846 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:37,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492104425] [2021-12-06 19:57:37,847 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492104425] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:37,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1780657205] [2021-12-06 19:57:37,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:37,847 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:37,847 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:37,848 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:37,849 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-12-06 19:57:38,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:38,115 INFO L263 TraceCheckSpWp]: Trace formula consists of 1446 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-06 19:57:38,117 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:38,232 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:38,232 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:57:38,469 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:57:38,469 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1780657205] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:57:38,469 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-06 19:57:38,469 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 36 [2021-12-06 19:57:38,469 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470646478] [2021-12-06 19:57:38,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-06 19:57:38,470 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2021-12-06 19:57:38,470 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:38,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-12-06 19:57:38,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2021-12-06 19:57:38,472 INFO L87 Difference]: Start difference. First operand 4004 states and 5531 transitions. Second operand has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2021-12-06 19:57:39,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:39,682 INFO L93 Difference]: Finished difference Result 7980 states and 11043 transitions. [2021-12-06 19:57:39,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2021-12-06 19:57:39,683 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 102 [2021-12-06 19:57:39,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:39,692 INFO L225 Difference]: With dead ends: 7980 [2021-12-06 19:57:39,692 INFO L226 Difference]: Without dead ends: 4024 [2021-12-06 19:57:39,700 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2021-12-06 19:57:39,701 INFO L933 BasicCegarLoop]: 1430 mSDtfsCounter, 293 mSDsluCounter, 7727 mSDsCounter, 0 mSdLazyCounter, 2109 mSolverCounterSat, 264 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 330 SdHoareTripleChecker+Valid, 9157 SdHoareTripleChecker+Invalid, 2373 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 264 IncrementalHoareTripleChecker+Valid, 2109 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:39,701 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [330 Valid, 9157 Invalid, 2373 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [264 Valid, 2109 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2021-12-06 19:57:39,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4024 states. [2021-12-06 19:57:39,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4024 to 4024. [2021-12-06 19:57:39,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4024 states, 2849 states have (on average 1.2793962793962794) internal successors, (3645), 2868 states have internal predecessors, (3645), 953 states have call successors, (953), 221 states have call predecessors, (953), 221 states have return successors, (953), 951 states have call predecessors, (953), 951 states have call successors, (953) [2021-12-06 19:57:39,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4024 states to 4024 states and 5551 transitions. [2021-12-06 19:57:39,867 INFO L78 Accepts]: Start accepts. Automaton has 4024 states and 5551 transitions. Word has length 102 [2021-12-06 19:57:39,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:39,867 INFO L470 AbstractCegarLoop]: Abstraction has 4024 states and 5551 transitions. [2021-12-06 19:57:39,867 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 3.5833333333333335) internal successors, (129), 35 states have internal predecessors, (129), 1 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2021-12-06 19:57:39,867 INFO L276 IsEmpty]: Start isEmpty. Operand 4024 states and 5551 transitions. [2021-12-06 19:57:39,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2021-12-06 19:57:39,869 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:39,870 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:39,892 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-12-06 19:57:40,070 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:40,071 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:40,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:40,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1360267477, now seen corresponding path program 2 times [2021-12-06 19:57:40,072 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:40,072 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743645856] [2021-12-06 19:57:40,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:40,073 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:40,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,284 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:40,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:40,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2021-12-06 19:57:40,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,304 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2021-12-06 19:57:40,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,332 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2021-12-06 19:57:40,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:40,337 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:57:40,337 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:40,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743645856] [2021-12-06 19:57:40,337 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1743645856] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:40,337 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:40,337 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-12-06 19:57:40,337 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015531928] [2021-12-06 19:57:40,337 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:40,337 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-12-06 19:57:40,338 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:40,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 19:57:40,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:40,338 INFO L87 Difference]: Start difference. First operand 4024 states and 5551 transitions. Second operand has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-06 19:57:43,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:43,244 INFO L93 Difference]: Finished difference Result 8067 states and 11161 transitions. [2021-12-06 19:57:43,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-06 19:57:43,244 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) Word has length 122 [2021-12-06 19:57:43,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:43,256 INFO L225 Difference]: With dead ends: 8067 [2021-12-06 19:57:43,256 INFO L226 Difference]: Without dead ends: 6044 [2021-12-06 19:57:43,261 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2021-12-06 19:57:43,261 INFO L933 BasicCegarLoop]: 1640 mSDtfsCounter, 2901 mSDsluCounter, 3567 mSDsCounter, 0 mSdLazyCounter, 4734 mSolverCounterSat, 853 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3346 SdHoareTripleChecker+Valid, 5207 SdHoareTripleChecker+Invalid, 5587 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 853 IncrementalHoareTripleChecker+Valid, 4734 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.6s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:43,261 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3346 Valid, 5207 Invalid, 5587 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [853 Valid, 4734 Invalid, 0 Unknown, 0 Unchecked, 2.6s Time] [2021-12-06 19:57:43,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6044 states. [2021-12-06 19:57:43,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6044 to 5066. [2021-12-06 19:57:43,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5066 states, 3579 states have (on average 1.2805252863928471) internal successors, (4583), 3604 states have internal predecessors, (4583), 1209 states have call successors, (1209), 276 states have call predecessors, (1209), 277 states have return successors, (1210), 1207 states have call predecessors, (1210), 1207 states have call successors, (1210) [2021-12-06 19:57:43,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5066 states to 5066 states and 7002 transitions. [2021-12-06 19:57:43,454 INFO L78 Accepts]: Start accepts. Automaton has 5066 states and 7002 transitions. Word has length 122 [2021-12-06 19:57:43,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:43,454 INFO L470 AbstractCegarLoop]: Abstraction has 5066 states and 7002 transitions. [2021-12-06 19:57:43,454 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.0) internal successors, (49), 7 states have internal predecessors, (49), 3 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-06 19:57:43,454 INFO L276 IsEmpty]: Start isEmpty. Operand 5066 states and 7002 transitions. [2021-12-06 19:57:43,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-12-06 19:57:43,457 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:43,457 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:43,458 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-12-06 19:57:43,458 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:43,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:43,458 INFO L85 PathProgramCache]: Analyzing trace with hash -226816085, now seen corresponding path program 1 times [2021-12-06 19:57:43,458 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:43,458 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905489365] [2021-12-06 19:57:43,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:43,458 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:43,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:43,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:43,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2021-12-06 19:57:43,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,595 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2021-12-06 19:57:43,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 98 [2021-12-06 19:57:43,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,604 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 103 [2021-12-06 19:57:43,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2021-12-06 19:57:43,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2021-12-06 19:57:43,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:43,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2021-12-06 19:57:43,623 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:43,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905489365] [2021-12-06 19:57:43,623 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905489365] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:43,623 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:43,623 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 19:57:43,623 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327644351] [2021-12-06 19:57:43,623 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:43,624 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-06 19:57:43,624 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:43,624 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 19:57:43,624 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:43,624 INFO L87 Difference]: Start difference. First operand 5066 states and 7002 transitions. Second operand has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2021-12-06 19:57:44,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:44,531 INFO L93 Difference]: Finished difference Result 16250 states and 23478 transitions. [2021-12-06 19:57:44,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:57:44,532 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 132 [2021-12-06 19:57:44,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:44,558 INFO L225 Difference]: With dead ends: 16250 [2021-12-06 19:57:44,558 INFO L226 Difference]: Without dead ends: 11259 [2021-12-06 19:57:44,570 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:57:44,570 INFO L933 BasicCegarLoop]: 2536 mSDtfsCounter, 1841 mSDsluCounter, 5597 mSDsCounter, 0 mSdLazyCounter, 457 mSolverCounterSat, 372 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2049 SdHoareTripleChecker+Valid, 8133 SdHoareTripleChecker+Invalid, 829 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 372 IncrementalHoareTripleChecker+Valid, 457 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:44,570 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2049 Valid, 8133 Invalid, 829 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [372 Valid, 457 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-12-06 19:57:44,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11259 states. [2021-12-06 19:57:45,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11259 to 11196. [2021-12-06 19:57:45,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11196 states, 7899 states have (on average 1.3177617419926573) internal successors, (10409), 7934 states have internal predecessors, (10409), 3019 states have call successors, (3019), 276 states have call predecessors, (3019), 277 states have return successors, (3020), 3017 states have call predecessors, (3020), 3017 states have call successors, (3020) [2021-12-06 19:57:45,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11196 states to 11196 states and 16448 transitions. [2021-12-06 19:57:45,076 INFO L78 Accepts]: Start accepts. Automaton has 11196 states and 16448 transitions. Word has length 132 [2021-12-06 19:57:45,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:45,076 INFO L470 AbstractCegarLoop]: Abstraction has 11196 states and 16448 transitions. [2021-12-06 19:57:45,076 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.4) internal successors, (47), 5 states have internal predecessors, (47), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2021-12-06 19:57:45,077 INFO L276 IsEmpty]: Start isEmpty. Operand 11196 states and 16448 transitions. [2021-12-06 19:57:45,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-12-06 19:57:45,080 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:45,081 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:45,081 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-12-06 19:57:45,081 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:45,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:45,081 INFO L85 PathProgramCache]: Analyzing trace with hash 73355820, now seen corresponding path program 1 times [2021-12-06 19:57:45,081 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:45,081 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159539883] [2021-12-06 19:57:45,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:45,081 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:45,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:45,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:45,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2021-12-06 19:57:45,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2021-12-06 19:57:45,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2021-12-06 19:57:45,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,185 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2021-12-06 19:57:45,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:45,189 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:57:45,189 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:45,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159539883] [2021-12-06 19:57:45,190 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [159539883] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:45,190 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:45,190 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 19:57:45,190 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436904783] [2021-12-06 19:57:45,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:45,190 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:57:45,190 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:45,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:57:45,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:57:45,191 INFO L87 Difference]: Start difference. First operand 11196 states and 16448 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:57:46,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:46,055 INFO L93 Difference]: Finished difference Result 16370 states and 24400 transitions. [2021-12-06 19:57:46,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 19:57:46,055 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 130 [2021-12-06 19:57:46,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:46,093 INFO L225 Difference]: With dead ends: 16370 [2021-12-06 19:57:46,093 INFO L226 Difference]: Without dead ends: 16362 [2021-12-06 19:57:46,097 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:46,098 INFO L933 BasicCegarLoop]: 2555 mSDtfsCounter, 1293 mSDsluCounter, 3443 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 385 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1319 SdHoareTripleChecker+Valid, 5998 SdHoareTripleChecker+Invalid, 401 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 385 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:46,098 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1319 Valid, 5998 Invalid, 401 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [385 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-12-06 19:57:46,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16362 states. [2021-12-06 19:57:46,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16362 to 11202. [2021-12-06 19:57:46,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11202 states, 7903 states have (on average 1.3176009110464382) internal successors, (10413), 7938 states have internal predecessors, (10413), 3021 states have call successors, (3021), 276 states have call predecessors, (3021), 277 states have return successors, (3022), 3019 states have call predecessors, (3022), 3019 states have call successors, (3022) [2021-12-06 19:57:46,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11202 states to 11202 states and 16456 transitions. [2021-12-06 19:57:46,668 INFO L78 Accepts]: Start accepts. Automaton has 11202 states and 16456 transitions. Word has length 130 [2021-12-06 19:57:46,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:46,668 INFO L470 AbstractCegarLoop]: Abstraction has 11202 states and 16456 transitions. [2021-12-06 19:57:46,668 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:57:46,669 INFO L276 IsEmpty]: Start isEmpty. Operand 11202 states and 16456 transitions. [2021-12-06 19:57:46,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-12-06 19:57:46,673 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:46,673 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:46,673 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-12-06 19:57:46,673 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:46,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:46,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1802794400, now seen corresponding path program 1 times [2021-12-06 19:57:46,674 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:46,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666719607] [2021-12-06 19:57:46,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:46,674 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:46,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,770 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:46,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:46,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2021-12-06 19:57:46,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,782 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2021-12-06 19:57:46,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,788 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2021-12-06 19:57:46,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,791 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2021-12-06 19:57:46,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:46,795 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:57:46,795 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:46,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666719607] [2021-12-06 19:57:46,795 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666719607] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-06 19:57:46,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [303871995] [2021-12-06 19:57:46,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:46,796 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:46,796 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:46,796 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-06 19:57:46,797 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-12-06 19:57:47,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:47,133 INFO L263 TraceCheckSpWp]: Trace formula consists of 1661 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:57:47,135 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:57:47,268 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:57:47,268 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:57:47,268 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [303871995] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:47,268 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-06 19:57:47,268 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 5 [2021-12-06 19:57:47,268 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896036920] [2021-12-06 19:57:47,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:47,269 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:57:47,269 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:47,269 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:57:47,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:47,269 INFO L87 Difference]: Start difference. First operand 11202 states and 16456 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:57:48,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:48,032 INFO L93 Difference]: Finished difference Result 22335 states and 32840 transitions. [2021-12-06 19:57:48,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:57:48,032 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 134 [2021-12-06 19:57:48,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:48,060 INFO L225 Difference]: With dead ends: 22335 [2021-12-06 19:57:48,060 INFO L226 Difference]: Without dead ends: 9982 [2021-12-06 19:57:48,085 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:48,086 INFO L933 BasicCegarLoop]: 1903 mSDtfsCounter, 1244 mSDsluCounter, 1895 mSDsCounter, 0 mSdLazyCounter, 223 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1641 SdHoareTripleChecker+Valid, 3798 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 223 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:48,086 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1641 Valid, 3798 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 223 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-12-06 19:57:48,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9982 states. [2021-12-06 19:57:48,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9982 to 9976. [2021-12-06 19:57:48,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9976 states, 7039 states have (on average 1.3111237391674955) internal successors, (9229), 7072 states have internal predecessors, (9229), 2659 states have call successors, (2659), 276 states have call predecessors, (2659), 277 states have return successors, (2660), 2657 states have call predecessors, (2660), 2657 states have call successors, (2660) [2021-12-06 19:57:48,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9976 states to 9976 states and 14548 transitions. [2021-12-06 19:57:48,581 INFO L78 Accepts]: Start accepts. Automaton has 9976 states and 14548 transitions. Word has length 134 [2021-12-06 19:57:48,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:48,581 INFO L470 AbstractCegarLoop]: Abstraction has 9976 states and 14548 transitions. [2021-12-06 19:57:48,581 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 4 states have internal predecessors, (59), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:57:48,581 INFO L276 IsEmpty]: Start isEmpty. Operand 9976 states and 14548 transitions. [2021-12-06 19:57:48,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2021-12-06 19:57:48,587 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:48,587 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:48,618 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2021-12-06 19:57:48,788 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-06 19:57:48,789 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:48,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:48,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1518481568, now seen corresponding path program 1 times [2021-12-06 19:57:48,790 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:48,790 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550861547] [2021-12-06 19:57:48,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:48,790 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:48,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,916 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:48,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,920 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:48,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,924 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2021-12-06 19:57:48,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,929 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2021-12-06 19:57:48,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,933 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 108 [2021-12-06 19:57:48,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,938 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2021-12-06 19:57:48,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,942 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2021-12-06 19:57:48,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,946 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2021-12-06 19:57:48,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,953 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2021-12-06 19:57:48,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,957 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2021-12-06 19:57:48,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:48,962 INFO L134 CoverageAnalysis]: Checked inductivity of 1043 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 1039 trivial. 0 not checked. [2021-12-06 19:57:48,963 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:48,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550861547] [2021-12-06 19:57:48,963 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [550861547] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:48,963 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:48,963 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 19:57:48,963 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857723269] [2021-12-06 19:57:48,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:48,964 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:57:48,964 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:48,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:57:48,964 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:57:48,964 INFO L87 Difference]: Start difference. First operand 9976 states and 14548 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2021-12-06 19:57:49,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:49,363 INFO L93 Difference]: Finished difference Result 19227 states and 28025 transitions. [2021-12-06 19:57:49,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:57:49,364 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 153 [2021-12-06 19:57:49,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:49,394 INFO L225 Difference]: With dead ends: 19227 [2021-12-06 19:57:49,394 INFO L226 Difference]: Without dead ends: 9314 [2021-12-06 19:57:49,413 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:57:49,413 INFO L933 BasicCegarLoop]: 1478 mSDtfsCounter, 13 mSDsluCounter, 2937 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 4415 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:49,413 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 4415 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:49,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9314 states. [2021-12-06 19:57:49,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9314 to 9304. [2021-12-06 19:57:49,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9304 states, 6565 states have (on average 1.3092155369383092) internal successors, (8595), 6597 states have internal predecessors, (8595), 2465 states have call successors, (2465), 272 states have call predecessors, (2465), 273 states have return successors, (2466), 2460 states have call predecessors, (2466), 2463 states have call successors, (2466) [2021-12-06 19:57:49,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9304 states to 9304 states and 13526 transitions. [2021-12-06 19:57:49,966 INFO L78 Accepts]: Start accepts. Automaton has 9304 states and 13526 transitions. Word has length 153 [2021-12-06 19:57:49,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:49,966 INFO L470 AbstractCegarLoop]: Abstraction has 9304 states and 13526 transitions. [2021-12-06 19:57:49,966 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 3 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2021-12-06 19:57:49,966 INFO L276 IsEmpty]: Start isEmpty. Operand 9304 states and 13526 transitions. [2021-12-06 19:57:49,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-12-06 19:57:49,971 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:49,971 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:49,971 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-12-06 19:57:49,971 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:49,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:49,971 INFO L85 PathProgramCache]: Analyzing trace with hash -2121096315, now seen corresponding path program 1 times [2021-12-06 19:57:49,972 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:49,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136930454] [2021-12-06 19:57:49,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:49,972 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:50,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,069 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2021-12-06 19:57:50,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,073 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2021-12-06 19:57:50,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2021-12-06 19:57:50,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,080 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2021-12-06 19:57:50,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,086 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2021-12-06 19:57:50,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,089 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2021-12-06 19:57:50,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,092 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2021-12-06 19:57:50,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:57:50,096 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2021-12-06 19:57:50,096 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-06 19:57:50,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136930454] [2021-12-06 19:57:50,096 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2136930454] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:57:50,096 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:57:50,096 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:57:50,096 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [144242094] [2021-12-06 19:57:50,096 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:57:50,097 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:57:50,097 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-06 19:57:50,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:57:50,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:57:50,097 INFO L87 Difference]: Start difference. First operand 9304 states and 13526 transitions. Second operand has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2021-12-06 19:57:50,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:57:50,498 INFO L93 Difference]: Finished difference Result 18497 states and 26914 transitions. [2021-12-06 19:57:50,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:57:50,499 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 150 [2021-12-06 19:57:50,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:57:50,516 INFO L225 Difference]: With dead ends: 18497 [2021-12-06 19:57:50,517 INFO L226 Difference]: Without dead ends: 9268 [2021-12-06 19:57:50,531 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:57:50,531 INFO L933 BasicCegarLoop]: 1464 mSDtfsCounter, 1423 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1423 SdHoareTripleChecker+Valid, 1464 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:57:50,532 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1423 Valid, 1464 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:57:50,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9268 states. [2021-12-06 19:57:50,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9268 to 9268. [2021-12-06 19:57:50,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9268 states, 6529 states have (on average 1.3054066472660437) internal successors, (8523), 6561 states have internal predecessors, (8523), 2465 states have call successors, (2465), 272 states have call predecessors, (2465), 273 states have return successors, (2466), 2460 states have call predecessors, (2466), 2463 states have call successors, (2466) [2021-12-06 19:57:50,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9268 states to 9268 states and 13454 transitions. [2021-12-06 19:57:50,964 INFO L78 Accepts]: Start accepts. Automaton has 9268 states and 13454 transitions. Word has length 150 [2021-12-06 19:57:50,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:57:50,965 INFO L470 AbstractCegarLoop]: Abstraction has 9268 states and 13454 transitions. [2021-12-06 19:57:50,965 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.666666666666668) internal successors, (68), 3 states have internal predecessors, (68), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2021-12-06 19:57:50,965 INFO L276 IsEmpty]: Start isEmpty. Operand 9268 states and 13454 transitions. [2021-12-06 19:57:50,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2021-12-06 19:57:50,969 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:57:50,969 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:50,970 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-12-06 19:57:50,970 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:57:50,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:57:50,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1838241346, now seen corresponding path program 1 times [2021-12-06 19:57:50,970 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-06 19:57:50,970 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570303430] [2021-12-06 19:57:50,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:57:50,970 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-06 19:57:51,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:57:51,149 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:57:51,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:57:51,379 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-06 19:57:51,379 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-12-06 19:57:51,380 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-12-06 19:57:51,381 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-12-06 19:57:51,384 INFO L732 BasicCegarLoop]: Path program histogram: [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:57:51,386 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-12-06 19:57:51,511 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.12 07:57:51 BoogieIcfgContainer [2021-12-06 19:57:51,511 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-12-06 19:57:51,511 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-06 19:57:51,511 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-06 19:57:51,511 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-06 19:57:51,512 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:57:24" (3/4) ... [2021-12-06 19:57:51,514 INFO L140 WitnessPrinter]: No result that supports witness generation found [2021-12-06 19:57:51,514 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-06 19:57:51,514 INFO L158 Benchmark]: Toolchain (without parser) took 31447.53ms. Allocated memory was 115.3MB in the beginning and 1.0GB in the end (delta: 920.6MB). Free memory was 69.4MB in the beginning and 276.5MB in the end (delta: -207.2MB). Peak memory consumption was 713.1MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,515 INFO L158 Benchmark]: CDTParser took 0.13ms. Allocated memory is still 115.3MB. Free memory is still 95.8MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 19:57:51,515 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1464.05ms. Allocated memory was 115.3MB in the beginning and 146.8MB in the end (delta: 31.5MB). Free memory was 69.2MB in the beginning and 90.7MB in the end (delta: -21.5MB). Peak memory consumption was 51.0MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,515 INFO L158 Benchmark]: Boogie Procedure Inliner took 144.44ms. Allocated memory is still 146.8MB. Free memory was 90.7MB in the beginning and 70.6MB in the end (delta: 20.1MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,515 INFO L158 Benchmark]: Boogie Preprocessor took 109.82ms. Allocated memory is still 146.8MB. Free memory was 70.6MB in the beginning and 51.7MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,516 INFO L158 Benchmark]: RCFGBuilder took 2606.81ms. Allocated memory was 146.8MB in the beginning and 180.4MB in the end (delta: 33.6MB). Free memory was 50.8MB in the beginning and 74.4MB in the end (delta: -23.6MB). Peak memory consumption was 35.9MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,516 INFO L158 Benchmark]: TraceAbstraction took 27114.02ms. Allocated memory was 180.4MB in the beginning and 1.0GB in the end (delta: 855.6MB). Free memory was 73.4MB in the beginning and 276.5MB in the end (delta: -203.2MB). Peak memory consumption was 653.5MB. Max. memory is 16.1GB. [2021-12-06 19:57:51,516 INFO L158 Benchmark]: Witness Printer took 2.71ms. Allocated memory is still 1.0GB. Free memory is still 276.5MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 19:57:51,517 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13ms. Allocated memory is still 115.3MB. Free memory is still 95.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1464.05ms. Allocated memory was 115.3MB in the beginning and 146.8MB in the end (delta: 31.5MB). Free memory was 69.2MB in the beginning and 90.7MB in the end (delta: -21.5MB). Peak memory consumption was 51.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 144.44ms. Allocated memory is still 146.8MB. Free memory was 90.7MB in the beginning and 70.6MB in the end (delta: 20.1MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Preprocessor took 109.82ms. Allocated memory is still 146.8MB. Free memory was 70.6MB in the beginning and 51.7MB in the end (delta: 18.9MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * RCFGBuilder took 2606.81ms. Allocated memory was 146.8MB in the beginning and 180.4MB in the end (delta: 33.6MB). Free memory was 50.8MB in the beginning and 74.4MB in the end (delta: -23.6MB). Peak memory consumption was 35.9MB. Max. memory is 16.1GB. * TraceAbstraction took 27114.02ms. Allocated memory was 180.4MB in the beginning and 1.0GB in the end (delta: 855.6MB). Free memory was 73.4MB in the beginning and 276.5MB in the end (delta: -203.2MB). Peak memory consumption was 653.5MB. Max. memory is 16.1GB. * Witness Printer took 2.71ms. Allocated memory is still 1.0GB. Free memory is still 276.5MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 7949]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of large string literal at line 7781, overapproximation of bitwiseOr at line 4779. Possible FailurePath: [L5238] static int fst_txq_low = 8; [L5239] static int fst_txq_high = 12; [L5240] static int fst_max_reads = 7; [L5241] static int fst_excluded_cards = 0; [L5242] static int fst_excluded_list[32U] ; [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L5260] static spinlock_t fst_work_q_lock ; [L5261] static u64 fst_work_txq ; [L5262] static u64 fst_work_intq ; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L7800] int LDV_IN_INTERRUPT ; [L7953] int ldv_module_refcounter = 1; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=0, ldv_module_refcounter=1, type_strings={53:0}] [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, type_strings={53:0}] [L4600] return (& lock->ldv_6060.rlock); VAL [\result={50:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, lock={50:0}, type_strings={53:0}] [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={50:0}, type_strings={53:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={60:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp=0, type_strings={53:0}] [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={53:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=1, type_strings={53:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND TRUE tmp___0 == 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=0, tmp___1=1, type_strings={53:0}] [L7855] COND TRUE ldv_s_fst_ops_net_device_ops == 0 [L7857] CALL, EXPR fst_open(var_group1) [L7167] int err ; [L7168] struct fst_port_info *port ; [L7169] struct hdlc_device *tmp ; [L7170] int tmp___0 ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7173] CALL, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L5204] void *tmp ; [L5207] CALL, EXPR netdev_priv((struct net_device const *)dev) [L5064] return ((void *)dev + 2560U); VAL [\result={4294967309:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L5207] RET, EXPR netdev_priv((struct net_device const *)dev) [L5207] tmp = netdev_priv((struct net_device const *)dev) [L5209] return ((struct hdlc_device *)tmp); VAL [\result={4294967309:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp={4294967309:2560}, type_strings={53:0}] [L7173] RET, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, dev_to_hdlc(dev)={4294967309:2560}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7173] tmp = dev_to_hdlc(dev) [L7174] EXPR tmp->priv [L7174] port = (struct fst_port_info *)tmp->priv [L7175] CALL, EXPR ldv_try_module_get_1(& __this_module) [L8027] int tmp ; [L8030] CALL, EXPR ldv_try_module_get(module) [L7965] int module_get_succeeded ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, module={-60:61}, module={-60:61}, type_strings={53:0}] [L7967] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) [L7969] CALL, EXPR ldv_undefined_int() [L8154] return __VERIFIER_nondet_int(); [L7969] RET, EXPR ldv_undefined_int() [L7969] module_get_succeeded = ldv_undefined_int() [L7971] COND TRUE module_get_succeeded == 1 [L7972] ldv_module_refcounter = ldv_module_refcounter + 1 [L7973] return (1); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-60:61}, module={-60:61}, module_get_succeeded=1, type_strings={53:0}] [L8030] RET, EXPR ldv_try_module_get(module) [L8030] tmp = ldv_try_module_get(module) [L8032] return (tmp); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-60:61}, module={-60:61}, tmp=1, type_strings={53:0}] [L7175] RET, EXPR ldv_try_module_get_1(& __this_module) [L7175] tmp___0 = ldv_try_module_get_1(& __this_module) [L7177] COND FALSE !(tmp___0 == 0) [L7181] EXPR port->mode VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, port->mode=4, tmp={4294967309:2560}, tmp___0=1, type_strings={53:0}] [L7181] COND FALSE !(port->mode != 4) [L7195] CALL fst_openport(port) [L7102] int signals ; [L7103] int txq_length ; [L7104] unsigned int tmp ; [L7105] int tmp___0 ; [L7107] EXPR port->card [L7107] EXPR (port->card)->state VAL [(port->card)->state=62, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, port={4294967299:0}, port->card={4294967312:-38}, type_strings={53:0}] [L7107] COND FALSE !((port->card)->state == 4U) [L7195] RET fst_openport(port) [L7196] CALL netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5137] struct netdev_queue *tmp ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5140] CALL, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [\old(index)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5058] EXPR dev->_tx [L5058] return ((struct netdev_queue *)dev->_tx + (unsigned long )index); [L5140] RET, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, netdev_get_tx_queue((struct net_device const *)dev, 0U)={4294967332:0}, type_strings={53:0}] [L5140] tmp = netdev_get_tx_queue((struct net_device const *)dev, 0U) [L5141] CALL netif_tx_wake_queue(tmp) [L5111] int tmp ; [L5112] int tmp___0 ; [L5115] CALL, EXPR netpoll_trap() [L8174] return __VERIFIER_nondet_int(); [L5115] RET, EXPR netpoll_trap() [L5115] tmp = netpoll_trap() [L5117] COND TRUE tmp != 0 [L5119] CALL netif_tx_start_queue(dev_queue) [L5105] FCALL clear_bit(0, (unsigned long volatile *)(& dev_queue->state)) [L5119] RET netif_tx_start_queue(dev_queue) [L5141] RET netif_tx_wake_queue(tmp) [L7196] RET netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, tmp={4294967309:2560}, tmp___0=1, type_strings={53:0}] [L7198] return (0); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, dev={4294967309:0}, dev={4294967309:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={4294967299:0}, tmp={4294967309:2560}, tmp___0=1, type_strings={53:0}] [L7857] RET, EXPR fst_open(var_group1) [L7857] res_fst_open_36 = fst_open(var_group1) [L7858] FCALL ldv_check_return_value(res_fst_open_36) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7860] COND FALSE !(res_fst_open_36 < 0) [L7864] ldv_s_fst_ops_net_device_ops = ldv_s_fst_ops_net_device_ops + 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_group1={4294967309:0}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, ent={4294967304:4294967333}, ent={4294967304:4294967333}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967321:4294967315}, pdev={4294967321:4294967315}, type_strings={53:0}] [L7451] COND TRUE ! __print_once [L7453] __print_once = (bool )1 [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, ent={4294967304:4294967333}, ent={4294967304:4294967333}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967321:4294967315}, pdev={4294967321:4294967315}, type_strings={53:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L8061] COND TRUE __VERIFIER_nondet_bool() [L8061] return 0; VAL [\old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, type_strings={53:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=1000, \old(arg1)=4294967300, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, arg0=1000, arg1=4294967300, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={0:0}, ldv_module_refcounter=2, type_strings={53:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); VAL [\old(flags)=4294967300, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, flags=4294967300, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp___2={0:0}, type_strings={53:0}] [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); VAL [\old(flags)=208, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, flags=208, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp={0:0}, type_strings={53:0}] [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, card={0:0}, ent={4294967304:4294967333}, ent={4294967304:4294967333}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967321:4294967315}, pdev={4294967321:4294967315}, tmp={0:0}, type_strings={53:0}] [L7483] COND TRUE (unsigned long )card == (unsigned long )((struct fst_card_info *)0) [L7487] return (-12); [L7487] return (-12); VAL [\result=-12, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-60:61}, card={0:0}, ent={4294967304:4294967333}, ent={4294967304:4294967333}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={4294967321:4294967315}, pdev={4294967321:4294967315}, tmp={0:0}, type_strings={53:0}] [L7895] RET, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7895] res_fst_add_one_42 = fst_add_one(var_group3, var_fst_add_one_42_p1) [L7896] FCALL ldv_check_return_value(res_fst_add_one_42) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_fst_add_one_42_p1={4294967304:4294967333}, var_group1={4294967309:0}, var_group3={4294967321:4294967315}] [L7898] COND TRUE res_fst_add_one_42 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=1, type_strings={53:0}, var_fst_add_one_42_p1={4294967304:4294967333}, var_group1={4294967309:0}, var_group3={4294967321:4294967315}] [L7937] CALL fst_cleanup_module() [L7791] FCALL pci_unregister_driver(& fst_driver) [L7937] RET fst_cleanup_module() [L7941] CALL ldv_check_final_state() [L8017] COND TRUE ldv_module_refcounter != 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L8019] CALL ldv_blast_assert() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L7949] reach_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-60:61}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 57 procedures, 1064 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 26.9s, OverallIterations: 17, TraceHistogramMax: 32, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.1s, AutomataDifference: 14.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 22656 SdHoareTripleChecker+Valid, 9.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 21119 mSDsluCounter, 99262 SdHoareTripleChecker+Invalid, 7.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 67382 mSDsCounter, 4652 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 11874 IncrementalHoareTripleChecker+Invalid, 16526 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4652 mSolverCounterUnsat, 31880 mSDtfsCounter, 11874 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1160 GetRequests, 1001 SyntacticMatches, 1 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11202occurred in iteration=13, InterpolantAutomatonStates: 141, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.9s AutomataMinimizationTime, 16 MinimizatonAttempts, 11506 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.5s SatisfiabilityAnalysisTime, 3.2s InterpolantComputationTime, 2166 NumberOfCodeBlocks, 2102 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 2252 ConstructedInterpolants, 0 QuantifiedInterpolants, 4145 SizeOfPredicates, 17 NumberOfNonLiveVariables, 9763 ConjunctsInSsa, 90 ConjunctsInUnsatCore, 28 InterpolantComputations, 12 PerfectInterpolantSequences, 7904/10294 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2021-12-06 19:57:51,533 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-06 19:57:53,141 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-06 19:57:53,143 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-06 19:57:53,165 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-06 19:57:53,165 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-06 19:57:53,166 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-06 19:57:53,168 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-06 19:57:53,169 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-06 19:57:53,171 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-06 19:57:53,172 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-06 19:57:53,172 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-06 19:57:53,173 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-06 19:57:53,174 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-06 19:57:53,175 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-06 19:57:53,176 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-06 19:57:53,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-06 19:57:53,178 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-06 19:57:53,178 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-06 19:57:53,192 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-06 19:57:53,193 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-06 19:57:53,195 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-06 19:57:53,196 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-06 19:57:53,197 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-06 19:57:53,198 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-06 19:57:53,201 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-06 19:57:53,201 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-06 19:57:53,202 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-06 19:57:53,203 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-06 19:57:53,203 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-06 19:57:53,204 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-06 19:57:53,204 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-06 19:57:53,205 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-06 19:57:53,206 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-06 19:57:53,206 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-06 19:57:53,207 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-06 19:57:53,208 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-06 19:57:53,208 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-06 19:57:53,209 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-06 19:57:53,209 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-06 19:57:53,210 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-06 19:57:53,210 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-06 19:57:53,211 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2021-12-06 19:57:53,232 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-06 19:57:53,232 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-06 19:57:53,233 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-06 19:57:53,233 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-06 19:57:53,234 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-12-06 19:57:53,234 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-12-06 19:57:53,235 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-06 19:57:53,235 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-06 19:57:53,235 INFO L138 SettingsManager]: * Use SBE=true [2021-12-06 19:57:53,235 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-06 19:57:53,235 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2021-12-06 19:57:53,236 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-12-06 19:57:53,237 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-12-06 19:57:53,237 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-06 19:57:53,238 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-12-06 19:57:53,238 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-12-06 19:57:53,239 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-06 19:57:53,239 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-12-06 19:57:53,239 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2021-12-06 19:57:53,488 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-06 19:57:53,502 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-06 19:57:53,504 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-06 19:57:53,505 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-06 19:57:53,506 INFO L275 PluginConnector]: CDTParser initialized [2021-12-06 19:57:53,506 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:57:53,553 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/cd1cfc046/2982fa33843c4577b78d96521a69aba9/FLAGd08dd70b1 [2021-12-06 19:57:54,177 INFO L306 CDTParser]: Found 1 translation units. [2021-12-06 19:57:54,178 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:57:54,200 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/cd1cfc046/2982fa33843c4577b78d96521a69aba9/FLAGd08dd70b1 [2021-12-06 19:57:54,551 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/data/cd1cfc046/2982fa33843c4577b78d96521a69aba9 [2021-12-06 19:57:54,558 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-06 19:57:54,560 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-06 19:57:54,562 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-06 19:57:54,562 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-06 19:57:54,567 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-06 19:57:54,568 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:57:54" (1/1) ... [2021-12-06 19:57:54,569 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6927443 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:54, skipping insertion in model container [2021-12-06 19:57:54,569 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.12 07:57:54" (1/1) ... [2021-12-06 19:57:54,576 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-06 19:57:54,643 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 19:57:55,719 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2021-12-06 19:57:55,748 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:57:55,785 INFO L200 MainTranslator]: Restarting translation with changed settings: SettingsChange [mNewPreferredMemoryModel=HoenickeLindenmann_1ByteResolution] [2021-12-06 19:57:55,813 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-06 19:57:55,982 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2021-12-06 19:57:55,988 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:57:56,004 INFO L203 MainTranslator]: Completed pre-run [2021-12-06 19:57:56,198 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2021-12-06 19:57:56,202 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-06 19:57:56,344 INFO L208 MainTranslator]: Completed translation [2021-12-06 19:57:56,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56 WrapperNode [2021-12-06 19:57:56,344 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-06 19:57:56,345 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-06 19:57:56,345 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-06 19:57:56,345 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-06 19:57:56,350 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,402 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,491 INFO L137 Inliner]: procedures = 214, calls = 1489, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3236 [2021-12-06 19:57:56,492 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-06 19:57:56,492 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-06 19:57:56,492 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-06 19:57:56,492 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-06 19:57:56,498 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,499 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,512 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,513 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,565 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,576 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,589 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,604 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-06 19:57:56,604 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-06 19:57:56,605 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-06 19:57:56,605 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-06 19:57:56,605 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (1/1) ... [2021-12-06 19:57:56,610 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-06 19:57:56,618 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 [2021-12-06 19:57:56,630 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-12-06 19:57:56,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-12-06 19:57:56,660 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2021-12-06 19:57:56,660 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2021-12-06 19:57:56,660 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE2 [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2021-12-06 19:57:56,661 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2021-12-06 19:57:56,661 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2021-12-06 19:57:56,661 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2021-12-06 19:57:56,661 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2021-12-06 19:57:56,661 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2021-12-06 19:57:56,662 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2021-12-06 19:57:56,662 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2021-12-06 19:57:56,663 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2021-12-06 19:57:56,663 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2021-12-06 19:57:56,663 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2021-12-06 19:57:56,663 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2021-12-06 19:57:56,663 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2021-12-06 19:57:56,664 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2021-12-06 19:57:56,664 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE2 [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2021-12-06 19:57:56,664 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2021-12-06 19:57:56,664 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2021-12-06 19:57:56,665 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2021-12-06 19:57:56,665 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE8 [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2021-12-06 19:57:56,665 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2021-12-06 19:57:56,665 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2021-12-06 19:57:56,665 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2021-12-06 19:57:56,665 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2021-12-06 19:57:56,666 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2021-12-06 19:57:56,666 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2021-12-06 19:57:56,667 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2021-12-06 19:57:56,667 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2021-12-06 19:57:56,668 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2021-12-06 19:57:56,668 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2021-12-06 19:57:56,668 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE2 [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE8 [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-12-06 19:57:56,668 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2021-12-06 19:57:56,669 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2021-12-06 19:57:56,669 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE8 [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE2 [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2021-12-06 19:57:56,669 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2021-12-06 19:57:56,669 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2021-12-06 19:57:56,669 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2021-12-06 19:57:56,670 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2021-12-06 19:57:56,670 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE1 [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2021-12-06 19:57:56,671 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2021-12-06 19:57:56,671 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2021-12-06 19:57:56,672 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2021-12-06 19:57:56,672 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2021-12-06 19:57:56,672 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2021-12-06 19:57:56,672 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-06 19:57:56,672 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-06 19:57:56,672 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2021-12-06 19:57:56,672 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2021-12-06 19:57:57,043 INFO L236 CfgBuilder]: Building ICFG [2021-12-06 19:57:57,045 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-06 19:58:02,624 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,629 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,634 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,635 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,636 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,636 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:02,653 WARN L815 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##258: assume false; [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##259: assume !false; [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##265: assume !false; [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##264: assume false; [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##214: assume !false; [2021-12-06 19:58:19,836 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##213: assume false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##228: assume !false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##227: assume false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##92: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##91: assume false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##391: assume !false; [2021-12-06 19:58:19,837 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##390: assume false; [2021-12-06 19:58:19,872 INFO L277 CfgBuilder]: Performing block encoding [2021-12-06 19:58:19,887 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-06 19:58:19,887 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-12-06 19:58:19,891 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:58:19 BoogieIcfgContainer [2021-12-06 19:58:19,891 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-06 19:58:19,893 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-12-06 19:58:19,893 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-12-06 19:58:19,896 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-12-06 19:58:19,896 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.12 07:57:54" (1/3) ... [2021-12-06 19:58:19,897 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41b38cde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.12 07:58:19, skipping insertion in model container [2021-12-06 19:58:19,897 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.12 07:57:56" (2/3) ... [2021-12-06 19:58:19,897 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41b38cde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.12 07:58:19, skipping insertion in model container [2021-12-06 19:58:19,897 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:58:19" (3/3) ... [2021-12-06 19:58:19,899 INFO L111 eAbstractionObserver]: Analyzing ICFG module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2021-12-06 19:58:19,904 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-12-06 19:58:19,904 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-12-06 19:58:19,945 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-12-06 19:58:19,950 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-12-06 19:58:19,950 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-12-06 19:58:19,991 INFO L276 IsEmpty]: Start isEmpty. Operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) [2021-12-06 19:58:19,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2021-12-06 19:58:19,995 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:19,996 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:19,996 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:20,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:20,002 INFO L85 PathProgramCache]: Analyzing trace with hash 953068106, now seen corresponding path program 1 times [2021-12-06 19:58:20,017 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:20,017 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1553992333] [2021-12-06 19:58:20,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:20,018 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:20,018 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:20,019 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:20,021 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2021-12-06 19:58:20,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:20,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 769 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:58:20,634 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:20,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:20,734 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:20,735 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:20,735 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1553992333] [2021-12-06 19:58:20,735 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1553992333] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:20,735 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:20,735 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:58:20,736 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264806996] [2021-12-06 19:58:20,737 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:20,740 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:58:20,740 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:20,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:58:20,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:58:20,762 INFO L87 Difference]: Start difference. First operand has 1064 states, 746 states have (on average 1.2908847184986596) internal successors, (963), 754 states have internal predecessors, (963), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:58:20,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:20,894 INFO L93 Difference]: Finished difference Result 2123 states and 2971 transitions. [2021-12-06 19:58:20,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:58:20,896 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 21 [2021-12-06 19:58:20,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:20,911 INFO L225 Difference]: With dead ends: 2123 [2021-12-06 19:58:20,911 INFO L226 Difference]: Without dead ends: 1060 [2021-12-06 19:58:20,918 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:58:20,921 INFO L933 BasicCegarLoop]: 1475 mSDtfsCounter, 1 mSDsluCounter, 1473 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2948 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:20,922 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 2948 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:58:20,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1060 states. [2021-12-06 19:58:21,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1060 to 1059. [2021-12-06 19:58:21,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1059 states, 743 states have (on average 1.2866756393001346) internal successors, (956), 749 states have internal predecessors, (956), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2021-12-06 19:58:21,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1474 transitions. [2021-12-06 19:58:21,014 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1474 transitions. Word has length 21 [2021-12-06 19:58:21,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:21,014 INFO L470 AbstractCegarLoop]: Abstraction has 1059 states and 1474 transitions. [2021-12-06 19:58:21,014 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:58:21,015 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1474 transitions. [2021-12-06 19:58:21,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2021-12-06 19:58:21,016 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:21,016 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:21,033 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2021-12-06 19:58:21,217 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:21,217 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:21,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:21,218 INFO L85 PathProgramCache]: Analyzing trace with hash 172351718, now seen corresponding path program 1 times [2021-12-06 19:58:21,219 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:21,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [395311039] [2021-12-06 19:58:21,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:21,220 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:21,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:21,221 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:21,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2021-12-06 19:58:21,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:21,830 INFO L263 TraceCheckSpWp]: Trace formula consists of 780 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:58:21,831 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:21,912 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:21,912 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:58:22,003 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:22,003 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:22,003 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [395311039] [2021-12-06 19:58:22,004 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [395311039] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:58:22,004 INFO L186 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2021-12-06 19:58:22,004 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2021-12-06 19:58:22,004 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523116146] [2021-12-06 19:58:22,004 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2021-12-06 19:58:22,006 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-12-06 19:58:22,006 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:22,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-12-06 19:58:22,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-12-06 19:58:22,007 INFO L87 Difference]: Start difference. First operand 1059 states and 1474 transitions. Second operand has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2021-12-06 19:58:22,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:22,180 INFO L93 Difference]: Finished difference Result 2118 states and 2950 transitions. [2021-12-06 19:58:22,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:58:22,180 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 23 [2021-12-06 19:58:22,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:22,186 INFO L225 Difference]: With dead ends: 2118 [2021-12-06 19:58:22,187 INFO L226 Difference]: Without dead ends: 1065 [2021-12-06 19:58:22,189 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:58:22,191 INFO L933 BasicCegarLoop]: 1471 mSDtfsCounter, 4 mSDsluCounter, 5876 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 7347 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:22,191 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4 Valid, 7347 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-06 19:58:22,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1065 states. [2021-12-06 19:58:22,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1065 to 1065. [2021-12-06 19:58:22,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1065 states, 749 states have (on average 1.2843791722296396) internal successors, (962), 755 states have internal predecessors, (962), 260 states have call successors, (260), 56 states have call predecessors, (260), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2021-12-06 19:58:22,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1065 states to 1065 states and 1480 transitions. [2021-12-06 19:58:22,250 INFO L78 Accepts]: Start accepts. Automaton has 1065 states and 1480 transitions. Word has length 23 [2021-12-06 19:58:22,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:22,250 INFO L470 AbstractCegarLoop]: Abstraction has 1065 states and 1480 transitions. [2021-12-06 19:58:22,250 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 6 states have internal predecessors, (26), 1 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2021-12-06 19:58:22,250 INFO L276 IsEmpty]: Start isEmpty. Operand 1065 states and 1480 transitions. [2021-12-06 19:58:22,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2021-12-06 19:58:22,251 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:22,251 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:22,274 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (3)] Ended with exit code 0 [2021-12-06 19:58:22,452 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:22,453 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:22,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:22,453 INFO L85 PathProgramCache]: Analyzing trace with hash 55524026, now seen corresponding path program 2 times [2021-12-06 19:58:22,454 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:22,454 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1869336170] [2021-12-06 19:58:22,454 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:58:22,454 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:22,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:22,455 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:22,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2021-12-06 19:58:22,950 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:58:22,950 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:58:22,993 INFO L263 TraceCheckSpWp]: Trace formula consists of 769 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:58:22,995 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:23,124 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-12-06 19:58:23,124 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:23,124 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:23,124 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1869336170] [2021-12-06 19:58:23,124 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1869336170] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:23,124 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:23,125 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-12-06 19:58:23,125 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727811906] [2021-12-06 19:58:23,125 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:23,125 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:58:23,125 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:23,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:58:23,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:58:23,126 INFO L87 Difference]: Start difference. First operand 1065 states and 1480 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:58:23,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:23,238 INFO L93 Difference]: Finished difference Result 3155 states and 4394 transitions. [2021-12-06 19:58:23,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:58:23,238 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 29 [2021-12-06 19:58:23,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:23,253 INFO L225 Difference]: With dead ends: 3155 [2021-12-06 19:58:23,254 INFO L226 Difference]: Without dead ends: 2104 [2021-12-06 19:58:23,257 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:58:23,258 INFO L933 BasicCegarLoop]: 1973 mSDtfsCounter, 1448 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1448 SdHoareTripleChecker+Valid, 3425 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:23,259 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1448 Valid, 3425 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:58:23,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2104 states. [2021-12-06 19:58:23,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2104 to 2101. [2021-12-06 19:58:23,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2101 states, 1474 states have (on average 1.2835820895522387) internal successors, (1892), 1485 states have internal predecessors, (1892), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2021-12-06 19:58:23,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2101 states to 2101 states and 2922 transitions. [2021-12-06 19:58:23,339 INFO L78 Accepts]: Start accepts. Automaton has 2101 states and 2922 transitions. Word has length 29 [2021-12-06 19:58:23,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:23,339 INFO L470 AbstractCegarLoop]: Abstraction has 2101 states and 2922 transitions. [2021-12-06 19:58:23,339 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2021-12-06 19:58:23,339 INFO L276 IsEmpty]: Start isEmpty. Operand 2101 states and 2922 transitions. [2021-12-06 19:58:23,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-12-06 19:58:23,342 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:23,342 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:23,365 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (4)] Ended with exit code 0 [2021-12-06 19:58:23,543 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:23,543 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:23,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:23,544 INFO L85 PathProgramCache]: Analyzing trace with hash 2025144539, now seen corresponding path program 1 times [2021-12-06 19:58:23,544 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:23,545 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1884903525] [2021-12-06 19:58:23,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:23,545 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:23,545 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:23,546 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:23,546 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2021-12-06 19:58:24,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:24,169 INFO L263 TraceCheckSpWp]: Trace formula consists of 877 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-06 19:58:24,171 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:24,391 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:24,392 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:58:24,677 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:24,677 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:24,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1884903525] [2021-12-06 19:58:24,677 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1884903525] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:58:24,677 INFO L186 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2021-12-06 19:58:24,677 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2021-12-06 19:58:24,678 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800558452] [2021-12-06 19:58:24,678 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2021-12-06 19:58:24,678 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2021-12-06 19:58:24,678 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:24,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-12-06 19:58:24,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2021-12-06 19:58:24,679 INFO L87 Difference]: Start difference. First operand 2101 states and 2922 transitions. Second operand has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:58:25,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:25,267 INFO L93 Difference]: Finished difference Result 4202 states and 5849 transitions. [2021-12-06 19:58:25,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-12-06 19:58:25,268 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2021-12-06 19:58:25,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:25,278 INFO L225 Difference]: With dead ends: 4202 [2021-12-06 19:58:25,278 INFO L226 Difference]: Without dead ends: 2113 [2021-12-06 19:58:25,283 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2021-12-06 19:58:25,284 INFO L933 BasicCegarLoop]: 1470 mSDtfsCounter, 10 mSDsluCounter, 7340 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 8810 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:25,284 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 8810 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-12-06 19:58:25,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2113 states. [2021-12-06 19:58:25,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2113 to 2113. [2021-12-06 19:58:25,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2113 states, 1486 states have (on average 1.2812920592193808) internal successors, (1904), 1497 states have internal predecessors, (1904), 516 states have call successors, (516), 111 states have call predecessors, (516), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2021-12-06 19:58:25,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2113 states to 2113 states and 2934 transitions. [2021-12-06 19:58:25,358 INFO L78 Accepts]: Start accepts. Automaton has 2113 states and 2934 transitions. Word has length 49 [2021-12-06 19:58:25,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:25,358 INFO L470 AbstractCegarLoop]: Abstraction has 2113 states and 2934 transitions. [2021-12-06 19:58:25,358 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 4.833333333333333) internal successors, (58), 12 states have internal predecessors, (58), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:58:25,359 INFO L276 IsEmpty]: Start isEmpty. Operand 2113 states and 2934 transitions. [2021-12-06 19:58:25,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2021-12-06 19:58:25,361 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:25,361 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:25,379 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (5)] Ended with exit code 0 [2021-12-06 19:58:25,561 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:25,562 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:25,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:25,562 INFO L85 PathProgramCache]: Analyzing trace with hash 981484419, now seen corresponding path program 2 times [2021-12-06 19:58:25,563 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:25,563 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [152551971] [2021-12-06 19:58:25,563 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:58:25,564 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:25,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:25,564 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:25,565 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2021-12-06 19:58:26,144 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:58:26,144 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:58:26,188 INFO L263 TraceCheckSpWp]: Trace formula consists of 833 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 19:58:26,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:26,288 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2021-12-06 19:58:26,288 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:26,288 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:26,288 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [152551971] [2021-12-06 19:58:26,288 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [152551971] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:26,288 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:26,288 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 19:58:26,289 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1457041823] [2021-12-06 19:58:26,289 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:26,289 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-06 19:58:26,289 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:26,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 19:58:26,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:58:26,290 INFO L87 Difference]: Start difference. First operand 2113 states and 2934 transitions. Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:58:27,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:27,057 INFO L93 Difference]: Finished difference Result 6077 states and 8738 transitions. [2021-12-06 19:58:27,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-06 19:58:27,057 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 61 [2021-12-06 19:58:27,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:27,078 INFO L225 Difference]: With dead ends: 6077 [2021-12-06 19:58:27,078 INFO L226 Difference]: Without dead ends: 3995 [2021-12-06 19:58:27,083 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:58:27,084 INFO L933 BasicCegarLoop]: 2746 mSDtfsCounter, 2190 mSDsluCounter, 6423 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 583 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2383 SdHoareTripleChecker+Valid, 9169 SdHoareTripleChecker+Invalid, 599 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 583 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:27,084 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2383 Valid, 9169 Invalid, 599 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [583 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-12-06 19:58:27,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3995 states. [2021-12-06 19:58:27,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3995 to 2047. [2021-12-06 19:58:27,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2047 states, 1445 states have (on average 1.2816608996539793) internal successors, (1852), 1455 states have internal predecessors, (1852), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2021-12-06 19:58:27,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2047 states to 2047 states and 2832 transitions. [2021-12-06 19:58:27,181 INFO L78 Accepts]: Start accepts. Automaton has 2047 states and 2832 transitions. Word has length 61 [2021-12-06 19:58:27,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:27,181 INFO L470 AbstractCegarLoop]: Abstraction has 2047 states and 2832 transitions. [2021-12-06 19:58:27,181 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:58:27,181 INFO L276 IsEmpty]: Start isEmpty. Operand 2047 states and 2832 transitions. [2021-12-06 19:58:27,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-12-06 19:58:27,183 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:27,183 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:27,203 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (6)] Ended with exit code 0 [2021-12-06 19:58:27,384 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:27,384 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:27,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:27,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1812840541, now seen corresponding path program 1 times [2021-12-06 19:58:27,385 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:27,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [390945364] [2021-12-06 19:58:27,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:27,385 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:27,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:27,386 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:27,387 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2021-12-06 19:58:27,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:27,977 INFO L263 TraceCheckSpWp]: Trace formula consists of 946 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-06 19:58:27,979 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:28,442 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:28,442 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:58:29,332 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:29,332 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:29,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [390945364] [2021-12-06 19:58:29,332 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [390945364] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:58:29,332 INFO L186 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2021-12-06 19:58:29,332 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2021-12-06 19:58:29,333 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916177290] [2021-12-06 19:58:29,333 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2021-12-06 19:58:29,333 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2021-12-06 19:58:29,333 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:29,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-12-06 19:58:29,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2021-12-06 19:58:29,334 INFO L87 Difference]: Start difference. First operand 2047 states and 2832 transitions. Second operand has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:58:31,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:31,615 INFO L93 Difference]: Finished difference Result 4094 states and 5675 transitions. [2021-12-06 19:58:31,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-06 19:58:31,616 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 63 [2021-12-06 19:58:31,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:31,631 INFO L225 Difference]: With dead ends: 4094 [2021-12-06 19:58:31,631 INFO L226 Difference]: Without dead ends: 2071 [2021-12-06 19:58:31,635 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 102 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2021-12-06 19:58:31,636 INFO L933 BasicCegarLoop]: 1470 mSDtfsCounter, 23 mSDsluCounter, 19084 mSDsCounter, 0 mSdLazyCounter, 287 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 20554 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:31,636 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 20554 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 287 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2021-12-06 19:58:31,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2071 states. [2021-12-06 19:58:31,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2071 to 2071. [2021-12-06 19:58:31,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2071 states, 1469 states have (on average 1.2770592239618788) internal successors, (1876), 1479 states have internal predecessors, (1876), 491 states have call successors, (491), 111 states have call predecessors, (491), 110 states have return successors, (489), 489 states have call predecessors, (489), 489 states have call successors, (489) [2021-12-06 19:58:31,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2071 states to 2071 states and 2856 transitions. [2021-12-06 19:58:31,709 INFO L78 Accepts]: Start accepts. Automaton has 2071 states and 2856 transitions. Word has length 63 [2021-12-06 19:58:31,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:31,709 INFO L470 AbstractCegarLoop]: Abstraction has 2071 states and 2856 transitions. [2021-12-06 19:58:31,709 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.5) internal successors, (84), 24 states have internal predecessors, (84), 1 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2021-12-06 19:58:31,709 INFO L276 IsEmpty]: Start isEmpty. Operand 2071 states and 2856 transitions. [2021-12-06 19:58:31,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-12-06 19:58:31,710 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:31,710 INFO L514 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:31,729 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (7)] Ended with exit code 0 [2021-12-06 19:58:31,911 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:31,912 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:31,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:31,912 INFO L85 PathProgramCache]: Analyzing trace with hash 1724546477, now seen corresponding path program 2 times [2021-12-06 19:58:31,914 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:31,914 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [777192050] [2021-12-06 19:58:31,914 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:58:31,915 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:31,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:31,916 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:31,917 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2021-12-06 19:58:32,724 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:58:32,724 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:58:32,771 INFO L263 TraceCheckSpWp]: Trace formula consists of 836 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 19:58:32,774 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:33,150 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2021-12-06 19:58:33,150 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:33,150 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:33,150 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [777192050] [2021-12-06 19:58:33,150 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [777192050] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:33,150 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:33,150 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:58:33,151 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903079991] [2021-12-06 19:58:33,151 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:33,151 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:58:33,151 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:33,151 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:58:33,151 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:58:33,152 INFO L87 Difference]: Start difference. First operand 2071 states and 2856 transitions. Second operand has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:58:37,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:37,321 INFO L93 Difference]: Finished difference Result 5144 states and 7129 transitions. [2021-12-06 19:58:37,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:58:37,321 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 87 [2021-12-06 19:58:37,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:37,342 INFO L225 Difference]: With dead ends: 5144 [2021-12-06 19:58:37,342 INFO L226 Difference]: Without dead ends: 4090 [2021-12-06 19:58:37,344 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:58:37,345 INFO L933 BasicCegarLoop]: 3073 mSDtfsCounter, 2777 mSDsluCounter, 2633 mSDsCounter, 0 mSdLazyCounter, 1001 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2777 SdHoareTripleChecker+Valid, 5706 SdHoareTripleChecker+Invalid, 1004 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1001 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:37,345 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2777 Valid, 5706 Invalid, 1004 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1001 Invalid, 0 Unknown, 0 Unchecked, 4.0s Time] [2021-12-06 19:58:37,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4090 states. [2021-12-06 19:58:37,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4090 to 4078. [2021-12-06 19:58:37,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4078 states, 2879 states have (on average 1.2820423758249393) internal successors, (3691), 2897 states have internal predecessors, (3691), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2021-12-06 19:58:37,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4078 states to 4078 states and 5647 transitions. [2021-12-06 19:58:37,486 INFO L78 Accepts]: Start accepts. Automaton has 4078 states and 5647 transitions. Word has length 87 [2021-12-06 19:58:37,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:37,487 INFO L470 AbstractCegarLoop]: Abstraction has 4078 states and 5647 transitions. [2021-12-06 19:58:37,487 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.25) internal successors, (37), 3 states have internal predecessors, (37), 3 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2021-12-06 19:58:37,487 INFO L276 IsEmpty]: Start isEmpty. Operand 4078 states and 5647 transitions. [2021-12-06 19:58:37,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2021-12-06 19:58:37,488 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:37,488 INFO L514 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:37,512 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (8)] Ended with exit code 0 [2021-12-06 19:58:37,689 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:37,689 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:37,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:37,690 INFO L85 PathProgramCache]: Analyzing trace with hash 2143028962, now seen corresponding path program 1 times [2021-12-06 19:58:37,691 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:37,691 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [58234944] [2021-12-06 19:58:37,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:37,691 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:37,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:37,692 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:37,693 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2021-12-06 19:58:38,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:38,335 INFO L263 TraceCheckSpWp]: Trace formula consists of 1075 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-06 19:58:38,337 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:39,592 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:39,592 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:58:42,388 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-06 19:58:42,388 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:42,388 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [58234944] [2021-12-06 19:58:42,388 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [58234944] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:58:42,388 INFO L186 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2021-12-06 19:58:42,388 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2021-12-06 19:58:42,389 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480038659] [2021-12-06 19:58:42,389 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2021-12-06 19:58:42,389 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2021-12-06 19:58:42,389 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:42,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2021-12-06 19:58:42,391 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=531, Invalid=1725, Unknown=0, NotChecked=0, Total=2256 [2021-12-06 19:58:42,391 INFO L87 Difference]: Start difference. First operand 4078 states and 5647 transitions. Second operand has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2021-12-06 19:58:47,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:47,126 INFO L93 Difference]: Finished difference Result 8128 states and 11275 transitions. [2021-12-06 19:58:47,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-12-06 19:58:47,127 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) Word has length 91 [2021-12-06 19:58:47,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:47,146 INFO L225 Difference]: With dead ends: 8128 [2021-12-06 19:58:47,146 INFO L226 Difference]: Without dead ends: 4098 [2021-12-06 19:58:47,154 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=803, Invalid=2277, Unknown=0, NotChecked=0, Total=3080 [2021-12-06 19:58:47,155 INFO L933 BasicCegarLoop]: 1470 mSDtfsCounter, 33 mSDsluCounter, 35232 mSDsCounter, 0 mSdLazyCounter, 946 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 36702 SdHoareTripleChecker+Invalid, 978 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 946 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:47,155 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 36702 Invalid, 978 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 946 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2021-12-06 19:58:47,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4098 states. [2021-12-06 19:58:47,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4098 to 4098. [2021-12-06 19:58:47,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4098 states, 2899 states have (on average 1.2800965850293204) internal successors, (3711), 2917 states have internal predecessors, (3711), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2021-12-06 19:58:47,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4098 states to 4098 states and 5667 transitions. [2021-12-06 19:58:47,280 INFO L78 Accepts]: Start accepts. Automaton has 4098 states and 5667 transitions. Word has length 91 [2021-12-06 19:58:47,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:47,281 INFO L470 AbstractCegarLoop]: Abstraction has 4098 states and 5667 transitions. [2021-12-06 19:58:47,281 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 48 states have (on average 2.8541666666666665) internal successors, (137), 48 states have internal predecessors, (137), 1 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 1 states have call predecessors, (8), 1 states have call successors, (8) [2021-12-06 19:58:47,281 INFO L276 IsEmpty]: Start isEmpty. Operand 4098 states and 5667 transitions. [2021-12-06 19:58:47,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2021-12-06 19:58:47,282 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:47,282 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:47,302 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2021-12-06 19:58:47,483 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:47,483 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:47,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:47,483 INFO L85 PathProgramCache]: Analyzing trace with hash -457110534, now seen corresponding path program 2 times [2021-12-06 19:58:47,484 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:47,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1518201757] [2021-12-06 19:58:47,484 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-06 19:58:47,485 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:47,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:47,485 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:47,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2021-12-06 19:58:47,988 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-06 19:58:47,988 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-06 19:58:48,033 INFO L263 TraceCheckSpWp]: Trace formula consists of 833 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-06 19:58:48,035 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:48,164 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:58:48,165 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:48,165 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:48,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1518201757] [2021-12-06 19:58:48,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1518201757] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:48,165 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:48,165 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-12-06 19:58:48,165 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873071790] [2021-12-06 19:58:48,165 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:48,166 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-06 19:58:48,166 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:48,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-06 19:58:48,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:58:48,166 INFO L87 Difference]: Start difference. First operand 4098 states and 5667 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2021-12-06 19:58:48,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:58:48,859 INFO L93 Difference]: Finished difference Result 9102 states and 12925 transitions. [2021-12-06 19:58:48,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 19:58:48,859 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 111 [2021-12-06 19:58:48,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:58:48,887 INFO L225 Difference]: With dead ends: 9102 [2021-12-06 19:58:48,887 INFO L226 Difference]: Without dead ends: 6045 [2021-12-06 19:58:48,894 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:58:48,894 INFO L933 BasicCegarLoop]: 2196 mSDtfsCounter, 2018 mSDsluCounter, 4533 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 656 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2018 SdHoareTripleChecker+Valid, 6729 SdHoareTripleChecker+Invalid, 673 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 656 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-12-06 19:58:48,894 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2018 Valid, 6729 Invalid, 673 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [656 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-12-06 19:58:48,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6045 states. [2021-12-06 19:58:49,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6045 to 4098. [2021-12-06 19:58:49,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4098 states, 2899 states have (on average 1.2794066919627458) internal successors, (3709), 2917 states have internal predecessors, (3709), 978 states have call successors, (978), 221 states have call predecessors, (978), 220 states have return successors, (978), 977 states have call predecessors, (978), 976 states have call successors, (978) [2021-12-06 19:58:49,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4098 states to 4098 states and 5665 transitions. [2021-12-06 19:58:49,050 INFO L78 Accepts]: Start accepts. Automaton has 4098 states and 5665 transitions. Word has length 111 [2021-12-06 19:58:49,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:58:49,051 INFO L470 AbstractCegarLoop]: Abstraction has 4098 states and 5665 transitions. [2021-12-06 19:58:49,051 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 5 states have internal predecessors, (40), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2021-12-06 19:58:49,051 INFO L276 IsEmpty]: Start isEmpty. Operand 4098 states and 5665 transitions. [2021-12-06 19:58:49,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2021-12-06 19:58:49,053 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:58:49,053 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:58:49,069 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (10)] Ended with exit code 0 [2021-12-06 19:58:49,254 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:58:49,255 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:58:49,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:58:49,256 INFO L85 PathProgramCache]: Analyzing trace with hash -199241997, now seen corresponding path program 1 times [2021-12-06 19:58:49,260 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:58:49,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1375563204] [2021-12-06 19:58:49,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:58:49,261 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:58:49,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:58:49,263 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:58:49,268 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2021-12-06 19:58:50,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:58:50,354 INFO L263 TraceCheckSpWp]: Trace formula consists of 1206 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-06 19:58:50,356 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:58:50,705 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:58:50,705 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:58:50,705 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:58:50,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1375563204] [2021-12-06 19:58:50,705 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1375563204] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:58:50,705 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:58:50,706 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-12-06 19:58:50,706 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417931256] [2021-12-06 19:58:50,706 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:58:50,706 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-12-06 19:58:50,706 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:58:50,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-06 19:58:50,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-12-06 19:58:50,707 INFO L87 Difference]: Start difference. First operand 4098 states and 5665 transitions. Second operand has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2021-12-06 19:59:05,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:05,333 INFO L93 Difference]: Finished difference Result 11841 states and 16824 transitions. [2021-12-06 19:59:05,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-06 19:59:05,335 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 120 [2021-12-06 19:59:05,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:05,364 INFO L225 Difference]: With dead ends: 11841 [2021-12-06 19:59:05,364 INFO L226 Difference]: Without dead ends: 7818 [2021-12-06 19:59:05,373 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2021-12-06 19:59:05,374 INFO L933 BasicCegarLoop]: 3309 mSDtfsCounter, 3162 mSDsluCounter, 12381 mSDsCounter, 0 mSdLazyCounter, 2542 mSolverCounterSat, 927 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3356 SdHoareTripleChecker+Valid, 15690 SdHoareTripleChecker+Invalid, 3469 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 927 IncrementalHoareTripleChecker+Valid, 2542 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.9s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:05,374 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3356 Valid, 15690 Invalid, 3469 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [927 Valid, 2542 Invalid, 0 Unknown, 0 Unchecked, 13.9s Time] [2021-12-06 19:59:05,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7818 states. [2021-12-06 19:59:05,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7818 to 4099. [2021-12-06 19:59:05,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4099 states, 2898 states have (on average 1.2781228433402347) internal successors, (3704), 2919 states have internal predecessors, (3704), 978 states have call successors, (978), 221 states have call predecessors, (978), 222 states have return successors, (978), 976 states have call predecessors, (978), 976 states have call successors, (978) [2021-12-06 19:59:05,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4099 states to 4099 states and 5660 transitions. [2021-12-06 19:59:05,625 INFO L78 Accepts]: Start accepts. Automaton has 4099 states and 5660 transitions. Word has length 120 [2021-12-06 19:59:05,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:05,625 INFO L470 AbstractCegarLoop]: Abstraction has 4099 states and 5660 transitions. [2021-12-06 19:59:05,626 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 7.833333333333333) internal successors, (47), 7 states have internal predecessors, (47), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2021-12-06 19:59:05,626 INFO L276 IsEmpty]: Start isEmpty. Operand 4099 states and 5660 transitions. [2021-12-06 19:59:05,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-12-06 19:59:05,629 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:05,629 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:05,655 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (11)] Ended with exit code 0 [2021-12-06 19:59:05,832 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:05,833 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:05,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:05,834 INFO L85 PathProgramCache]: Analyzing trace with hash -226816085, now seen corresponding path program 1 times [2021-12-06 19:59:05,838 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:05,839 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [87104317] [2021-12-06 19:59:05,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:05,840 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:05,840 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:05,842 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:05,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2021-12-06 19:59:06,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:59:06,953 INFO L263 TraceCheckSpWp]: Trace formula consists of 1250 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:59:06,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:59:07,406 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2021-12-06 19:59:07,406 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:59:07,407 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:59:07,407 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [87104317] [2021-12-06 19:59:07,407 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [87104317] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:59:07,407 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:59:07,407 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-06 19:59:07,407 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307323218] [2021-12-06 19:59:07,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:59:07,408 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:59:07,408 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:59:07,408 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:59:07,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:59:07,408 INFO L87 Difference]: Start difference. First operand 4099 states and 5660 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2021-12-06 19:59:07,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:07,674 INFO L93 Difference]: Finished difference Result 10581 states and 15034 transitions. [2021-12-06 19:59:07,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:59:07,674 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 132 [2021-12-06 19:59:07,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:07,688 INFO L225 Difference]: With dead ends: 10581 [2021-12-06 19:59:07,688 INFO L226 Difference]: Without dead ends: 6557 [2021-12-06 19:59:07,696 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:59:07,697 INFO L933 BasicCegarLoop]: 2159 mSDtfsCounter, 650 mSDsluCounter, 1461 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 858 SdHoareTripleChecker+Valid, 3620 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:07,697 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [858 Valid, 3620 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:59:07,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6557 states. [2021-12-06 19:59:08,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6557 to 6551. [2021-12-06 19:59:08,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6551 states, 4626 states have (on average 1.3035019455252919) internal successors, (6030), 4651 states have internal predecessors, (6030), 1702 states have call successors, (1702), 221 states have call predecessors, (1702), 222 states have return successors, (1702), 1700 states have call predecessors, (1702), 1700 states have call successors, (1702) [2021-12-06 19:59:08,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6551 states to 6551 states and 9434 transitions. [2021-12-06 19:59:08,119 INFO L78 Accepts]: Start accepts. Automaton has 6551 states and 9434 transitions. Word has length 132 [2021-12-06 19:59:08,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:08,119 INFO L470 AbstractCegarLoop]: Abstraction has 6551 states and 9434 transitions. [2021-12-06 19:59:08,119 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2021-12-06 19:59:08,119 INFO L276 IsEmpty]: Start isEmpty. Operand 6551 states and 9434 transitions. [2021-12-06 19:59:08,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-12-06 19:59:08,123 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:08,124 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:08,145 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (12)] Ended with exit code 0 [2021-12-06 19:59:08,324 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:08,324 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:08,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:08,325 INFO L85 PathProgramCache]: Analyzing trace with hash 73355820, now seen corresponding path program 1 times [2021-12-06 19:59:08,326 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:08,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [164870491] [2021-12-06 19:59:08,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:08,326 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:08,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:08,327 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:08,328 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2021-12-06 19:59:08,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:59:09,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 1238 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:59:09,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:59:09,168 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:59:09,168 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:59:09,168 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:59:09,168 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [164870491] [2021-12-06 19:59:09,169 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [164870491] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:59:09,169 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:59:09,169 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 19:59:09,169 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692575326] [2021-12-06 19:59:09,169 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:59:09,169 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:59:09,170 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:59:09,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:59:09,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:59:09,170 INFO L87 Difference]: Start difference. First operand 6551 states and 9434 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:59:09,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:09,974 INFO L93 Difference]: Finished difference Result 9872 states and 14531 transitions. [2021-12-06 19:59:09,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-06 19:59:09,975 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 130 [2021-12-06 19:59:09,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:09,997 INFO L225 Difference]: With dead ends: 9872 [2021-12-06 19:59:09,997 INFO L226 Difference]: Without dead ends: 9864 [2021-12-06 19:59:09,999 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:59:10,000 INFO L933 BasicCegarLoop]: 2554 mSDtfsCounter, 1293 mSDsluCounter, 3443 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 385 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1319 SdHoareTripleChecker+Valid, 5997 SdHoareTripleChecker+Invalid, 401 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 385 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:10,000 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1319 Valid, 5997 Invalid, 401 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [385 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-12-06 19:59:10,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9864 states. [2021-12-06 19:59:10,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9864 to 6557. [2021-12-06 19:59:10,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6557 states, 4630 states have (on average 1.3032397408207343) internal successors, (6034), 4655 states have internal predecessors, (6034), 1704 states have call successors, (1704), 221 states have call predecessors, (1704), 222 states have return successors, (1704), 1702 states have call predecessors, (1704), 1702 states have call successors, (1704) [2021-12-06 19:59:10,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6557 states to 6557 states and 9442 transitions. [2021-12-06 19:59:10,360 INFO L78 Accepts]: Start accepts. Automaton has 6557 states and 9442 transitions. Word has length 130 [2021-12-06 19:59:10,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:10,360 INFO L470 AbstractCegarLoop]: Abstraction has 6557 states and 9442 transitions. [2021-12-06 19:59:10,360 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 3 states have call successors, (7), 2 states have call predecessors, (7), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2021-12-06 19:59:10,360 INFO L276 IsEmpty]: Start isEmpty. Operand 6557 states and 9442 transitions. [2021-12-06 19:59:10,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-12-06 19:59:10,364 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:10,365 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:10,387 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (13)] Ended with exit code 0 [2021-12-06 19:59:10,565 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:10,565 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:10,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:10,566 INFO L85 PathProgramCache]: Analyzing trace with hash 1802794400, now seen corresponding path program 1 times [2021-12-06 19:59:10,567 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:10,567 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [95220638] [2021-12-06 19:59:10,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:10,567 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:10,567 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:10,568 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:10,568 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2021-12-06 19:59:11,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:59:11,371 INFO L263 TraceCheckSpWp]: Trace formula consists of 1243 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:59:11,373 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:59:11,833 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:59:11,833 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-06 19:59:12,322 INFO L134 CoverageAnalysis]: Checked inductivity of 1026 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2021-12-06 19:59:12,322 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:59:12,322 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [95220638] [2021-12-06 19:59:12,322 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [95220638] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-06 19:59:12,322 INFO L186 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2021-12-06 19:59:12,322 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2021-12-06 19:59:12,322 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428919194] [2021-12-06 19:59:12,323 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2021-12-06 19:59:12,323 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-12-06 19:59:12,323 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:59:12,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-12-06 19:59:12,324 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-12-06 19:59:12,324 INFO L87 Difference]: Start difference. First operand 6557 states and 9442 transitions. Second operand has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2021-12-06 19:59:15,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:15,390 INFO L93 Difference]: Finished difference Result 13045 states and 18812 transitions. [2021-12-06 19:59:15,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:59:15,391 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 134 [2021-12-06 19:59:15,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:15,406 INFO L225 Difference]: With dead ends: 13045 [2021-12-06 19:59:15,406 INFO L226 Difference]: Without dead ends: 6563 [2021-12-06 19:59:15,418 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 262 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-12-06 19:59:15,419 INFO L933 BasicCegarLoop]: 2412 mSDtfsCounter, 2484 mSDsluCounter, 3411 mSDsCounter, 0 mSdLazyCounter, 633 mSolverCounterSat, 402 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2881 SdHoareTripleChecker+Valid, 5823 SdHoareTripleChecker+Invalid, 1035 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 402 IncrementalHoareTripleChecker+Valid, 633 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.6s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:15,419 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2881 Valid, 5823 Invalid, 1035 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [402 Valid, 633 Invalid, 0 Unknown, 0 Unchecked, 2.6s Time] [2021-12-06 19:59:15,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6563 states. [2021-12-06 19:59:15,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6563 to 6557. [2021-12-06 19:59:15,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6557 states, 4630 states have (on average 1.3006479481641469) internal successors, (6022), 4655 states have internal predecessors, (6022), 1704 states have call successors, (1704), 221 states have call predecessors, (1704), 222 states have return successors, (1704), 1702 states have call predecessors, (1704), 1702 states have call successors, (1704) [2021-12-06 19:59:15,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6557 states to 6557 states and 9430 transitions. [2021-12-06 19:59:15,749 INFO L78 Accepts]: Start accepts. Automaton has 6557 states and 9430 transitions. Word has length 134 [2021-12-06 19:59:15,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:15,749 INFO L470 AbstractCegarLoop]: Abstraction has 6557 states and 9430 transitions. [2021-12-06 19:59:15,749 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.166666666666666) internal successors, (91), 6 states have internal predecessors, (91), 4 states have call successors, (12), 2 states have call predecessors, (12), 1 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2021-12-06 19:59:15,750 INFO L276 IsEmpty]: Start isEmpty. Operand 6557 states and 9430 transitions. [2021-12-06 19:59:15,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2021-12-06 19:59:15,755 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:15,755 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:15,782 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (14)] Ended with exit code 0 [2021-12-06 19:59:15,955 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:15,956 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:15,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:15,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1518481568, now seen corresponding path program 1 times [2021-12-06 19:59:15,957 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:15,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [822019200] [2021-12-06 19:59:15,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:15,958 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:15,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:15,958 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:15,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2021-12-06 19:59:16,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:59:16,778 INFO L263 TraceCheckSpWp]: Trace formula consists of 1306 conjuncts, 3 conjunts are in the unsatisfiable core [2021-12-06 19:59:16,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:59:16,972 INFO L134 CoverageAnalysis]: Checked inductivity of 1043 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 1031 trivial. 0 not checked. [2021-12-06 19:59:16,972 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:59:16,972 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:59:16,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [822019200] [2021-12-06 19:59:16,972 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [822019200] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:59:16,972 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:59:16,972 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-06 19:59:16,972 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419441338] [2021-12-06 19:59:16,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:59:16,973 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-06 19:59:16,973 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:59:16,973 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-06 19:59:16,973 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-06 19:59:16,974 INFO L87 Difference]: Start difference. First operand 6557 states and 9430 transitions. Second operand has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2021-12-06 19:59:17,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:17,308 INFO L93 Difference]: Finished difference Result 12389 states and 17789 transitions. [2021-12-06 19:59:17,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-06 19:59:17,309 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 153 [2021-12-06 19:59:17,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:17,326 INFO L225 Difference]: With dead ends: 12389 [2021-12-06 19:59:17,326 INFO L226 Difference]: Without dead ends: 5895 [2021-12-06 19:59:17,341 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-06 19:59:17,341 INFO L933 BasicCegarLoop]: 1478 mSDtfsCounter, 13 mSDsluCounter, 2937 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 4415 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:17,342 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 4415 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:59:17,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5895 states. [2021-12-06 19:59:17,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5895 to 5886. [2021-12-06 19:59:17,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5886 states, 4157 states have (on average 1.2966081308636035) internal successors, (5390), 4180 states have internal predecessors, (5390), 1510 states have call successors, (1510), 217 states have call predecessors, (1510), 218 states have return successors, (1510), 1506 states have call predecessors, (1510), 1508 states have call successors, (1510) [2021-12-06 19:59:17,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5886 states to 5886 states and 8410 transitions. [2021-12-06 19:59:17,644 INFO L78 Accepts]: Start accepts. Automaton has 5886 states and 8410 transitions. Word has length 153 [2021-12-06 19:59:17,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:17,645 INFO L470 AbstractCegarLoop]: Abstraction has 5886 states and 8410 transitions. [2021-12-06 19:59:17,645 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 3 states have call successors, (12), 2 states have call predecessors, (12), 2 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2021-12-06 19:59:17,645 INFO L276 IsEmpty]: Start isEmpty. Operand 5886 states and 8410 transitions. [2021-12-06 19:59:17,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-12-06 19:59:17,650 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:17,651 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:17,681 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (15)] Ended with exit code 0 [2021-12-06 19:59:17,851 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:17,852 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:17,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:17,854 INFO L85 PathProgramCache]: Analyzing trace with hash -2121096315, now seen corresponding path program 1 times [2021-12-06 19:59:17,858 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:17,858 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [852621592] [2021-12-06 19:59:17,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:17,859 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:17,859 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:17,861 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:17,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2021-12-06 19:59:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-06 19:59:18,691 INFO L263 TraceCheckSpWp]: Trace formula consists of 1285 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-06 19:59:18,693 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-06 19:59:19,262 INFO L134 CoverageAnalysis]: Checked inductivity of 1031 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1028 trivial. 0 not checked. [2021-12-06 19:59:19,262 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-06 19:59:19,262 INFO L139 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2021-12-06 19:59:19,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [852621592] [2021-12-06 19:59:19,262 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [852621592] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-06 19:59:19,262 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-06 19:59:19,262 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-12-06 19:59:19,262 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053194929] [2021-12-06 19:59:19,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-06 19:59:19,263 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-06 19:59:19,263 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2021-12-06 19:59:19,263 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-06 19:59:19,263 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:59:19,263 INFO L87 Difference]: Start difference. First operand 5886 states and 8410 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2021-12-06 19:59:19,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-06 19:59:19,522 INFO L93 Difference]: Finished difference Result 11676 states and 16707 transitions. [2021-12-06 19:59:19,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-06 19:59:19,523 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 150 [2021-12-06 19:59:19,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-06 19:59:19,534 INFO L225 Difference]: With dead ends: 11676 [2021-12-06 19:59:19,534 INFO L226 Difference]: Without dead ends: 5865 [2021-12-06 19:59:19,541 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 148 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-06 19:59:19,542 INFO L933 BasicCegarLoop]: 1464 mSDtfsCounter, 1397 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1397 SdHoareTripleChecker+Valid, 1464 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-06 19:59:19,542 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1397 Valid, 1464 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-06 19:59:19,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5865 states. [2021-12-06 19:59:19,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5865 to 5865. [2021-12-06 19:59:19,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5865 states, 4136 states have (on average 1.293036750483559) internal successors, (5348), 4159 states have internal predecessors, (5348), 1510 states have call successors, (1510), 217 states have call predecessors, (1510), 218 states have return successors, (1510), 1506 states have call predecessors, (1510), 1508 states have call successors, (1510) [2021-12-06 19:59:19,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5865 states to 5865 states and 8368 transitions. [2021-12-06 19:59:19,838 INFO L78 Accepts]: Start accepts. Automaton has 5865 states and 8368 transitions. Word has length 150 [2021-12-06 19:59:19,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-06 19:59:19,839 INFO L470 AbstractCegarLoop]: Abstraction has 5865 states and 8368 transitions. [2021-12-06 19:59:19,839 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 2 states have internal predecessors, (70), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2021-12-06 19:59:19,839 INFO L276 IsEmpty]: Start isEmpty. Operand 5865 states and 8368 transitions. [2021-12-06 19:59:19,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2021-12-06 19:59:19,843 INFO L506 BasicCegarLoop]: Found error trace [2021-12-06 19:59:19,843 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:19,863 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (16)] Ended with exit code 0 [2021-12-06 19:59:20,044 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:20,045 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-06 19:59:20,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-06 19:59:20,046 INFO L85 PathProgramCache]: Analyzing trace with hash -1838241346, now seen corresponding path program 1 times [2021-12-06 19:59:20,050 INFO L121 FreeRefinementEngine]: Executing refinement strategy WOLF [2021-12-06 19:59:20,050 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2046808700] [2021-12-06 19:59:20,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-06 19:59:20,051 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-12-06 19:59:20,051 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat [2021-12-06 19:59:20,053 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-12-06 19:59:20,055 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2021-12-06 19:59:35,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:59:35,882 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-06 19:59:53,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-06 19:59:53,901 INFO L133 FreeRefinementEngine]: Strategy WOLF found a feasible trace [2021-12-06 19:59:53,902 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-12-06 19:59:53,902 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ldv_blast_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-12-06 19:59:53,933 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 (17)] Ended with exit code 0 [2021-12-06 19:59:54,103 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/mathsat -unsat_core_generation=3 [2021-12-06 19:59:54,106 INFO L732 BasicCegarLoop]: Path program histogram: [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-06 19:59:54,109 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-12-06 19:59:54,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 06.12 07:59:54 BoogieIcfgContainer [2021-12-06 19:59:54,258 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-12-06 19:59:54,259 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-06 19:59:54,259 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-06 19:59:54,259 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-06 19:59:54,259 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.12 07:58:19" (3/4) ... [2021-12-06 19:59:54,261 INFO L140 WitnessPrinter]: No result that supports witness generation found [2021-12-06 19:59:54,262 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-06 19:59:54,262 INFO L158 Benchmark]: Toolchain (without parser) took 119702.21ms. Allocated memory was 75.5MB in the beginning and 612.4MB in the end (delta: 536.9MB). Free memory was 50.9MB in the beginning and 334.7MB in the end (delta: -283.8MB). Peak memory consumption was 252.8MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,262 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 75.5MB. Free memory is still 57.1MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-06 19:59:54,262 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1782.37ms. Allocated memory was 75.5MB in the beginning and 159.4MB in the end (delta: 83.9MB). Free memory was 50.6MB in the beginning and 65.3MB in the end (delta: -14.7MB). Peak memory consumption was 85.2MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,263 INFO L158 Benchmark]: Boogie Procedure Inliner took 146.52ms. Allocated memory is still 159.4MB. Free memory was 65.3MB in the beginning and 89.5MB in the end (delta: -24.2MB). Peak memory consumption was 19.8MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,263 INFO L158 Benchmark]: Boogie Preprocessor took 111.84ms. Allocated memory is still 159.4MB. Free memory was 89.5MB in the beginning and 69.4MB in the end (delta: 20.1MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,263 INFO L158 Benchmark]: RCFGBuilder took 23286.77ms. Allocated memory was 159.4MB in the beginning and 192.9MB in the end (delta: 33.6MB). Free memory was 69.4MB in the beginning and 87.9MB in the end (delta: -18.5MB). Peak memory consumption was 56.0MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,263 INFO L158 Benchmark]: TraceAbstraction took 94365.50ms. Allocated memory was 192.9MB in the beginning and 612.4MB in the end (delta: 419.4MB). Free memory was 86.9MB in the beginning and 335.8MB in the end (delta: -248.9MB). Peak memory consumption was 404.3MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,264 INFO L158 Benchmark]: Witness Printer took 2.78ms. Allocated memory is still 612.4MB. Free memory was 335.8MB in the beginning and 334.7MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-12-06 19:59:54,265 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 75.5MB. Free memory is still 57.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1782.37ms. Allocated memory was 75.5MB in the beginning and 159.4MB in the end (delta: 83.9MB). Free memory was 50.6MB in the beginning and 65.3MB in the end (delta: -14.7MB). Peak memory consumption was 85.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 146.52ms. Allocated memory is still 159.4MB. Free memory was 65.3MB in the beginning and 89.5MB in the end (delta: -24.2MB). Peak memory consumption was 19.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 111.84ms. Allocated memory is still 159.4MB. Free memory was 89.5MB in the beginning and 69.4MB in the end (delta: 20.1MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * RCFGBuilder took 23286.77ms. Allocated memory was 159.4MB in the beginning and 192.9MB in the end (delta: 33.6MB). Free memory was 69.4MB in the beginning and 87.9MB in the end (delta: -18.5MB). Peak memory consumption was 56.0MB. Max. memory is 16.1GB. * TraceAbstraction took 94365.50ms. Allocated memory was 192.9MB in the beginning and 612.4MB in the end (delta: 419.4MB). Free memory was 86.9MB in the beginning and 335.8MB in the end (delta: -248.9MB). Peak memory consumption was 404.3MB. Max. memory is 16.1GB. * Witness Printer took 2.78ms. Allocated memory is still 612.4MB. Free memory was 335.8MB in the beginning and 334.7MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 7949]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of large string literal at line 7781. Possible FailurePath: [L5238] static int fst_txq_low = 8; [L5239] static int fst_txq_high = 12; [L5240] static int fst_max_reads = 7; [L5241] static int fst_excluded_cards = 0; [L5242] static int fst_excluded_list[32U] ; [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L5260] static spinlock_t fst_work_q_lock ; [L5261] static u64 fst_work_txq ; [L5262] static u64 fst_work_intq ; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L7800] int LDV_IN_INTERRUPT ; [L7953] int ldv_module_refcounter = 1; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=0, ldv_module_refcounter=1, type_strings={53:0}] [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, type_strings={53:0}] [L4600] return (& lock->ldv_6060.rlock); VAL [\result={50:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, lock={50:0}, type_strings={53:0}] [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={50:0}, type_strings={53:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={57:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp=0, type_strings={53:0}] [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={53:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=2147483648, type_strings={53:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND TRUE tmp___0 == 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={53:0}] [L7855] COND TRUE ldv_s_fst_ops_net_device_ops == 0 [L7857] CALL, EXPR fst_open(var_group1) [L7167] int err ; [L7168] struct fst_port_info *port ; [L7169] struct hdlc_device *tmp ; [L7170] int tmp___0 ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7173] CALL, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L5204] void *tmp ; [L5207] CALL, EXPR netdev_priv((struct net_device const *)dev) [L5064] return ((void *)dev + 2560U); VAL [\result={0:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L5207] RET, EXPR netdev_priv((struct net_device const *)dev) [L5207] tmp = netdev_priv((struct net_device const *)dev) [L5209] return ((struct hdlc_device *)tmp); VAL [\result={0:2560}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp={0:2560}, type_strings={53:0}] [L7173] RET, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, dev_to_hdlc(dev)={0:2560}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7173] tmp = dev_to_hdlc(dev) [L7174] EXPR tmp->priv [L7174] port = (struct fst_port_info *)tmp->priv [L7175] CALL, EXPR ldv_try_module_get_1(& __this_module) [L8027] int tmp ; [L8030] CALL, EXPR ldv_try_module_get(module) [L7965] int module_get_succeeded ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, module={-9223372036854775808:0}, module={-9223372036854775808:0}, type_strings={53:0}] [L7967] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) [L7969] CALL, EXPR ldv_undefined_int() [L8154] return __VERIFIER_nondet_int(); [L7969] RET, EXPR ldv_undefined_int() [L7969] module_get_succeeded = ldv_undefined_int() [L7971] COND TRUE module_get_succeeded == 1 [L7972] ldv_module_refcounter = ldv_module_refcounter + 1 [L7973] return (1); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-9223372036854775808:0}, module={-9223372036854775808:0}, module_get_succeeded=1, type_strings={53:0}] [L8030] RET, EXPR ldv_try_module_get(module) [L8030] tmp = ldv_try_module_get(module) [L8032] return (tmp); VAL [\result=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, module={-9223372036854775808:0}, module={-9223372036854775808:0}, tmp=1, type_strings={53:0}] [L7175] RET, EXPR ldv_try_module_get_1(& __this_module) [L7175] tmp___0 = ldv_try_module_get_1(& __this_module) [L7177] COND FALSE !(tmp___0 == 0) [L7181] EXPR port->mode VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, port->mode=4, tmp={0:2560}, tmp___0=1, type_strings={53:0}] [L7181] COND FALSE !(port->mode != 4) [L7195] CALL fst_openport(port) [L7102] int signals ; [L7103] int txq_length ; [L7104] unsigned int tmp ; [L7105] int tmp___0 ; [L7107] EXPR port->card [L7107] EXPR (port->card)->state VAL [(port->card)->state=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, port={0:0}, port->card={0:0}, type_strings={53:0}] [L7107] COND FALSE !((port->card)->state == 4U) [L7195] RET fst_openport(port) [L7196] CALL netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5137] struct netdev_queue *tmp ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5140] CALL, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [\old(index)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L5058] EXPR dev->_tx [L5058] return ((struct netdev_queue *)dev->_tx + (unsigned long )index); [L5140] RET, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, netdev_get_tx_queue((struct net_device const *)dev, 0U)={0:0}, type_strings={53:0}] [L5140] tmp = netdev_get_tx_queue((struct net_device const *)dev, 0U) [L5141] CALL netif_tx_wake_queue(tmp) [L5111] int tmp ; [L5112] int tmp___0 ; [L5115] CALL, EXPR netpoll_trap() [L8174] return __VERIFIER_nondet_int(); [L5115] RET, EXPR netpoll_trap() [L5115] tmp = netpoll_trap() [L5117] COND TRUE tmp != 0 [L5119] CALL netif_tx_start_queue(dev_queue) [L5105] FCALL clear_bit(0, (unsigned long volatile *)(& dev_queue->state)) [L5119] RET netif_tx_start_queue(dev_queue) [L5141] RET netif_tx_wake_queue(tmp) [L7196] RET netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, tmp={0:2560}, tmp___0=1, type_strings={53:0}] [L7198] return (0); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, dev={0:0}, dev={0:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={0:0}, tmp={0:2560}, tmp___0=1, type_strings={53:0}] [L7857] RET, EXPR fst_open(var_group1) [L7857] res_fst_open_36 = fst_open(var_group1) [L7858] FCALL ldv_check_return_value(res_fst_open_36) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7860] COND FALSE !(res_fst_open_36 < 0) [L7864] ldv_s_fst_ops_net_device_ops = ldv_s_fst_ops_net_device_ops + 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_group1={0:0}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, type_strings={53:0}] [L7451] COND TRUE ! __print_once [L7453] __print_once = (bool )1 [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-9223372036854775808:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, type_strings={53:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L8061] COND TRUE __VERIFIER_nondet_bool() [L8061] return 0; VAL [\old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, type_strings={53:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=null, \old(arg1)=32976, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, arg0=null, arg1=32976, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={0:0}, ldv_module_refcounter=2, type_strings={53:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); VAL [\old(flags)=32976, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, flags=32976, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp___2={0:0}, type_strings={53:0}] [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); VAL [\old(flags)=208, \old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, flags=208, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, tmp={0:0}, type_strings={53:0}] [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={63:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-9223372036854775808:0}, card={0:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, tmp={0:0}, type_strings={53:0}] [L7483] COND TRUE (unsigned long )card == (unsigned long )((struct fst_card_info *)0) [L7487] return (-12); [L7487] return (-12); VAL [\result=-12, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={-9223372036854775808:0}, card={0:0}, ent={265:266}, ent={265:266}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={267:268}, pdev={267:268}, tmp={0:0}, type_strings={53:0}] [L7895] RET, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7895] res_fst_add_one_42 = fst_add_one(var_group3, var_fst_add_one_42_p1) [L7896] FCALL ldv_check_return_value(res_fst_add_one_42) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=4294967284, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_fst_add_one_42_p1={265:266}, var_group1={0:0}, var_group3={267:268}] [L7898] COND TRUE res_fst_add_one_42 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=4294967284, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483648, type_strings={53:0}, var_fst_add_one_42_p1={265:266}, var_group1={0:0}, var_group3={267:268}] [L7937] CALL fst_cleanup_module() [L7791] FCALL pci_unregister_driver(& fst_driver) [L7937] RET fst_cleanup_module() [L7941] CALL ldv_check_final_state() [L8017] COND TRUE ldv_module_refcounter != 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L8019] CALL ldv_blast_assert() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] [L7949] reach_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={-9223372036854775808:0}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={53:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 57 procedures, 1064 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 94.2s, OverallIterations: 16, TraceHistogramMax: 32, PathProgramHistogramMax: 2, EmptinessCheckTime: 0.1s, AutomataDifference: 33.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18521 SdHoareTripleChecker+Valid, 26.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 17503 mSDsluCounter, 138399 SdHoareTripleChecker+Invalid, 22.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 107679 mSDsCounter, 3031 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 5576 IncrementalHoareTripleChecker+Invalid, 8607 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 3031 mSolverCounterUnsat, 30720 mSDtfsCounter, 5576 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1735 GetRequests, 1594 SyntacticMatches, 0 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 8.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6557occurred in iteration=12, InterpolantAutomatonStates: 126, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.8s AutomataMinimizationTime, 15 MinimizatonAttempts, 10958 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 22.2s SatisfiabilityAnalysisTime, 10.4s InterpolantComputationTime, 1512 NumberOfCodeBlocks, 1376 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 1694 ConstructedInterpolants, 0 QuantifiedInterpolants, 3575 SizeOfPredicates, 31 NumberOfNonLiveVariables, 15246 ConjunctsInSsa, 95 ConjunctsInUnsatCore, 20 InterpolantComputations, 10 PerfectInterpolantSequences, 8825/10031 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2021-12-06 19:59:54,313 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_926e1cd6-a250-4576-aa67-6a4086918144/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample