./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_-read.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 839c364b Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_-read.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9aaf3ef5b6218ff6658a67703b1e3ffb0d16a40e5e7c9a13354b853d6f63747b --- Real Ultimate output --- This is Ultimate 0.2.2-hotfix-svcomp22-839c364 [2021-12-07 00:05:01,489 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-07 00:05:01,491 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-07 00:05:01,521 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-07 00:05:01,521 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-07 00:05:01,523 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-07 00:05:01,524 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-07 00:05:01,526 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-07 00:05:01,528 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-07 00:05:01,529 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-07 00:05:01,530 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-07 00:05:01,531 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-07 00:05:01,532 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-07 00:05:01,533 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-07 00:05:01,534 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-07 00:05:01,536 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-07 00:05:01,537 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-07 00:05:01,538 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-07 00:05:01,540 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-07 00:05:01,542 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-07 00:05:01,544 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-07 00:05:01,545 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-07 00:05:01,547 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-07 00:05:01,547 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-07 00:05:01,551 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-07 00:05:01,551 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-07 00:05:01,552 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-07 00:05:01,553 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-07 00:05:01,553 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-07 00:05:01,554 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-07 00:05:01,555 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-07 00:05:01,556 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-07 00:05:01,556 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-07 00:05:01,557 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-07 00:05:01,558 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-07 00:05:01,558 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-07 00:05:01,559 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-07 00:05:01,559 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-07 00:05:01,559 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-07 00:05:01,560 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-07 00:05:01,561 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-07 00:05:01,562 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2021-12-07 00:05:01,580 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-07 00:05:01,580 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-07 00:05:01,581 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-07 00:05:01,581 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-07 00:05:01,581 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-12-07 00:05:01,581 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-12-07 00:05:01,582 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-07 00:05:01,582 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-07 00:05:01,582 INFO L138 SettingsManager]: * Use SBE=true [2021-12-07 00:05:01,582 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-07 00:05:01,582 INFO L138 SettingsManager]: * sizeof long=4 [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2021-12-07 00:05:01,583 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-12-07 00:05:01,584 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2021-12-07 00:05:01,584 INFO L138 SettingsManager]: * sizeof long double=12 [2021-12-07 00:05:01,584 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-07 00:05:01,584 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-07 00:05:01,584 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-07 00:05:01,584 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-12-07 00:05:01,588 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-07 00:05:01,588 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-07 00:05:01,589 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-12-07 00:05:01,589 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-07 00:05:01,589 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-12-07 00:05:01,589 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-07 00:05:01,589 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9aaf3ef5b6218ff6658a67703b1e3ffb0d16a40e5e7c9a13354b853d6f63747b [2021-12-07 00:05:01,767 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-07 00:05:01,783 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-07 00:05:01,785 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-07 00:05:01,785 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-07 00:05:01,786 INFO L275 PluginConnector]: CDTParser initialized [2021-12-07 00:05:01,787 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_-read.c [2021-12-07 00:05:01,829 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/data/5d3b1a88f/8bfae03b40bb41799964f911c59326f2/FLAGb563a1561 [2021-12-07 00:05:02,198 INFO L306 CDTParser]: Found 1 translation units. [2021-12-07 00:05:02,198 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_-read.c [2021-12-07 00:05:02,203 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/data/5d3b1a88f/8bfae03b40bb41799964f911c59326f2/FLAGb563a1561 [2021-12-07 00:05:02,212 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/data/5d3b1a88f/8bfae03b40bb41799964f911c59326f2 [2021-12-07 00:05:02,214 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-07 00:05:02,215 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-07 00:05:02,216 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-07 00:05:02,216 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-07 00:05:02,219 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-07 00:05:02,219 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,220 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13f16162 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02, skipping insertion in model container [2021-12-07 00:05:02,220 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,225 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-07 00:05:02,234 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-07 00:05:02,333 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-07 00:05:02,339 INFO L203 MainTranslator]: Completed pre-run [2021-12-07 00:05:02,350 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-07 00:05:02,359 INFO L208 MainTranslator]: Completed translation [2021-12-07 00:05:02,360 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02 WrapperNode [2021-12-07 00:05:02,360 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-07 00:05:02,361 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-07 00:05:02,361 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-07 00:05:02,361 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-07 00:05:02,367 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,372 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,385 INFO L137 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 67 [2021-12-07 00:05:02,385 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-07 00:05:02,386 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-07 00:05:02,386 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-07 00:05:02,386 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-07 00:05:02,392 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,392 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,393 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,393 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,397 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,400 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,401 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,402 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-07 00:05:02,403 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-07 00:05:02,403 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-07 00:05:02,403 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-07 00:05:02,404 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (1/1) ... [2021-12-07 00:05:02,410 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-07 00:05:02,420 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:02,432 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-12-07 00:05:02,434 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-12-07 00:05:02,461 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-07 00:05:02,462 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-07 00:05:02,462 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-07 00:05:02,462 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-07 00:05:02,462 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-07 00:05:02,462 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-07 00:05:02,524 INFO L236 CfgBuilder]: Building ICFG [2021-12-07 00:05:02,525 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-07 00:05:02,636 INFO L277 CfgBuilder]: Performing block encoding [2021-12-07 00:05:02,641 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-07 00:05:02,641 INFO L301 CfgBuilder]: Removed 3 assume(true) statements. [2021-12-07 00:05:02,643 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:05:02 BoogieIcfgContainer [2021-12-07 00:05:02,643 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-07 00:05:02,644 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-12-07 00:05:02,644 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-12-07 00:05:02,647 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-12-07 00:05:02,647 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:05:02" (1/3) ... [2021-12-07 00:05:02,648 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51cb7bb0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:05:02, skipping insertion in model container [2021-12-07 00:05:02,648 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:05:02" (2/3) ... [2021-12-07 00:05:02,648 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51cb7bb0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:05:02, skipping insertion in model container [2021-12-07 00:05:02,648 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:05:02" (3/3) ... [2021-12-07 00:05:02,649 INFO L111 eAbstractionObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration_-read.c [2021-12-07 00:05:02,653 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-12-07 00:05:02,653 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 8 error locations. [2021-12-07 00:05:02,687 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-12-07 00:05:02,693 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-12-07 00:05:02,693 INFO L340 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2021-12-07 00:05:02,705 INFO L276 IsEmpty]: Start isEmpty. Operand has 31 states, 22 states have (on average 1.6818181818181819) internal successors, (37), 30 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:02,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2021-12-07 00:05:02,709 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:02,710 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2021-12-07 00:05:02,710 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:02,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:02,716 INFO L85 PathProgramCache]: Analyzing trace with hash 28698920, now seen corresponding path program 1 times [2021-12-07 00:05:02,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:02,723 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670621184] [2021-12-07 00:05:02,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:02,724 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:02,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:02,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:02,845 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:02,845 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670621184] [2021-12-07 00:05:02,846 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [670621184] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:02,846 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:02,846 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-12-07 00:05:02,848 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79653144] [2021-12-07 00:05:02,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:02,853 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-07 00:05:02,853 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:02,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-07 00:05:02,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-07 00:05:02,885 INFO L87 Difference]: Start difference. First operand has 31 states, 22 states have (on average 1.6818181818181819) internal successors, (37), 30 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:02,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:02,929 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2021-12-07 00:05:02,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-07 00:05:02,932 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2021-12-07 00:05:02,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:02,937 INFO L225 Difference]: With dead ends: 59 [2021-12-07 00:05:02,937 INFO L226 Difference]: Without dead ends: 55 [2021-12-07 00:05:02,939 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-07 00:05:02,942 INFO L933 BasicCegarLoop]: 42 mSDtfsCounter, 28 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:02,943 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [28 Valid, 66 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:02,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2021-12-07 00:05:02,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 31. [2021-12-07 00:05:02,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 30 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:02,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 35 transitions. [2021-12-07 00:05:02,970 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 35 transitions. Word has length 5 [2021-12-07 00:05:02,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:02,970 INFO L470 AbstractCegarLoop]: Abstraction has 31 states and 35 transitions. [2021-12-07 00:05:02,970 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:02,971 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 35 transitions. [2021-12-07 00:05:02,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-12-07 00:05:02,971 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:02,971 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-12-07 00:05:02,972 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-12-07 00:05:02,972 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:02,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:02,973 INFO L85 PathProgramCache]: Analyzing trace with hash 889631015, now seen corresponding path program 1 times [2021-12-07 00:05:02,973 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:02,973 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149385052] [2021-12-07 00:05:02,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:02,974 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:02,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,013 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,013 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149385052] [2021-12-07 00:05:03,014 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [149385052] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:03,014 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:03,014 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-07 00:05:03,014 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708773428] [2021-12-07 00:05:03,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:03,016 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-12-07 00:05:03,016 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:03,017 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-12-07 00:05:03,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-07 00:05:03,017 INFO L87 Difference]: Start difference. First operand 31 states and 35 transitions. Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:03,046 INFO L93 Difference]: Finished difference Result 58 states and 64 transitions. [2021-12-07 00:05:03,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-07 00:05:03,047 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-12-07 00:05:03,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:03,048 INFO L225 Difference]: With dead ends: 58 [2021-12-07 00:05:03,048 INFO L226 Difference]: Without dead ends: 58 [2021-12-07 00:05:03,048 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-12-07 00:05:03,049 INFO L933 BasicCegarLoop]: 22 mSDtfsCounter, 24 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:03,050 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 40 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:03,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2021-12-07 00:05:03,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 33. [2021-12-07 00:05:03,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 25 states have (on average 1.48) internal successors, (37), 32 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2021-12-07 00:05:03,054 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 6 [2021-12-07 00:05:03,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:03,054 INFO L470 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2021-12-07 00:05:03,055 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,055 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2021-12-07 00:05:03,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-12-07 00:05:03,055 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:03,055 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-12-07 00:05:03,055 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-12-07 00:05:03,055 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:03,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:03,056 INFO L85 PathProgramCache]: Analyzing trace with hash 889666573, now seen corresponding path program 1 times [2021-12-07 00:05:03,056 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:03,056 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980291029] [2021-12-07 00:05:03,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,057 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:03,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,090 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,090 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980291029] [2021-12-07 00:05:03,091 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [980291029] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:03,091 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:03,091 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-07 00:05:03,091 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996941032] [2021-12-07 00:05:03,091 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:03,092 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:03,092 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:03,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:03,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:05:03,093 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:03,125 INFO L93 Difference]: Finished difference Result 32 states and 36 transitions. [2021-12-07 00:05:03,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-07 00:05:03,125 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-12-07 00:05:03,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:03,126 INFO L225 Difference]: With dead ends: 32 [2021-12-07 00:05:03,126 INFO L226 Difference]: Without dead ends: 32 [2021-12-07 00:05:03,126 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:05:03,128 INFO L933 BasicCegarLoop]: 22 mSDtfsCounter, 49 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:03,129 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [49 Valid, 22 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:03,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2021-12-07 00:05:03,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2021-12-07 00:05:03,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 25 states have (on average 1.44) internal successors, (36), 31 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 36 transitions. [2021-12-07 00:05:03,133 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 36 transitions. Word has length 6 [2021-12-07 00:05:03,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:03,134 INFO L470 AbstractCegarLoop]: Abstraction has 32 states and 36 transitions. [2021-12-07 00:05:03,134 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,134 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 36 transitions. [2021-12-07 00:05:03,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-12-07 00:05:03,135 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:03,135 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-12-07 00:05:03,135 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-12-07 00:05:03,135 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:03,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:03,136 INFO L85 PathProgramCache]: Analyzing trace with hash 889666574, now seen corresponding path program 1 times [2021-12-07 00:05:03,136 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:03,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228232871] [2021-12-07 00:05:03,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,137 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:03,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,191 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228232871] [2021-12-07 00:05:03,191 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228232871] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:03,191 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:03,191 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-07 00:05:03,192 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254075124] [2021-12-07 00:05:03,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:03,192 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:03,192 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:03,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:03,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:05:03,193 INFO L87 Difference]: Start difference. First operand 32 states and 36 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:03,239 INFO L93 Difference]: Finished difference Result 55 states and 61 transitions. [2021-12-07 00:05:03,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-07 00:05:03,240 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-12-07 00:05:03,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:03,245 INFO L225 Difference]: With dead ends: 55 [2021-12-07 00:05:03,245 INFO L226 Difference]: Without dead ends: 55 [2021-12-07 00:05:03,245 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:05:03,246 INFO L933 BasicCegarLoop]: 16 mSDtfsCounter, 69 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:03,247 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 32 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:03,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2021-12-07 00:05:03,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 33. [2021-12-07 00:05:03,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 26 states have (on average 1.4230769230769231) internal successors, (37), 32 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2021-12-07 00:05:03,250 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 6 [2021-12-07 00:05:03,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:03,250 INFO L470 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2021-12-07 00:05:03,251 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,251 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2021-12-07 00:05:03,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2021-12-07 00:05:03,251 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:03,251 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:03,251 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-12-07 00:05:03,251 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:03,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:03,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1809810359, now seen corresponding path program 1 times [2021-12-07 00:05:03,252 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:03,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800718101] [2021-12-07 00:05:03,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,252 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:03,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,286 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800718101] [2021-12-07 00:05:03,287 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1800718101] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:03,287 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:03,287 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-07 00:05:03,287 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190258534] [2021-12-07 00:05:03,287 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:03,287 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:03,287 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:03,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:03,288 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:05:03,288 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:03,335 INFO L93 Difference]: Finished difference Result 60 states and 65 transitions. [2021-12-07 00:05:03,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-07 00:05:03,335 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2021-12-07 00:05:03,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:03,336 INFO L225 Difference]: With dead ends: 60 [2021-12-07 00:05:03,336 INFO L226 Difference]: Without dead ends: 60 [2021-12-07 00:05:03,337 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:05:03,338 INFO L933 BasicCegarLoop]: 16 mSDtfsCounter, 31 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 46 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 46 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:03,338 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 45 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 46 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:03,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2021-12-07 00:05:03,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 34. [2021-12-07 00:05:03,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 27 states have (on average 1.4074074074074074) internal successors, (38), 33 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 38 transitions. [2021-12-07 00:05:03,342 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 38 transitions. Word has length 7 [2021-12-07 00:05:03,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:03,342 INFO L470 AbstractCegarLoop]: Abstraction has 34 states and 38 transitions. [2021-12-07 00:05:03,342 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,343 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 38 transitions. [2021-12-07 00:05:03,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2021-12-07 00:05:03,343 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:03,343 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:03,343 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-12-07 00:05:03,343 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:03,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:03,344 INFO L85 PathProgramCache]: Analyzing trace with hash -1480744241, now seen corresponding path program 1 times [2021-12-07 00:05:03,344 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:03,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188934116] [2021-12-07 00:05:03,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,344 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:03,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,377 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188934116] [2021-12-07 00:05:03,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1188934116] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:03,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1230432011] [2021-12-07 00:05:03,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,378 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:03,378 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:03,379 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:03,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-12-07 00:05:03,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 5 conjunts are in the unsatisfiable core [2021-12-07 00:05:03,413 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:03,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,451 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:03,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,500 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1230432011] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:03,500 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:03,500 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 5 [2021-12-07 00:05:03,500 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242770101] [2021-12-07 00:05:03,501 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:03,501 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-12-07 00:05:03,501 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:03,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-12-07 00:05:03,501 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-12-07 00:05:03,501 INFO L87 Difference]: Start difference. First operand 34 states and 38 transitions. Second operand has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:03,550 INFO L93 Difference]: Finished difference Result 130 states and 145 transitions. [2021-12-07 00:05:03,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-07 00:05:03,551 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2021-12-07 00:05:03,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:03,554 INFO L225 Difference]: With dead ends: 130 [2021-12-07 00:05:03,554 INFO L226 Difference]: Without dead ends: 130 [2021-12-07 00:05:03,554 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2021-12-07 00:05:03,555 INFO L933 BasicCegarLoop]: 44 mSDtfsCounter, 143 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:03,556 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [143 Valid, 143 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 51 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:03,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2021-12-07 00:05:03,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 48. [2021-12-07 00:05:03,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 41 states have (on average 1.3902439024390243) internal successors, (57), 47 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 57 transitions. [2021-12-07 00:05:03,564 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 57 transitions. Word has length 10 [2021-12-07 00:05:03,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:03,564 INFO L470 AbstractCegarLoop]: Abstraction has 48 states and 57 transitions. [2021-12-07 00:05:03,564 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:03,564 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 57 transitions. [2021-12-07 00:05:03,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2021-12-07 00:05:03,565 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:03,565 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:03,587 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:03,765 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:03,766 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:03,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:03,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1341568839, now seen corresponding path program 1 times [2021-12-07 00:05:03,768 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:03,768 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041349410] [2021-12-07 00:05:03,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,768 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:03,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,934 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:03,935 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:03,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041349410] [2021-12-07 00:05:03,936 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041349410] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:03,936 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2132119393] [2021-12-07 00:05:03,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:03,937 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:03,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:03,939 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:03,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-12-07 00:05:03,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:03,991 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 17 conjunts are in the unsatisfiable core [2021-12-07 00:05:03,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:04,068 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:05:04,069 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:05:04,133 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:04,133 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:04,198 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:04,198 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2132119393] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:04,198 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:04,198 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 9 [2021-12-07 00:05:04,198 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290192209] [2021-12-07 00:05:04,199 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:04,199 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-07 00:05:04,199 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:04,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-07 00:05:04,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2021-12-07 00:05:04,200 INFO L87 Difference]: Start difference. First operand 48 states and 57 transitions. Second operand has 10 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:04,337 INFO L93 Difference]: Finished difference Result 129 states and 144 transitions. [2021-12-07 00:05:04,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-07 00:05:04,338 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2021-12-07 00:05:04,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:04,339 INFO L225 Difference]: With dead ends: 129 [2021-12-07 00:05:04,339 INFO L226 Difference]: Without dead ends: 129 [2021-12-07 00:05:04,339 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=137, Unknown=0, NotChecked=0, Total=210 [2021-12-07 00:05:04,340 INFO L933 BasicCegarLoop]: 29 mSDtfsCounter, 396 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 396 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:04,341 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [396 Valid, 100 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:04,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2021-12-07 00:05:04,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 49. [2021-12-07 00:05:04,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 42 states have (on average 1.3333333333333333) internal successors, (56), 48 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 56 transitions. [2021-12-07 00:05:04,348 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 56 transitions. Word has length 11 [2021-12-07 00:05:04,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:04,348 INFO L470 AbstractCegarLoop]: Abstraction has 49 states and 56 transitions. [2021-12-07 00:05:04,348 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,349 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2021-12-07 00:05:04,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2021-12-07 00:05:04,349 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:04,349 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:04,370 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-12-07 00:05:04,550 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:04,551 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:04,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:04,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1361088610, now seen corresponding path program 1 times [2021-12-07 00:05:04,553 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:04,554 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913869708] [2021-12-07 00:05:04,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:04,555 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:04,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:04,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:04,621 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:04,621 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913869708] [2021-12-07 00:05:04,621 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913869708] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:04,621 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2004387596] [2021-12-07 00:05:04,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:04,621 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:04,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:04,622 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:04,622 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-12-07 00:05:04,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:04,649 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-07 00:05:04,649 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:04,685 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:04,685 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:04,707 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:04,707 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2004387596] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:04,707 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:04,707 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 10 [2021-12-07 00:05:04,708 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353606238] [2021-12-07 00:05:04,708 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:04,708 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-07 00:05:04,708 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:04,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-07 00:05:04,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2021-12-07 00:05:04,709 INFO L87 Difference]: Start difference. First operand 49 states and 56 transitions. Second operand has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:04,795 INFO L93 Difference]: Finished difference Result 88 states and 96 transitions. [2021-12-07 00:05:04,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-07 00:05:04,796 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2021-12-07 00:05:04,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:04,796 INFO L225 Difference]: With dead ends: 88 [2021-12-07 00:05:04,796 INFO L226 Difference]: Without dead ends: 88 [2021-12-07 00:05:04,797 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=160, Unknown=0, NotChecked=0, Total=240 [2021-12-07 00:05:04,797 INFO L933 BasicCegarLoop]: 12 mSDtfsCounter, 127 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 123 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 143 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 123 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:04,797 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [127 Valid, 62 Invalid, 143 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 123 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:04,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2021-12-07 00:05:04,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 48. [2021-12-07 00:05:04,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 47 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2021-12-07 00:05:04,801 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 53 transitions. Word has length 12 [2021-12-07 00:05:04,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:04,801 INFO L470 AbstractCegarLoop]: Abstraction has 48 states and 53 transitions. [2021-12-07 00:05:04,801 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.7) internal successors, (27), 10 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:04,801 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2021-12-07 00:05:04,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2021-12-07 00:05:04,802 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:04,802 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:04,822 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2021-12-07 00:05:05,003 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2021-12-07 00:05:05,004 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:05,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:05,006 INFO L85 PathProgramCache]: Analyzing trace with hash 4840471, now seen corresponding path program 2 times [2021-12-07 00:05:05,006 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:05,006 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604317141] [2021-12-07 00:05:05,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:05,007 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:05,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:05,107 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-12-07 00:05:05,107 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:05,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604317141] [2021-12-07 00:05:05,107 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604317141] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:05,107 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:05,107 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-07 00:05:05,107 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482264583] [2021-12-07 00:05:05,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:05,107 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-12-07 00:05:05,108 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:05,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-07 00:05:05,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:05:05,108 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. Second operand has 5 states, 4 states have (on average 3.75) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:05,118 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2021-12-07 00:05:05,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-07 00:05:05,119 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2021-12-07 00:05:05,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:05,119 INFO L225 Difference]: With dead ends: 46 [2021-12-07 00:05:05,119 INFO L226 Difference]: Without dead ends: 46 [2021-12-07 00:05:05,119 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-07 00:05:05,120 INFO L933 BasicCegarLoop]: 22 mSDtfsCounter, 45 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:05,120 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 22 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:05,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2021-12-07 00:05:05,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2021-12-07 00:05:05,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 45 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2021-12-07 00:05:05,123 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 17 [2021-12-07 00:05:05,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:05,123 INFO L470 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2021-12-07 00:05:05,123 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 3.75) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,123 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2021-12-07 00:05:05,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2021-12-07 00:05:05,127 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:05,127 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:05,128 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-12-07 00:05:05,128 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:05,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:05,128 INFO L85 PathProgramCache]: Analyzing trace with hash 4840472, now seen corresponding path program 1 times [2021-12-07 00:05:05,128 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:05,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066012424] [2021-12-07 00:05:05,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:05,129 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:05,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:05,177 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:05,177 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:05,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066012424] [2021-12-07 00:05:05,178 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2066012424] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:05,178 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:05,178 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-12-07 00:05:05,178 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1000504553] [2021-12-07 00:05:05,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:05,178 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:05,178 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:05,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:05,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:05:05,179 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:05,199 INFO L93 Difference]: Finished difference Result 76 states and 84 transitions. [2021-12-07 00:05:05,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-12-07 00:05:05,199 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2021-12-07 00:05:05,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:05,200 INFO L225 Difference]: With dead ends: 76 [2021-12-07 00:05:05,200 INFO L226 Difference]: Without dead ends: 76 [2021-12-07 00:05:05,200 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-12-07 00:05:05,201 INFO L933 BasicCegarLoop]: 24 mSDtfsCounter, 17 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:05,201 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 35 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:05,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2021-12-07 00:05:05,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 72. [2021-12-07 00:05:05,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 67 states have (on average 1.2238805970149254) internal successors, (82), 71 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 82 transitions. [2021-12-07 00:05:05,206 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 82 transitions. Word has length 17 [2021-12-07 00:05:05,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:05,207 INFO L470 AbstractCegarLoop]: Abstraction has 72 states and 82 transitions. [2021-12-07 00:05:05,207 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,207 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 82 transitions. [2021-12-07 00:05:05,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2021-12-07 00:05:05,208 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:05,208 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:05,208 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-12-07 00:05:05,208 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:05,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:05,209 INFO L85 PathProgramCache]: Analyzing trace with hash -1949815299, now seen corresponding path program 1 times [2021-12-07 00:05:05,209 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:05,209 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079983131] [2021-12-07 00:05:05,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:05,209 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:05,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:05,255 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:05,255 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:05,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079983131] [2021-12-07 00:05:05,255 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079983131] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:05,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [757171816] [2021-12-07 00:05:05,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:05,256 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:05,256 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:05,256 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:05,257 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-12-07 00:05:05,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:05,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-07 00:05:05,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:05,390 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:05,391 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:05,441 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2021-12-07 00:05:05,500 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:05,500 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [757171816] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:05,500 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:05,500 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2021-12-07 00:05:05,500 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003491710] [2021-12-07 00:05:05,501 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:05,501 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2021-12-07 00:05:05,501 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:05,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-07 00:05:05,502 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2021-12-07 00:05:05,502 INFO L87 Difference]: Start difference. First operand 72 states and 82 transitions. Second operand has 9 states, 8 states have (on average 4.75) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:05,562 INFO L93 Difference]: Finished difference Result 80 states and 89 transitions. [2021-12-07 00:05:05,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-07 00:05:05,562 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 4.75) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2021-12-07 00:05:05,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:05,563 INFO L225 Difference]: With dead ends: 80 [2021-12-07 00:05:05,563 INFO L226 Difference]: Without dead ends: 80 [2021-12-07 00:05:05,563 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 40 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2021-12-07 00:05:05,564 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 82 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:05,564 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [82 Valid, 40 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:05,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2021-12-07 00:05:05,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 73. [2021-12-07 00:05:05,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.2205882352941178) internal successors, (83), 72 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 83 transitions. [2021-12-07 00:05:05,569 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 83 transitions. Word has length 23 [2021-12-07 00:05:05,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:05,569 INFO L470 AbstractCegarLoop]: Abstraction has 73 states and 83 transitions. [2021-12-07 00:05:05,570 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 4.75) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:05,570 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 83 transitions. [2021-12-07 00:05:05,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2021-12-07 00:05:05,571 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:05,571 INFO L514 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1] [2021-12-07 00:05:05,590 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-12-07 00:05:05,771 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2021-12-07 00:05:05,772 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:05,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:05,773 INFO L85 PathProgramCache]: Analyzing trace with hash 634835432, now seen corresponding path program 2 times [2021-12-07 00:05:05,774 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:05,774 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610859072] [2021-12-07 00:05:05,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:05,775 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:05,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:05,975 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2021-12-07 00:05:05,975 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:05,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610859072] [2021-12-07 00:05:05,976 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1610859072] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:05,976 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-07 00:05:05,976 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-12-07 00:05:05,976 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979341634] [2021-12-07 00:05:05,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:05,977 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-12-07 00:05:05,977 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:05,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-12-07 00:05:05,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-12-07 00:05:05,978 INFO L87 Difference]: Start difference. First operand 73 states and 83 transitions. Second operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 7 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:06,036 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2021-12-07 00:05:06,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-12-07 00:05:06,037 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 7 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2021-12-07 00:05:06,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:06,038 INFO L225 Difference]: With dead ends: 86 [2021-12-07 00:05:06,038 INFO L226 Difference]: Without dead ends: 86 [2021-12-07 00:05:06,038 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2021-12-07 00:05:06,039 INFO L933 BasicCegarLoop]: 15 mSDtfsCounter, 69 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:06,039 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 65 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:06,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2021-12-07 00:05:06,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 61. [2021-12-07 00:05:06,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.1785714285714286) internal successors, (66), 60 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2021-12-07 00:05:06,043 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 25 [2021-12-07 00:05:06,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:06,043 INFO L470 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2021-12-07 00:05:06,044 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 7 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,044 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2021-12-07 00:05:06,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2021-12-07 00:05:06,044 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:06,045 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:06,045 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-12-07 00:05:06,045 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:06,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:06,045 INFO L85 PathProgramCache]: Analyzing trace with hash -1809865305, now seen corresponding path program 1 times [2021-12-07 00:05:06,046 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:06,046 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77876505] [2021-12-07 00:05:06,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:06,046 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:06,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:06,088 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:06,088 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:06,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [77876505] [2021-12-07 00:05:06,088 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [77876505] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:06,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717547240] [2021-12-07 00:05:06,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:06,088 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:06,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:06,089 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:06,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-12-07 00:05:06,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:06,124 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-07 00:05:06,126 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:06,342 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-12-07 00:05:06,342 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-07 00:05:06,342 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717547240] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:06,342 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-07 00:05:06,342 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 6 [2021-12-07 00:05:06,342 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929097488] [2021-12-07 00:05:06,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:06,343 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:06,343 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:06,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:06,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-12-07 00:05:06,343 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:06,344 INFO L93 Difference]: Finished difference Result 62 states and 66 transitions. [2021-12-07 00:05:06,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-07 00:05:06,345 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2021-12-07 00:05:06,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:06,345 INFO L225 Difference]: With dead ends: 62 [2021-12-07 00:05:06,345 INFO L226 Difference]: Without dead ends: 60 [2021-12-07 00:05:06,345 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-12-07 00:05:06,346 INFO L933 BasicCegarLoop]: 21 mSDtfsCounter, 5 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 13 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:06,346 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 39 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 13 Unchecked, 0.0s Time] [2021-12-07 00:05:06,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2021-12-07 00:05:06,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2021-12-07 00:05:06,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 55 states have (on average 1.1636363636363636) internal successors, (64), 59 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2021-12-07 00:05:06,348 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 26 [2021-12-07 00:05:06,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:06,349 INFO L470 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2021-12-07 00:05:06,349 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:06,349 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2021-12-07 00:05:06,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2021-12-07 00:05:06,349 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:06,350 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:06,370 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2021-12-07 00:05:06,550 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2021-12-07 00:05:06,551 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:06,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:06,552 INFO L85 PathProgramCache]: Analyzing trace with hash -271127104, now seen corresponding path program 1 times [2021-12-07 00:05:06,553 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:06,553 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697537928] [2021-12-07 00:05:06,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:06,554 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:06,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:06,682 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2021-12-07 00:05:06,682 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:06,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697537928] [2021-12-07 00:05:06,683 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1697537928] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:06,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2047774464] [2021-12-07 00:05:06,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:06,684 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:06,684 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:06,686 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:06,687 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-12-07 00:05:06,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:06,734 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 16 conjunts are in the unsatisfiable core [2021-12-07 00:05:06,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:06,829 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-07 00:05:06,867 INFO L173 IndexEqualityManager]: detected equality via solver [2021-12-07 00:05:06,869 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-07 00:05:06,869 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 10 [2021-12-07 00:05:06,881 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 9 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:06,881 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:06,919 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2021-12-07 00:05:06,923 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2021-12-07 00:05:07,045 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 9 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-07 00:05:07,045 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2047774464] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:07,045 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:07,045 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 11, 11] total 21 [2021-12-07 00:05:07,045 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783250646] [2021-12-07 00:05:07,045 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:07,046 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-12-07 00:05:07,046 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:07,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-12-07 00:05:07,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2021-12-07 00:05:07,046 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 21 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:07,234 INFO L93 Difference]: Finished difference Result 101 states and 108 transitions. [2021-12-07 00:05:07,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-07 00:05:07,235 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 21 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2021-12-07 00:05:07,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:07,235 INFO L225 Difference]: With dead ends: 101 [2021-12-07 00:05:07,236 INFO L226 Difference]: Without dead ends: 101 [2021-12-07 00:05:07,236 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=168, Invalid=482, Unknown=0, NotChecked=0, Total=650 [2021-12-07 00:05:07,237 INFO L933 BasicCegarLoop]: 17 mSDtfsCounter, 62 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 403 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 411 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 403 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:07,237 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [62 Valid, 145 Invalid, 411 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 403 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:07,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2021-12-07 00:05:07,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 66. [2021-12-07 00:05:07,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 61 states have (on average 1.1475409836065573) internal successors, (70), 65 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2021-12-07 00:05:07,241 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 27 [2021-12-07 00:05:07,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:07,241 INFO L470 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2021-12-07 00:05:07,241 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 21 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,242 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2021-12-07 00:05:07,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-12-07 00:05:07,242 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:07,243 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:07,263 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2021-12-07 00:05:07,443 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2021-12-07 00:05:07,443 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:07,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:07,444 INFO L85 PathProgramCache]: Analyzing trace with hash 164722723, now seen corresponding path program 1 times [2021-12-07 00:05:07,444 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:07,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476250196] [2021-12-07 00:05:07,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:07,444 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:07,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:07,487 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 3 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:07,487 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:07,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476250196] [2021-12-07 00:05:07,487 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [476250196] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:07,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [173942094] [2021-12-07 00:05:07,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:07,488 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:07,488 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:07,489 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:07,494 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-12-07 00:05:07,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:07,534 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 8 conjunts are in the unsatisfiable core [2021-12-07 00:05:07,535 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:07,613 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:07,613 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:07,658 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-12-07 00:05:07,658 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [173942094] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:07,659 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:07,659 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2021-12-07 00:05:07,659 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1628340034] [2021-12-07 00:05:07,659 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:07,659 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2021-12-07 00:05:07,659 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:07,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-12-07 00:05:07,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2021-12-07 00:05:07,660 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand has 12 states, 12 states have (on average 5.0) internal successors, (60), 12 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:07,762 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2021-12-07 00:05:07,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-07 00:05:07,762 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 5.0) internal successors, (60), 12 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2021-12-07 00:05:07,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:07,762 INFO L225 Difference]: With dead ends: 66 [2021-12-07 00:05:07,762 INFO L226 Difference]: Without dead ends: 66 [2021-12-07 00:05:07,763 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=217, Unknown=0, NotChecked=0, Total=306 [2021-12-07 00:05:07,763 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 75 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 202 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:07,763 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [75 Valid, 60 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 202 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:07,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2021-12-07 00:05:07,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2021-12-07 00:05:07,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 61 states have (on average 1.1311475409836065) internal successors, (69), 65 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 69 transitions. [2021-12-07 00:05:07,766 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 69 transitions. Word has length 34 [2021-12-07 00:05:07,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:07,766 INFO L470 AbstractCegarLoop]: Abstraction has 66 states and 69 transitions. [2021-12-07 00:05:07,766 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 5.0) internal successors, (60), 12 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:07,766 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 69 transitions. [2021-12-07 00:05:07,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2021-12-07 00:05:07,767 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:07,767 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:07,794 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-12-07 00:05:07,967 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:07,968 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:07,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:07,970 INFO L85 PathProgramCache]: Analyzing trace with hash 882673172, now seen corresponding path program 2 times [2021-12-07 00:05:07,970 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:07,971 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262492534] [2021-12-07 00:05:07,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:07,971 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:08,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:08,066 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:08,066 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:08,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262492534] [2021-12-07 00:05:08,066 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [262492534] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:08,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [64593207] [2021-12-07 00:05:08,066 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:08,067 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:08,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:08,067 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:08,068 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-12-07 00:05:08,109 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:05:08,110 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:08,110 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 13 conjunts are in the unsatisfiable core [2021-12-07 00:05:08,113 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:08,126 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-07 00:05:08,127 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2021-12-07 00:05:08,130 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2021-12-07 00:05:08,304 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:08,312 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:08,449 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:08,450 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [64593207] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:08,450 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:08,450 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 8 [2021-12-07 00:05:08,450 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614147081] [2021-12-07 00:05:08,450 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:08,451 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2021-12-07 00:05:08,451 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:08,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-07 00:05:08,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2021-12-07 00:05:08,451 INFO L87 Difference]: Start difference. First operand 66 states and 69 transitions. Second operand has 9 states, 8 states have (on average 8.75) internal successors, (70), 9 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:08,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:08,508 INFO L93 Difference]: Finished difference Result 158 states and 169 transitions. [2021-12-07 00:05:08,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-12-07 00:05:08,508 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 8.75) internal successors, (70), 9 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2021-12-07 00:05:08,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:08,509 INFO L225 Difference]: With dead ends: 158 [2021-12-07 00:05:08,509 INFO L226 Difference]: Without dead ends: 158 [2021-12-07 00:05:08,510 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2021-12-07 00:05:08,510 INFO L933 BasicCegarLoop]: 27 mSDtfsCounter, 43 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:08,510 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [43 Valid, 75 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:08,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2021-12-07 00:05:08,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 150. [2021-12-07 00:05:08,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 145 states have (on average 1.1517241379310346) internal successors, (167), 149 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:08,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 167 transitions. [2021-12-07 00:05:08,515 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 167 transitions. Word has length 39 [2021-12-07 00:05:08,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:08,515 INFO L470 AbstractCegarLoop]: Abstraction has 150 states and 167 transitions. [2021-12-07 00:05:08,516 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 8.75) internal successors, (70), 9 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:08,516 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 167 transitions. [2021-12-07 00:05:08,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2021-12-07 00:05:08,517 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:08,517 INFO L514 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:08,536 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2021-12-07 00:05:08,717 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2021-12-07 00:05:08,719 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:08,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:08,720 INFO L85 PathProgramCache]: Analyzing trace with hash -890031373, now seen corresponding path program 1 times [2021-12-07 00:05:08,720 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:08,720 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147160521] [2021-12-07 00:05:08,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:08,721 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:08,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:08,810 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 19 proven. 67 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2021-12-07 00:05:08,810 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:08,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147160521] [2021-12-07 00:05:08,810 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147160521] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:08,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [115558688] [2021-12-07 00:05:08,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:08,810 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:08,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:08,811 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:08,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-12-07 00:05:08,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:08,849 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 9 conjunts are in the unsatisfiable core [2021-12-07 00:05:08,851 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:08,942 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 50 proven. 37 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-12-07 00:05:08,942 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:08,993 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 50 proven. 37 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-12-07 00:05:08,993 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [115558688] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:08,993 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:08,993 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 14 [2021-12-07 00:05:08,993 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670478744] [2021-12-07 00:05:08,993 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:08,994 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2021-12-07 00:05:08,994 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:08,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-12-07 00:05:08,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2021-12-07 00:05:08,994 INFO L87 Difference]: Start difference. First operand 150 states and 167 transitions. Second operand has 14 states, 14 states have (on average 5.285714285714286) internal successors, (74), 14 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:09,139 INFO L93 Difference]: Finished difference Result 165 states and 178 transitions. [2021-12-07 00:05:09,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-12-07 00:05:09,140 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 5.285714285714286) internal successors, (74), 14 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2021-12-07 00:05:09,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:09,141 INFO L225 Difference]: With dead ends: 165 [2021-12-07 00:05:09,141 INFO L226 Difference]: Without dead ends: 165 [2021-12-07 00:05:09,142 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=199, Invalid=401, Unknown=0, NotChecked=0, Total=600 [2021-12-07 00:05:09,142 INFO L933 BasicCegarLoop]: 15 mSDtfsCounter, 176 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 191 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 225 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 191 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:09,142 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [176 Valid, 80 Invalid, 225 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 191 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:09,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2021-12-07 00:05:09,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 143. [2021-12-07 00:05:09,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 138 states have (on average 1.1304347826086956) internal successors, (156), 142 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 156 transitions. [2021-12-07 00:05:09,146 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 156 transitions. Word has length 42 [2021-12-07 00:05:09,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:09,147 INFO L470 AbstractCegarLoop]: Abstraction has 143 states and 156 transitions. [2021-12-07 00:05:09,147 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 5.285714285714286) internal successors, (74), 14 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,147 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 156 transitions. [2021-12-07 00:05:09,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-12-07 00:05:09,148 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:09,148 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:09,182 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2021-12-07 00:05:09,349 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:09,349 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:09,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:09,349 INFO L85 PathProgramCache]: Analyzing trace with hash -255177540, now seen corresponding path program 2 times [2021-12-07 00:05:09,350 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:09,350 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233015059] [2021-12-07 00:05:09,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:09,350 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:09,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:09,404 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-12-07 00:05:09,404 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:09,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233015059] [2021-12-07 00:05:09,405 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [233015059] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:09,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1696784316] [2021-12-07 00:05:09,405 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:09,405 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:09,405 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:09,406 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:09,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-12-07 00:05:09,452 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:05:09,452 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:09,453 INFO L263 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 9 conjunts are in the unsatisfiable core [2021-12-07 00:05:09,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:09,624 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 40 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:09,624 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:09,682 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2021-12-07 00:05:09,811 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 40 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:09,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1696784316] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:09,811 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:09,811 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 15 [2021-12-07 00:05:09,811 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249371206] [2021-12-07 00:05:09,811 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:09,812 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2021-12-07 00:05:09,812 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:09,812 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-12-07 00:05:09,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2021-12-07 00:05:09,812 INFO L87 Difference]: Start difference. First operand 143 states and 156 transitions. Second operand has 15 states, 15 states have (on average 6.6) internal successors, (99), 15 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:09,929 INFO L93 Difference]: Finished difference Result 153 states and 163 transitions. [2021-12-07 00:05:09,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-12-07 00:05:09,929 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 6.6) internal successors, (99), 15 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2021-12-07 00:05:09,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:09,930 INFO L225 Difference]: With dead ends: 153 [2021-12-07 00:05:09,930 INFO L226 Difference]: Without dead ends: 153 [2021-12-07 00:05:09,930 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=245, Unknown=0, NotChecked=0, Total=342 [2021-12-07 00:05:09,931 INFO L933 BasicCegarLoop]: 21 mSDtfsCounter, 183 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 123 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 123 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:09,931 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [183 Valid, 108 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 123 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:09,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2021-12-07 00:05:09,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 147. [2021-12-07 00:05:09,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 142 states have (on average 1.119718309859155) internal successors, (159), 146 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 159 transitions. [2021-12-07 00:05:09,934 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 159 transitions. Word has length 49 [2021-12-07 00:05:09,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:09,934 INFO L470 AbstractCegarLoop]: Abstraction has 147 states and 159 transitions. [2021-12-07 00:05:09,934 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 6.6) internal successors, (99), 15 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:09,935 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 159 transitions. [2021-12-07 00:05:09,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-12-07 00:05:09,935 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:09,935 INFO L514 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1] [2021-12-07 00:05:09,968 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2021-12-07 00:05:10,136 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2021-12-07 00:05:10,137 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:10,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:10,139 INFO L85 PathProgramCache]: Analyzing trace with hash 11435127, now seen corresponding path program 2 times [2021-12-07 00:05:10,139 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:10,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179342097] [2021-12-07 00:05:10,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:10,140 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:10,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:10,238 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 27 proven. 175 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:10,239 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:10,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179342097] [2021-12-07 00:05:10,239 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179342097] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:10,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1685367799] [2021-12-07 00:05:10,239 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:10,239 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:10,239 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:10,240 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:10,240 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-12-07 00:05:10,284 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:05:10,284 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:10,285 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 11 conjunts are in the unsatisfiable core [2021-12-07 00:05:10,287 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:10,404 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 43 proven. 159 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:10,404 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:10,467 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 43 proven. 159 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-12-07 00:05:10,467 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1685367799] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:10,467 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:10,467 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 17 [2021-12-07 00:05:10,468 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459730334] [2021-12-07 00:05:10,468 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:10,468 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-12-07 00:05:10,468 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:10,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-12-07 00:05:10,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=198, Unknown=0, NotChecked=0, Total=272 [2021-12-07 00:05:10,469 INFO L87 Difference]: Start difference. First operand 147 states and 159 transitions. Second operand has 17 states, 17 states have (on average 5.294117647058823) internal successors, (90), 17 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:10,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:10,717 INFO L93 Difference]: Finished difference Result 199 states and 209 transitions. [2021-12-07 00:05:10,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-12-07 00:05:10,717 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 5.294117647058823) internal successors, (90), 17 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-12-07 00:05:10,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:10,718 INFO L225 Difference]: With dead ends: 199 [2021-12-07 00:05:10,718 INFO L226 Difference]: Without dead ends: 199 [2021-12-07 00:05:10,719 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=401, Invalid=1005, Unknown=0, NotChecked=0, Total=1406 [2021-12-07 00:05:10,720 INFO L933 BasicCegarLoop]: 22 mSDtfsCounter, 282 mSDsluCounter, 83 mSDsCounter, 0 mSdLazyCounter, 325 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 282 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 388 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:10,720 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [282 Valid, 105 Invalid, 388 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 325 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:10,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2021-12-07 00:05:10,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 145. [2021-12-07 00:05:10,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 140 states have (on average 1.1) internal successors, (154), 144 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:10,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2021-12-07 00:05:10,723 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 64 [2021-12-07 00:05:10,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:10,723 INFO L470 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2021-12-07 00:05:10,723 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 5.294117647058823) internal successors, (90), 17 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:10,723 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2021-12-07 00:05:10,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-12-07 00:05:10,724 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:10,724 INFO L514 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1] [2021-12-07 00:05:10,744 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2021-12-07 00:05:10,925 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:10,925 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:10,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:10,927 INFO L85 PathProgramCache]: Analyzing trace with hash -867962629, now seen corresponding path program 3 times [2021-12-07 00:05:10,927 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:10,927 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795933535] [2021-12-07 00:05:10,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:10,928 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:10,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:11,045 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 14 proven. 149 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2021-12-07 00:05:11,045 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:11,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795933535] [2021-12-07 00:05:11,046 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795933535] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:11,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [695422741] [2021-12-07 00:05:11,046 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:05:11,046 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:11,046 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:11,047 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:11,047 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-12-07 00:05:11,111 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2021-12-07 00:05:11,111 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:11,112 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 15 conjunts are in the unsatisfiable core [2021-12-07 00:05:11,114 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:11,124 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-07 00:05:11,125 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2021-12-07 00:05:11,127 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2021-12-07 00:05:11,345 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2021-12-07 00:05:11,346 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-07 00:05:11,346 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [695422741] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:11,346 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-07 00:05:11,346 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 13 [2021-12-07 00:05:11,346 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011018687] [2021-12-07 00:05:11,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:11,346 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-12-07 00:05:11,346 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:11,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-12-07 00:05:11,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2021-12-07 00:05:11,347 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:11,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:11,371 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2021-12-07 00:05:11,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-07 00:05:11,371 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-12-07 00:05:11,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:11,372 INFO L225 Difference]: With dead ends: 143 [2021-12-07 00:05:11,372 INFO L226 Difference]: Without dead ends: 143 [2021-12-07 00:05:11,372 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2021-12-07 00:05:11,372 INFO L933 BasicCegarLoop]: 21 mSDtfsCounter, 46 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:11,373 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 35 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-12-07 00:05:11,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2021-12-07 00:05:11,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 111. [2021-12-07 00:05:11,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 108 states have (on average 1.0648148148148149) internal successors, (115), 110 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:11,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 115 transitions. [2021-12-07 00:05:11,375 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 115 transitions. Word has length 75 [2021-12-07 00:05:11,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:11,375 INFO L470 AbstractCegarLoop]: Abstraction has 111 states and 115 transitions. [2021-12-07 00:05:11,376 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:11,376 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 115 transitions. [2021-12-07 00:05:11,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-12-07 00:05:11,376 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:11,376 INFO L514 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:11,379 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2021-12-07 00:05:11,577 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable19 [2021-12-07 00:05:11,577 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:11,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:11,578 INFO L85 PathProgramCache]: Analyzing trace with hash -1660735401, now seen corresponding path program 1 times [2021-12-07 00:05:11,579 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:11,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531285698] [2021-12-07 00:05:11,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:11,580 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:11,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:11,666 INFO L134 CoverageAnalysis]: Checked inductivity of 203 backedges. 14 proven. 149 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2021-12-07 00:05:11,666 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:11,666 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531285698] [2021-12-07 00:05:11,666 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1531285698] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:11,666 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1309241950] [2021-12-07 00:05:11,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:11,666 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:11,666 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:11,667 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:11,667 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-12-07 00:05:11,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:11,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 292 conjuncts, 10 conjunts are in the unsatisfiable core [2021-12-07 00:05:11,719 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:11,821 INFO L134 CoverageAnalysis]: Checked inductivity of 203 backedges. 57 proven. 106 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2021-12-07 00:05:11,822 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:11,893 INFO L134 CoverageAnalysis]: Checked inductivity of 203 backedges. 57 proven. 106 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2021-12-07 00:05:11,893 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1309241950] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:11,893 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:11,893 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 15 [2021-12-07 00:05:11,893 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797596191] [2021-12-07 00:05:11,893 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:11,894 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2021-12-07 00:05:11,894 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:11,894 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-12-07 00:05:11,894 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2021-12-07 00:05:11,894 INFO L87 Difference]: Start difference. First operand 111 states and 115 transitions. Second operand has 15 states, 15 states have (on average 6.2) internal successors, (93), 15 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:12,024 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2021-12-07 00:05:12,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-12-07 00:05:12,024 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 6.2) internal successors, (93), 15 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-12-07 00:05:12,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:12,025 INFO L225 Difference]: With dead ends: 113 [2021-12-07 00:05:12,025 INFO L226 Difference]: Without dead ends: 113 [2021-12-07 00:05:12,025 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=439, Unknown=0, NotChecked=0, Total=600 [2021-12-07 00:05:12,026 INFO L933 BasicCegarLoop]: 17 mSDtfsCounter, 97 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 241 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 262 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 241 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:12,026 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [97 Valid, 58 Invalid, 262 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 241 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:12,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2021-12-07 00:05:12,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 111. [2021-12-07 00:05:12,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 110 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 113 transitions. [2021-12-07 00:05:12,028 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 113 transitions. Word has length 80 [2021-12-07 00:05:12,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:12,028 INFO L470 AbstractCegarLoop]: Abstraction has 111 states and 113 transitions. [2021-12-07 00:05:12,028 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 6.2) internal successors, (93), 15 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,029 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 113 transitions. [2021-12-07 00:05:12,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2021-12-07 00:05:12,029 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:12,029 INFO L514 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:05:12,049 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:12,229 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:12,230 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:12,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:12,231 INFO L85 PathProgramCache]: Analyzing trace with hash 283151040, now seen corresponding path program 2 times [2021-12-07 00:05:12,232 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:12,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194063720] [2021-12-07 00:05:12,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:12,232 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:12,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:12,326 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 172 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2021-12-07 00:05:12,326 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:12,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194063720] [2021-12-07 00:05:12,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1194063720] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:12,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159844774] [2021-12-07 00:05:12,327 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:12,327 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:12,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:12,327 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:12,328 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2021-12-07 00:05:12,366 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2021-12-07 00:05:12,366 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:12,366 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-07 00:05:12,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:12,811 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 246 trivial. 0 not checked. [2021-12-07 00:05:12,812 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-07 00:05:12,812 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159844774] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-07 00:05:12,812 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-07 00:05:12,812 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 8 [2021-12-07 00:05:12,812 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082217985] [2021-12-07 00:05:12,812 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-07 00:05:12,812 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-07 00:05:12,812 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:12,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-07 00:05:12,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2021-12-07 00:05:12,813 INFO L87 Difference]: Start difference. First operand 111 states and 113 transitions. Second operand has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:12,813 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2021-12-07 00:05:12,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-07 00:05:12,814 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 85 [2021-12-07 00:05:12,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:12,814 INFO L225 Difference]: With dead ends: 110 [2021-12-07 00:05:12,814 INFO L226 Difference]: Without dead ends: 94 [2021-12-07 00:05:12,814 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2021-12-07 00:05:12,815 INFO L933 BasicCegarLoop]: 19 mSDtfsCounter, 2 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 8 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:12,815 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2 Valid, 36 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 8 Unchecked, 0.0s Time] [2021-12-07 00:05:12,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2021-12-07 00:05:12,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2021-12-07 00:05:12,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 93 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2021-12-07 00:05:12,817 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 85 [2021-12-07 00:05:12,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:12,817 INFO L470 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2021-12-07 00:05:12,817 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:12,817 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2021-12-07 00:05:12,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2021-12-07 00:05:12,818 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:12,818 INFO L514 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1] [2021-12-07 00:05:12,850 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2021-12-07 00:05:13,018 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:13,019 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:13,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:13,019 INFO L85 PathProgramCache]: Analyzing trace with hash -875547996, now seen corresponding path program 3 times [2021-12-07 00:05:13,019 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:13,019 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000953121] [2021-12-07 00:05:13,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:13,019 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:13,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:13,086 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 213 proven. 38 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2021-12-07 00:05:13,086 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:13,087 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000953121] [2021-12-07 00:05:13,087 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000953121] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:13,087 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1444415612] [2021-12-07 00:05:13,087 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:05:13,087 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:13,087 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:13,088 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:13,089 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2021-12-07 00:05:13,135 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2021-12-07 00:05:13,136 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:13,136 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 14 conjunts are in the unsatisfiable core [2021-12-07 00:05:13,138 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:13,149 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:05:13,149 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:05:13,355 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-12-07 00:05:13,374 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 3 proven. 227 refuted. 0 times theorem prover too weak. 252 trivial. 0 not checked. [2021-12-07 00:05:13,374 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:13,504 INFO L134 CoverageAnalysis]: Checked inductivity of 482 backedges. 0 proven. 230 refuted. 0 times theorem prover too weak. 252 trivial. 0 not checked. [2021-12-07 00:05:13,504 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1444415612] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:13,504 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:13,504 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 16 [2021-12-07 00:05:13,504 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32786538] [2021-12-07 00:05:13,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:13,505 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-12-07 00:05:13,505 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:13,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-12-07 00:05:13,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=207, Unknown=0, NotChecked=0, Total=272 [2021-12-07 00:05:13,505 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand has 17 states, 16 states have (on average 5.4375) internal successors, (87), 17 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:13,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:13,655 INFO L93 Difference]: Finished difference Result 117 states and 120 transitions. [2021-12-07 00:05:13,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-07 00:05:13,656 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 5.4375) internal successors, (87), 17 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 91 [2021-12-07 00:05:13,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:13,656 INFO L225 Difference]: With dead ends: 117 [2021-12-07 00:05:13,656 INFO L226 Difference]: Without dead ends: 117 [2021-12-07 00:05:13,657 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 174 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=160, Invalid=392, Unknown=0, NotChecked=0, Total=552 [2021-12-07 00:05:13,657 INFO L933 BasicCegarLoop]: 11 mSDtfsCounter, 228 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 228 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 227 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:13,657 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [228 Valid, 61 Invalid, 227 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 207 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:13,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2021-12-07 00:05:13,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 93. [2021-12-07 00:05:13,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 92 states have (on average 1.0217391304347827) internal successors, (94), 92 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:13,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2021-12-07 00:05:13,659 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 91 [2021-12-07 00:05:13,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:13,659 INFO L470 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2021-12-07 00:05:13,659 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 5.4375) internal successors, (87), 17 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:13,659 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2021-12-07 00:05:13,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2021-12-07 00:05:13,660 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:13,660 INFO L514 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1] [2021-12-07 00:05:13,686 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:13,860 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:13,861 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:13,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:13,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1372184046, now seen corresponding path program 1 times [2021-12-07 00:05:13,863 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:13,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773573997] [2021-12-07 00:05:13,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:13,864 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:13,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:13,992 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 264 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2021-12-07 00:05:13,992 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:13,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773573997] [2021-12-07 00:05:13,992 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773573997] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:13,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1298641949] [2021-12-07 00:05:13,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:13,992 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:13,992 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:13,993 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:13,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-12-07 00:05:14,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:14,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 336 conjuncts, 27 conjunts are in the unsatisfiable core [2021-12-07 00:05:14,049 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:14,060 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:05:14,060 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:05:14,331 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 264 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2021-12-07 00:05:14,331 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:14,592 INFO L134 CoverageAnalysis]: Checked inductivity of 495 backedges. 0 proven. 264 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2021-12-07 00:05:14,593 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1298641949] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:14,593 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:14,593 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 20 [2021-12-07 00:05:14,593 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620635288] [2021-12-07 00:05:14,593 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:14,593 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-12-07 00:05:14,593 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:14,594 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-12-07 00:05:14,594 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=330, Unknown=0, NotChecked=0, Total=420 [2021-12-07 00:05:14,594 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand has 21 states, 20 states have (on average 5.6) internal successors, (112), 21 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:14,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:14,858 INFO L93 Difference]: Finished difference Result 159 states and 166 transitions. [2021-12-07 00:05:14,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-07 00:05:14,858 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 5.6) internal successors, (112), 21 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 92 [2021-12-07 00:05:14,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:14,859 INFO L225 Difference]: With dead ends: 159 [2021-12-07 00:05:14,859 INFO L226 Difference]: Without dead ends: 159 [2021-12-07 00:05:14,859 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=240, Invalid=690, Unknown=0, NotChecked=0, Total=930 [2021-12-07 00:05:14,860 INFO L933 BasicCegarLoop]: 11 mSDtfsCounter, 172 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 327 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 336 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 327 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:14,860 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [172 Valid, 99 Invalid, 336 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 327 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-12-07 00:05:14,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2021-12-07 00:05:14,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 123. [2021-12-07 00:05:14,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 122 states have (on average 1.0655737704918034) internal successors, (130), 122 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:14,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2021-12-07 00:05:14,862 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 92 [2021-12-07 00:05:14,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:14,863 INFO L470 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2021-12-07 00:05:14,863 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 5.6) internal successors, (112), 21 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:14,863 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2021-12-07 00:05:14,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2021-12-07 00:05:14,863 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:14,864 INFO L514 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1] [2021-12-07 00:05:14,883 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2021-12-07 00:05:15,064 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2021-12-07 00:05:15,065 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:15,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:15,066 INFO L85 PathProgramCache]: Analyzing trace with hash -285868558, now seen corresponding path program 2 times [2021-12-07 00:05:15,067 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:15,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723231584] [2021-12-07 00:05:15,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:15,068 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:15,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:15,185 INFO L134 CoverageAnalysis]: Checked inductivity of 996 backedges. 84 proven. 793 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2021-12-07 00:05:15,186 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:15,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723231584] [2021-12-07 00:05:15,186 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [723231584] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:15,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240532458] [2021-12-07 00:05:15,186 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:15,186 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:15,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:15,187 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:15,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2021-12-07 00:05:15,258 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:05:15,258 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:15,260 INFO L263 TraceCheckSpWp]: Trace formula consists of 420 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-07 00:05:15,262 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:15,703 INFO L134 CoverageAnalysis]: Checked inductivity of 996 backedges. 42 proven. 830 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2021-12-07 00:05:15,703 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:15,893 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2021-12-07 00:05:16,416 INFO L134 CoverageAnalysis]: Checked inductivity of 996 backedges. 42 proven. 830 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2021-12-07 00:05:16,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1240532458] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:16,416 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:16,416 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 37 [2021-12-07 00:05:16,416 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059988229] [2021-12-07 00:05:16,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:16,417 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2021-12-07 00:05:16,417 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:16,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2021-12-07 00:05:16,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1138, Unknown=0, NotChecked=0, Total=1332 [2021-12-07 00:05:16,418 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand has 37 states, 37 states have (on average 5.648648648648648) internal successors, (209), 37 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:17,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:17,224 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions. [2021-12-07 00:05:17,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2021-12-07 00:05:17,225 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 5.648648648648648) internal successors, (209), 37 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 122 [2021-12-07 00:05:17,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:17,225 INFO L225 Difference]: With dead ends: 167 [2021-12-07 00:05:17,225 INFO L226 Difference]: Without dead ends: 167 [2021-12-07 00:05:17,227 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 294 GetRequests, 220 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1509 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1268, Invalid=4432, Unknown=0, NotChecked=0, Total=5700 [2021-12-07 00:05:17,227 INFO L933 BasicCegarLoop]: 12 mSDtfsCounter, 183 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 610 mSolverCounterSat, 70 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 680 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 70 IncrementalHoareTripleChecker+Valid, 610 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:17,228 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [183 Valid, 123 Invalid, 680 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [70 Valid, 610 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-12-07 00:05:17,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2021-12-07 00:05:17,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 155. [2021-12-07 00:05:17,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.0584415584415585) internal successors, (163), 154 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:17,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 163 transitions. [2021-12-07 00:05:17,231 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 163 transitions. Word has length 122 [2021-12-07 00:05:17,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:17,231 INFO L470 AbstractCegarLoop]: Abstraction has 155 states and 163 transitions. [2021-12-07 00:05:17,231 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 5.648648648648648) internal successors, (209), 37 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:17,231 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 163 transitions. [2021-12-07 00:05:17,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-12-07 00:05:17,232 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:17,232 INFO L514 BasicCegarLoop]: trace histogram [24, 24, 23, 23, 23, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1] [2021-12-07 00:05:17,252 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:17,432 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2021-12-07 00:05:17,433 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:17,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:17,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1906495009, now seen corresponding path program 3 times [2021-12-07 00:05:17,434 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:17,435 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718550006] [2021-12-07 00:05:17,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:17,435 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:17,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:17,556 INFO L134 CoverageAnalysis]: Checked inductivity of 1476 backedges. 828 proven. 334 refuted. 0 times theorem prover too weak. 314 trivial. 0 not checked. [2021-12-07 00:05:17,556 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:17,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718550006] [2021-12-07 00:05:17,556 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1718550006] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:17,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [331943234] [2021-12-07 00:05:17,556 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:05:17,556 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:17,556 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:17,557 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:17,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-12-07 00:05:17,638 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-12-07 00:05:17,638 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:17,639 INFO L263 TraceCheckSpWp]: Trace formula consists of 303 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-07 00:05:17,641 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:17,944 INFO L134 CoverageAnalysis]: Checked inductivity of 1476 backedges. 936 proven. 249 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2021-12-07 00:05:17,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:18,198 INFO L134 CoverageAnalysis]: Checked inductivity of 1476 backedges. 807 proven. 378 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2021-12-07 00:05:18,198 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [331943234] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:18,198 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:18,198 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 16, 16] total 36 [2021-12-07 00:05:18,198 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908550885] [2021-12-07 00:05:18,198 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:18,199 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2021-12-07 00:05:18,199 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:18,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-12-07 00:05:18,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=1058, Unknown=0, NotChecked=0, Total=1260 [2021-12-07 00:05:18,200 INFO L87 Difference]: Start difference. First operand 155 states and 163 transitions. Second operand has 36 states, 36 states have (on average 5.277777777777778) internal successors, (190), 36 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:18,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:18,720 INFO L93 Difference]: Finished difference Result 161 states and 167 transitions. [2021-12-07 00:05:18,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-12-07 00:05:18,720 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 5.277777777777778) internal successors, (190), 36 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-12-07 00:05:18,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:18,721 INFO L225 Difference]: With dead ends: 161 [2021-12-07 00:05:18,721 INFO L226 Difference]: Without dead ends: 161 [2021-12-07 00:05:18,723 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 274 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 913 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=846, Invalid=3444, Unknown=0, NotChecked=0, Total=4290 [2021-12-07 00:05:18,723 INFO L933 BasicCegarLoop]: 10 mSDtfsCounter, 472 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 696 mSolverCounterSat, 140 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 472 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 836 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 140 IncrementalHoareTripleChecker+Valid, 696 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:18,723 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [472 Valid, 77 Invalid, 836 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [140 Valid, 696 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-12-07 00:05:18,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2021-12-07 00:05:18,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 155. [2021-12-07 00:05:18,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.0454545454545454) internal successors, (161), 154 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:18,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 161 transitions. [2021-12-07 00:05:18,726 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 161 transitions. Word has length 149 [2021-12-07 00:05:18,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:18,726 INFO L470 AbstractCegarLoop]: Abstraction has 155 states and 161 transitions. [2021-12-07 00:05:18,726 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 5.277777777777778) internal successors, (190), 36 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:18,726 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 161 transitions. [2021-12-07 00:05:18,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2021-12-07 00:05:18,727 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:18,727 INFO L514 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1] [2021-12-07 00:05:18,747 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2021-12-07 00:05:18,927 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2021-12-07 00:05:18,928 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:18,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:18,929 INFO L85 PathProgramCache]: Analyzing trace with hash -874087090, now seen corresponding path program 4 times [2021-12-07 00:05:18,930 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:18,930 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365324421] [2021-12-07 00:05:18,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:18,930 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:18,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:19,079 INFO L134 CoverageAnalysis]: Checked inductivity of 1598 backedges. 118 proven. 1328 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2021-12-07 00:05:19,079 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:19,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365324421] [2021-12-07 00:05:19,079 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [365324421] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:19,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1710220608] [2021-12-07 00:05:19,080 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-07 00:05:19,080 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:19,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:19,080 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:19,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-12-07 00:05:19,227 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-07 00:05:19,227 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:19,230 INFO L263 TraceCheckSpWp]: Trace formula consists of 523 conjuncts, 19 conjunts are in the unsatisfiable core [2021-12-07 00:05:19,233 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:19,553 INFO L134 CoverageAnalysis]: Checked inductivity of 1598 backedges. 283 proven. 1201 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2021-12-07 00:05:19,553 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:19,759 INFO L134 CoverageAnalysis]: Checked inductivity of 1598 backedges. 283 proven. 1201 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2021-12-07 00:05:19,759 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1710220608] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:19,759 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:19,759 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18, 18] total 35 [2021-12-07 00:05:19,759 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777655821] [2021-12-07 00:05:19,759 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:19,760 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2021-12-07 00:05:19,760 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:19,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2021-12-07 00:05:19,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=333, Invalid=857, Unknown=0, NotChecked=0, Total=1190 [2021-12-07 00:05:19,760 INFO L87 Difference]: Start difference. First operand 155 states and 161 transitions. Second operand has 35 states, 35 states have (on average 6.428571428571429) internal successors, (225), 35 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:20,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:20,548 INFO L93 Difference]: Finished difference Result 401 states and 422 transitions. [2021-12-07 00:05:20,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2021-12-07 00:05:20,548 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 6.428571428571429) internal successors, (225), 35 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 154 [2021-12-07 00:05:20,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:20,550 INFO L225 Difference]: With dead ends: 401 [2021-12-07 00:05:20,550 INFO L226 Difference]: Without dead ends: 401 [2021-12-07 00:05:20,553 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 390 GetRequests, 287 SyntacticMatches, 1 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4337 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=3118, Invalid=7594, Unknown=0, NotChecked=0, Total=10712 [2021-12-07 00:05:20,553 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 302 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 756 mSolverCounterSat, 103 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 302 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 859 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 103 IncrementalHoareTripleChecker+Valid, 756 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:20,553 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [302 Valid, 90 Invalid, 859 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [103 Valid, 756 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-12-07 00:05:20,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2021-12-07 00:05:20,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 390. [2021-12-07 00:05:20,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.056555269922879) internal successors, (411), 389 states have internal predecessors, (411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:20,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 411 transitions. [2021-12-07 00:05:20,559 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 411 transitions. Word has length 154 [2021-12-07 00:05:20,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:20,559 INFO L470 AbstractCegarLoop]: Abstraction has 390 states and 411 transitions. [2021-12-07 00:05:20,559 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 6.428571428571429) internal successors, (225), 35 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:20,560 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 411 transitions. [2021-12-07 00:05:20,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2021-12-07 00:05:20,561 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:20,561 INFO L514 BasicCegarLoop]: trace histogram [50, 50, 49, 49, 49, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:20,589 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2021-12-07 00:05:20,762 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-12-07 00:05:20,762 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:20,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:20,764 INFO L85 PathProgramCache]: Analyzing trace with hash 747006490, now seen corresponding path program 5 times [2021-12-07 00:05:20,764 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:20,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466560849] [2021-12-07 00:05:20,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:20,765 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:20,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:20,990 INFO L134 CoverageAnalysis]: Checked inductivity of 6738 backedges. 3868 proven. 228 refuted. 0 times theorem prover too weak. 2642 trivial. 0 not checked. [2021-12-07 00:05:20,990 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:20,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466560849] [2021-12-07 00:05:20,990 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466560849] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:20,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1978145082] [2021-12-07 00:05:20,991 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-07 00:05:20,991 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:20,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:20,991 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:20,992 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2021-12-07 00:05:21,121 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-12-07 00:05:21,121 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:21,123 INFO L263 TraceCheckSpWp]: Trace formula consists of 498 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-07 00:05:21,128 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:21,485 INFO L134 CoverageAnalysis]: Checked inductivity of 6738 backedges. 3685 proven. 501 refuted. 0 times theorem prover too weak. 2552 trivial. 0 not checked. [2021-12-07 00:05:21,485 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:21,771 INFO L134 CoverageAnalysis]: Checked inductivity of 6738 backedges. 3798 proven. 388 refuted. 0 times theorem prover too weak. 2552 trivial. 0 not checked. [2021-12-07 00:05:21,771 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1978145082] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:21,771 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:21,772 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 16] total 32 [2021-12-07 00:05:21,772 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397165761] [2021-12-07 00:05:21,772 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:21,772 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2021-12-07 00:05:21,772 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:21,773 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-12-07 00:05:21,773 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=803, Unknown=0, NotChecked=0, Total=992 [2021-12-07 00:05:21,774 INFO L87 Difference]: Start difference. First operand 390 states and 411 transitions. Second operand has 32 states, 32 states have (on average 5.21875) internal successors, (167), 32 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:22,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:22,275 INFO L93 Difference]: Finished difference Result 390 states and 405 transitions. [2021-12-07 00:05:22,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-12-07 00:05:22,275 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 5.21875) internal successors, (167), 32 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 314 [2021-12-07 00:05:22,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:22,277 INFO L225 Difference]: With dead ends: 390 [2021-12-07 00:05:22,277 INFO L226 Difference]: Without dead ends: 390 [2021-12-07 00:05:22,278 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 666 GetRequests, 612 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 732 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=700, Invalid=2380, Unknown=0, NotChecked=0, Total=3080 [2021-12-07 00:05:22,278 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 128 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 775 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 807 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 775 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:22,279 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [128 Valid, 80 Invalid, 807 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 775 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-12-07 00:05:22,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2021-12-07 00:05:22,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2021-12-07 00:05:22,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.0411311053984575) internal successors, (405), 389 states have internal predecessors, (405), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:22,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 405 transitions. [2021-12-07 00:05:22,284 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 405 transitions. Word has length 314 [2021-12-07 00:05:22,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:22,284 INFO L470 AbstractCegarLoop]: Abstraction has 390 states and 405 transitions. [2021-12-07 00:05:22,285 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 5.21875) internal successors, (167), 32 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:22,285 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 405 transitions. [2021-12-07 00:05:22,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2021-12-07 00:05:22,286 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:22,286 INFO L514 BasicCegarLoop]: trace histogram [55, 55, 54, 54, 54, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:22,307 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2021-12-07 00:05:22,486 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-12-07 00:05:22,487 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:22,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:22,487 INFO L85 PathProgramCache]: Analyzing trace with hash -525875421, now seen corresponding path program 6 times [2021-12-07 00:05:22,487 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:22,487 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231194955] [2021-12-07 00:05:22,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:22,487 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:22,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:22,665 INFO L134 CoverageAnalysis]: Checked inductivity of 8073 backedges. 4639 proven. 321 refuted. 0 times theorem prover too weak. 3113 trivial. 0 not checked. [2021-12-07 00:05:22,665 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:22,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [231194955] [2021-12-07 00:05:22,665 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [231194955] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:22,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1880617333] [2021-12-07 00:05:22,665 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-07 00:05:22,665 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:22,665 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:22,666 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:22,666 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2021-12-07 00:05:22,952 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2021-12-07 00:05:22,952 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:22,956 INFO L263 TraceCheckSpWp]: Trace formula consists of 883 conjuncts, 20 conjunts are in the unsatisfiable core [2021-12-07 00:05:22,959 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:23,393 INFO L134 CoverageAnalysis]: Checked inductivity of 8073 backedges. 4943 proven. 852 refuted. 0 times theorem prover too weak. 2278 trivial. 0 not checked. [2021-12-07 00:05:23,393 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:23,709 INFO L134 CoverageAnalysis]: Checked inductivity of 8073 backedges. 5125 proven. 670 refuted. 0 times theorem prover too weak. 2278 trivial. 0 not checked. [2021-12-07 00:05:23,709 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1880617333] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:23,710 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:23,710 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18, 18] total 36 [2021-12-07 00:05:23,710 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922135127] [2021-12-07 00:05:23,710 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:23,711 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2021-12-07 00:05:23,711 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:23,711 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-12-07 00:05:23,711 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=1027, Unknown=0, NotChecked=0, Total=1260 [2021-12-07 00:05:23,711 INFO L87 Difference]: Start difference. First operand 390 states and 405 transitions. Second operand has 36 states, 36 states have (on average 5.388888888888889) internal successors, (194), 36 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:24,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:24,421 INFO L93 Difference]: Finished difference Result 390 states and 400 transitions. [2021-12-07 00:05:24,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2021-12-07 00:05:24,421 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 5.388888888888889) internal successors, (194), 36 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 339 [2021-12-07 00:05:24,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:24,423 INFO L225 Difference]: With dead ends: 390 [2021-12-07 00:05:24,423 INFO L226 Difference]: Without dead ends: 390 [2021-12-07 00:05:24,424 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 726 GetRequests, 660 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1114 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=997, Invalid=3559, Unknown=0, NotChecked=0, Total=4556 [2021-12-07 00:05:24,425 INFO L933 BasicCegarLoop]: 15 mSDtfsCounter, 140 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 1323 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 1356 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 1323 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:24,425 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [140 Valid, 127 Invalid, 1356 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 1323 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-12-07 00:05:24,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2021-12-07 00:05:24,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2021-12-07 00:05:24,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.0282776349614395) internal successors, (400), 389 states have internal predecessors, (400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:24,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 400 transitions. [2021-12-07 00:05:24,432 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 400 transitions. Word has length 339 [2021-12-07 00:05:24,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:24,433 INFO L470 AbstractCegarLoop]: Abstraction has 390 states and 400 transitions. [2021-12-07 00:05:24,433 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 5.388888888888889) internal successors, (194), 36 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:24,433 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 400 transitions. [2021-12-07 00:05:24,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 360 [2021-12-07 00:05:24,434 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:24,434 INFO L514 BasicCegarLoop]: trace histogram [59, 59, 58, 58, 58, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:24,456 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:24,635 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-12-07 00:05:24,635 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:24,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:24,636 INFO L85 PathProgramCache]: Analyzing trace with hash -814421421, now seen corresponding path program 7 times [2021-12-07 00:05:24,636 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:24,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892654227] [2021-12-07 00:05:24,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:24,636 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:24,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:24,812 INFO L134 CoverageAnalysis]: Checked inductivity of 9231 backedges. 5350 proven. 429 refuted. 0 times theorem prover too weak. 3452 trivial. 0 not checked. [2021-12-07 00:05:24,812 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:24,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892654227] [2021-12-07 00:05:24,813 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892654227] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:24,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1867733617] [2021-12-07 00:05:24,813 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-07 00:05:24,813 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:24,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:24,814 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:24,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2021-12-07 00:05:24,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:24,950 INFO L263 TraceCheckSpWp]: Trace formula consists of 1164 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-07 00:05:24,954 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:25,373 INFO L134 CoverageAnalysis]: Checked inductivity of 9231 backedges. 6271 proven. 1132 refuted. 0 times theorem prover too weak. 1828 trivial. 0 not checked. [2021-12-07 00:05:25,373 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:25,684 INFO L134 CoverageAnalysis]: Checked inductivity of 9231 backedges. 6271 proven. 1132 refuted. 0 times theorem prover too weak. 1828 trivial. 0 not checked. [2021-12-07 00:05:25,684 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1867733617] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:25,684 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:25,685 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 33 [2021-12-07 00:05:25,685 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884410595] [2021-12-07 00:05:25,685 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:25,685 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2021-12-07 00:05:25,686 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:25,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2021-12-07 00:05:25,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=849, Unknown=0, NotChecked=0, Total=1056 [2021-12-07 00:05:25,686 INFO L87 Difference]: Start difference. First operand 390 states and 400 transitions. Second operand has 33 states, 33 states have (on average 6.424242424242424) internal successors, (212), 33 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:26,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:26,500 INFO L93 Difference]: Finished difference Result 390 states and 396 transitions. [2021-12-07 00:05:26,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-12-07 00:05:26,501 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 6.424242424242424) internal successors, (212), 33 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 359 [2021-12-07 00:05:26,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:26,502 INFO L225 Difference]: With dead ends: 390 [2021-12-07 00:05:26,502 INFO L226 Difference]: Without dead ends: 390 [2021-12-07 00:05:26,504 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 779 GetRequests, 705 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1399 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1081, Invalid=4619, Unknown=0, NotChecked=0, Total=5700 [2021-12-07 00:05:26,504 INFO L933 BasicCegarLoop]: 16 mSDtfsCounter, 122 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 1739 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 1766 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 1739 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:26,504 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [122 Valid, 115 Invalid, 1766 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 1739 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-12-07 00:05:26,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2021-12-07 00:05:26,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2021-12-07 00:05:26,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.0179948586118253) internal successors, (396), 389 states have internal predecessors, (396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:26,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 396 transitions. [2021-12-07 00:05:26,509 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 396 transitions. Word has length 359 [2021-12-07 00:05:26,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:26,509 INFO L470 AbstractCegarLoop]: Abstraction has 390 states and 396 transitions. [2021-12-07 00:05:26,510 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 6.424242424242424) internal successors, (212), 33 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:26,510 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 396 transitions. [2021-12-07 00:05:26,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 375 [2021-12-07 00:05:26,511 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:26,511 INFO L514 BasicCegarLoop]: trace histogram [62, 62, 61, 61, 61, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:26,531 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2021-12-07 00:05:26,712 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:26,712 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:26,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:26,714 INFO L85 PathProgramCache]: Analyzing trace with hash 1672251698, now seen corresponding path program 8 times [2021-12-07 00:05:26,714 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:26,714 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323986827] [2021-12-07 00:05:26,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:26,715 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:26,958 INFO L134 CoverageAnalysis]: Checked inductivity of 10152 backedges. 5971 proven. 552 refuted. 0 times theorem prover too weak. 3629 trivial. 0 not checked. [2021-12-07 00:05:26,958 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:26,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323986827] [2021-12-07 00:05:26,958 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1323986827] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:26,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [954773364] [2021-12-07 00:05:26,958 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:05:26,959 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:26,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:26,959 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:26,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-12-07 00:05:27,116 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:05:27,116 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:27,120 INFO L263 TraceCheckSpWp]: Trace formula consists of 1206 conjuncts, 20 conjunts are in the unsatisfiable core [2021-12-07 00:05:27,123 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:27,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10152 backedges. 7207 proven. 1646 refuted. 0 times theorem prover too weak. 1299 trivial. 0 not checked. [2021-12-07 00:05:27,573 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:27,906 INFO L134 CoverageAnalysis]: Checked inductivity of 10152 backedges. 7207 proven. 1646 refuted. 0 times theorem prover too weak. 1299 trivial. 0 not checked. [2021-12-07 00:05:27,906 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [954773364] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:27,906 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:27,907 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 19] total 37 [2021-12-07 00:05:27,907 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835858947] [2021-12-07 00:05:27,907 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:27,907 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2021-12-07 00:05:27,907 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:27,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2021-12-07 00:05:27,908 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=255, Invalid=1077, Unknown=0, NotChecked=0, Total=1332 [2021-12-07 00:05:27,908 INFO L87 Difference]: Start difference. First operand 390 states and 396 transitions. Second operand has 37 states, 37 states have (on average 6.45945945945946) internal successors, (239), 37 states have internal predecessors, (239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:29,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:29,089 INFO L93 Difference]: Finished difference Result 390 states and 393 transitions. [2021-12-07 00:05:29,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2021-12-07 00:05:29,089 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 6.45945945945946) internal successors, (239), 37 states have internal predecessors, (239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 374 [2021-12-07 00:05:29,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:29,091 INFO L225 Difference]: With dead ends: 390 [2021-12-07 00:05:29,091 INFO L226 Difference]: Without dead ends: 390 [2021-12-07 00:05:29,093 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 821 GetRequests, 733 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2021 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1487, Invalid=6523, Unknown=0, NotChecked=0, Total=8010 [2021-12-07 00:05:29,093 INFO L933 BasicCegarLoop]: 18 mSDtfsCounter, 135 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 2593 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 155 SdHoareTripleChecker+Invalid, 2623 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 2593 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:29,093 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [135 Valid, 155 Invalid, 2623 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 2593 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2021-12-07 00:05:29,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2021-12-07 00:05:29,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390. [2021-12-07 00:05:29,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 390 states, 389 states have (on average 1.0102827763496145) internal successors, (393), 389 states have internal predecessors, (393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:29,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 393 transitions. [2021-12-07 00:05:29,097 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 393 transitions. Word has length 374 [2021-12-07 00:05:29,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:29,098 INFO L470 AbstractCegarLoop]: Abstraction has 390 states and 393 transitions. [2021-12-07 00:05:29,098 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 6.45945945945946) internal successors, (239), 37 states have internal predecessors, (239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:29,098 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 393 transitions. [2021-12-07 00:05:29,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 385 [2021-12-07 00:05:29,099 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:29,100 INFO L514 BasicCegarLoop]: trace histogram [64, 64, 63, 63, 63, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:29,119 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2021-12-07 00:05:29,300 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:29,300 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:29,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:29,302 INFO L85 PathProgramCache]: Analyzing trace with hash -1649762294, now seen corresponding path program 9 times [2021-12-07 00:05:29,302 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:29,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509372507] [2021-12-07 00:05:29,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:29,303 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:29,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:29,531 INFO L134 CoverageAnalysis]: Checked inductivity of 10791 backedges. 7073 proven. 2819 refuted. 0 times theorem prover too weak. 899 trivial. 0 not checked. [2021-12-07 00:05:29,531 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:29,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509372507] [2021-12-07 00:05:29,531 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509372507] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:29,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1673028722] [2021-12-07 00:05:29,531 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:05:29,532 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:29,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:29,532 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:29,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-12-07 00:05:29,652 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-07 00:05:29,652 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:29,654 INFO L263 TraceCheckSpWp]: Trace formula consists of 354 conjuncts, 25 conjunts are in the unsatisfiable core [2021-12-07 00:05:29,658 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:29,669 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:05:29,669 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:05:30,706 INFO L134 CoverageAnalysis]: Checked inductivity of 10791 backedges. 0 proven. 3163 refuted. 0 times theorem prover too weak. 7628 trivial. 0 not checked. [2021-12-07 00:05:30,707 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:32,017 INFO L134 CoverageAnalysis]: Checked inductivity of 10791 backedges. 0 proven. 3163 refuted. 0 times theorem prover too weak. 7628 trivial. 0 not checked. [2021-12-07 00:05:32,018 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1673028722] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:32,018 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:32,018 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 14, 14] total 47 [2021-12-07 00:05:32,019 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420540192] [2021-12-07 00:05:32,019 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:32,019 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2021-12-07 00:05:32,019 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:32,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-12-07 00:05:32,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=410, Invalid=1752, Unknown=0, NotChecked=0, Total=2162 [2021-12-07 00:05:32,021 INFO L87 Difference]: Start difference. First operand 390 states and 393 transitions. Second operand has 47 states, 47 states have (on average 6.191489361702128) internal successors, (291), 47 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:35,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:35,024 INFO L93 Difference]: Finished difference Result 522 states and 535 transitions. [2021-12-07 00:05:35,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2021-12-07 00:05:35,025 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 6.191489361702128) internal successors, (291), 47 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 384 [2021-12-07 00:05:35,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:35,027 INFO L225 Difference]: With dead ends: 522 [2021-12-07 00:05:35,027 INFO L226 Difference]: Without dead ends: 522 [2021-12-07 00:05:35,029 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 894 GetRequests, 742 SyntacticMatches, 0 SemanticMatches, 152 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6568 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=5229, Invalid=18333, Unknown=0, NotChecked=0, Total=23562 [2021-12-07 00:05:35,029 INFO L933 BasicCegarLoop]: 20 mSDtfsCounter, 602 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 1373 mSolverCounterSat, 291 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 602 SdHoareTripleChecker+Valid, 267 SdHoareTripleChecker+Invalid, 1664 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 291 IncrementalHoareTripleChecker+Valid, 1373 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:35,029 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [602 Valid, 267 Invalid, 1664 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [291 Valid, 1373 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2021-12-07 00:05:35,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 522 states. [2021-12-07 00:05:35,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 522 to 450. [2021-12-07 00:05:35,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 450 states, 449 states have (on average 1.0311804008908685) internal successors, (463), 449 states have internal predecessors, (463), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:35,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 463 transitions. [2021-12-07 00:05:35,034 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 463 transitions. Word has length 384 [2021-12-07 00:05:35,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:35,035 INFO L470 AbstractCegarLoop]: Abstraction has 450 states and 463 transitions. [2021-12-07 00:05:35,035 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 6.191489361702128) internal successors, (291), 47 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:35,035 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 463 transitions. [2021-12-07 00:05:35,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 450 [2021-12-07 00:05:35,037 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:35,037 INFO L514 BasicCegarLoop]: trace histogram [77, 77, 76, 76, 76, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1] [2021-12-07 00:05:35,057 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2021-12-07 00:05:35,238 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:35,238 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:35,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:35,240 INFO L85 PathProgramCache]: Analyzing trace with hash -2070971837, now seen corresponding path program 10 times [2021-12-07 00:05:35,240 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:35,240 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414837232] [2021-12-07 00:05:35,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:35,241 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:35,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:35,544 INFO L134 CoverageAnalysis]: Checked inductivity of 15432 backedges. 417 proven. 13839 refuted. 0 times theorem prover too weak. 1176 trivial. 0 not checked. [2021-12-07 00:05:35,544 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:35,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414837232] [2021-12-07 00:05:35,544 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414837232] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:35,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [774167329] [2021-12-07 00:05:35,544 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-07 00:05:35,544 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:35,544 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:35,545 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:35,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-12-07 00:05:36,236 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-07 00:05:36,236 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:36,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 1416 conjuncts, 36 conjunts are in the unsatisfiable core [2021-12-07 00:05:36,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:37,148 INFO L134 CoverageAnalysis]: Checked inductivity of 15432 backedges. 1329 proven. 13224 refuted. 0 times theorem prover too weak. 879 trivial. 0 not checked. [2021-12-07 00:05:37,148 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:37,775 INFO L134 CoverageAnalysis]: Checked inductivity of 15432 backedges. 1329 proven. 13224 refuted. 0 times theorem prover too weak. 879 trivial. 0 not checked. [2021-12-07 00:05:37,775 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [774167329] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:37,775 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:37,775 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 35, 35] total 70 [2021-12-07 00:05:37,775 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456602700] [2021-12-07 00:05:37,775 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:37,776 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2021-12-07 00:05:37,776 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:37,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2021-12-07 00:05:37,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1339, Invalid=3491, Unknown=0, NotChecked=0, Total=4830 [2021-12-07 00:05:37,777 INFO L87 Difference]: Start difference. First operand 450 states and 463 transitions. Second operand has 70 states, 70 states have (on average 6.642857142857143) internal successors, (465), 70 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:42,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:42,485 INFO L93 Difference]: Finished difference Result 1468 states and 1557 transitions. [2021-12-07 00:05:42,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 275 states. [2021-12-07 00:05:42,486 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 70 states have (on average 6.642857142857143) internal successors, (465), 70 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 449 [2021-12-07 00:05:42,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:42,491 INFO L225 Difference]: With dead ends: 1468 [2021-12-07 00:05:42,491 INFO L226 Difference]: Without dead ends: 1468 [2021-12-07 00:05:42,498 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 1192 GetRequests, 852 SyntacticMatches, 1 SemanticMatches, 339 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62622 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=34492, Invalid=81448, Unknown=0, NotChecked=0, Total=115940 [2021-12-07 00:05:42,498 INFO L933 BasicCegarLoop]: 23 mSDtfsCounter, 733 mSDsluCounter, 161 mSDsCounter, 0 mSdLazyCounter, 2452 mSolverCounterSat, 306 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 733 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 2758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 306 IncrementalHoareTripleChecker+Valid, 2452 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:42,498 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [733 Valid, 184 Invalid, 2758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [306 Valid, 2452 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2021-12-07 00:05:42,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1468 states. [2021-12-07 00:05:42,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1468 to 1457. [2021-12-07 00:05:42,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1457 states, 1456 states have (on average 1.0618131868131868) internal successors, (1546), 1456 states have internal predecessors, (1546), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:42,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1457 states to 1457 states and 1546 transitions. [2021-12-07 00:05:42,514 INFO L78 Accepts]: Start accepts. Automaton has 1457 states and 1546 transitions. Word has length 449 [2021-12-07 00:05:42,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:42,515 INFO L470 AbstractCegarLoop]: Abstraction has 1457 states and 1546 transitions. [2021-12-07 00:05:42,515 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 70 states have (on average 6.642857142857143) internal successors, (465), 70 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:42,515 INFO L276 IsEmpty]: Start isEmpty. Operand 1457 states and 1546 transitions. [2021-12-07 00:05:42,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1077 [2021-12-07 00:05:42,530 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:42,531 INFO L514 BasicCegarLoop]: trace histogram [187, 187, 186, 186, 186, 21, 20, 20, 20, 20, 20, 20, 1, 1, 1] [2021-12-07 00:05:42,565 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2021-12-07 00:05:42,731 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2021-12-07 00:05:42,731 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:42,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:42,732 INFO L85 PathProgramCache]: Analyzing trace with hash -1138886418, now seen corresponding path program 11 times [2021-12-07 00:05:42,732 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:42,732 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509214009] [2021-12-07 00:05:42,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:42,732 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:42,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:43,377 INFO L134 CoverageAnalysis]: Checked inductivity of 91673 backedges. 34448 proven. 843 refuted. 0 times theorem prover too weak. 56382 trivial. 0 not checked. [2021-12-07 00:05:43,377 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:43,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509214009] [2021-12-07 00:05:43,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509214009] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:43,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1266995375] [2021-12-07 00:05:43,378 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-07 00:05:43,378 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:43,378 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:43,378 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:43,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-12-07 00:05:44,018 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 31 check-sat command(s) [2021-12-07 00:05:44,019 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:44,026 INFO L263 TraceCheckSpWp]: Trace formula consists of 1428 conjuncts, 28 conjunts are in the unsatisfiable core [2021-12-07 00:05:44,036 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:45,142 INFO L134 CoverageAnalysis]: Checked inductivity of 91673 backedges. 48319 proven. 3482 refuted. 0 times theorem prover too weak. 39872 trivial. 0 not checked. [2021-12-07 00:05:45,142 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:46,029 INFO L134 CoverageAnalysis]: Checked inductivity of 91673 backedges. 49198 proven. 2603 refuted. 0 times theorem prover too weak. 39872 trivial. 0 not checked. [2021-12-07 00:05:46,029 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1266995375] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:46,030 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:46,030 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26, 26] total 54 [2021-12-07 00:05:46,030 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393558609] [2021-12-07 00:05:46,030 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:46,032 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2021-12-07 00:05:46,032 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:46,032 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2021-12-07 00:05:46,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=2361, Unknown=0, NotChecked=0, Total=2862 [2021-12-07 00:05:46,033 INFO L87 Difference]: Start difference. First operand 1457 states and 1546 transitions. Second operand has 54 states, 54 states have (on average 5.518518518518518) internal successors, (298), 54 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:47,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:05:47,686 INFO L93 Difference]: Finished difference Result 1457 states and 1534 transitions. [2021-12-07 00:05:47,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2021-12-07 00:05:47,686 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 5.518518518518518) internal successors, (298), 54 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1076 [2021-12-07 00:05:47,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:05:47,691 INFO L225 Difference]: With dead ends: 1457 [2021-12-07 00:05:47,691 INFO L226 Difference]: Without dead ends: 1457 [2021-12-07 00:05:47,692 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2245 GetRequests, 2124 SyntacticMatches, 0 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3890 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=3070, Invalid=11936, Unknown=0, NotChecked=0, Total=15006 [2021-12-07 00:05:47,693 INFO L933 BasicCegarLoop]: 23 mSDtfsCounter, 218 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 3325 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 218 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 3379 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 3325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2021-12-07 00:05:47,693 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [218 Valid, 219 Invalid, 3379 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 3325 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2021-12-07 00:05:47,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1457 states. [2021-12-07 00:05:47,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1457 to 1457. [2021-12-07 00:05:47,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1457 states, 1456 states have (on average 1.0535714285714286) internal successors, (1534), 1456 states have internal predecessors, (1534), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:47,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1457 states to 1457 states and 1534 transitions. [2021-12-07 00:05:47,715 INFO L78 Accepts]: Start accepts. Automaton has 1457 states and 1534 transitions. Word has length 1076 [2021-12-07 00:05:47,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:05:47,715 INFO L470 AbstractCegarLoop]: Abstraction has 1457 states and 1534 transitions. [2021-12-07 00:05:47,716 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 5.518518518518518) internal successors, (298), 54 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:05:47,716 INFO L276 IsEmpty]: Start isEmpty. Operand 1457 states and 1534 transitions. [2021-12-07 00:05:47,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1132 [2021-12-07 00:05:47,724 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:05:47,725 INFO L514 BasicCegarLoop]: trace histogram [198, 198, 197, 197, 197, 21, 20, 20, 20, 20, 20, 20, 1, 1, 1] [2021-12-07 00:05:47,757 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2021-12-07 00:05:47,925 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-12-07 00:05:47,926 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:05:47,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:05:47,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1593275497, now seen corresponding path program 12 times [2021-12-07 00:05:47,928 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:05:47,929 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326841842] [2021-12-07 00:05:47,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:05:47,929 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:05:48,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:05:48,639 INFO L134 CoverageAnalysis]: Checked inductivity of 102431 backedges. 38216 proven. 1011 refuted. 0 times theorem prover too weak. 63204 trivial. 0 not checked. [2021-12-07 00:05:48,639 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:05:48,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326841842] [2021-12-07 00:05:48,639 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326841842] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:05:48,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1751519256] [2021-12-07 00:05:48,639 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-07 00:05:48,640 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:05:48,640 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:05:48,640 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:05:48,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-12-07 00:05:49,046 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 29 check-sat command(s) [2021-12-07 00:05:49,046 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:05:49,051 INFO L263 TraceCheckSpWp]: Trace formula consists of 916 conjuncts, 33 conjunts are in the unsatisfiable core [2021-12-07 00:05:49,061 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:05:49,070 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:05:49,070 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:05:52,005 INFO L134 CoverageAnalysis]: Checked inductivity of 102431 backedges. 9527 proven. 20565 refuted. 0 times theorem prover too weak. 72339 trivial. 0 not checked. [2021-12-07 00:05:52,006 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:05:55,640 INFO L134 CoverageAnalysis]: Checked inductivity of 102431 backedges. 0 proven. 30092 refuted. 0 times theorem prover too weak. 72339 trivial. 0 not checked. [2021-12-07 00:05:55,641 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1751519256] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:05:55,641 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:05:55,642 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 19, 19] total 63 [2021-12-07 00:05:55,642 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591560401] [2021-12-07 00:05:55,642 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:05:55,643 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2021-12-07 00:05:55,643 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:05:55,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2021-12-07 00:05:55,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=3240, Unknown=0, NotChecked=0, Total=3906 [2021-12-07 00:05:55,644 INFO L87 Difference]: Start difference. First operand 1457 states and 1534 transitions. Second operand has 63 states, 63 states have (on average 4.968253968253968) internal successors, (313), 63 states have internal predecessors, (313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:03,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:06:03,608 INFO L93 Difference]: Finished difference Result 1665 states and 1746 transitions. [2021-12-07 00:06:03,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 182 states. [2021-12-07 00:06:03,608 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 4.968253968253968) internal successors, (313), 63 states have internal predecessors, (313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1131 [2021-12-07 00:06:03,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:06:03,614 INFO L225 Difference]: With dead ends: 1665 [2021-12-07 00:06:03,614 INFO L226 Difference]: Without dead ends: 1665 [2021-12-07 00:06:03,616 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2468 GetRequests, 2228 SyntacticMatches, 0 SemanticMatches, 240 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18798 ImplicationChecksByTransitivity, 7.9s TimeCoverageRelationStatistics Valid=9360, Invalid=48962, Unknown=0, NotChecked=0, Total=58322 [2021-12-07 00:06:03,616 INFO L933 BasicCegarLoop]: 24 mSDtfsCounter, 2277 mSDsluCounter, 216 mSDsCounter, 0 mSdLazyCounter, 2020 mSolverCounterSat, 615 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2277 SdHoareTripleChecker+Valid, 240 SdHoareTripleChecker+Invalid, 2635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 615 IncrementalHoareTripleChecker+Valid, 2020 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2021-12-07 00:06:03,616 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2277 Valid, 240 Invalid, 2635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [615 Valid, 2020 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2021-12-07 00:06:03,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1665 states. [2021-12-07 00:06:03,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1665 to 1592. [2021-12-07 00:06:03,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1592 states, 1591 states have (on average 1.0521684475172848) internal successors, (1674), 1591 states have internal predecessors, (1674), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:03,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1592 states to 1592 states and 1674 transitions. [2021-12-07 00:06:03,633 INFO L78 Accepts]: Start accepts. Automaton has 1592 states and 1674 transitions. Word has length 1131 [2021-12-07 00:06:03,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:06:03,633 INFO L470 AbstractCegarLoop]: Abstraction has 1592 states and 1674 transitions. [2021-12-07 00:06:03,633 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 4.968253968253968) internal successors, (313), 63 states have internal predecessors, (313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:03,633 INFO L276 IsEmpty]: Start isEmpty. Operand 1592 states and 1674 transitions. [2021-12-07 00:06:03,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1309 [2021-12-07 00:06:03,644 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:06:03,645 INFO L514 BasicCegarLoop]: trace histogram [232, 232, 231, 231, 231, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:06:03,666 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Ended with exit code 0 [2021-12-07 00:06:03,845 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:03,845 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:06:03,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:06:03,846 INFO L85 PathProgramCache]: Analyzing trace with hash 738738834, now seen corresponding path program 13 times [2021-12-07 00:06:03,846 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:06:03,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421320166] [2021-12-07 00:06:03,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:06:03,846 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:06:04,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:04,638 INFO L134 CoverageAnalysis]: Checked inductivity of 139881 backedges. 64934 proven. 1194 refuted. 0 times theorem prover too weak. 73753 trivial. 0 not checked. [2021-12-07 00:06:04,639 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:06:04,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421320166] [2021-12-07 00:06:04,639 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1421320166] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:06:04,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1528735190] [2021-12-07 00:06:04,639 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-07 00:06:04,639 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:04,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:06:04,641 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:06:04,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-12-07 00:06:05,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:05,098 INFO L263 TraceCheckSpWp]: Trace formula consists of 3982 conjuncts, 28 conjunts are in the unsatisfiable core [2021-12-07 00:06:05,111 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:06:06,313 INFO L134 CoverageAnalysis]: Checked inductivity of 139881 backedges. 81118 proven. 5182 refuted. 0 times theorem prover too weak. 53581 trivial. 0 not checked. [2021-12-07 00:06:06,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:06:07,306 INFO L134 CoverageAnalysis]: Checked inductivity of 139881 backedges. 81118 proven. 5182 refuted. 0 times theorem prover too weak. 53581 trivial. 0 not checked. [2021-12-07 00:06:07,306 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1528735190] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:06:07,306 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:06:07,307 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 27, 27] total 53 [2021-12-07 00:06:07,307 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59313279] [2021-12-07 00:06:07,307 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:06:07,309 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2021-12-07 00:06:07,309 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:06:07,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2021-12-07 00:06:07,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=497, Invalid=2259, Unknown=0, NotChecked=0, Total=2756 [2021-12-07 00:06:07,309 INFO L87 Difference]: Start difference. First operand 1592 states and 1674 transitions. Second operand has 53 states, 53 states have (on average 6.547169811320755) internal successors, (347), 53 states have internal predecessors, (347), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:10,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:06:10,018 INFO L93 Difference]: Finished difference Result 1592 states and 1663 transitions. [2021-12-07 00:06:10,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2021-12-07 00:06:10,018 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 6.547169811320755) internal successors, (347), 53 states have internal predecessors, (347), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1308 [2021-12-07 00:06:10,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:06:10,023 INFO L225 Difference]: With dead ends: 1592 [2021-12-07 00:06:10,023 INFO L226 Difference]: Without dead ends: 1592 [2021-12-07 00:06:10,025 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2747 GetRequests, 2593 SyntacticMatches, 0 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6499 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=4276, Invalid=19904, Unknown=0, NotChecked=0, Total=24180 [2021-12-07 00:06:10,025 INFO L933 BasicCegarLoop]: 26 mSDtfsCounter, 189 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 5575 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 189 SdHoareTripleChecker+Valid, 251 SdHoareTripleChecker+Invalid, 5620 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 5575 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2021-12-07 00:06:10,025 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [189 Valid, 251 Invalid, 5620 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 5575 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2021-12-07 00:06:10,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1592 states. [2021-12-07 00:06:10,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1592 to 1592. [2021-12-07 00:06:10,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1592 states, 1591 states have (on average 1.0452545568824638) internal successors, (1663), 1591 states have internal predecessors, (1663), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:10,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1592 states to 1592 states and 1663 transitions. [2021-12-07 00:06:10,040 INFO L78 Accepts]: Start accepts. Automaton has 1592 states and 1663 transitions. Word has length 1308 [2021-12-07 00:06:10,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:06:10,040 INFO L470 AbstractCegarLoop]: Abstraction has 1592 states and 1663 transitions. [2021-12-07 00:06:10,040 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 6.547169811320755) internal successors, (347), 53 states have internal predecessors, (347), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:10,040 INFO L276 IsEmpty]: Start isEmpty. Operand 1592 states and 1663 transitions. [2021-12-07 00:06:10,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1354 [2021-12-07 00:06:10,052 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:06:10,052 INFO L514 BasicCegarLoop]: trace histogram [241, 241, 240, 240, 240, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:06:10,076 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2021-12-07 00:06:10,253 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-12-07 00:06:10,254 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:06:10,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:06:10,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1786428189, now seen corresponding path program 14 times [2021-12-07 00:06:10,256 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:06:10,256 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287719059] [2021-12-07 00:06:10,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:06:10,257 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:06:10,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:11,076 INFO L134 CoverageAnalysis]: Checked inductivity of 150672 backedges. 69661 proven. 1392 refuted. 0 times theorem prover too weak. 79619 trivial. 0 not checked. [2021-12-07 00:06:11,076 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:06:11,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287719059] [2021-12-07 00:06:11,076 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [287719059] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:06:11,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1674170888] [2021-12-07 00:06:11,076 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:06:11,076 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:11,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:06:11,077 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:06:11,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-12-07 00:06:11,515 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:06:11,515 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:06:11,528 INFO L263 TraceCheckSpWp]: Trace formula consists of 4108 conjuncts, 30 conjunts are in the unsatisfiable core [2021-12-07 00:06:11,538 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:06:12,749 INFO L134 CoverageAnalysis]: Checked inductivity of 150672 backedges. 93912 proven. 6511 refuted. 0 times theorem prover too weak. 50249 trivial. 0 not checked. [2021-12-07 00:06:12,749 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:06:13,735 INFO L134 CoverageAnalysis]: Checked inductivity of 150672 backedges. 93912 proven. 6511 refuted. 0 times theorem prover too weak. 50249 trivial. 0 not checked. [2021-12-07 00:06:13,735 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1674170888] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:06:13,735 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:06:13,736 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 29, 29] total 57 [2021-12-07 00:06:13,736 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533971239] [2021-12-07 00:06:13,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:06:13,737 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2021-12-07 00:06:13,738 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:06:13,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2021-12-07 00:06:13,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=570, Invalid=2622, Unknown=0, NotChecked=0, Total=3192 [2021-12-07 00:06:13,739 INFO L87 Difference]: Start difference. First operand 1592 states and 1663 transitions. Second operand has 57 states, 57 states have (on average 6.56140350877193) internal successors, (374), 57 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:17,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:06:17,098 INFO L93 Difference]: Finished difference Result 1674 states and 1735 transitions. [2021-12-07 00:06:17,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 121 states. [2021-12-07 00:06:17,098 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 57 states have (on average 6.56140350877193) internal successors, (374), 57 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1353 [2021-12-07 00:06:17,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:06:17,104 INFO L225 Difference]: With dead ends: 1674 [2021-12-07 00:06:17,104 INFO L226 Difference]: Without dead ends: 1674 [2021-12-07 00:06:17,105 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2854 GetRequests, 2681 SyntacticMatches, 0 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8270 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=5347, Invalid=25103, Unknown=0, NotChecked=0, Total=30450 [2021-12-07 00:06:17,106 INFO L933 BasicCegarLoop]: 28 mSDtfsCounter, 194 mSDsluCounter, 299 mSDsCounter, 0 mSdLazyCounter, 6210 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 6255 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 6210 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2021-12-07 00:06:17,106 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [194 Valid, 327 Invalid, 6255 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 6210 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2021-12-07 00:06:17,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1674 states. [2021-12-07 00:06:17,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1674 to 1664. [2021-12-07 00:06:17,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1664 states, 1663 states have (on average 1.0372820204449789) internal successors, (1725), 1663 states have internal predecessors, (1725), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:17,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1664 states to 1664 states and 1725 transitions. [2021-12-07 00:06:17,120 INFO L78 Accepts]: Start accepts. Automaton has 1664 states and 1725 transitions. Word has length 1353 [2021-12-07 00:06:17,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:06:17,120 INFO L470 AbstractCegarLoop]: Abstraction has 1664 states and 1725 transitions. [2021-12-07 00:06:17,121 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 57 states have (on average 6.56140350877193) internal successors, (374), 57 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:17,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1664 states and 1725 transitions. [2021-12-07 00:06:17,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1394 [2021-12-07 00:06:17,133 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:06:17,133 INFO L514 BasicCegarLoop]: trace histogram [249, 249, 248, 248, 248, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:06:17,168 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2021-12-07 00:06:17,334 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2021-12-07 00:06:17,334 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:06:17,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:06:17,336 INFO L85 PathProgramCache]: Analyzing trace with hash -524826813, now seen corresponding path program 15 times [2021-12-07 00:06:17,336 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:06:17,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515796144] [2021-12-07 00:06:17,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:06:17,337 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:06:17,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:18,109 INFO L134 CoverageAnalysis]: Checked inductivity of 160604 backedges. 74157 proven. 1605 refuted. 0 times theorem prover too weak. 84842 trivial. 0 not checked. [2021-12-07 00:06:18,109 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:06:18,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515796144] [2021-12-07 00:06:18,110 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [515796144] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:06:18,110 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2091141258] [2021-12-07 00:06:18,110 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:06:18,110 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:18,110 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:06:18,110 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:06:18,111 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-12-07 00:06:18,733 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2021-12-07 00:06:18,734 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:06:18,742 INFO L263 TraceCheckSpWp]: Trace formula consists of 1467 conjuncts, 37 conjunts are in the unsatisfiable core [2021-12-07 00:06:18,751 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:06:18,761 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:06:18,762 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:06:22,318 INFO L134 CoverageAnalysis]: Checked inductivity of 160604 backedges. 0 proven. 27242 refuted. 0 times theorem prover too weak. 133362 trivial. 0 not checked. [2021-12-07 00:06:22,318 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:06:26,763 INFO L134 CoverageAnalysis]: Checked inductivity of 160604 backedges. 0 proven. 27242 refuted. 0 times theorem prover too weak. 133362 trivial. 0 not checked. [2021-12-07 00:06:26,763 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2091141258] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:06:26,763 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:06:26,764 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 26, 26] total 83 [2021-12-07 00:06:26,764 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820646418] [2021-12-07 00:06:26,764 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:06:26,766 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 83 states [2021-12-07 00:06:26,766 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:06:26,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2021-12-07 00:06:26,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1305, Invalid=5501, Unknown=0, NotChecked=0, Total=6806 [2021-12-07 00:06:26,767 INFO L87 Difference]: Start difference. First operand 1664 states and 1725 transitions. Second operand has 83 states, 83 states have (on average 5.180722891566265) internal successors, (430), 83 states have internal predecessors, (430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:30,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:06:30,625 INFO L93 Difference]: Finished difference Result 2063 states and 2130 transitions. [2021-12-07 00:06:30,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2021-12-07 00:06:30,625 INFO L78 Accepts]: Start accepts. Automaton has has 83 states, 83 states have (on average 5.180722891566265) internal successors, (430), 83 states have internal predecessors, (430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1393 [2021-12-07 00:06:30,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:06:30,631 INFO L225 Difference]: With dead ends: 2063 [2021-12-07 00:06:30,631 INFO L226 Difference]: Without dead ends: 2063 [2021-12-07 00:06:30,633 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2920 GetRequests, 2737 SyntacticMatches, 0 SemanticMatches, 183 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8357 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=6610, Invalid=27430, Unknown=0, NotChecked=0, Total=34040 [2021-12-07 00:06:30,633 INFO L933 BasicCegarLoop]: 30 mSDtfsCounter, 1871 mSDsluCounter, 379 mSDsCounter, 0 mSdLazyCounter, 2615 mSolverCounterSat, 520 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1871 SdHoareTripleChecker+Valid, 409 SdHoareTripleChecker+Invalid, 3135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 520 IncrementalHoareTripleChecker+Valid, 2615 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2021-12-07 00:06:30,633 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1871 Valid, 409 Invalid, 3135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [520 Valid, 2615 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2021-12-07 00:06:30,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2063 states. [2021-12-07 00:06:30,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2063 to 1783. [2021-12-07 00:06:30,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1783 states, 1782 states have (on average 1.0336700336700337) internal successors, (1842), 1782 states have internal predecessors, (1842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:30,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1783 states to 1783 states and 1842 transitions. [2021-12-07 00:06:30,648 INFO L78 Accepts]: Start accepts. Automaton has 1783 states and 1842 transitions. Word has length 1393 [2021-12-07 00:06:30,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:06:30,648 INFO L470 AbstractCegarLoop]: Abstraction has 1783 states and 1842 transitions. [2021-12-07 00:06:30,649 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 83 states, 83 states have (on average 5.180722891566265) internal successors, (430), 83 states have internal predecessors, (430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:30,649 INFO L276 IsEmpty]: Start isEmpty. Operand 1783 states and 1842 transitions. [2021-12-07 00:06:30,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1479 [2021-12-07 00:06:30,662 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:06:30,663 INFO L514 BasicCegarLoop]: trace histogram [266, 266, 265, 265, 265, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:06:30,699 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Ended with exit code 0 [2021-12-07 00:06:30,863 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2021-12-07 00:06:30,864 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:06:30,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:06:30,865 INFO L85 PathProgramCache]: Analyzing trace with hash -950517878, now seen corresponding path program 16 times [2021-12-07 00:06:30,865 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:06:30,865 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826683953] [2021-12-07 00:06:30,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:06:30,865 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:06:31,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:31,737 INFO L134 CoverageAnalysis]: Checked inductivity of 182772 backedges. 89042 proven. 1833 refuted. 0 times theorem prover too weak. 91897 trivial. 0 not checked. [2021-12-07 00:06:31,737 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:06:31,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826683953] [2021-12-07 00:06:31,737 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826683953] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:06:31,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [229437658] [2021-12-07 00:06:31,738 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-07 00:06:31,738 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:31,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:06:31,738 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:06:31,740 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-12-07 00:06:41,371 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-07 00:06:41,372 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:06:41,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 4458 conjuncts, 39 conjunts are in the unsatisfiable core [2021-12-07 00:06:41,423 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:06:42,993 INFO L134 CoverageAnalysis]: Checked inductivity of 182772 backedges. 153634 proven. 15588 refuted. 0 times theorem prover too weak. 13550 trivial. 0 not checked. [2021-12-07 00:06:42,993 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:06:44,327 INFO L134 CoverageAnalysis]: Checked inductivity of 182772 backedges. 153634 proven. 15588 refuted. 0 times theorem prover too weak. 13550 trivial. 0 not checked. [2021-12-07 00:06:44,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [229437658] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:06:44,327 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:06:44,328 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 38, 38] total 75 [2021-12-07 00:06:44,329 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102212354] [2021-12-07 00:06:44,329 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:06:44,330 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 75 states [2021-12-07 00:06:44,331 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:06:44,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2021-12-07 00:06:44,331 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=995, Invalid=4555, Unknown=0, NotChecked=0, Total=5550 [2021-12-07 00:06:44,331 INFO L87 Difference]: Start difference. First operand 1783 states and 1842 transitions. Second operand has 75 states, 75 states have (on average 7.32) internal successors, (549), 75 states have internal predecessors, (549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:52,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:06:52,232 INFO L93 Difference]: Finished difference Result 2385 states and 2431 transitions. [2021-12-07 00:06:52,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 243 states. [2021-12-07 00:06:52,232 INFO L78 Accepts]: Start accepts. Automaton has has 75 states, 75 states have (on average 7.32) internal successors, (549), 75 states have internal predecessors, (549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1478 [2021-12-07 00:06:52,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:06:52,240 INFO L225 Difference]: With dead ends: 2385 [2021-12-07 00:06:52,240 INFO L226 Difference]: Without dead ends: 2385 [2021-12-07 00:06:52,243 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3230 GetRequests, 2917 SyntacticMatches, 0 SemanticMatches, 313 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28663 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=18113, Invalid=80797, Unknown=0, NotChecked=0, Total=98910 [2021-12-07 00:06:52,243 INFO L933 BasicCegarLoop]: 42 mSDtfsCounter, 240 mSDsluCounter, 273 mSDsCounter, 0 mSdLazyCounter, 11470 mSolverCounterSat, 64 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 240 SdHoareTripleChecker+Valid, 315 SdHoareTripleChecker+Invalid, 11534 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 64 IncrementalHoareTripleChecker+Valid, 11470 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.8s IncrementalHoareTripleChecker+Time [2021-12-07 00:06:52,243 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [240 Valid, 315 Invalid, 11534 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [64 Valid, 11470 Invalid, 0 Unknown, 0 Unchecked, 2.8s Time] [2021-12-07 00:06:52,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2385 states. [2021-12-07 00:06:52,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2385 to 2375. [2021-12-07 00:06:52,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2375 states, 2374 states have (on average 1.0197978096040439) internal successors, (2421), 2374 states have internal predecessors, (2421), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:52,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2375 states to 2375 states and 2421 transitions. [2021-12-07 00:06:52,262 INFO L78 Accepts]: Start accepts. Automaton has 2375 states and 2421 transitions. Word has length 1478 [2021-12-07 00:06:52,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:06:52,263 INFO L470 AbstractCegarLoop]: Abstraction has 2375 states and 2421 transitions. [2021-12-07 00:06:52,263 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 75 states, 75 states have (on average 7.32) internal successors, (549), 75 states have internal predecessors, (549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:06:52,263 INFO L276 IsEmpty]: Start isEmpty. Operand 2375 states and 2421 transitions. [2021-12-07 00:06:52,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1534 [2021-12-07 00:06:52,277 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:06:52,278 INFO L514 BasicCegarLoop]: trace histogram [277, 277, 276, 276, 276, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:06:52,310 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2021-12-07 00:06:52,479 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:52,479 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:06:52,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:06:52,481 INFO L85 PathProgramCache]: Analyzing trace with hash -445226877, now seen corresponding path program 17 times [2021-12-07 00:06:52,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:06:52,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904122282] [2021-12-07 00:06:52,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:06:52,483 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:06:52,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:06:53,599 INFO L134 CoverageAnalysis]: Checked inductivity of 197886 backedges. 107661 proven. 2076 refuted. 0 times theorem prover too weak. 88149 trivial. 0 not checked. [2021-12-07 00:06:53,599 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:06:53,599 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904122282] [2021-12-07 00:06:53,599 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904122282] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:06:53,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1821208083] [2021-12-07 00:06:53,600 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-07 00:06:53,600 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:06:53,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:06:53,600 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:06:53,601 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2021-12-07 00:06:57,584 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2021-12-07 00:06:57,585 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:06:57,608 INFO L263 TraceCheckSpWp]: Trace formula consists of 3843 conjuncts, 40 conjunts are in the unsatisfiable core [2021-12-07 00:06:57,623 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:06:59,138 INFO L134 CoverageAnalysis]: Checked inductivity of 197886 backedges. 140736 proven. 13643 refuted. 0 times theorem prover too weak. 43507 trivial. 0 not checked. [2021-12-07 00:06:59,138 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:07:00,345 INFO L134 CoverageAnalysis]: Checked inductivity of 197886 backedges. 143346 proven. 11033 refuted. 0 times theorem prover too weak. 43507 trivial. 0 not checked. [2021-12-07 00:07:00,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1821208083] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:07:00,345 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:07:00,347 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 38, 38] total 78 [2021-12-07 00:07:00,347 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011264306] [2021-12-07 00:07:00,347 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:07:00,348 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 78 states [2021-12-07 00:07:00,349 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:07:00,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2021-12-07 00:07:00,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1002, Invalid=5004, Unknown=0, NotChecked=0, Total=6006 [2021-12-07 00:07:00,350 INFO L87 Difference]: Start difference. First operand 2375 states and 2421 transitions. Second operand has 78 states, 78 states have (on average 5.897435897435898) internal successors, (460), 78 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:05,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:07:05,883 INFO L93 Difference]: Finished difference Result 2472 states and 2510 transitions. [2021-12-07 00:07:05,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 169 states. [2021-12-07 00:07:05,883 INFO L78 Accepts]: Start accepts. Automaton has has 78 states, 78 states have (on average 5.897435897435898) internal successors, (460), 78 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1533 [2021-12-07 00:07:05,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:07:05,891 INFO L225 Difference]: With dead ends: 2472 [2021-12-07 00:07:05,891 INFO L226 Difference]: Without dead ends: 2472 [2021-12-07 00:07:05,894 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3264 GetRequests, 3026 SyntacticMatches, 0 SemanticMatches, 238 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15653 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=10753, Invalid=46607, Unknown=0, NotChecked=0, Total=57360 [2021-12-07 00:07:05,894 INFO L933 BasicCegarLoop]: 35 mSDtfsCounter, 281 mSDsluCounter, 353 mSDsCounter, 0 mSdLazyCounter, 9312 mSolverCounterSat, 71 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 281 SdHoareTripleChecker+Valid, 388 SdHoareTripleChecker+Invalid, 9383 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 71 IncrementalHoareTripleChecker+Valid, 9312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:07:05,894 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [281 Valid, 388 Invalid, 9383 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [71 Valid, 9312 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2021-12-07 00:07:05,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2472 states. [2021-12-07 00:07:05,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2472 to 2462. [2021-12-07 00:07:05,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2462 states, 2461 states have (on average 1.0158472165786265) internal successors, (2500), 2461 states have internal predecessors, (2500), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:05,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2462 states to 2462 states and 2500 transitions. [2021-12-07 00:07:05,922 INFO L78 Accepts]: Start accepts. Automaton has 2462 states and 2500 transitions. Word has length 1533 [2021-12-07 00:07:05,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:07:05,923 INFO L470 AbstractCegarLoop]: Abstraction has 2462 states and 2500 transitions. [2021-12-07 00:07:05,923 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 78 states, 78 states have (on average 5.897435897435898) internal successors, (460), 78 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:05,923 INFO L276 IsEmpty]: Start isEmpty. Operand 2462 states and 2500 transitions. [2021-12-07 00:07:05,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1554 [2021-12-07 00:07:05,938 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:07:05,939 INFO L514 BasicCegarLoop]: trace histogram [281, 281, 280, 280, 280, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1] [2021-12-07 00:07:05,968 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2021-12-07 00:07:06,140 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-12-07 00:07:06,140 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:07:06,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:07:06,144 INFO L85 PathProgramCache]: Analyzing trace with hash -2011725613, now seen corresponding path program 18 times [2021-12-07 00:07:06,144 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:07:06,145 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669200709] [2021-12-07 00:07:06,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:07:06,146 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:07:06,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:07:07,186 INFO L134 CoverageAnalysis]: Checked inductivity of 203532 backedges. 111340 proven. 2334 refuted. 0 times theorem prover too weak. 89858 trivial. 0 not checked. [2021-12-07 00:07:07,186 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:07:07,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669200709] [2021-12-07 00:07:07,186 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [669200709] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:07:07,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1226908631] [2021-12-07 00:07:07,186 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-07 00:07:07,186 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:07,186 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:07:07,187 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:07:07,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2021-12-07 00:07:11,649 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2021-12-07 00:07:11,650 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:07:11,671 INFO L263 TraceCheckSpWp]: Trace formula consists of 3359 conjuncts, 50 conjunts are in the unsatisfiable core [2021-12-07 00:07:11,682 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:07:11,696 INFO L354 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2021-12-07 00:07:11,697 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2021-12-07 00:07:16,300 INFO L134 CoverageAnalysis]: Checked inductivity of 203532 backedges. 27725 proven. 42585 refuted. 0 times theorem prover too weak. 133222 trivial. 0 not checked. [2021-12-07 00:07:16,300 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:07:22,251 INFO L134 CoverageAnalysis]: Checked inductivity of 203532 backedges. 0 proven. 70310 refuted. 0 times theorem prover too weak. 133222 trivial. 0 not checked. [2021-12-07 00:07:22,251 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1226908631] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:07:22,251 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:07:22,252 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 32, 32] total 101 [2021-12-07 00:07:22,252 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233952427] [2021-12-07 00:07:22,252 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:07:22,254 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 101 states [2021-12-07 00:07:22,254 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:07:22,255 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2021-12-07 00:07:22,255 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1858, Invalid=8242, Unknown=0, NotChecked=0, Total=10100 [2021-12-07 00:07:22,255 INFO L87 Difference]: Start difference. First operand 2462 states and 2500 transitions. Second operand has 101 states, 101 states have (on average 4.99009900990099) internal successors, (504), 101 states have internal predecessors, (504), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:36,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:07:36,009 INFO L93 Difference]: Finished difference Result 3164 states and 3233 transitions. [2021-12-07 00:07:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 266 states. [2021-12-07 00:07:36,009 INFO L78 Accepts]: Start accepts. Automaton has has 101 states, 101 states have (on average 4.99009900990099) internal successors, (504), 101 states have internal predecessors, (504), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1553 [2021-12-07 00:07:36,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:07:36,019 INFO L225 Difference]: With dead ends: 3164 [2021-12-07 00:07:36,019 INFO L226 Difference]: Without dead ends: 3164 [2021-12-07 00:07:36,024 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3407 GetRequests, 3045 SyntacticMatches, 0 SemanticMatches, 362 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41544 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=21846, Invalid=110286, Unknown=0, NotChecked=0, Total=132132 [2021-12-07 00:07:36,024 INFO L933 BasicCegarLoop]: 36 mSDtfsCounter, 5716 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 3328 mSolverCounterSat, 1350 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5716 SdHoareTripleChecker+Valid, 404 SdHoareTripleChecker+Invalid, 4678 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1350 IncrementalHoareTripleChecker+Valid, 3328 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2021-12-07 00:07:36,024 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5716 Valid, 404 Invalid, 4678 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1350 Valid, 3328 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2021-12-07 00:07:36,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3164 states. [2021-12-07 00:07:36,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3164 to 2858. [2021-12-07 00:07:36,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2858 states, 2857 states have (on average 1.0178508925446272) internal successors, (2908), 2857 states have internal predecessors, (2908), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:36,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2858 states to 2858 states and 2908 transitions. [2021-12-07 00:07:36,048 INFO L78 Accepts]: Start accepts. Automaton has 2858 states and 2908 transitions. Word has length 1553 [2021-12-07 00:07:36,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:07:36,049 INFO L470 AbstractCegarLoop]: Abstraction has 2858 states and 2908 transitions. [2021-12-07 00:07:36,049 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 101 states, 101 states have (on average 4.99009900990099) internal successors, (504), 101 states have internal predecessors, (504), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:36,049 INFO L276 IsEmpty]: Start isEmpty. Operand 2858 states and 2908 transitions. [2021-12-07 00:07:36,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1873 [2021-12-07 00:07:36,069 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:07:36,070 INFO L514 BasicCegarLoop]: trace histogram [342, 342, 341, 341, 341, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1] [2021-12-07 00:07:36,096 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Ended with exit code 0 [2021-12-07 00:07:36,271 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:36,271 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:07:36,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:07:36,274 INFO L85 PathProgramCache]: Analyzing trace with hash 1440274970, now seen corresponding path program 19 times [2021-12-07 00:07:36,274 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:07:36,274 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346353422] [2021-12-07 00:07:36,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:07:36,275 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:07:36,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:07:37,369 INFO L134 CoverageAnalysis]: Checked inductivity of 300533 backedges. 176002 proven. 2607 refuted. 0 times theorem prover too weak. 121924 trivial. 0 not checked. [2021-12-07 00:07:37,370 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:07:37,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346353422] [2021-12-07 00:07:37,370 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [346353422] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:07:37,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2076196649] [2021-12-07 00:07:37,370 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-07 00:07:37,370 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:37,370 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:07:37,371 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:07:37,372 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2021-12-07 00:07:38,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:07:38,069 INFO L263 TraceCheckSpWp]: Trace formula consists of 5588 conjuncts, 40 conjunts are in the unsatisfiable core [2021-12-07 00:07:38,080 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:07:39,983 INFO L134 CoverageAnalysis]: Checked inductivity of 300533 backedges. 219473 proven. 16576 refuted. 0 times theorem prover too weak. 64484 trivial. 0 not checked. [2021-12-07 00:07:39,983 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:07:41,350 INFO L134 CoverageAnalysis]: Checked inductivity of 300533 backedges. 219473 proven. 16576 refuted. 0 times theorem prover too weak. 64484 trivial. 0 not checked. [2021-12-07 00:07:41,351 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2076196649] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:07:41,351 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:07:41,352 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 39, 39] total 77 [2021-12-07 00:07:41,352 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855017883] [2021-12-07 00:07:41,352 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:07:41,354 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 77 states [2021-12-07 00:07:41,354 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:07:41,355 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2021-12-07 00:07:41,355 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1010, Invalid=4842, Unknown=0, NotChecked=0, Total=5852 [2021-12-07 00:07:41,355 INFO L87 Difference]: Start difference. First operand 2858 states and 2908 transitions. Second operand has 77 states, 77 states have (on average 6.6103896103896105) internal successors, (509), 77 states have internal predecessors, (509), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:48,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:07:48,922 INFO L93 Difference]: Finished difference Result 2965 states and 3011 transitions. [2021-12-07 00:07:48,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 211 states. [2021-12-07 00:07:48,922 INFO L78 Accepts]: Start accepts. Automaton has has 77 states, 77 states have (on average 6.6103896103896105) internal successors, (509), 77 states have internal predecessors, (509), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1872 [2021-12-07 00:07:48,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:07:48,932 INFO L225 Difference]: With dead ends: 2965 [2021-12-07 00:07:48,932 INFO L226 Difference]: Without dead ends: 2965 [2021-12-07 00:07:48,935 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3992 GetRequests, 3709 SyntacticMatches, 0 SemanticMatches, 283 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22761 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=13907, Invalid=67033, Unknown=0, NotChecked=0, Total=80940 [2021-12-07 00:07:48,936 INFO L933 BasicCegarLoop]: 38 mSDtfsCounter, 259 mSDsluCounter, 453 mSDsCounter, 0 mSdLazyCounter, 12794 mSolverCounterSat, 66 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 259 SdHoareTripleChecker+Valid, 491 SdHoareTripleChecker+Invalid, 12860 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 66 IncrementalHoareTripleChecker+Valid, 12794 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:07:48,936 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [259 Valid, 491 Invalid, 12860 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [66 Valid, 12794 Invalid, 0 Unknown, 0 Unchecked, 3.0s Time] [2021-12-07 00:07:48,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2965 states. [2021-12-07 00:07:48,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2965 to 2955. [2021-12-07 00:07:48,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2955 states, 2954 states have (on average 1.0159106296547056) internal successors, (3001), 2954 states have internal predecessors, (3001), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:48,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2955 states to 2955 states and 3001 transitions. [2021-12-07 00:07:48,961 INFO L78 Accepts]: Start accepts. Automaton has 2955 states and 3001 transitions. Word has length 1872 [2021-12-07 00:07:48,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:07:48,962 INFO L470 AbstractCegarLoop]: Abstraction has 2955 states and 3001 transitions. [2021-12-07 00:07:48,962 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 77 states, 77 states have (on average 6.6103896103896105) internal successors, (509), 77 states have internal predecessors, (509), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:48,962 INFO L276 IsEmpty]: Start isEmpty. Operand 2955 states and 3001 transitions. [2021-12-07 00:07:48,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1883 [2021-12-07 00:07:48,995 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:07:48,995 INFO L514 BasicCegarLoop]: trace histogram [344, 344, 343, 343, 343, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1] [2021-12-07 00:07:49,021 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2021-12-07 00:07:49,196 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:49,196 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:07:49,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:07:49,198 INFO L85 PathProgramCache]: Analyzing trace with hash 1136406914, now seen corresponding path program 20 times [2021-12-07 00:07:49,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:07:49,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138090221] [2021-12-07 00:07:49,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:07:49,198 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:07:49,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:07:50,686 INFO L134 CoverageAnalysis]: Checked inductivity of 304000 backedges. 230282 proven. 21589 refuted. 0 times theorem prover too weak. 52129 trivial. 0 not checked. [2021-12-07 00:07:50,686 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:07:50,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138090221] [2021-12-07 00:07:50,686 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [138090221] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:07:50,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693258214] [2021-12-07 00:07:50,686 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:07:50,686 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:50,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:07:50,687 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:07:50,687 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2021-12-07 00:07:51,355 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:07:51,355 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:07:51,373 INFO L263 TraceCheckSpWp]: Trace formula consists of 5616 conjuncts, 42 conjunts are in the unsatisfiable core [2021-12-07 00:07:51,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:07:52,989 INFO L134 CoverageAnalysis]: Checked inductivity of 304000 backedges. 232493 proven. 19378 refuted. 0 times theorem prover too weak. 52129 trivial. 0 not checked. [2021-12-07 00:07:52,989 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:07:54,363 INFO L134 CoverageAnalysis]: Checked inductivity of 304000 backedges. 232493 proven. 19378 refuted. 0 times theorem prover too weak. 52129 trivial. 0 not checked. [2021-12-07 00:07:54,364 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [693258214] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:07:54,364 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:07:54,365 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41] total 63 [2021-12-07 00:07:54,365 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1028887791] [2021-12-07 00:07:54,365 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:07:54,367 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2021-12-07 00:07:54,367 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:07:54,368 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2021-12-07 00:07:54,368 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=925, Invalid=2981, Unknown=0, NotChecked=0, Total=3906 [2021-12-07 00:07:54,368 INFO L87 Difference]: Start difference. First operand 2955 states and 3001 transitions. Second operand has 63 states, 63 states have (on average 7.0476190476190474) internal successors, (444), 63 states have internal predecessors, (444), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:57,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:07:57,967 INFO L93 Difference]: Finished difference Result 2955 states and 3000 transitions. [2021-12-07 00:07:57,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 231 states. [2021-12-07 00:07:57,967 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 7.0476190476190474) internal successors, (444), 63 states have internal predecessors, (444), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1882 [2021-12-07 00:07:57,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:07:57,977 INFO L225 Difference]: With dead ends: 2955 [2021-12-07 00:07:57,977 INFO L226 Difference]: Without dead ends: 2955 [2021-12-07 00:07:57,981 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4013 GetRequests, 3742 SyntacticMatches, 0 SemanticMatches, 271 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25234 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=21169, Invalid=53087, Unknown=0, NotChecked=0, Total=74256 [2021-12-07 00:07:57,981 INFO L933 BasicCegarLoop]: 78 mSDtfsCounter, 195 mSDsluCounter, 547 mSDsCounter, 0 mSdLazyCounter, 2755 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 625 SdHoareTripleChecker+Invalid, 2803 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 2755 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2021-12-07 00:07:57,981 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [195 Valid, 625 Invalid, 2803 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 2755 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2021-12-07 00:07:57,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2955 states. [2021-12-07 00:07:58,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2955 to 2955. [2021-12-07 00:07:58,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2955 states, 2954 states have (on average 1.015572105619499) internal successors, (3000), 2954 states have internal predecessors, (3000), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:58,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2955 states to 2955 states and 3000 transitions. [2021-12-07 00:07:58,008 INFO L78 Accepts]: Start accepts. Automaton has 2955 states and 3000 transitions. Word has length 1882 [2021-12-07 00:07:58,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:07:58,008 INFO L470 AbstractCegarLoop]: Abstraction has 2955 states and 3000 transitions. [2021-12-07 00:07:58,008 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 7.0476190476190474) internal successors, (444), 63 states have internal predecessors, (444), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:07:58,009 INFO L276 IsEmpty]: Start isEmpty. Operand 2955 states and 3000 transitions. [2021-12-07 00:07:58,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1888 [2021-12-07 00:07:58,030 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:07:58,030 INFO L514 BasicCegarLoop]: trace histogram [345, 345, 344, 344, 344, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1] [2021-12-07 00:07:58,056 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2021-12-07 00:07:58,231 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2021-12-07 00:07:58,232 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:07:58,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:07:58,234 INFO L85 PathProgramCache]: Analyzing trace with hash -87602005, now seen corresponding path program 21 times [2021-12-07 00:07:58,234 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:07:58,235 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823698429] [2021-12-07 00:07:58,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:07:58,235 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:07:58,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:07:59,530 INFO L134 CoverageAnalysis]: Checked inductivity of 305741 backedges. 119020 proven. 158286 refuted. 0 times theorem prover too weak. 28435 trivial. 0 not checked. [2021-12-07 00:07:59,530 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:07:59,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823698429] [2021-12-07 00:07:59,531 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1823698429] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:07:59,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1900381920] [2021-12-07 00:07:59,531 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:07:59,531 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:07:59,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:07:59,532 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:07:59,532 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-12-07 00:08:06,655 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 37 check-sat command(s) [2021-12-07 00:08:06,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:08:06,683 INFO L263 TraceCheckSpWp]: Trace formula consists of 3078 conjuncts, 58 conjunts are in the unsatisfiable core [2021-12-07 00:08:06,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:08:09,415 INFO L134 CoverageAnalysis]: Checked inductivity of 305741 backedges. 154133 proven. 51535 refuted. 0 times theorem prover too weak. 100073 trivial. 0 not checked. [2021-12-07 00:08:09,415 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:08:11,467 INFO L134 CoverageAnalysis]: Checked inductivity of 305741 backedges. 153216 proven. 52452 refuted. 0 times theorem prover too weak. 100073 trivial. 0 not checked. [2021-12-07 00:08:11,467 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1900381920] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:08:11,467 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:08:11,468 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 56, 56] total 122 [2021-12-07 00:08:11,468 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815555395] [2021-12-07 00:08:11,468 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:08:11,471 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 122 states [2021-12-07 00:08:11,471 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:08:11,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2021-12-07 00:08:11,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2595, Invalid=12167, Unknown=0, NotChecked=0, Total=14762 [2021-12-07 00:08:11,472 INFO L87 Difference]: Start difference. First operand 2955 states and 3000 transitions. Second operand has 122 states, 122 states have (on average 6.319672131147541) internal successors, (771), 122 states have internal predecessors, (771), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:08:20,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:08:20,942 INFO L93 Difference]: Finished difference Result 2452 states and 2496 transitions. [2021-12-07 00:08:20,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 420 states. [2021-12-07 00:08:20,942 INFO L78 Accepts]: Start accepts. Automaton has has 122 states, 122 states have (on average 6.319672131147541) internal successors, (771), 122 states have internal predecessors, (771), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 1887 [2021-12-07 00:08:20,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:08:20,953 INFO L225 Difference]: With dead ends: 2452 [2021-12-07 00:08:20,953 INFO L226 Difference]: Without dead ends: 2452 [2021-12-07 00:08:20,962 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4212 GetRequests, 3697 SyntacticMatches, 2 SemanticMatches, 513 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92174 ImplicationChecksByTransitivity, 9.1s TimeCoverageRelationStatistics Valid=32835, Invalid=231875, Unknown=0, NotChecked=0, Total=264710 [2021-12-07 00:08:20,962 INFO L933 BasicCegarLoop]: 51 mSDtfsCounter, 4663 mSDsluCounter, 574 mSDsCounter, 0 mSdLazyCounter, 6325 mSolverCounterSat, 1625 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4663 SdHoareTripleChecker+Valid, 625 SdHoareTripleChecker+Invalid, 7950 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1625 IncrementalHoareTripleChecker+Valid, 6325 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2021-12-07 00:08:20,962 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [4663 Valid, 625 Invalid, 7950 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1625 Valid, 6325 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2021-12-07 00:08:20,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2452 states. [2021-12-07 00:08:20,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2452 to 2386. [2021-12-07 00:08:20,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2386 states, 2385 states have (on average 1.0188679245283019) internal successors, (2430), 2385 states have internal predecessors, (2430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:08:20,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2386 states to 2386 states and 2430 transitions. [2021-12-07 00:08:20,979 INFO L78 Accepts]: Start accepts. Automaton has 2386 states and 2430 transitions. Word has length 1887 [2021-12-07 00:08:20,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:08:20,981 INFO L470 AbstractCegarLoop]: Abstraction has 2386 states and 2430 transitions. [2021-12-07 00:08:20,981 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 122 states, 122 states have (on average 6.319672131147541) internal successors, (771), 122 states have internal predecessors, (771), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:08:20,981 INFO L276 IsEmpty]: Start isEmpty. Operand 2386 states and 2430 transitions. [2021-12-07 00:08:21,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2224 [2021-12-07 00:08:21,008 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:08:21,009 INFO L514 BasicCegarLoop]: trace histogram [408, 408, 407, 407, 407, 27, 26, 26, 26, 26, 26, 26, 1, 1, 1] [2021-12-07 00:08:21,036 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Ended with exit code 0 [2021-12-07 00:08:21,209 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:08:21,210 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:08:21,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:08:21,213 INFO L85 PathProgramCache]: Analyzing trace with hash 2119682071, now seen corresponding path program 22 times [2021-12-07 00:08:21,213 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:08:21,213 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286725640] [2021-12-07 00:08:21,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:08:21,214 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:08:21,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:08:22,870 INFO L134 CoverageAnalysis]: Checked inductivity of 427235 backedges. 227151 proven. 3516 refuted. 0 times theorem prover too weak. 196568 trivial. 0 not checked. [2021-12-07 00:08:22,870 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:08:22,870 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286725640] [2021-12-07 00:08:22,871 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [286725640] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:08:22,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1542529345] [2021-12-07 00:08:22,871 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-07 00:08:22,871 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:08:22,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:08:22,871 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:08:22,872 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2021-12-07 00:08:36,801 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-07 00:08:36,801 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:08:36,862 INFO L263 TraceCheckSpWp]: Trace formula consists of 6611 conjuncts, 63 conjunts are in the unsatisfiable core [2021-12-07 00:08:36,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:08:40,428 INFO L134 CoverageAnalysis]: Checked inductivity of 427235 backedges. 3326 proven. 407204 refuted. 0 times theorem prover too weak. 16705 trivial. 0 not checked. [2021-12-07 00:08:40,428 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:08:43,339 INFO L134 CoverageAnalysis]: Checked inductivity of 427235 backedges. 3326 proven. 407204 refuted. 0 times theorem prover too weak. 16705 trivial. 0 not checked. [2021-12-07 00:08:43,339 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1542529345] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:08:43,339 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:08:43,340 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 62, 62] total 144 [2021-12-07 00:08:43,341 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634576895] [2021-12-07 00:08:43,341 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:08:43,343 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 144 states [2021-12-07 00:08:43,343 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:08:43,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2021-12-07 00:08:43,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2911, Invalid=17681, Unknown=0, NotChecked=0, Total=20592 [2021-12-07 00:08:43,345 INFO L87 Difference]: Start difference. First operand 2386 states and 2430 transitions. Second operand has 144 states, 144 states have (on average 6.472222222222222) internal successors, (932), 144 states have internal predecessors, (932), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:14,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:09:14,452 INFO L93 Difference]: Finished difference Result 5599 states and 5778 transitions. [2021-12-07 00:09:14,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 918 states. [2021-12-07 00:09:14,452 INFO L78 Accepts]: Start accepts. Automaton has has 144 states, 144 states have (on average 6.472222222222222) internal successors, (932), 144 states have internal predecessors, (932), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2223 [2021-12-07 00:09:14,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:09:14,462 INFO L225 Difference]: With dead ends: 5599 [2021-12-07 00:09:14,462 INFO L226 Difference]: Without dead ends: 5599 [2021-12-07 00:09:14,509 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 5407 GetRequests, 4349 SyntacticMatches, 1 SemanticMatches, 1057 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 476662 ImplicationChecksByTransitivity, 28.6s TimeCoverageRelationStatistics Valid=96848, Invalid=1023574, Unknown=0, NotChecked=0, Total=1120422 [2021-12-07 00:09:14,509 INFO L933 BasicCegarLoop]: 56 mSDtfsCounter, 5526 mSDsluCounter, 1007 mSDsCounter, 0 mSdLazyCounter, 12251 mSolverCounterSat, 1680 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5526 SdHoareTripleChecker+Valid, 1063 SdHoareTripleChecker+Invalid, 13931 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1680 IncrementalHoareTripleChecker+Valid, 12251 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.8s IncrementalHoareTripleChecker+Time [2021-12-07 00:09:14,509 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5526 Valid, 1063 Invalid, 13931 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1680 Valid, 12251 Invalid, 0 Unknown, 0 Unchecked, 3.8s Time] [2021-12-07 00:09:14,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5599 states. [2021-12-07 00:09:14,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5599 to 3946. [2021-12-07 00:09:14,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3946 states, 3945 states have (on average 1.02915082382763) internal successors, (4060), 3945 states have internal predecessors, (4060), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:14,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3946 states to 3946 states and 4060 transitions. [2021-12-07 00:09:14,583 INFO L78 Accepts]: Start accepts. Automaton has 3946 states and 4060 transitions. Word has length 2223 [2021-12-07 00:09:14,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:09:14,584 INFO L470 AbstractCegarLoop]: Abstraction has 3946 states and 4060 transitions. [2021-12-07 00:09:14,585 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 144 states, 144 states have (on average 6.472222222222222) internal successors, (932), 144 states have internal predecessors, (932), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:14,585 INFO L276 IsEmpty]: Start isEmpty. Operand 3946 states and 4060 transitions. [2021-12-07 00:09:14,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2824 [2021-12-07 00:09:14,672 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:09:14,673 INFO L514 BasicCegarLoop]: trace histogram [521, 521, 520, 520, 520, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:09:14,711 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Ended with exit code 0 [2021-12-07 00:09:14,873 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:09:14,874 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:09:14,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:09:14,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1414733781, now seen corresponding path program 23 times [2021-12-07 00:09:14,878 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:09:14,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470394664] [2021-12-07 00:09:14,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:09:14,879 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:09:15,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:09:17,355 INFO L134 CoverageAnalysis]: Checked inductivity of 695697 backedges. 320499 proven. 3849 refuted. 0 times theorem prover too weak. 371349 trivial. 0 not checked. [2021-12-07 00:09:17,355 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:09:17,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470394664] [2021-12-07 00:09:17,355 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1470394664] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:09:17,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [321957680] [2021-12-07 00:09:17,355 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-07 00:09:17,356 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:09:17,356 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:09:17,356 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:09:17,357 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2021-12-07 00:09:31,355 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 76 check-sat command(s) [2021-12-07 00:09:31,355 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:09:31,400 INFO L263 TraceCheckSpWp]: Trace formula consists of 5282 conjuncts, 52 conjunts are in the unsatisfiable core [2021-12-07 00:09:31,419 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:09:34,206 INFO L134 CoverageAnalysis]: Checked inductivity of 695697 backedges. 498146 proven. 34140 refuted. 0 times theorem prover too weak. 163411 trivial. 0 not checked. [2021-12-07 00:09:34,206 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:09:36,407 INFO L134 CoverageAnalysis]: Checked inductivity of 695697 backedges. 504291 proven. 27995 refuted. 0 times theorem prover too weak. 163411 trivial. 0 not checked. [2021-12-07 00:09:36,408 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [321957680] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:09:36,408 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:09:36,410 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50, 50] total 103 [2021-12-07 00:09:36,410 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388993553] [2021-12-07 00:09:36,410 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:09:36,411 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 103 states [2021-12-07 00:09:36,411 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:09:36,412 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2021-12-07 00:09:36,412 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1719, Invalid=8787, Unknown=0, NotChecked=0, Total=10506 [2021-12-07 00:09:36,412 INFO L87 Difference]: Start difference. First operand 3946 states and 4060 transitions. Second operand has 103 states, 103 states have (on average 6.019417475728155) internal successors, (620), 103 states have internal predecessors, (620), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:50,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:09:50,264 INFO L93 Difference]: Finished difference Result 3946 states and 4043 transitions. [2021-12-07 00:09:50,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 295 states. [2021-12-07 00:09:50,265 INFO L78 Accepts]: Start accepts. Automaton has has 103 states, 103 states have (on average 6.019417475728155) internal successors, (620), 103 states have internal predecessors, (620), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2823 [2021-12-07 00:09:50,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:09:50,269 INFO L225 Difference]: With dead ends: 3946 [2021-12-07 00:09:50,269 INFO L226 Difference]: Without dead ends: 3946 [2021-12-07 00:09:50,275 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 5981 GetRequests, 5593 SyntacticMatches, 0 SemanticMatches, 388 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42832 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=27312, Invalid=124398, Unknown=0, NotChecked=0, Total=151710 [2021-12-07 00:09:50,275 INFO L933 BasicCegarLoop]: 47 mSDtfsCounter, 394 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 20546 mSolverCounterSat, 96 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 394 SdHoareTripleChecker+Valid, 415 SdHoareTripleChecker+Invalid, 20642 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 96 IncrementalHoareTripleChecker+Valid, 20546 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2021-12-07 00:09:50,276 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [394 Valid, 415 Invalid, 20642 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [96 Valid, 20546 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2021-12-07 00:09:50,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3946 states. [2021-12-07 00:09:50,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3946 to 3946. [2021-12-07 00:09:50,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3946 states, 3945 states have (on average 1.0248415716096324) internal successors, (4043), 3945 states have internal predecessors, (4043), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:50,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3946 states to 3946 states and 4043 transitions. [2021-12-07 00:09:50,299 INFO L78 Accepts]: Start accepts. Automaton has 3946 states and 4043 transitions. Word has length 2823 [2021-12-07 00:09:50,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:09:50,300 INFO L470 AbstractCegarLoop]: Abstraction has 3946 states and 4043 transitions. [2021-12-07 00:09:50,300 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 103 states, 103 states have (on average 6.019417475728155) internal successors, (620), 103 states have internal predecessors, (620), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:09:50,300 INFO L276 IsEmpty]: Start isEmpty. Operand 3946 states and 4043 transitions. [2021-12-07 00:09:50,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2859 [2021-12-07 00:09:50,344 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:09:50,345 INFO L514 BasicCegarLoop]: trace histogram [528, 528, 527, 527, 527, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:09:50,378 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Ended with exit code 0 [2021-12-07 00:09:50,546 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2021-12-07 00:09:50,546 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:09:50,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:09:50,549 INFO L85 PathProgramCache]: Analyzing trace with hash -187793902, now seen corresponding path program 24 times [2021-12-07 00:09:50,549 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:09:50,550 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527660794] [2021-12-07 00:09:50,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:09:50,551 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:09:51,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:09:52,711 INFO L134 CoverageAnalysis]: Checked inductivity of 714240 backedges. 329464 proven. 4197 refuted. 0 times theorem prover too weak. 380579 trivial. 0 not checked. [2021-12-07 00:09:52,711 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:09:52,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527660794] [2021-12-07 00:09:52,711 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [527660794] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:09:52,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1856393696] [2021-12-07 00:09:52,711 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-07 00:09:52,712 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:09:52,712 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:09:52,713 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:09:52,717 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2021-12-07 00:10:37,960 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 77 check-sat command(s) [2021-12-07 00:10:37,960 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:10:38,046 INFO L263 TraceCheckSpWp]: Trace formula consists of 5401 conjuncts, 83 conjunts are in the unsatisfiable core [2021-12-07 00:10:38,065 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:10:42,895 INFO L134 CoverageAnalysis]: Checked inductivity of 714240 backedges. 144380 proven. 84053 refuted. 0 times theorem prover too weak. 485807 trivial. 0 not checked. [2021-12-07 00:10:42,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:10:46,659 INFO L134 CoverageAnalysis]: Checked inductivity of 714240 backedges. 211956 proven. 5457 refuted. 0 times theorem prover too weak. 496827 trivial. 0 not checked. [2021-12-07 00:10:46,659 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1856393696] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:10:46,659 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:10:46,661 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 68, 62] total 177 [2021-12-07 00:10:46,661 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725016497] [2021-12-07 00:10:46,661 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:10:46,662 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 177 states [2021-12-07 00:10:46,662 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:10:46,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 177 interpolants. [2021-12-07 00:10:46,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4057, Invalid=27095, Unknown=0, NotChecked=0, Total=31152 [2021-12-07 00:10:46,664 INFO L87 Difference]: Start difference. First operand 3946 states and 4043 transitions. Second operand has 177 states, 177 states have (on average 4.988700564971752) internal successors, (883), 177 states have internal predecessors, (883), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:10:58,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:10:58,597 INFO L93 Difference]: Finished difference Result 6767 states and 6894 transitions. [2021-12-07 00:10:58,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 272 states. [2021-12-07 00:10:58,597 INFO L78 Accepts]: Start accepts. Automaton has has 177 states, 177 states have (on average 4.988700564971752) internal successors, (883), 177 states have internal predecessors, (883), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2858 [2021-12-07 00:10:58,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:10:58,604 INFO L225 Difference]: With dead ends: 6767 [2021-12-07 00:10:58,604 INFO L226 Difference]: Without dead ends: 6767 [2021-12-07 00:10:58,613 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6035 GetRequests, 5591 SyntacticMatches, 0 SemanticMatches, 444 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59785 ImplicationChecksByTransitivity, 12.8s TimeCoverageRelationStatistics Valid=28881, Invalid=169589, Unknown=0, NotChecked=0, Total=198470 [2021-12-07 00:10:58,614 INFO L933 BasicCegarLoop]: 52 mSDtfsCounter, 5416 mSDsluCounter, 1104 mSDsCounter, 0 mSdLazyCounter, 10337 mSolverCounterSat, 1468 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5416 SdHoareTripleChecker+Valid, 1156 SdHoareTripleChecker+Invalid, 11805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1468 IncrementalHoareTripleChecker+Valid, 10337 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2021-12-07 00:10:58,614 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5416 Valid, 1156 Invalid, 11805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1468 Valid, 10337 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2021-12-07 00:10:58,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6767 states. [2021-12-07 00:10:58,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6767 to 4566. [2021-12-07 00:10:58,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4566 states, 4565 states have (on average 1.0175246440306682) internal successors, (4645), 4565 states have internal predecessors, (4645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:10:58,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4566 states to 4566 states and 4645 transitions. [2021-12-07 00:10:58,647 INFO L78 Accepts]: Start accepts. Automaton has 4566 states and 4645 transitions. Word has length 2858 [2021-12-07 00:10:58,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:10:58,647 INFO L470 AbstractCegarLoop]: Abstraction has 4566 states and 4645 transitions. [2021-12-07 00:10:58,648 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 177 states, 177 states have (on average 4.988700564971752) internal successors, (883), 177 states have internal predecessors, (883), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:10:58,648 INFO L276 IsEmpty]: Start isEmpty. Operand 4566 states and 4645 transitions. [2021-12-07 00:10:58,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2939 [2021-12-07 00:10:58,695 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:10:58,696 INFO L514 BasicCegarLoop]: trace histogram [544, 544, 543, 543, 543, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:10:58,732 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Ended with exit code 0 [2021-12-07 00:10:58,896 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46,40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:10:58,897 INFO L402 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:10:58,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:10:58,899 INFO L85 PathProgramCache]: Analyzing trace with hash 1792437434, now seen corresponding path program 25 times [2021-12-07 00:10:58,900 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:10:58,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824279814] [2021-12-07 00:10:58,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:10:58,901 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:10:59,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:11:01,811 INFO L134 CoverageAnalysis]: Checked inductivity of 757544 backedges. 402844 proven. 17748 refuted. 0 times theorem prover too weak. 336952 trivial. 0 not checked. [2021-12-07 00:11:01,811 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:11:01,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824279814] [2021-12-07 00:11:01,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824279814] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:11:01,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2037839519] [2021-12-07 00:11:01,811 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-07 00:11:01,811 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:11:01,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:11:01,812 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:11:01,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2021-12-07 00:11:02,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:11:02,864 INFO L263 TraceCheckSpWp]: Trace formula consists of 8680 conjuncts, 52 conjunts are in the unsatisfiable core [2021-12-07 00:11:02,883 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:11:05,811 INFO L134 CoverageAnalysis]: Checked inductivity of 757544 backedges. 584741 proven. 38158 refuted. 0 times theorem prover too weak. 134645 trivial. 0 not checked. [2021-12-07 00:11:05,811 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:11:07,998 INFO L134 CoverageAnalysis]: Checked inductivity of 757544 backedges. 584741 proven. 38158 refuted. 0 times theorem prover too weak. 134645 trivial. 0 not checked. [2021-12-07 00:11:07,998 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2037839519] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:11:07,998 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:11:08,000 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 51, 51] total 104 [2021-12-07 00:11:08,000 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [308945389] [2021-12-07 00:11:08,000 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:11:08,001 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 104 states [2021-12-07 00:11:08,001 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:11:08,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2021-12-07 00:11:08,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1784, Invalid=8928, Unknown=0, NotChecked=0, Total=10712 [2021-12-07 00:11:08,002 INFO L87 Difference]: Start difference. First operand 4566 states and 4645 transitions. Second operand has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:11:29,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:11:29,678 INFO L93 Difference]: Finished difference Result 3348 states and 3379 transitions. [2021-12-07 00:11:29,678 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 406 states. [2021-12-07 00:11:29,678 INFO L78 Accepts]: Start accepts. Automaton has has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2938 [2021-12-07 00:11:29,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:11:29,682 INFO L225 Difference]: With dead ends: 3348 [2021-12-07 00:11:29,682 INFO L226 Difference]: Without dead ends: 3348 [2021-12-07 00:11:29,692 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6335 GetRequests, 5830 SyntacticMatches, 0 SemanticMatches, 505 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73581 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=44694, Invalid=211848, Unknown=0, NotChecked=0, Total=256542 [2021-12-07 00:11:29,692 INFO L933 BasicCegarLoop]: 54 mSDtfsCounter, 348 mSDsluCounter, 717 mSDsCounter, 0 mSdLazyCounter, 27249 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 348 SdHoareTripleChecker+Valid, 771 SdHoareTripleChecker+Invalid, 27332 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 27249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.4s IncrementalHoareTripleChecker+Time [2021-12-07 00:11:29,692 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [348 Valid, 771 Invalid, 27332 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 27249 Invalid, 0 Unknown, 0 Unchecked, 6.4s Time] [2021-12-07 00:11:29,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3348 states. [2021-12-07 00:11:29,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3348 to 3348. [2021-12-07 00:11:29,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3348 states, 3347 states have (on average 1.00956080071706) internal successors, (3379), 3347 states have internal predecessors, (3379), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:11:29,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3348 states to 3348 states and 3379 transitions. [2021-12-07 00:11:29,712 INFO L78 Accepts]: Start accepts. Automaton has 3348 states and 3379 transitions. Word has length 2938 [2021-12-07 00:11:29,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:11:29,713 INFO L470 AbstractCegarLoop]: Abstraction has 3348 states and 3379 transitions. [2021-12-07 00:11:29,713 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:11:29,713 INFO L276 IsEmpty]: Start isEmpty. Operand 3348 states and 3379 transitions. [2021-12-07 00:11:29,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2989 [2021-12-07 00:11:29,760 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:11:29,761 INFO L514 BasicCegarLoop]: trace histogram [554, 554, 553, 553, 553, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:11:29,791 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Ended with exit code 0 [2021-12-07 00:11:29,962 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2021-12-07 00:11:29,962 INFO L402 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:11:29,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:11:29,963 INFO L85 PathProgramCache]: Analyzing trace with hash -956534366, now seen corresponding path program 26 times [2021-12-07 00:11:29,963 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:11:29,963 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610536567] [2021-12-07 00:11:29,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:11:29,964 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:11:30,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:11:32,398 INFO L134 CoverageAnalysis]: Checked inductivity of 785259 backedges. 336277 proven. 5739 refuted. 0 times theorem prover too weak. 443243 trivial. 0 not checked. [2021-12-07 00:11:32,398 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:11:32,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610536567] [2021-12-07 00:11:32,399 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610536567] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:11:32,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1494292582] [2021-12-07 00:11:32,399 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-07 00:11:32,399 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:11:32,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:11:32,400 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:11:32,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-12-07 00:11:33,502 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-07 00:11:33,502 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:11:33,535 INFO L263 TraceCheckSpWp]: Trace formula consists of 8820 conjuncts, 58 conjunts are in the unsatisfiable core [2021-12-07 00:11:33,556 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:11:36,945 INFO L134 CoverageAnalysis]: Checked inductivity of 785259 backedges. 658477 proven. 53782 refuted. 0 times theorem prover too weak. 73000 trivial. 0 not checked. [2021-12-07 00:11:36,945 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:11:39,500 INFO L134 CoverageAnalysis]: Checked inductivity of 785259 backedges. 658477 proven. 53782 refuted. 0 times theorem prover too weak. 73000 trivial. 0 not checked. [2021-12-07 00:11:39,500 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1494292582] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:11:39,501 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:11:39,502 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 57, 57] total 113 [2021-12-07 00:11:39,503 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249379909] [2021-12-07 00:11:39,503 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:11:39,504 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 113 states [2021-12-07 00:11:39,504 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:11:39,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2021-12-07 00:11:39,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=10539, Unknown=0, NotChecked=0, Total=12656 [2021-12-07 00:11:39,505 INFO L87 Difference]: Start difference. First operand 3348 states and 3379 transitions. Second operand has 113 states, 113 states have (on average 6.654867256637168) internal successors, (752), 113 states have internal predecessors, (752), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:03,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:12:03,970 INFO L93 Difference]: Finished difference Result 3348 states and 3371 transitions. [2021-12-07 00:12:03,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 436 states. [2021-12-07 00:12:03,971 INFO L78 Accepts]: Start accepts. Automaton has has 113 states, 113 states have (on average 6.654867256637168) internal successors, (752), 113 states have internal predecessors, (752), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 2988 [2021-12-07 00:12:03,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:12:03,976 INFO L225 Difference]: With dead ends: 3348 [2021-12-07 00:12:03,976 INFO L226 Difference]: Without dead ends: 3348 [2021-12-07 00:12:03,987 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6467 GetRequests, 5923 SyntacticMatches, 0 SemanticMatches, 544 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86799 ImplicationChecksByTransitivity, 15.9s TimeCoverageRelationStatistics Valid=50336, Invalid=247234, Unknown=0, NotChecked=0, Total=297570 [2021-12-07 00:12:03,987 INFO L933 BasicCegarLoop]: 56 mSDtfsCounter, 378 mSDsluCounter, 571 mSDsCounter, 0 mSdLazyCounter, 30839 mSolverCounterSat, 87 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 378 SdHoareTripleChecker+Valid, 627 SdHoareTripleChecker+Invalid, 30926 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 87 IncrementalHoareTripleChecker+Valid, 30839 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.2s IncrementalHoareTripleChecker+Time [2021-12-07 00:12:03,987 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [378 Valid, 627 Invalid, 30926 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [87 Valid, 30839 Invalid, 0 Unknown, 0 Unchecked, 7.2s Time] [2021-12-07 00:12:03,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3348 states. [2021-12-07 00:12:04,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3348 to 3348. [2021-12-07 00:12:04,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3348 states, 3347 states have (on average 1.007170600537795) internal successors, (3371), 3347 states have internal predecessors, (3371), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:04,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3348 states to 3348 states and 3371 transitions. [2021-12-07 00:12:04,007 INFO L78 Accepts]: Start accepts. Automaton has 3348 states and 3371 transitions. Word has length 2988 [2021-12-07 00:12:04,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:12:04,009 INFO L470 AbstractCegarLoop]: Abstraction has 3348 states and 3371 transitions. [2021-12-07 00:12:04,009 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 113 states, 113 states have (on average 6.654867256637168) internal successors, (752), 113 states have internal predecessors, (752), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:04,009 INFO L276 IsEmpty]: Start isEmpty. Operand 3348 states and 3371 transitions. [2021-12-07 00:12:04,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3004 [2021-12-07 00:12:04,057 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:12:04,058 INFO L514 BasicCegarLoop]: trace histogram [557, 557, 556, 556, 556, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:12:04,088 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Ended with exit code 0 [2021-12-07 00:12:04,259 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48 [2021-12-07 00:12:04,259 INFO L402 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:12:04,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:12:04,260 INFO L85 PathProgramCache]: Analyzing trace with hash 514535459, now seen corresponding path program 27 times [2021-12-07 00:12:04,260 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:12:04,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774675016] [2021-12-07 00:12:04,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:12:04,260 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:12:04,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-07 00:12:06,718 INFO L134 CoverageAnalysis]: Checked inductivity of 793671 backedges. 342219 proven. 6162 refuted. 0 times theorem prover too weak. 445290 trivial. 0 not checked. [2021-12-07 00:12:06,718 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-07 00:12:06,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774675016] [2021-12-07 00:12:06,719 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [774675016] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-07 00:12:06,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1073611427] [2021-12-07 00:12:06,719 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-07 00:12:06,719 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-07 00:12:06,719 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 [2021-12-07 00:12:06,719 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-07 00:12:06,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-12-07 00:12:17,108 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 43 check-sat command(s) [2021-12-07 00:12:17,108 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-07 00:12:17,143 INFO L263 TraceCheckSpWp]: Trace formula consists of 4078 conjuncts, 98 conjunts are in the unsatisfiable core [2021-12-07 00:12:17,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-07 00:12:22,558 INFO L134 CoverageAnalysis]: Checked inductivity of 793671 backedges. 65809 proven. 240707 refuted. 0 times theorem prover too weak. 487155 trivial. 0 not checked. [2021-12-07 00:12:22,558 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-07 00:12:27,110 INFO L134 CoverageAnalysis]: Checked inductivity of 793671 backedges. 275826 proven. 31515 refuted. 0 times theorem prover too weak. 486330 trivial. 0 not checked. [2021-12-07 00:12:27,111 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1073611427] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-07 00:12:27,111 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-07 00:12:27,113 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 73, 77] total 204 [2021-12-07 00:12:27,113 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040905978] [2021-12-07 00:12:27,113 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-07 00:12:27,114 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 204 states [2021-12-07 00:12:27,114 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-07 00:12:27,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 204 interpolants. [2021-12-07 00:12:27,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5596, Invalid=35816, Unknown=0, NotChecked=0, Total=41412 [2021-12-07 00:12:27,118 INFO L87 Difference]: Start difference. First operand 3348 states and 3371 transitions. Second operand has 204 states, 204 states have (on average 5.0) internal successors, (1020), 204 states have internal predecessors, (1020), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:41,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-07 00:12:41,991 INFO L93 Difference]: Finished difference Result 3851 states and 3872 transitions. [2021-12-07 00:12:41,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 314 states. [2021-12-07 00:12:41,992 INFO L78 Accepts]: Start accepts. Automaton has has 204 states, 204 states have (on average 5.0) internal successors, (1020), 204 states have internal predecessors, (1020), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3003 [2021-12-07 00:12:41,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-07 00:12:41,996 INFO L225 Difference]: With dead ends: 3851 [2021-12-07 00:12:41,996 INFO L226 Difference]: Without dead ends: 3851 [2021-12-07 00:12:42,008 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6377 GetRequests, 5864 SyntacticMatches, 0 SemanticMatches, 513 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79220 ImplicationChecksByTransitivity, 15.9s TimeCoverageRelationStatistics Valid=40232, Invalid=224478, Unknown=0, NotChecked=0, Total=264710 [2021-12-07 00:12:42,008 INFO L933 BasicCegarLoop]: 62 mSDtfsCounter, 6717 mSDsluCounter, 1007 mSDsCounter, 0 mSdLazyCounter, 12734 mSolverCounterSat, 1909 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6717 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 14643 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1909 IncrementalHoareTripleChecker+Valid, 12734 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2021-12-07 00:12:42,008 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [6717 Valid, 1069 Invalid, 14643 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1909 Valid, 12734 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2021-12-07 00:12:42,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3851 states. [2021-12-07 00:12:42,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3851 to 3186. [2021-12-07 00:12:42,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3186 states, 3185 states have (on average 1.0047095761381475) internal successors, (3200), 3185 states have internal predecessors, (3200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:42,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3186 states to 3186 states and 3200 transitions. [2021-12-07 00:12:42,029 INFO L78 Accepts]: Start accepts. Automaton has 3186 states and 3200 transitions. Word has length 3003 [2021-12-07 00:12:42,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-07 00:12:42,030 INFO L470 AbstractCegarLoop]: Abstraction has 3186 states and 3200 transitions. [2021-12-07 00:12:42,030 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 204 states, 204 states have (on average 5.0) internal successors, (1020), 204 states have internal predecessors, (1020), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-07 00:12:42,030 INFO L276 IsEmpty]: Start isEmpty. Operand 3186 states and 3200 transitions. [2021-12-07 00:12:42,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3019 [2021-12-07 00:12:42,079 INFO L506 BasicCegarLoop]: Found error trace [2021-12-07 00:12:42,080 INFO L514 BasicCegarLoop]: trace histogram [560, 560, 559, 559, 559, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1] [2021-12-07 00:12:42,124 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Ended with exit code 0 [2021-12-07 00:12:42,280 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 43 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2021-12-07 00:12:42,280 INFO L402 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATION === [ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION (and 5 more)] === [2021-12-07 00:12:42,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-07 00:12:42,281 INFO L85 PathProgramCache]: Analyzing trace with hash 939509746, now seen corresponding path program 28 times [2021-12-07 00:12:42,281 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-07 00:12:42,281 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068157612] [2021-12-07 00:12:42,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-07 00:12:42,281 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-07 00:12:44,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-07 00:12:44,431 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-07 00:12:46,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-07 00:12:47,486 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-07 00:12:47,486 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-12-07 00:12:47,487 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr2REQUIRES_VIOLATION (7 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONARRAY_INDEX (6 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1REQUIRES_VIOLATION (5 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3REQUIRES_VIOLATION (4 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4REQUIRES_VIOLATION (3 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5REQUIRES_VIOLATION (2 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6REQUIRES_VIOLATION (1 of 8 remaining) [2021-12-07 00:12:47,488 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONMEMORY_LEAK (0 of 8 remaining) [2021-12-07 00:12:47,489 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2021-12-07 00:12:47,491 INFO L732 BasicCegarLoop]: Path program histogram: [28, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-07 00:12:47,495 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-12-07 00:12:47,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:12:47 BoogieIcfgContainer [2021-12-07 00:12:47,996 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-12-07 00:12:47,997 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-07 00:12:47,997 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-07 00:12:47,997 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-07 00:12:47,997 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:05:02" (3/4) ... [2021-12-07 00:12:47,998 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-12-07 00:12:48,379 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/witness.graphml [2021-12-07 00:12:48,379 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-07 00:12:48,380 INFO L158 Benchmark]: Toolchain (without parser) took 466165.24ms. Allocated memory was 107.0MB in the beginning and 1.4GB in the end (delta: 1.3GB). Free memory was 66.0MB in the beginning and 417.5MB in the end (delta: -351.5MB). Peak memory consumption was 966.7MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 107.0MB. Free memory is still 82.9MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: CACSL2BoogieTranslator took 144.40ms. Allocated memory is still 107.0MB. Free memory was 65.8MB in the beginning and 56.5MB in the end (delta: 9.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: Boogie Procedure Inliner took 24.46ms. Allocated memory is still 107.0MB. Free memory was 56.5MB in the beginning and 55.0MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: Boogie Preprocessor took 16.47ms. Allocated memory is still 107.0MB. Free memory was 55.0MB in the beginning and 53.9MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: RCFGBuilder took 240.22ms. Allocated memory is still 107.0MB. Free memory was 53.7MB in the beginning and 80.0MB in the end (delta: -26.3MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,380 INFO L158 Benchmark]: TraceAbstraction took 465351.94ms. Allocated memory was 107.0MB in the beginning and 1.4GB in the end (delta: 1.3GB). Free memory was 79.6MB in the beginning and 570.1MB in the end (delta: -490.5MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2021-12-07 00:12:48,381 INFO L158 Benchmark]: Witness Printer took 382.93ms. Allocated memory is still 1.4GB. Free memory was 570.1MB in the beginning and 417.5MB in the end (delta: 152.6MB). Peak memory consumption was 151.0MB. Max. memory is 16.1GB. [2021-12-07 00:12:48,381 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 107.0MB. Free memory is still 82.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 144.40ms. Allocated memory is still 107.0MB. Free memory was 65.8MB in the beginning and 56.5MB in the end (delta: 9.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 24.46ms. Allocated memory is still 107.0MB. Free memory was 56.5MB in the beginning and 55.0MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 16.47ms. Allocated memory is still 107.0MB. Free memory was 55.0MB in the beginning and 53.9MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 240.22ms. Allocated memory is still 107.0MB. Free memory was 53.7MB in the beginning and 80.0MB in the end (delta: -26.3MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB. * TraceAbstraction took 465351.94ms. Allocated memory was 107.0MB in the beginning and 1.4GB in the end (delta: 1.3GB). Free memory was 79.6MB in the beginning and 570.1MB in the end (delta: -490.5MB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 382.93ms. Allocated memory is still 1.4GB. Free memory was 570.1MB in the beginning and 417.5MB in the end (delta: 152.6MB). Peak memory consumption was 151.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 18]: pointer dereference may fail pointer dereference may fail We found a FailurePath: [L24] int i, b[32]; [L25] char mask[32]; [L26] i = 0 VAL [b={33:0}, i=0, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=0, b={34:0}, b={34:0}, i=0, size=0] [L17] COND TRUE i <= size + 1 VAL [\old(size)=0, b={34:0}, b={34:0}, i=0, size=0] [L18] EXPR a[i] VAL [\old(size)=0, b={34:0}, b={34:0}, i=0, size=0] [L18] EXPR b[i] VAL [\old(size)=0, b={34:0}, b={34:0}, b[i]=150, i=0, size=0] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=0, b={34:0}, b={34:0}, i=1, size=0] [L17] COND TRUE i <= size + 1 VAL [\old(size)=0, b={34:0}, b={34:0}, i=1, size=0] [L18] EXPR a[i] VAL [\old(size)=0, b={34:0}, b={34:0}, i=1, size=0] [L18] EXPR b[i] VAL [\old(size)=0, b={34:0}, b={34:0}, b[i]=139, i=1, size=0] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=0, b={34:0}, b={34:0}, i=2, size=0] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=0, b={34:0}, b={34:0}, i=2, size=0] [L20] return i; VAL [\old(size)=0, \result=2, b={34:0}, b={34:0}, i=2, size=0] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=2, i=0, mask={34:0}] [L26] i++ VAL [b={33:0}, i=1, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=1, b={34:0}, b={34:0}, i=0, size=1] [L17] COND TRUE i <= size + 1 VAL [\old(size)=1, b={34:0}, b={34:0}, i=0, size=1] [L18] EXPR a[i] VAL [\old(size)=1, b={34:0}, b={34:0}, i=0, size=1] [L18] EXPR b[i] VAL [\old(size)=1, b={34:0}, b={34:0}, b[i]=150, i=0, size=1] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=1, b={34:0}, b={34:0}, i=1, size=1] [L17] COND TRUE i <= size + 1 VAL [\old(size)=1, b={34:0}, b={34:0}, i=1, size=1] [L18] EXPR a[i] VAL [\old(size)=1, b={34:0}, b={34:0}, i=1, size=1] [L18] EXPR b[i] VAL [\old(size)=1, b={34:0}, b={34:0}, b[i]=139, i=1, size=1] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=1, b={34:0}, b={34:0}, i=2, size=1] [L17] COND TRUE i <= size + 1 VAL [\old(size)=1, b={34:0}, b={34:0}, i=2, size=1] [L18] EXPR a[i] VAL [\old(size)=1, b={34:0}, b={34:0}, i=2, size=1] [L18] EXPR b[i] VAL [\old(size)=1, b={34:0}, b={34:0}, b[i]=134, i=2, size=1] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=1, b={34:0}, b={34:0}, i=3, size=1] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=1, b={34:0}, b={34:0}, i=3, size=1] [L20] return i; VAL [\old(size)=1, \result=3, b={34:0}, b={34:0}, i=3, size=1] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=3, i=1, mask={34:0}] [L26] i++ VAL [b={33:0}, i=2, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=2, b={34:0}, b={34:0}, i=0, size=2] [L17] COND TRUE i <= size + 1 VAL [\old(size)=2, b={34:0}, b={34:0}, i=0, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={34:0}, b={34:0}, i=0, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={34:0}, b={34:0}, b[i]=150, i=0, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={34:0}, b={34:0}, i=1, size=2] [L17] COND TRUE i <= size + 1 VAL [\old(size)=2, b={34:0}, b={34:0}, i=1, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={34:0}, b={34:0}, i=1, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={34:0}, b={34:0}, b[i]=139, i=1, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={34:0}, b={34:0}, i=2, size=2] [L17] COND TRUE i <= size + 1 VAL [\old(size)=2, b={34:0}, b={34:0}, i=2, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={34:0}, b={34:0}, i=2, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={34:0}, b={34:0}, b[i]=134, i=2, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={34:0}, b={34:0}, i=3, size=2] [L17] COND TRUE i <= size + 1 VAL [\old(size)=2, b={34:0}, b={34:0}, i=3, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={34:0}, b={34:0}, i=3, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={34:0}, b={34:0}, b[i]=132, i=3, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={34:0}, b={34:0}, i=4, size=2] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=2, b={34:0}, b={34:0}, i=4, size=2] [L20] return i; VAL [\old(size)=2, \result=4, b={34:0}, b={34:0}, i=4, size=2] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=4, i=2, mask={34:0}] [L26] i++ VAL [b={33:0}, i=3, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=3, b={34:0}, b={34:0}, i=0, size=3] [L17] COND TRUE i <= size + 1 VAL [\old(size)=3, b={34:0}, b={34:0}, i=0, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={34:0}, b={34:0}, i=0, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={34:0}, b={34:0}, b[i]=150, i=0, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={34:0}, b={34:0}, i=1, size=3] [L17] COND TRUE i <= size + 1 VAL [\old(size)=3, b={34:0}, b={34:0}, i=1, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={34:0}, b={34:0}, i=1, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={34:0}, b={34:0}, b[i]=139, i=1, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={34:0}, b={34:0}, i=2, size=3] [L17] COND TRUE i <= size + 1 VAL [\old(size)=3, b={34:0}, b={34:0}, i=2, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={34:0}, b={34:0}, i=2, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={34:0}, b={34:0}, b[i]=134, i=2, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={34:0}, b={34:0}, i=3, size=3] [L17] COND TRUE i <= size + 1 VAL [\old(size)=3, b={34:0}, b={34:0}, i=3, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={34:0}, b={34:0}, i=3, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={34:0}, b={34:0}, b[i]=132, i=3, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={34:0}, b={34:0}, i=4, size=3] [L17] COND TRUE i <= size + 1 VAL [\old(size)=3, b={34:0}, b={34:0}, i=4, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={34:0}, b={34:0}, i=4, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={34:0}, b={34:0}, b[i]=153, i=4, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={34:0}, b={34:0}, i=5, size=3] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=3, b={34:0}, b={34:0}, i=5, size=3] [L20] return i; VAL [\old(size)=3, \result=5, b={34:0}, b={34:0}, i=5, size=3] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=5, i=3, mask={34:0}] [L26] i++ VAL [b={33:0}, i=4, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=4, b={34:0}, b={34:0}, i=0, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=0, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=0, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=150, i=0, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=1, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=1, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=1, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=139, i=1, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=2, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=2, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=2, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=134, i=2, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=3, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=3, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=3, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=132, i=3, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=4, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=4, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=4, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=153, i=4, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=5, size=4] [L17] COND TRUE i <= size + 1 VAL [\old(size)=4, b={34:0}, b={34:0}, i=5, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={34:0}, b={34:0}, i=5, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={34:0}, b={34:0}, b[i]=158, i=5, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={34:0}, b={34:0}, i=6, size=4] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=4, b={34:0}, b={34:0}, i=6, size=4] [L20] return i; VAL [\old(size)=4, \result=6, b={34:0}, b={34:0}, i=6, size=4] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=6, i=4, mask={34:0}] [L26] i++ VAL [b={33:0}, i=5, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=5, b={34:0}, b={34:0}, i=0, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=0, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=0, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=150, i=0, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=1, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=1, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=1, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=139, i=1, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=2, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=2, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=2, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=134, i=2, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=3, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=3, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=3, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=132, i=3, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=4, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=4, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=4, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=153, i=4, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=5, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=5, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=5, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=158, i=5, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=6, size=5] [L17] COND TRUE i <= size + 1 VAL [\old(size)=5, b={34:0}, b={34:0}, i=6, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={34:0}, b={34:0}, i=6, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={34:0}, b={34:0}, b[i]=138, i=6, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={34:0}, b={34:0}, i=7, size=5] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=5, b={34:0}, b={34:0}, i=7, size=5] [L20] return i; VAL [\old(size)=5, \result=7, b={34:0}, b={34:0}, i=7, size=5] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=7, i=5, mask={34:0}] [L26] i++ VAL [b={33:0}, i=6, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=6, b={34:0}, b={34:0}, i=0, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=0, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=0, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=150, i=0, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=1, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=1, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=1, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=139, i=1, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=2, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=2, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=2, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=134, i=2, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=3, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=3, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=3, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=132, i=3, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=4, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=4, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=4, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=153, i=4, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=5, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=5, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=5, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=158, i=5, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=6, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=6, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=6, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=138, i=6, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=7, size=6] [L17] COND TRUE i <= size + 1 VAL [\old(size)=6, b={34:0}, b={34:0}, i=7, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={34:0}, b={34:0}, i=7, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={34:0}, b={34:0}, b[i]=151, i=7, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={34:0}, b={34:0}, i=8, size=6] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=6, b={34:0}, b={34:0}, i=8, size=6] [L20] return i; VAL [\old(size)=6, \result=8, b={34:0}, b={34:0}, i=8, size=6] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=8, i=6, mask={34:0}] [L26] i++ VAL [b={33:0}, i=7, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=7, b={34:0}, b={34:0}, i=0, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=0, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=0, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=150, i=0, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=1, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=1, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=1, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=139, i=1, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=2, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=2, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=2, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=134, i=2, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=3, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=3, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=3, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=132, i=3, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=4, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=4, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=4, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=153, i=4, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=5, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=5, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=5, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=158, i=5, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=6, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=6, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=6, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=138, i=6, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=7, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=7, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=7, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=151, i=7, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=8, size=7] [L17] COND TRUE i <= size + 1 VAL [\old(size)=7, b={34:0}, b={34:0}, i=8, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={34:0}, b={34:0}, i=8, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={34:0}, b={34:0}, b[i]=131, i=8, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={34:0}, b={34:0}, i=9, size=7] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=7, b={34:0}, b={34:0}, i=9, size=7] [L20] return i; VAL [\old(size)=7, \result=9, b={34:0}, b={34:0}, i=9, size=7] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=9, i=7, mask={34:0}] [L26] i++ VAL [b={33:0}, i=8, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=8, b={34:0}, b={34:0}, i=0, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=0, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=0, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=150, i=0, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=1, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=1, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=1, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=139, i=1, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=2, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=2, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=2, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=134, i=2, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=3, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=3, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=3, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=132, i=3, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=4, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=4, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=4, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=153, i=4, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=5, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=5, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=5, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=158, i=5, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=6, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=6, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=6, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=138, i=6, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=7, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=7, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=7, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=151, i=7, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=8, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=8, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=8, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=131, i=8, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=9, size=8] [L17] COND TRUE i <= size + 1 VAL [\old(size)=8, b={34:0}, b={34:0}, i=9, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={34:0}, b={34:0}, i=9, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={34:0}, b={34:0}, b[i]=154, i=9, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={34:0}, b={34:0}, i=10, size=8] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=8, b={34:0}, b={34:0}, i=10, size=8] [L20] return i; VAL [\old(size)=8, \result=10, b={34:0}, b={34:0}, i=10, size=8] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=10, i=8, mask={34:0}] [L26] i++ VAL [b={33:0}, i=9, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=9, b={34:0}, b={34:0}, i=0, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=0, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=0, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=150, i=0, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=1, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=1, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=1, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=139, i=1, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=2, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=2, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=2, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=134, i=2, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=3, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=3, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=3, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=132, i=3, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=4, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=4, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=4, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=153, i=4, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=5, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=5, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=5, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=158, i=5, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=6, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=6, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=6, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=138, i=6, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=7, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=7, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=7, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=151, i=7, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=8, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=8, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=8, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=131, i=8, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=9, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=9, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=9, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=154, i=9, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=10, size=9] [L17] COND TRUE i <= size + 1 VAL [\old(size)=9, b={34:0}, b={34:0}, i=10, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={34:0}, b={34:0}, i=10, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={34:0}, b={34:0}, b[i]=147, i=10, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={34:0}, b={34:0}, i=11, size=9] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=9, b={34:0}, b={34:0}, i=11, size=9] [L20] return i; VAL [\old(size)=9, \result=11, b={34:0}, b={34:0}, i=11, size=9] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=11, i=9, mask={34:0}] [L26] i++ VAL [b={33:0}, i=10, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=10, b={34:0}, b={34:0}, i=0, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=0, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=0, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=150, i=0, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=1, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=1, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=1, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=139, i=1, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=2, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=2, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=2, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=134, i=2, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=3, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=3, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=3, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=132, i=3, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=4, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=4, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=4, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=153, i=4, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=5, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=5, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=5, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=158, i=5, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=6, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=6, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=6, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=138, i=6, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=7, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=7, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=7, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=151, i=7, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=8, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=8, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=8, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=131, i=8, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=9, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=9, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=9, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=154, i=9, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=10, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=10, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=10, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=147, i=10, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=11, size=10] [L17] COND TRUE i <= size + 1 VAL [\old(size)=10, b={34:0}, b={34:0}, i=11, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={34:0}, b={34:0}, i=11, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={34:0}, b={34:0}, b[i]=145, i=11, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={34:0}, b={34:0}, i=12, size=10] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=10, b={34:0}, b={34:0}, i=12, size=10] [L20] return i; VAL [\old(size)=10, \result=12, b={34:0}, b={34:0}, i=12, size=10] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=12, i=10, mask={34:0}] [L26] i++ VAL [b={33:0}, i=11, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=11, b={34:0}, b={34:0}, i=0, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=0, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=0, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=150, i=0, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=1, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=1, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=1, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=139, i=1, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=2, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=2, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=2, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=134, i=2, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=3, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=3, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=3, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=132, i=3, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=4, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=4, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=4, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=153, i=4, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=5, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=5, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=5, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=158, i=5, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=6, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=6, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=6, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=138, i=6, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=7, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=7, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=7, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=151, i=7, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=8, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=8, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=8, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=131, i=8, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=9, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=9, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=9, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=154, i=9, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=10, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=10, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=10, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=147, i=10, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=11, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=11, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=11, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=145, i=11, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=12, size=11] [L17] COND TRUE i <= size + 1 VAL [\old(size)=11, b={34:0}, b={34:0}, i=12, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={34:0}, b={34:0}, i=12, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={34:0}, b={34:0}, b[i]=140, i=12, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={34:0}, b={34:0}, i=13, size=11] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=11, b={34:0}, b={34:0}, i=13, size=11] [L20] return i; VAL [\old(size)=11, \result=13, b={34:0}, b={34:0}, i=13, size=11] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=13, i=11, mask={34:0}] [L26] i++ VAL [b={33:0}, i=12, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=12, b={34:0}, b={34:0}, i=0, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=0, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=0, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=150, i=0, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=1, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=1, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=1, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=139, i=1, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=2, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=2, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=2, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=134, i=2, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=3, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=3, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=3, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=132, i=3, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=4, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=4, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=4, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=153, i=4, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=5, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=5, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=5, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=158, i=5, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=6, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=6, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=6, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=138, i=6, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=7, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=7, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=7, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=151, i=7, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=8, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=8, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=8, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=131, i=8, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=9, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=9, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=9, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=154, i=9, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=10, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=10, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=10, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=147, i=10, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=11, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=11, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=11, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=145, i=11, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=12, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=12, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=12, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=140, i=12, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=13, size=12] [L17] COND TRUE i <= size + 1 VAL [\old(size)=12, b={34:0}, b={34:0}, i=13, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={34:0}, b={34:0}, i=13, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={34:0}, b={34:0}, b[i]=130, i=13, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={34:0}, b={34:0}, i=14, size=12] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=12, b={34:0}, b={34:0}, i=14, size=12] [L20] return i; VAL [\old(size)=12, \result=14, b={34:0}, b={34:0}, i=14, size=12] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=14, i=12, mask={34:0}] [L26] i++ VAL [b={33:0}, i=13, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=13, b={34:0}, b={34:0}, i=0, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=0, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=0, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=150, i=0, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=1, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=1, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=1, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=139, i=1, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=2, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=2, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=2, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=134, i=2, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=3, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=3, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=3, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=132, i=3, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=4, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=4, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=4, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=153, i=4, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=5, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=5, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=5, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=158, i=5, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=6, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=6, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=6, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=138, i=6, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=7, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=7, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=7, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=151, i=7, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=8, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=8, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=8, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=131, i=8, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=9, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=9, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=9, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=154, i=9, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=10, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=10, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=10, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=147, i=10, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=11, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=11, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=11, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=145, i=11, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=12, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=12, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=12, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=140, i=12, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=13, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=13, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=13, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=130, i=13, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=14, size=13] [L17] COND TRUE i <= size + 1 VAL [\old(size)=13, b={34:0}, b={34:0}, i=14, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={34:0}, b={34:0}, i=14, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={34:0}, b={34:0}, b[i]=160, i=14, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={34:0}, b={34:0}, i=15, size=13] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=13, b={34:0}, b={34:0}, i=15, size=13] [L20] return i; VAL [\old(size)=13, \result=15, b={34:0}, b={34:0}, i=15, size=13] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=15, i=13, mask={34:0}] [L26] i++ VAL [b={33:0}, i=14, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=14, b={34:0}, b={34:0}, i=0, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=0, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=0, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=150, i=0, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=1, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=1, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=1, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=139, i=1, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=2, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=2, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=2, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=134, i=2, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=3, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=3, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=3, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=132, i=3, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=4, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=4, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=4, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=153, i=4, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=5, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=5, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=5, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=158, i=5, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=6, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=6, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=6, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=138, i=6, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=7, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=7, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=7, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=151, i=7, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=8, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=8, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=8, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=131, i=8, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=9, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=9, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=9, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=154, i=9, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=10, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=10, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=10, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=147, i=10, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=11, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=11, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=11, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=145, i=11, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=12, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=12, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=12, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=140, i=12, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=13, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=13, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=13, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=130, i=13, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=14, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=14, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=14, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=160, i=14, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=15, size=14] [L17] COND TRUE i <= size + 1 VAL [\old(size)=14, b={34:0}, b={34:0}, i=15, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={34:0}, b={34:0}, i=15, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={34:0}, b={34:0}, b[i]=159, i=15, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={34:0}, b={34:0}, i=16, size=14] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=14, b={34:0}, b={34:0}, i=16, size=14] [L20] return i; VAL [\old(size)=14, \result=16, b={34:0}, b={34:0}, i=16, size=14] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=16, i=14, mask={34:0}] [L26] i++ VAL [b={33:0}, i=15, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=15, b={34:0}, b={34:0}, i=0, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=0, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=0, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=150, i=0, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=1, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=1, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=1, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=139, i=1, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=2, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=2, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=2, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=134, i=2, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=3, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=3, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=3, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=132, i=3, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=4, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=4, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=4, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=153, i=4, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=5, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=5, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=5, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=158, i=5, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=6, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=6, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=6, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=138, i=6, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=7, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=7, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=7, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=151, i=7, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=8, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=8, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=8, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=131, i=8, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=9, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=9, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=9, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=154, i=9, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=10, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=10, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=10, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=147, i=10, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=11, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=11, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=11, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=145, i=11, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=12, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=12, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=12, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=140, i=12, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=13, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=13, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=13, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=130, i=13, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=14, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=14, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=14, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=160, i=14, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=15, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=15, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=15, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=159, i=15, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=16, size=15] [L17] COND TRUE i <= size + 1 VAL [\old(size)=15, b={34:0}, b={34:0}, i=16, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={34:0}, b={34:0}, i=16, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={34:0}, b={34:0}, b[i]=133, i=16, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={34:0}, b={34:0}, i=17, size=15] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=15, b={34:0}, b={34:0}, i=17, size=15] [L20] return i; VAL [\old(size)=15, \result=17, b={34:0}, b={34:0}, i=17, size=15] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=17, i=15, mask={34:0}] [L26] i++ VAL [b={33:0}, i=16, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=16, b={34:0}, b={34:0}, i=0, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=0, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=0, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=150, i=0, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=1, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=1, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=1, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=139, i=1, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=2, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=2, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=2, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=134, i=2, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=3, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=3, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=3, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=132, i=3, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=4, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=4, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=4, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=153, i=4, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=5, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=5, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=5, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=158, i=5, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=6, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=6, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=6, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=138, i=6, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=7, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=7, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=7, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=151, i=7, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=8, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=8, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=8, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=131, i=8, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=9, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=9, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=9, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=154, i=9, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=10, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=10, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=10, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=147, i=10, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=11, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=11, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=11, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=145, i=11, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=12, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=12, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=12, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=140, i=12, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=13, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=13, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=13, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=130, i=13, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=14, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=14, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=14, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=160, i=14, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=15, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=15, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=15, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=159, i=15, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=16, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=16, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=16, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=133, i=16, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=17, size=16] [L17] COND TRUE i <= size + 1 VAL [\old(size)=16, b={34:0}, b={34:0}, i=17, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={34:0}, b={34:0}, i=17, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={34:0}, b={34:0}, b[i]=155, i=17, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={34:0}, b={34:0}, i=18, size=16] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=16, b={34:0}, b={34:0}, i=18, size=16] [L20] return i; VAL [\old(size)=16, \result=18, b={34:0}, b={34:0}, i=18, size=16] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=18, i=16, mask={34:0}] [L26] i++ VAL [b={33:0}, i=17, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=17, b={34:0}, b={34:0}, i=0, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=0, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=0, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=150, i=0, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=1, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=1, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=1, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=139, i=1, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=2, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=2, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=2, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=134, i=2, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=3, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=3, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=3, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=132, i=3, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=4, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=4, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=4, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=153, i=4, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=5, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=5, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=5, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=158, i=5, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=6, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=6, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=6, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=138, i=6, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=7, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=7, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=7, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=151, i=7, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=8, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=8, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=8, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=131, i=8, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=9, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=9, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=9, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=154, i=9, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=10, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=10, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=10, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=147, i=10, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=11, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=11, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=11, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=145, i=11, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=12, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=12, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=12, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=140, i=12, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=13, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=13, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=13, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=130, i=13, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=14, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=14, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=14, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=160, i=14, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=15, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=15, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=15, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=159, i=15, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=16, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=16, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=16, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=133, i=16, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=17, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=17, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=17, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=155, i=17, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=18, size=17] [L17] COND TRUE i <= size + 1 VAL [\old(size)=17, b={34:0}, b={34:0}, i=18, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={34:0}, b={34:0}, i=18, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={34:0}, b={34:0}, b[i]=143, i=18, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={34:0}, b={34:0}, i=19, size=17] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=17, b={34:0}, b={34:0}, i=19, size=17] [L20] return i; VAL [\old(size)=17, \result=19, b={34:0}, b={34:0}, i=19, size=17] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=19, i=17, mask={34:0}] [L26] i++ VAL [b={33:0}, i=18, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=18, b={34:0}, b={34:0}, i=0, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=0, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=0, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=150, i=0, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=1, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=1, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=1, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=139, i=1, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=2, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=2, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=2, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=134, i=2, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=3, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=3, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=3, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=132, i=3, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=4, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=4, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=4, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=153, i=4, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=5, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=5, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=5, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=158, i=5, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=6, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=6, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=6, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=138, i=6, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=7, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=7, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=7, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=151, i=7, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=8, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=8, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=8, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=131, i=8, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=9, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=9, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=9, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=154, i=9, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=10, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=10, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=10, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=147, i=10, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=11, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=11, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=11, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=145, i=11, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=12, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=12, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=12, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=140, i=12, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=13, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=13, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=13, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=130, i=13, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=14, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=14, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=14, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=160, i=14, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=15, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=15, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=15, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=159, i=15, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=16, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=16, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=16, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=133, i=16, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=17, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=17, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=17, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=155, i=17, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=18, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=18, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=18, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=143, i=18, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=19, size=18] [L17] COND TRUE i <= size + 1 VAL [\old(size)=18, b={34:0}, b={34:0}, i=19, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={34:0}, b={34:0}, i=19, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={34:0}, b={34:0}, b[i]=144, i=19, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={34:0}, b={34:0}, i=20, size=18] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=18, b={34:0}, b={34:0}, i=20, size=18] [L20] return i; VAL [\old(size)=18, \result=20, b={34:0}, b={34:0}, i=20, size=18] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=20, i=18, mask={34:0}] [L26] i++ VAL [b={33:0}, i=19, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=19, b={34:0}, b={34:0}, i=0, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=0, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=0, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=150, i=0, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=1, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=1, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=1, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=139, i=1, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=2, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=2, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=2, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=134, i=2, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=3, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=3, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=3, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=132, i=3, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=4, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=4, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=4, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=153, i=4, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=5, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=5, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=5, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=158, i=5, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=6, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=6, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=6, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=138, i=6, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=7, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=7, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=7, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=151, i=7, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=8, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=8, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=8, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=131, i=8, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=9, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=9, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=9, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=154, i=9, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=10, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=10, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=10, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=147, i=10, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=11, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=11, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=11, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=145, i=11, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=12, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=12, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=12, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=140, i=12, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=13, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=13, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=13, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=130, i=13, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=14, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=14, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=14, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=160, i=14, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=15, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=15, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=15, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=159, i=15, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=16, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=16, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=16, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=133, i=16, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=17, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=17, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=17, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=155, i=17, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=18, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=18, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=18, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=143, i=18, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=19, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=19, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=19, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=144, i=19, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=20, size=19] [L17] COND TRUE i <= size + 1 VAL [\old(size)=19, b={34:0}, b={34:0}, i=20, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={34:0}, b={34:0}, i=20, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={34:0}, b={34:0}, b[i]=129, i=20, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={34:0}, b={34:0}, i=21, size=19] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=19, b={34:0}, b={34:0}, i=21, size=19] [L20] return i; VAL [\old(size)=19, \result=21, b={34:0}, b={34:0}, i=21, size=19] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=21, i=19, mask={34:0}] [L26] i++ VAL [b={33:0}, i=20, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=20, b={34:0}, b={34:0}, i=0, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=0, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=0, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=150, i=0, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=1, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=1, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=1, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=139, i=1, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=2, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=2, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=2, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=134, i=2, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=3, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=3, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=3, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=132, i=3, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=4, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=4, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=4, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=153, i=4, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=5, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=5, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=5, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=158, i=5, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=6, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=6, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=6, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=138, i=6, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=7, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=7, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=7, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=151, i=7, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=8, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=8, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=8, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=131, i=8, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=9, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=9, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=9, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=154, i=9, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=10, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=10, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=10, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=147, i=10, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=11, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=11, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=11, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=145, i=11, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=12, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=12, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=12, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=140, i=12, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=13, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=13, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=13, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=130, i=13, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=14, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=14, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=14, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=160, i=14, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=15, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=15, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=15, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=159, i=15, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=16, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=16, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=16, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=133, i=16, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=17, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=17, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=17, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=155, i=17, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=18, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=18, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=18, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=143, i=18, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=19, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=19, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=19, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=144, i=19, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=20, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=20, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=20, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=129, i=20, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=21, size=20] [L17] COND TRUE i <= size + 1 VAL [\old(size)=20, b={34:0}, b={34:0}, i=21, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={34:0}, b={34:0}, i=21, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={34:0}, b={34:0}, b[i]=149, i=21, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={34:0}, b={34:0}, i=22, size=20] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=20, b={34:0}, b={34:0}, i=22, size=20] [L20] return i; VAL [\old(size)=20, \result=22, b={34:0}, b={34:0}, i=22, size=20] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=22, i=20, mask={34:0}] [L26] i++ VAL [b={33:0}, i=21, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=21, b={34:0}, b={34:0}, i=0, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=0, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=0, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=150, i=0, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=1, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=1, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=1, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=139, i=1, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=2, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=2, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=2, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=134, i=2, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=3, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=3, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=3, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=132, i=3, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=4, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=4, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=4, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=153, i=4, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=5, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=5, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=5, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=158, i=5, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=6, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=6, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=6, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=138, i=6, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=7, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=7, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=7, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=151, i=7, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=8, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=8, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=8, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=131, i=8, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=9, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=9, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=9, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=154, i=9, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=10, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=10, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=10, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=147, i=10, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=11, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=11, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=11, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=145, i=11, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=12, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=12, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=12, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=140, i=12, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=13, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=13, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=13, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=130, i=13, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=14, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=14, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=14, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=160, i=14, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=15, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=15, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=15, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=159, i=15, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=16, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=16, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=16, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=133, i=16, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=17, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=17, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=17, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=155, i=17, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=18, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=18, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=18, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=143, i=18, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=19, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=19, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=19, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=144, i=19, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=20, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=20, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=20, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=129, i=20, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=21, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=21, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=21, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=149, i=21, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=22, size=21] [L17] COND TRUE i <= size + 1 VAL [\old(size)=21, b={34:0}, b={34:0}, i=22, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={34:0}, b={34:0}, i=22, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={34:0}, b={34:0}, b[i]=136, i=22, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={34:0}, b={34:0}, i=23, size=21] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=21, b={34:0}, b={34:0}, i=23, size=21] [L20] return i; VAL [\old(size)=21, \result=23, b={34:0}, b={34:0}, i=23, size=21] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=23, i=21, mask={34:0}] [L26] i++ VAL [b={33:0}, i=22, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=22, b={34:0}, b={34:0}, i=0, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=0, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=0, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=150, i=0, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=1, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=1, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=1, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=139, i=1, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=2, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=2, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=2, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=134, i=2, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=3, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=3, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=3, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=132, i=3, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=4, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=4, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=4, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=153, i=4, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=5, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=5, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=5, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=158, i=5, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=6, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=6, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=6, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=138, i=6, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=7, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=7, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=7, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=151, i=7, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=8, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=8, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=8, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=131, i=8, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=9, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=9, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=9, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=154, i=9, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=10, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=10, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=10, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=147, i=10, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=11, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=11, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=11, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=145, i=11, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=12, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=12, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=12, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=140, i=12, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=13, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=13, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=13, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=130, i=13, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=14, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=14, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=14, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=160, i=14, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=15, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=15, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=15, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=159, i=15, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=16, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=16, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=16, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=133, i=16, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=17, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=17, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=17, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=155, i=17, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=18, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=18, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=18, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=143, i=18, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=19, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=19, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=19, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=144, i=19, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=20, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=20, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=20, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=129, i=20, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=21, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=21, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=21, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=149, i=21, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=22, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=22, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=22, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=136, i=22, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=23, size=22] [L17] COND TRUE i <= size + 1 VAL [\old(size)=22, b={34:0}, b={34:0}, i=23, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={34:0}, b={34:0}, i=23, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={34:0}, b={34:0}, b[i]=142, i=23, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={34:0}, b={34:0}, i=24, size=22] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=22, b={34:0}, b={34:0}, i=24, size=22] [L20] return i; VAL [\old(size)=22, \result=24, b={34:0}, b={34:0}, i=24, size=22] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=24, i=22, mask={34:0}] [L26] i++ VAL [b={33:0}, i=23, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=23, b={34:0}, b={34:0}, i=0, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=0, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=0, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=150, i=0, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=1, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=1, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=1, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=139, i=1, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=2, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=2, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=2, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=134, i=2, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=3, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=3, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=3, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=132, i=3, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=4, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=4, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=4, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=153, i=4, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=5, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=5, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=5, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=158, i=5, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=6, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=6, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=6, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=138, i=6, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=7, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=7, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=7, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=151, i=7, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=8, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=8, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=8, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=131, i=8, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=9, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=9, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=9, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=154, i=9, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=10, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=10, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=10, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=147, i=10, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=11, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=11, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=11, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=145, i=11, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=12, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=12, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=12, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=140, i=12, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=13, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=13, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=13, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=130, i=13, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=14, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=14, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=14, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=160, i=14, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=15, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=15, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=15, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=159, i=15, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=16, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=16, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=16, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=133, i=16, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=17, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=17, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=17, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=155, i=17, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=18, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=18, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=18, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=143, i=18, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=19, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=19, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=19, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=144, i=19, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=20, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=20, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=20, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=129, i=20, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=21, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=21, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=21, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=149, i=21, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=22, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=22, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=22, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=136, i=22, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=23, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=23, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=23, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=142, i=23, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=24, size=23] [L17] COND TRUE i <= size + 1 VAL [\old(size)=23, b={34:0}, b={34:0}, i=24, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={34:0}, b={34:0}, i=24, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={34:0}, b={34:0}, b[i]=137, i=24, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={34:0}, b={34:0}, i=25, size=23] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=23, b={34:0}, b={34:0}, i=25, size=23] [L20] return i; VAL [\old(size)=23, \result=25, b={34:0}, b={34:0}, i=25, size=23] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=25, i=23, mask={34:0}] [L26] i++ VAL [b={33:0}, i=24, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=24, b={34:0}, b={34:0}, i=0, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=0, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=0, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=150, i=0, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=1, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=1, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=1, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=139, i=1, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=2, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=2, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=2, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=134, i=2, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=3, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=3, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=3, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=132, i=3, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=4, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=4, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=4, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=153, i=4, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=5, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=5, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=5, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=158, i=5, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=6, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=6, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=6, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=138, i=6, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=7, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=7, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=7, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=151, i=7, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=8, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=8, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=8, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=131, i=8, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=9, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=9, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=9, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=154, i=9, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=10, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=10, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=10, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=147, i=10, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=11, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=11, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=11, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=145, i=11, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=12, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=12, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=12, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=140, i=12, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=13, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=13, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=13, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=130, i=13, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=14, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=14, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=14, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=160, i=14, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=15, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=15, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=15, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=159, i=15, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=16, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=16, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=16, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=133, i=16, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=17, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=17, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=17, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=155, i=17, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=18, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=18, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=18, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=143, i=18, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=19, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=19, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=19, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=144, i=19, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=20, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=20, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=20, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=129, i=20, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=21, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=21, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=21, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=149, i=21, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=22, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=22, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=22, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=136, i=22, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=23, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=23, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=23, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=142, i=23, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=24, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=24, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=24, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=137, i=24, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=25, size=24] [L17] COND TRUE i <= size + 1 VAL [\old(size)=24, b={34:0}, b={34:0}, i=25, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={34:0}, b={34:0}, i=25, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={34:0}, b={34:0}, b[i]=148, i=25, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={34:0}, b={34:0}, i=26, size=24] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=24, b={34:0}, b={34:0}, i=26, size=24] [L20] return i; VAL [\old(size)=24, \result=26, b={34:0}, b={34:0}, i=26, size=24] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=26, i=24, mask={34:0}] [L26] i++ VAL [b={33:0}, i=25, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=25, b={34:0}, b={34:0}, i=0, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=0, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=0, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=150, i=0, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=1, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=1, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=1, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=139, i=1, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=2, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=2, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=2, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=134, i=2, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=3, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=3, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=3, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=132, i=3, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=4, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=4, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=4, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=153, i=4, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=5, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=5, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=5, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=158, i=5, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=6, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=6, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=6, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=138, i=6, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=7, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=7, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=7, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=151, i=7, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=8, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=8, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=8, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=131, i=8, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=9, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=9, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=9, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=154, i=9, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=10, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=10, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=10, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=147, i=10, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=11, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=11, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=11, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=145, i=11, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=12, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=12, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=12, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=140, i=12, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=13, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=13, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=13, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=130, i=13, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=14, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=14, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=14, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=160, i=14, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=15, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=15, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=15, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=159, i=15, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=16, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=16, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=16, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=133, i=16, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=17, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=17, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=17, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=155, i=17, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=18, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=18, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=18, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=143, i=18, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=19, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=19, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=19, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=144, i=19, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=20, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=20, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=20, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=129, i=20, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=21, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=21, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=21, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=149, i=21, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=22, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=22, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=22, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=136, i=22, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=23, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=23, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=23, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=142, i=23, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=24, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=24, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=24, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=137, i=24, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=25, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=25, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=25, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=148, i=25, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=26, size=25] [L17] COND TRUE i <= size + 1 VAL [\old(size)=25, b={34:0}, b={34:0}, i=26, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={34:0}, b={34:0}, i=26, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={34:0}, b={34:0}, b[i]=157, i=26, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={34:0}, b={34:0}, i=27, size=25] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=25, b={34:0}, b={34:0}, i=27, size=25] [L20] return i; VAL [\old(size)=25, \result=27, b={34:0}, b={34:0}, i=27, size=25] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=27, i=25, mask={34:0}] [L26] i++ VAL [b={33:0}, i=26, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=26, b={34:0}, b={34:0}, i=0, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=0, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=0, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=150, i=0, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=1, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=1, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=1, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=139, i=1, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=2, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=2, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=2, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=134, i=2, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=3, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=3, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=3, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=132, i=3, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=4, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=4, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=4, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=153, i=4, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=5, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=5, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=5, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=158, i=5, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=6, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=6, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=6, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=138, i=6, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=7, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=7, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=7, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=151, i=7, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=8, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=8, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=8, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=131, i=8, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=9, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=9, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=9, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=154, i=9, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=10, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=10, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=10, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=147, i=10, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=11, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=11, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=11, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=145, i=11, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=12, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=12, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=12, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=140, i=12, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=13, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=13, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=13, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=130, i=13, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=14, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=14, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=14, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=160, i=14, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=15, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=15, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=15, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=159, i=15, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=16, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=16, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=16, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=133, i=16, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=17, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=17, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=17, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=155, i=17, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=18, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=18, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=18, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=143, i=18, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=19, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=19, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=19, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=144, i=19, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=20, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=20, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=20, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=129, i=20, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=21, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=21, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=21, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=149, i=21, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=22, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=22, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=22, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=136, i=22, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=23, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=23, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=23, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=142, i=23, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=24, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=24, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=24, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=137, i=24, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=25, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=25, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=25, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=148, i=25, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=26, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=26, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=26, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=157, i=26, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=27, size=26] [L17] COND TRUE i <= size + 1 VAL [\old(size)=26, b={34:0}, b={34:0}, i=27, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={34:0}, b={34:0}, i=27, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={34:0}, b={34:0}, b[i]=135, i=27, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={34:0}, b={34:0}, i=28, size=26] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=26, b={34:0}, b={34:0}, i=28, size=26] [L20] return i; VAL [\old(size)=26, \result=28, b={34:0}, b={34:0}, i=28, size=26] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=28, i=26, mask={34:0}] [L26] i++ VAL [b={33:0}, i=27, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=27, b={34:0}, b={34:0}, i=0, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=0, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=0, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=150, i=0, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=1, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=1, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=1, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=139, i=1, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=2, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=2, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=2, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=134, i=2, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=3, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=3, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=3, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=132, i=3, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=4, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=4, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=4, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=153, i=4, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=5, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=5, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=5, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=158, i=5, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=6, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=6, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=6, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=138, i=6, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=7, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=7, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=7, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=151, i=7, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=8, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=8, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=8, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=131, i=8, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=9, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=9, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=9, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=154, i=9, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=10, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=10, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=10, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=147, i=10, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=11, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=11, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=11, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=145, i=11, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=12, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=12, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=12, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=140, i=12, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=13, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=13, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=13, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=130, i=13, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=14, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=14, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=14, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=160, i=14, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=15, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=15, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=15, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=159, i=15, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=16, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=16, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=16, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=133, i=16, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=17, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=17, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=17, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=155, i=17, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=18, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=18, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=18, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=143, i=18, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=19, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=19, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=19, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=144, i=19, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=20, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=20, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=20, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=129, i=20, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=21, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=21, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=21, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=149, i=21, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=22, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=22, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=22, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=136, i=22, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=23, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=23, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=23, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=142, i=23, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=24, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=24, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=24, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=137, i=24, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=25, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=25, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=25, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=148, i=25, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=26, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=26, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=26, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=157, i=26, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=27, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=27, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=27, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=135, i=27, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=28, size=27] [L17] COND TRUE i <= size + 1 VAL [\old(size)=27, b={34:0}, b={34:0}, i=28, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={34:0}, b={34:0}, i=28, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={34:0}, b={34:0}, b[i]=146, i=28, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={34:0}, b={34:0}, i=29, size=27] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=27, b={34:0}, b={34:0}, i=29, size=27] [L20] return i; VAL [\old(size)=27, \result=29, b={34:0}, b={34:0}, i=29, size=27] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=29, i=27, mask={34:0}] [L26] i++ VAL [b={33:0}, i=28, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=28, b={34:0}, b={34:0}, i=0, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=0, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=0, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=150, i=0, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=1, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=1, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=1, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=139, i=1, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=2, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=2, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=2, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=134, i=2, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=3, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=3, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=3, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=132, i=3, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=4, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=4, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=4, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=153, i=4, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=5, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=5, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=5, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=158, i=5, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=6, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=6, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=6, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=138, i=6, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=7, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=7, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=7, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=151, i=7, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=8, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=8, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=8, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=131, i=8, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=9, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=9, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=9, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=154, i=9, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=10, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=10, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=10, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=147, i=10, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=11, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=11, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=11, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=145, i=11, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=12, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=12, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=12, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=140, i=12, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=13, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=13, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=13, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=130, i=13, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=14, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=14, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=14, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=160, i=14, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=15, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=15, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=15, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=159, i=15, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=16, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=16, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=16, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=133, i=16, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=17, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=17, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=17, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=155, i=17, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=18, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=18, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=18, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=143, i=18, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=19, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=19, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=19, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=144, i=19, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=20, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=20, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=20, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=129, i=20, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=21, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=21, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=21, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=149, i=21, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=22, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=22, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=22, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=136, i=22, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=23, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=23, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=23, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=142, i=23, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=24, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=24, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=24, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=137, i=24, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=25, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=25, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=25, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=148, i=25, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=26, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=26, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=26, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=157, i=26, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=27, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=27, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=27, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=135, i=27, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=28, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=28, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=28, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=146, i=28, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=29, size=28] [L17] COND TRUE i <= size + 1 VAL [\old(size)=28, b={34:0}, b={34:0}, i=29, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={34:0}, b={34:0}, i=29, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={34:0}, b={34:0}, b[i]=156, i=29, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={34:0}, b={34:0}, i=30, size=28] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=28, b={34:0}, b={34:0}, i=30, size=28] [L20] return i; VAL [\old(size)=28, \result=30, b={34:0}, b={34:0}, i=30, size=28] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=30, i=28, mask={34:0}] [L26] i++ VAL [b={33:0}, i=29, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=29, b={34:0}, b={34:0}, i=0, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=0, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=0, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=150, i=0, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=1, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=1, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=1, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=139, i=1, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=2, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=2, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=2, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=134, i=2, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=3, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=3, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=3, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=132, i=3, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=4, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=4, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=4, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=153, i=4, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=5, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=5, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=5, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=158, i=5, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=6, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=6, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=6, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=138, i=6, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=7, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=7, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=7, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=151, i=7, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=8, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=8, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=8, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=131, i=8, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=9, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=9, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=9, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=154, i=9, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=10, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=10, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=10, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=147, i=10, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=11, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=11, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=11, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=145, i=11, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=12, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=12, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=12, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=140, i=12, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=13, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=13, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=13, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=130, i=13, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=14, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=14, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=14, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=160, i=14, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=15, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=15, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=15, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=159, i=15, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=16, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=16, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=16, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=133, i=16, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=17, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=17, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=17, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=155, i=17, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=18, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=18, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=18, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=143, i=18, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=19, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=19, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=19, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=144, i=19, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=20, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=20, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=20, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=129, i=20, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=21, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=21, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=21, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=149, i=21, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=22, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=22, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=22, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=136, i=22, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=23, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=23, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=23, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=142, i=23, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=24, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=24, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=24, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=137, i=24, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=25, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=25, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=25, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=148, i=25, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=26, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=26, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=26, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=157, i=26, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=27, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=27, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=27, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=135, i=27, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=28, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=28, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=28, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=146, i=28, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=29, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=29, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=29, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=156, i=29, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=30, size=29] [L17] COND TRUE i <= size + 1 VAL [\old(size)=29, b={34:0}, b={34:0}, i=30, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={34:0}, b={34:0}, i=30, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={34:0}, b={34:0}, b[i]=152, i=30, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={34:0}, b={34:0}, i=31, size=29] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=29, b={34:0}, b={34:0}, i=31, size=29] [L20] return i; VAL [\old(size)=29, \result=31, b={34:0}, b={34:0}, i=31, size=29] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=31, i=29, mask={34:0}] [L26] i++ VAL [b={33:0}, i=30, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL, EXPR foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=30, b={34:0}, b={34:0}, i=0, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=0, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=0, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=150, i=0, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=1, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=1, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=1, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=139, i=1, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=2, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=2, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=2, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=134, i=2, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=3, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=3, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=3, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=132, i=3, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=4, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=4, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=4, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=153, i=4, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=5, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=5, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=5, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=158, i=5, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=6, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=6, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=6, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=138, i=6, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=7, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=7, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=7, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=151, i=7, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=8, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=8, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=8, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=131, i=8, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=9, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=9, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=9, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=154, i=9, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=10, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=10, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=10, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=147, i=10, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=11, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=11, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=11, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=145, i=11, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=12, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=12, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=12, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=140, i=12, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=13, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=13, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=13, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=130, i=13, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=14, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=14, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=14, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=160, i=14, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=15, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=15, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=15, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=159, i=15, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=16, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=16, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=16, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=133, i=16, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=17, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=17, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=17, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=155, i=17, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=18, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=18, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=18, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=143, i=18, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=19, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=19, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=19, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=144, i=19, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=20, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=20, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=20, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=129, i=20, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=21, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=21, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=21, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=149, i=21, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=22, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=22, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=22, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=136, i=22, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=23, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=23, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=23, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=142, i=23, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=24, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=24, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=24, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=137, i=24, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=25, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=25, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=25, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=148, i=25, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=26, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=26, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=26, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=157, i=26, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=27, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=27, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=27, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=135, i=27, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=28, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=28, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=28, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=146, i=28, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=29, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=29, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=29, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=156, i=29, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=30, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=30, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=30, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=152, i=30, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=31, size=30] [L17] COND TRUE i <= size + 1 VAL [\old(size)=30, b={34:0}, b={34:0}, i=31, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={34:0}, b={34:0}, i=31, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={34:0}, b={34:0}, b[i]=141, i=31, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={34:0}, b={34:0}, i=32, size=30] [L17] COND FALSE !(i <= size + 1) VAL [\old(size)=30, b={34:0}, b={34:0}, i=32, size=30] [L20] return i; VAL [\old(size)=30, \result=32, b={34:0}, b={34:0}, i=32, size=30] [L27] RET, EXPR foo(mask, i) [L27] b[i] = foo(mask, i) VAL [b={33:0}, foo(mask, i)=32, i=30, mask={34:0}] [L26] i++ VAL [b={33:0}, i=31, mask={34:0}] [L26] COND TRUE i < sizeof(mask) [L27] CALL foo(mask, i) [L15] char a[33]; [L16] int i; [L17] i = 0 VAL [\old(size)=31, b={34:0}, b={34:0}, i=0, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=0, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=0, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=150, i=0, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=1, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=1, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=1, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=139, i=1, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=2, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=2, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=2, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=134, i=2, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=3, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=3, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=3, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=132, i=3, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=4, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=4, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=4, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=153, i=4, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=5, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=5, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=5, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=158, i=5, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=6, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=6, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=6, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=138, i=6, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=7, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=7, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=7, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=151, i=7, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=8, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=8, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=8, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=131, i=8, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=9, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=9, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=9, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=154, i=9, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=10, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=10, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=10, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=147, i=10, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=11, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=11, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=11, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=145, i=11, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=12, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=12, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=12, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=140, i=12, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=13, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=13, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=13, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=130, i=13, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=14, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=14, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=14, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=160, i=14, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=15, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=15, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=15, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=159, i=15, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=16, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=16, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=16, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=133, i=16, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=17, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=17, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=17, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=155, i=17, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=18, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=18, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=18, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=143, i=18, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=19, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=19, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=19, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=144, i=19, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=20, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=20, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=20, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=129, i=20, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=21, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=21, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=21, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=149, i=21, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=22, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=22, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=22, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=136, i=22, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=23, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=23, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=23, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=142, i=23, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=24, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=24, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=24, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=137, i=24, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=25, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=25, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=25, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=148, i=25, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=26, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=26, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=26, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=157, i=26, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=27, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=27, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=27, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=135, i=27, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=28, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=28, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=28, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=146, i=28, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=29, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=29, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=29, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=156, i=29, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=30, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=30, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=30, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=152, i=30, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=31, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=31, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=31, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={34:0}, b={34:0}, b[i]=141, i=31, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={34:0}, b={34:0}, i=32, size=31] [L17] COND TRUE i <= size + 1 VAL [\old(size)=31, b={34:0}, b={34:0}, i=32, size=31] [L18] a[i] VAL [\old(size)=31, b={34:0}, b={34:0}, i=32, size=31] [L18] b[i] - UnprovableResult [Line: 18]: Unable to prove that array index is always in bounds Unable to prove that array index is always in bounds Reason: Not analyzed. - UnprovableResult [Line: 18]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 27]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 27]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 30]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 30]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 23]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 31 locations, 8 error locations. Started 1 CEGAR loops. OverallTime: 464.8s, OverallIterations: 51, TraceHistogramMax: 560, PathProgramHistogramMax: 28, EmptinessCheckTime: 0.6s, AutomataDifference: 200.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 40150 SdHoareTripleChecker+Valid, 50.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 40150 mSDsluCounter, 12186 SdHoareTripleChecker+Invalid, 42.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 21 IncrementalHoareTripleChecker+Unchecked, 10816 mSDsCounter, 11163 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 194692 IncrementalHoareTripleChecker+Invalid, 205876 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 11163 mSolverCounterUnsat, 1370 mSDtfsCounter, 194692 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 79588 GetRequests, 71977 SyntacticMatches, 11 SemanticMatches, 7600 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1173026 ImplicationChecksByTransitivity, 166.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4566occurred in iteration=47, InterpolantAutomatonStates: 5667, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 50 MinimizatonAttempts, 5950 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.4s SsaConstructionTime, 119.3s SatisfiabilityAnalysisTime, 122.6s InterpolantComputationTime, 76513 NumberOfCodeBlocks, 68130 NumberOfCodeBlocksAsserted, 561 NumberOfCheckSat, 109881 ConstructedInterpolants, 107 QuantifiedInterpolants, 334759 SizeOfPredicates, 237 NumberOfNonLiveVariables, 85796 ConjunctsInSsa, 1213 ConjunctsInUnsatCore, 131 InterpolantComputations, 11 PerfectInterpolantSequences, 16933277/19139641 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-12-07 00:12:48,473 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d93657df-5c03-427f-a818-bb7de56e83a2/bin/uautomizer-DrprNOufMa/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref)