./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c3fed411 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.2.2-tmp.no-commuhash-c3fed41 [2021-12-19 17:42:27,886 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-19 17:42:27,888 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-19 17:42:27,923 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-19 17:42:27,923 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-19 17:42:27,924 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-19 17:42:27,925 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-19 17:42:27,926 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-19 17:42:27,927 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-19 17:42:27,932 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-19 17:42:27,933 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-19 17:42:27,933 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-19 17:42:27,934 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-19 17:42:27,936 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-19 17:42:27,937 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-19 17:42:27,939 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-19 17:42:27,942 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-19 17:42:27,943 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-19 17:42:27,944 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-19 17:42:27,945 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-19 17:42:27,948 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-19 17:42:27,948 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-19 17:42:27,949 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-19 17:42:27,950 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-19 17:42:27,952 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-19 17:42:27,953 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-19 17:42:27,954 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-19 17:42:27,954 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-19 17:42:27,955 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-19 17:42:27,956 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-19 17:42:27,956 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-19 17:42:27,956 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-19 17:42:27,957 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-19 17:42:27,958 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-19 17:42:27,959 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-19 17:42:27,959 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-19 17:42:27,960 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-19 17:42:27,960 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-19 17:42:27,960 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-19 17:42:27,961 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-19 17:42:27,961 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-19 17:42:27,962 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-12-19 17:42:27,986 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-19 17:42:27,987 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-19 17:42:27,988 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-19 17:42:27,988 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-19 17:42:27,989 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-19 17:42:27,989 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-19 17:42:27,989 INFO L138 SettingsManager]: * Use SBE=true [2021-12-19 17:42:27,989 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-19 17:42:27,989 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-19 17:42:27,989 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-19 17:42:27,990 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-19 17:42:27,990 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-19 17:42:27,990 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-19 17:42:27,991 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-19 17:42:27,991 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-19 17:42:27,992 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-19 17:42:27,992 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-19 17:42:27,992 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-19 17:42:27,992 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-19 17:42:27,992 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-19 17:42:27,992 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-19 17:42:27,992 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-19 17:42:27,993 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-19 17:42:27,993 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-19 17:42:27,994 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-19 17:42:27,994 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2021-12-19 17:42:28,173 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-19 17:42:28,189 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-19 17:42:28,191 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-19 17:42:28,192 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-19 17:42:28,192 INFO L275 PluginConnector]: CDTParser initialized [2021-12-19 17:42:28,193 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2021-12-19 17:42:28,234 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8a01eaaf6/270d09d26b1343c98951fa78379e2a76/FLAGa93c8c0ab [2021-12-19 17:42:28,695 INFO L306 CDTParser]: Found 1 translation units. [2021-12-19 17:42:28,695 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2021-12-19 17:42:28,712 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8a01eaaf6/270d09d26b1343c98951fa78379e2a76/FLAGa93c8c0ab [2021-12-19 17:42:29,216 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8a01eaaf6/270d09d26b1343c98951fa78379e2a76 [2021-12-19 17:42:29,219 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-19 17:42:29,220 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-19 17:42:29,221 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-19 17:42:29,221 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-19 17:42:29,223 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-19 17:42:29,224 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,225 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38b8c6da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29, skipping insertion in model container [2021-12-19 17:42:29,225 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,229 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-19 17:42:29,263 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-19 17:42:29,493 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-19 17:42:29,498 INFO L203 MainTranslator]: Completed pre-run [2021-12-19 17:42:29,537 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-19 17:42:29,559 INFO L208 MainTranslator]: Completed translation [2021-12-19 17:42:29,559 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29 WrapperNode [2021-12-19 17:42:29,560 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-19 17:42:29,560 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-19 17:42:29,561 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-19 17:42:29,561 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-19 17:42:29,566 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,584 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,601 INFO L137 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 54 [2021-12-19 17:42:29,601 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-19 17:42:29,602 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-19 17:42:29,602 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-19 17:42:29,602 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-19 17:42:29,607 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,607 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,608 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,609 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,611 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,614 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,616 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,617 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-19 17:42:29,618 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-19 17:42:29,618 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-19 17:42:29,618 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-19 17:42:29,619 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (1/1) ... [2021-12-19 17:42:29,630 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:29,639 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:29,648 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:29,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-19 17:42:29,687 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-19 17:42:29,687 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-19 17:42:29,688 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-19 17:42:29,688 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-19 17:42:29,688 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-19 17:42:29,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-19 17:42:29,731 INFO L236 CfgBuilder]: Building ICFG [2021-12-19 17:42:29,732 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-19 17:42:29,836 INFO L277 CfgBuilder]: Performing block encoding [2021-12-19 17:42:29,840 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-19 17:42:29,840 INFO L301 CfgBuilder]: Removed 2 assume(true) statements. [2021-12-19 17:42:29,841 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.12 05:42:29 BoogieIcfgContainer [2021-12-19 17:42:29,841 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-19 17:42:29,842 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-19 17:42:29,842 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-19 17:42:29,844 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-19 17:42:29,845 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-19 17:42:29,845 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 19.12 05:42:29" (1/3) ... [2021-12-19 17:42:29,845 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@120e0c7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.12 05:42:29, skipping insertion in model container [2021-12-19 17:42:29,846 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-19 17:42:29,846 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.12 05:42:29" (2/3) ... [2021-12-19 17:42:29,846 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@120e0c7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.12 05:42:29, skipping insertion in model container [2021-12-19 17:42:29,846 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-19 17:42:29,846 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.12 05:42:29" (3/3) ... [2021-12-19 17:42:29,847 INFO L388 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2021-12-19 17:42:29,878 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-19 17:42:29,880 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-19 17:42:29,881 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-19 17:42:29,881 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-19 17:42:29,881 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-19 17:42:29,881 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-19 17:42:29,881 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-19 17:42:29,881 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-19 17:42:29,892 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:29,913 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2021-12-19 17:42:29,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:29,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:29,917 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2021-12-19 17:42:29,917 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-19 17:42:29,917 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-19 17:42:29,917 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:29,918 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2021-12-19 17:42:29,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:29,918 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:29,919 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2021-12-19 17:42:29,919 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] [2021-12-19 17:42:29,927 INFO L791 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11#L367true assume !(main_~length~0#1 < 1); 8#L367-2true call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 5#L369true assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 6#L370-3true [2021-12-19 17:42:29,928 INFO L793 eck$LassoCheckResult]: Loop: 6#L370-3true assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13#L372true assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16#L370-2true main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6#L370-3true [2021-12-19 17:42:29,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:29,947 INFO L85 PathProgramCache]: Analyzing trace with hash 28695753, now seen corresponding path program 1 times [2021-12-19 17:42:29,956 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:29,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107831143] [2021-12-19 17:42:29,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:29,958 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:30,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,047 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:30,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,082 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:30,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:30,085 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2021-12-19 17:42:30,085 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:30,085 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405812238] [2021-12-19 17:42:30,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:30,086 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:30,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,113 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:30,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,135 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:30,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:30,136 INFO L85 PathProgramCache]: Analyzing trace with hash 176707665, now seen corresponding path program 1 times [2021-12-19 17:42:30,136 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:30,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594269558] [2021-12-19 17:42:30,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:30,147 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:30,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,182 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:30,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:30,194 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:30,371 INFO L210 LassoAnalysis]: Preferences: [2021-12-19 17:42:30,372 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-19 17:42:30,372 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-19 17:42:30,372 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-19 17:42:30,372 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-19 17:42:30,372 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,372 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-19 17:42:30,373 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-19 17:42:30,373 INFO L133 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2021-12-19 17:42:30,373 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-19 17:42:30,373 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-19 17:42:30,387 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,390 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,393 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,397 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,399 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,480 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,481 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,483 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,485 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,487 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,489 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,491 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:30,637 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-19 17:42:30,640 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-19 17:42:30,641 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,641 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,643 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,650 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-12-19 17:42:30,654 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,661 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,661 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:30,661 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,661 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,661 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,663 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:30,663 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:30,680 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,720 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,720 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,721 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,723 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-12-19 17:42:30,724 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,729 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,729 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,729 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,729 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,732 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:30,732 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:30,748 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,765 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,766 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,766 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,767 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,768 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-12-19 17:42:30,775 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,780 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,781 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:30,781 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,781 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,781 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,781 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:30,781 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:30,793 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,808 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,809 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,809 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,810 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,811 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-12-19 17:42:30,812 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,817 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,818 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:30,818 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,818 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,818 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,818 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:30,818 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:30,821 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,838 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,839 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,839 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,840 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,841 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-12-19 17:42:30,842 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,847 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,848 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:30,848 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,848 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,848 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,848 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:30,848 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:30,851 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,867 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,867 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,868 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,868 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,869 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-12-19 17:42:30,871 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,876 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,876 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,876 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,876 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,887 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:30,887 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:30,919 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:30,938 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:30,938 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:30,938 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:30,939 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:30,956 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-12-19 17:42:30,957 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:30,963 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:30,963 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:30,963 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:30,963 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:30,969 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:30,969 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:30,987 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:31,004 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:31,005 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:31,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:31,006 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:31,008 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-12-19 17:42:31,009 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:31,015 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:31,015 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:31,015 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:31,015 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:31,026 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:31,027 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:31,043 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-19 17:42:31,095 INFO L443 ModelExtractionUtils]: Simplification made 15 calls to the SMT solver. [2021-12-19 17:42:31,095 INFO L444 ModelExtractionUtils]: 8 out of 22 variables were initially zero. Simplification set additionally 10 variables to zero. [2021-12-19 17:42:31,096 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:31,096 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:31,098 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:31,113 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-19 17:42:31,118 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-12-19 17:42:31,132 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-19 17:42:31,132 INFO L513 LassoAnalysis]: Proved termination. [2021-12-19 17:42:31,133 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1) = -4*ULTIMATE.start_main_~i~0#1 - 1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 Supporting invariants [] [2021-12-19 17:42:31,150 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:31,156 INFO L297 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2021-12-19 17:42:31,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:31,208 INFO L263 TraceCheckSpWp]: Trace formula consists of 30 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-19 17:42:31,209 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:31,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:31,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjunts are in the unsatisfiable core [2021-12-19 17:42:31,225 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:31,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:31,276 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-19 17:42:31,277 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:31,306 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 14 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 35 states and 50 transitions. Complement of second has 7 states. [2021-12-19 17:42:31,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-12-19 17:42:31,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:31,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 33 transitions. [2021-12-19 17:42:31,312 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 5 letters. Loop has 3 letters. [2021-12-19 17:42:31,313 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:31,313 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 8 letters. Loop has 3 letters. [2021-12-19 17:42:31,313 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:31,313 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 33 transitions. Stem has 5 letters. Loop has 6 letters. [2021-12-19 17:42:31,313 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:31,314 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 50 transitions. [2021-12-19 17:42:31,315 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:31,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 12 states and 17 transitions. [2021-12-19 17:42:31,318 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2021-12-19 17:42:31,318 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2021-12-19 17:42:31,318 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2021-12-19 17:42:31,319 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-19 17:42:31,319 INFO L681 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2021-12-19 17:42:31,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2021-12-19 17:42:31,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2021-12-19 17:42:31,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:31,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2021-12-19 17:42:31,351 INFO L704 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2021-12-19 17:42:31,351 INFO L587 BuchiCegarLoop]: Abstraction has 12 states and 17 transitions. [2021-12-19 17:42:31,352 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-19 17:42:31,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 17 transitions. [2021-12-19 17:42:31,353 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:31,357 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:31,358 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:31,358 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:31,358 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:31,359 INFO L791 eck$LassoCheckResult]: Stem: 113#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 114#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 121#L367 assume !(main_~length~0#1 < 1); 115#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 116#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 117#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 118#L370-4 main_~j~0#1 := 0; 119#L378-2 [2021-12-19 17:42:31,359 INFO L793 eck$LassoCheckResult]: Loop: 119#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 120#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 119#L378-2 [2021-12-19 17:42:31,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,360 INFO L85 PathProgramCache]: Analyzing trace with hash 1806815510, now seen corresponding path program 1 times [2021-12-19 17:42:31,360 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:31,360 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767723952] [2021-12-19 17:42:31,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:31,360 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:31,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:31,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:31,405 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:42:31,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767723952] [2021-12-19 17:42:31,406 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [767723952] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-19 17:42:31,406 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-19 17:42:31,406 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-19 17:42:31,406 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [491321653] [2021-12-19 17:42:31,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-19 17:42:31,408 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:42:31,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,408 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 1 times [2021-12-19 17:42:31,409 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:31,409 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835830198] [2021-12-19 17:42:31,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:31,409 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:31,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,415 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:31,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,419 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:31,455 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:42:31,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-19 17:42:31,458 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-12-19 17:42:31,458 INFO L87 Difference]: Start difference. First operand 12 states and 17 transitions. cyclomatic complexity: 7 Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:31,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:42:31,481 INFO L93 Difference]: Finished difference Result 14 states and 19 transitions. [2021-12-19 17:42:31,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-19 17:42:31,482 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 19 transitions. [2021-12-19 17:42:31,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:31,483 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 19 transitions. [2021-12-19 17:42:31,483 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2021-12-19 17:42:31,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2021-12-19 17:42:31,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 19 transitions. [2021-12-19 17:42:31,483 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-19 17:42:31,483 INFO L681 BuchiCegarLoop]: Abstraction has 14 states and 19 transitions. [2021-12-19 17:42:31,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 19 transitions. [2021-12-19 17:42:31,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 12. [2021-12-19 17:42:31,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:31,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2021-12-19 17:42:31,484 INFO L704 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-12-19 17:42:31,485 INFO L587 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-12-19 17:42:31,485 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-19 17:42:31,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2021-12-19 17:42:31,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:31,485 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:31,485 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:31,485 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:31,486 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:31,486 INFO L791 eck$LassoCheckResult]: Stem: 146#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 147#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 154#L367 assume !(main_~length~0#1 < 1); 148#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 149#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 150#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 155#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 157#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 156#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 151#L370-4 main_~j~0#1 := 0; 152#L378-2 [2021-12-19 17:42:31,486 INFO L793 eck$LassoCheckResult]: Loop: 152#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 153#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 152#L378-2 [2021-12-19 17:42:31,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,486 INFO L85 PathProgramCache]: Analyzing trace with hash -1982565540, now seen corresponding path program 1 times [2021-12-19 17:42:31,486 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:31,487 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171378507] [2021-12-19 17:42:31,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:31,487 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:31,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,495 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:31,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,503 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:31,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,504 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 2 times [2021-12-19 17:42:31,504 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:31,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220512123] [2021-12-19 17:42:31,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:31,504 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:31,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,508 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:31,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,512 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:31,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:31,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996831, now seen corresponding path program 1 times [2021-12-19 17:42:31,512 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:31,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390060792] [2021-12-19 17:42:31,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:31,513 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:31,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,524 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:31,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:31,535 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:31,642 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:31,785 INFO L210 LassoAnalysis]: Preferences: [2021-12-19 17:42:31,786 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-12-19 17:42:31,786 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-12-19 17:42:31,786 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-12-19 17:42:31,786 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-12-19 17:42:31,786 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:31,786 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-12-19 17:42:31,786 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-12-19 17:42:31,786 INFO L133 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2021-12-19 17:42:31,786 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-12-19 17:42:31,786 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-12-19 17:42:31,791 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,792 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,794 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,796 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,886 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,888 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,890 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,892 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,893 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,895 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:31,896 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-12-19 17:42:32,073 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-12-19 17:42:32,073 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-12-19 17:42:32,074 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:32,074 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,075 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,096 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-12-19 17:42:32,097 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:32,102 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:32,103 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:32,103 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:32,103 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:32,103 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:32,103 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:32,103 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:32,115 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:32,130 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:32,131 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:32,131 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,146 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,164 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-12-19 17:42:32,164 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:32,170 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:32,170 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-12-19 17:42:32,170 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:32,170 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:32,170 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:32,170 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-12-19 17:42:32,170 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-12-19 17:42:32,186 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:32,219 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:32,219 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:32,220 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,235 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,248 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:32,254 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:32,254 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:32,254 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:32,254 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:32,255 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:32,255 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:32,259 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-12-19 17:42:32,265 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-12-19 17:42:32,298 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:32,298 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:32,298 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,302 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,303 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-12-19 17:42:32,305 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-12-19 17:42:32,311 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-12-19 17:42:32,311 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-12-19 17:42:32,311 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-12-19 17:42:32,311 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-12-19 17:42:32,317 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-12-19 17:42:32,317 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-12-19 17:42:32,335 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-12-19 17:42:32,361 INFO L443 ModelExtractionUtils]: Simplification made 15 calls to the SMT solver. [2021-12-19 17:42:32,361 INFO L444 ModelExtractionUtils]: 3 out of 25 variables were initially zero. Simplification set additionally 18 variables to zero. [2021-12-19 17:42:32,362 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-19 17:42:32,362 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,370 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,371 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2021-12-19 17:42:32,400 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-12-19 17:42:32,406 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-12-19 17:42:32,406 INFO L513 LassoAnalysis]: Proved termination. [2021-12-19 17:42:32,406 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, ULTIMATE.start_main_~j~0#1, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_2) = -1*ULTIMATE.start_main_~arr~0#1.offset - 4*ULTIMATE.start_main_~j~0#1 + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_2 Supporting invariants [] [2021-12-19 17:42:32,422 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2021-12-19 17:42:32,436 INFO L297 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2021-12-19 17:42:32,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:32,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:32,454 INFO L263 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 2 conjunts are in the unsatisfiable core [2021-12-19 17:42:32,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:32,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:32,469 INFO L263 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjunts are in the unsatisfiable core [2021-12-19 17:42:32,469 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:32,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:32,480 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-12-19 17:42:32,480 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:32,503 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 12 states and 16 transitions. cyclomatic complexity: 6. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 5 states. [2021-12-19 17:42:32,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-12-19 17:42:32,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:32,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 14 transitions. [2021-12-19 17:42:32,506 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 10 letters. Loop has 2 letters. [2021-12-19 17:42:32,506 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:32,506 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 12 letters. Loop has 2 letters. [2021-12-19 17:42:32,506 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:32,506 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 14 transitions. Stem has 10 letters. Loop has 4 letters. [2021-12-19 17:42:32,507 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-12-19 17:42:32,507 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2021-12-19 17:42:32,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:32,510 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2021-12-19 17:42:32,510 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-12-19 17:42:32,511 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2021-12-19 17:42:32,511 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2021-12-19 17:42:32,511 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:42:32,511 INFO L681 BuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2021-12-19 17:42:32,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2021-12-19 17:42:32,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2021-12-19 17:42:32,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:32,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2021-12-19 17:42:32,531 INFO L704 BuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2021-12-19 17:42:32,531 INFO L587 BuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2021-12-19 17:42:32,532 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-19 17:42:32,532 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2021-12-19 17:42:32,532 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:32,532 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:32,532 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:32,533 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:32,533 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:32,533 INFO L791 eck$LassoCheckResult]: Stem: 243#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 244#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 254#L367 assume !(main_~length~0#1 < 1); 245#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 246#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 247#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 255#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 257#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 256#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 248#L370-4 main_~j~0#1 := 0; 249#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 250#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 251#L378-2 [2021-12-19 17:42:32,533 INFO L793 eck$LassoCheckResult]: Loop: 251#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 258#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 251#L378-2 [2021-12-19 17:42:32,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:32,534 INFO L85 PathProgramCache]: Analyzing trace with hash 1719996833, now seen corresponding path program 1 times [2021-12-19 17:42:32,534 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:32,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23708859] [2021-12-19 17:42:32,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:32,534 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:32,538 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2021-12-19 17:42:32,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:32,664 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:32,664 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:42:32,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23708859] [2021-12-19 17:42:32,664 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [23708859] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:42:32,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [60856238] [2021-12-19 17:42:32,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:32,665 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:42:32,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:32,680 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:42:32,681 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2021-12-19 17:42:32,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:32,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 59 conjuncts, 17 conjunts are in the unsatisfiable core [2021-12-19 17:42:32,710 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:32,738 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-19 17:42:32,785 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-12-19 17:42:32,792 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:32,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:42:32,856 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2021-12-19 17:42:32,859 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2021-12-19 17:42:32,872 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:32,872 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [60856238] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:42:32,872 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:42:32,872 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2021-12-19 17:42:32,872 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76919203] [2021-12-19 17:42:32,873 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:42:32,873 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:42:32,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:32,873 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 3 times [2021-12-19 17:42:32,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:32,873 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019347181] [2021-12-19 17:42:32,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:32,874 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:32,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:32,877 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:32,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:32,881 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:32,909 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:42:32,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-12-19 17:42:32,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2021-12-19 17:42:32,910 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 9 Second operand has 15 states, 14 states have (on average 1.7857142857142858) internal successors, (25), 15 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:42:33,007 INFO L93 Difference]: Finished difference Result 30 states and 41 transitions. [2021-12-19 17:42:33,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-19 17:42:33,008 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 41 transitions. [2021-12-19 17:42:33,008 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:42:33,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 40 transitions. [2021-12-19 17:42:33,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2021-12-19 17:42:33,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-19 17:42:33,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 40 transitions. [2021-12-19 17:42:33,009 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:42:33,009 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 40 transitions. [2021-12-19 17:42:33,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 40 transitions. [2021-12-19 17:42:33,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2021-12-19 17:42:33,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2021-12-19 17:42:33,011 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2021-12-19 17:42:33,011 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2021-12-19 17:42:33,011 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-19 17:42:33,011 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2021-12-19 17:42:33,011 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:33,011 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:33,012 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:33,012 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:33,012 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:33,012 INFO L791 eck$LassoCheckResult]: Stem: 379#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 380#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 390#L367 assume !(main_~length~0#1 < 1); 381#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 382#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 383#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 391#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 394#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 399#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 398#L370-4 main_~j~0#1 := 0; 397#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 388#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 389#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 386#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 387#L378-2 [2021-12-19 17:42:33,012 INFO L793 eck$LassoCheckResult]: Loop: 387#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 395#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 387#L378-2 [2021-12-19 17:42:33,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:33,013 INFO L85 PathProgramCache]: Analyzing trace with hash -645453020, now seen corresponding path program 1 times [2021-12-19 17:42:33,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:33,013 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901604908] [2021-12-19 17:42:33,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,013 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:33,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,062 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,063 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:42:33,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901604908] [2021-12-19 17:42:33,063 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901604908] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:42:33,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844803686] [2021-12-19 17:42:33,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,064 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:42:33,064 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:33,071 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:42:33,073 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-12-19 17:42:33,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,103 INFO L263 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 6 conjunts are in the unsatisfiable core [2021-12-19 17:42:33,103 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:33,143 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:42:33,165 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,166 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1844803686] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:42:33,166 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:42:33,166 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2021-12-19 17:42:33,166 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942331419] [2021-12-19 17:42:33,166 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:42:33,166 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:42:33,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:33,167 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 4 times [2021-12-19 17:42:33,167 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:33,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232648942] [2021-12-19 17:42:33,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,167 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:33,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:33,171 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:33,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:33,174 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:33,205 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:42:33,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-12-19 17:42:33,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2021-12-19 17:42:33,206 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 11 states, 11 states have (on average 2.272727272727273) internal successors, (25), 11 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:42:33,280 INFO L93 Difference]: Finished difference Result 48 states and 64 transitions. [2021-12-19 17:42:33,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-19 17:42:33,280 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 64 transitions. [2021-12-19 17:42:33,281 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:42:33,281 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 43 states and 57 transitions. [2021-12-19 17:42:33,281 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2021-12-19 17:42:33,282 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2021-12-19 17:42:33,282 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 57 transitions. [2021-12-19 17:42:33,282 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:42:33,282 INFO L681 BuchiCegarLoop]: Abstraction has 43 states and 57 transitions. [2021-12-19 17:42:33,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 57 transitions. [2021-12-19 17:42:33,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 37. [2021-12-19 17:42:33,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3513513513513513) internal successors, (50), 36 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 50 transitions. [2021-12-19 17:42:33,284 INFO L704 BuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2021-12-19 17:42:33,284 INFO L587 BuchiCegarLoop]: Abstraction has 37 states and 50 transitions. [2021-12-19 17:42:33,284 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-19 17:42:33,284 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 50 transitions. [2021-12-19 17:42:33,285 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:42:33,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:33,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:33,285 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:33,285 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:33,285 INFO L791 eck$LassoCheckResult]: Stem: 551#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 552#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 562#L367 assume main_~length~0#1 < 1;main_~length~0#1 := 1; 553#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 554#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 582#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 580#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 578#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 579#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 577#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 576#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 574#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 557#L370-4 main_~j~0#1 := 0; 558#L378-2 [2021-12-19 17:42:33,286 INFO L793 eck$LassoCheckResult]: Loop: 558#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 559#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 558#L378-2 [2021-12-19 17:42:33,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:33,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1080825110, now seen corresponding path program 1 times [2021-12-19 17:42:33,286 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:33,286 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392117535] [2021-12-19 17:42:33,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,286 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:33,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,337 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,337 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:42:33,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392117535] [2021-12-19 17:42:33,338 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392117535] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:42:33,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [517173630] [2021-12-19 17:42:33,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,338 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:42:33,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:33,339 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:42:33,340 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2021-12-19 17:42:33,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,369 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 4 conjunts are in the unsatisfiable core [2021-12-19 17:42:33,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:33,403 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,403 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-12-19 17:42:33,403 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [517173630] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-19 17:42:33,403 INFO L186 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2021-12-19 17:42:33,403 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 8 [2021-12-19 17:42:33,403 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638510863] [2021-12-19 17:42:33,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-19 17:42:33,404 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:42:33,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:33,404 INFO L85 PathProgramCache]: Analyzing trace with hash 2310, now seen corresponding path program 1 times [2021-12-19 17:42:33,404 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:33,404 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896805865] [2021-12-19 17:42:33,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,404 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:33,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:33,407 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:33,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:33,410 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:33,440 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:42:33,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-12-19 17:42:33,441 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2021-12-19 17:42:33,441 INFO L87 Difference]: Start difference. First operand 37 states and 50 transitions. cyclomatic complexity: 20 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:42:33,458 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2021-12-19 17:42:33,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-19 17:42:33,459 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2021-12-19 17:42:33,459 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:33,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 32 transitions. [2021-12-19 17:42:33,459 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:42:33,459 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:42:33,459 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 32 transitions. [2021-12-19 17:42:33,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:42:33,460 INFO L681 BuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2021-12-19 17:42:33,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 32 transitions. [2021-12-19 17:42:33,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2021-12-19 17:42:33,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:33,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2021-12-19 17:42:33,461 INFO L704 BuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2021-12-19 17:42:33,461 INFO L587 BuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2021-12-19 17:42:33,461 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-19 17:42:33,461 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2021-12-19 17:42:33,462 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:42:33,462 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:42:33,462 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:42:33,462 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:42:33,462 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:42:33,462 INFO L791 eck$LassoCheckResult]: Stem: 665#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 666#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 676#L367 assume !(main_~length~0#1 < 1); 667#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 668#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 669#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 677#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 686#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 678#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 679#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 680#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 687#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 685#L370-4 main_~j~0#1 := 0; 684#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 672#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 673#L378-2 [2021-12-19 17:42:33,462 INFO L793 eck$LassoCheckResult]: Loop: 673#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 682#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 673#L378-2 [2021-12-19 17:42:33,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:33,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1295959587, now seen corresponding path program 1 times [2021-12-19 17:42:33,463 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:33,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105902854] [2021-12-19 17:42:33,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,463 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:33,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,606 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:42:33,606 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105902854] [2021-12-19 17:42:33,606 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105902854] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:42:33,606 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [761387890] [2021-12-19 17:42:33,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:33,607 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:42:33,607 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:42:33,624 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:42:33,626 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2021-12-19 17:42:33,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:42:33,658 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 22 conjunts are in the unsatisfiable core [2021-12-19 17:42:33,661 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:42:33,678 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:42:33,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:42:33,740 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2021-12-19 17:42:33,753 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:42:33,753 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2021-12-19 17:42:33,794 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-12-19 17:42:33,805 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:42:33,805 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:42:45,932 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_40| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_40| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_88 Int)) (let ((.cse0 (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_40| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse0 (* 2 (div .cse0 2))))))) is different from false [2021-12-19 17:42:45,980 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2021-12-19 17:42:45,984 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 74 [2021-12-19 17:42:46,036 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2021-12-19 17:42:46,036 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [761387890] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:42:46,036 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:42:46,036 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 18 [2021-12-19 17:42:46,036 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419895315] [2021-12-19 17:42:46,037 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:42:46,037 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:42:46,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:42:46,037 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 5 times [2021-12-19 17:42:46,037 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:42:46,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357824772] [2021-12-19 17:42:46,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:42:46,038 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:42:46,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:46,041 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:42:46,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:42:46,043 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:42:46,077 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:42:46,077 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-12-19 17:42:46,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=242, Unknown=1, NotChecked=32, Total=342 [2021-12-19 17:42:46,078 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 12 Second operand has 19 states, 18 states have (on average 1.8333333333333333) internal successors, (33), 19 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:42:58,106 WARN L838 $PredicateComparison]: unable to prove that (and (let ((.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)))) (<= .cse0 (* 2 (div .cse0 2)))) (forall ((|v_ULTIMATE.start_main_~i~0#1_40| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_40| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_88 Int)) (let ((.cse1 (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_40| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse1 (* 2 (div .cse1 2))))))) (= |c_ULTIMATE.start_main_~i~0#1| 0) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:43:10,132 WARN L838 $PredicateComparison]: unable to prove that (and (let ((.cse0 (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse0 (* 2 (div .cse0 2)))) (forall ((|v_ULTIMATE.start_main_~i~0#1_40| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_40| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_88 Int)) (let ((.cse1 (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_40| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_88) |c_ULTIMATE.start_main_~arr~0#1.offset|))) (<= .cse1 (* 2 (div .cse1 2))))))) (<= 1 |c_ULTIMATE.start_main_~i~0#1|) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:43:10,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:43:10,179 INFO L93 Difference]: Finished difference Result 36 states and 47 transitions. [2021-12-19 17:43:10,180 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-19 17:43:10,180 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36 states and 47 transitions. [2021-12-19 17:43:10,180 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:43:10,181 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36 states to 35 states and 46 transitions. [2021-12-19 17:43:10,181 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:43:10,181 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:43:10,181 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 46 transitions. [2021-12-19 17:43:10,181 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:43:10,181 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 46 transitions. [2021-12-19 17:43:10,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 46 transitions. [2021-12-19 17:43:10,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 26. [2021-12-19 17:43:10,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 25 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:43:10,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2021-12-19 17:43:10,182 INFO L704 BuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2021-12-19 17:43:10,182 INFO L587 BuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2021-12-19 17:43:10,182 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-19 17:43:10,182 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 35 transitions. [2021-12-19 17:43:10,183 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:43:10,183 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:43:10,183 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:43:10,183 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:43:10,183 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:43:10,183 INFO L791 eck$LassoCheckResult]: Stem: 838#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 839#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 849#L367 assume !(main_~length~0#1 < 1); 840#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 841#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 842#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 850#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 854#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 851#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 852#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 857#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 855#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 847#L370-4 main_~j~0#1 := 0; 848#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 845#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 846#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 843#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 844#L378-2 [2021-12-19 17:43:10,183 INFO L793 eck$LassoCheckResult]: Loop: 844#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 853#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 844#L378-2 [2021-12-19 17:43:10,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:43:10,184 INFO L85 PathProgramCache]: Analyzing trace with hash 123352160, now seen corresponding path program 1 times [2021-12-19 17:43:10,184 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:43:10,184 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613481726] [2021-12-19 17:43:10,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:10,184 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:43:10,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:43:10,256 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,256 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:43:10,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613481726] [2021-12-19 17:43:10,257 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613481726] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:43:10,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2124576127] [2021-12-19 17:43:10,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:10,257 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:43:10,257 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:43:10,258 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:43:10,260 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-12-19 17:43:10,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:43:10,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 19 conjunts are in the unsatisfiable core [2021-12-19 17:43:10,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:43:10,350 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-12-19 17:43:10,422 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:43:10,424 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,424 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:43:10,485 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2021-12-19 17:43:10,487 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2021-12-19 17:43:10,506 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,506 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2124576127] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:43:10,506 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:43:10,506 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 18 [2021-12-19 17:43:10,506 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906444501] [2021-12-19 17:43:10,506 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:43:10,507 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:43:10,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:43:10,507 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 6 times [2021-12-19 17:43:10,507 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:43:10,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450170011] [2021-12-19 17:43:10,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:10,507 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:43:10,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:43:10,510 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:43:10,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:43:10,513 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:43:10,548 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:43:10,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-12-19 17:43:10,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2021-12-19 17:43:10,549 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. cyclomatic complexity: 13 Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 19 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:43:10,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:43:10,643 INFO L93 Difference]: Finished difference Result 41 states and 54 transitions. [2021-12-19 17:43:10,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-19 17:43:10,644 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 54 transitions. [2021-12-19 17:43:10,644 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:43:10,645 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 53 transitions. [2021-12-19 17:43:10,645 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:43:10,645 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:43:10,645 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 53 transitions. [2021-12-19 17:43:10,645 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:43:10,645 INFO L681 BuchiCegarLoop]: Abstraction has 40 states and 53 transitions. [2021-12-19 17:43:10,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 53 transitions. [2021-12-19 17:43:10,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 33. [2021-12-19 17:43:10,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.3333333333333333) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:43:10,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2021-12-19 17:43:10,647 INFO L704 BuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2021-12-19 17:43:10,647 INFO L587 BuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2021-12-19 17:43:10,647 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-12-19 17:43:10,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 44 transitions. [2021-12-19 17:43:10,647 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:43:10,647 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:43:10,647 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:43:10,648 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:43:10,648 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:43:10,649 INFO L791 eck$LassoCheckResult]: Stem: 1027#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1038#L367 assume !(main_~length~0#1 < 1); 1029#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1030#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1031#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1039#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1053#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1040#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1041#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1045#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1046#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1036#L370-4 main_~j~0#1 := 0; 1037#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1034#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1035#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1032#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1033#L378-2 [2021-12-19 17:43:10,649 INFO L793 eck$LassoCheckResult]: Loop: 1033#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1047#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1033#L378-2 [2021-12-19 17:43:10,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:43:10,649 INFO L85 PathProgramCache]: Analyzing trace with hash -685994466, now seen corresponding path program 2 times [2021-12-19 17:43:10,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:43:10,649 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166363021] [2021-12-19 17:43:10,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:10,649 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:43:10,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:43:10,743 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,743 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:43:10,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166363021] [2021-12-19 17:43:10,743 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [166363021] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:43:10,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [296304435] [2021-12-19 17:43:10,744 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:43:10,744 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:43:10,744 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:43:10,745 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:43:10,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2021-12-19 17:43:10,798 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:43:10,798 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:43:10,799 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 17 conjunts are in the unsatisfiable core [2021-12-19 17:43:10,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:43:10,824 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:43:10,893 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:43:10,895 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:43:10,948 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:43:10,950 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:43:10,966 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:10,966 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [296304435] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:43:10,966 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:43:10,966 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 13 [2021-12-19 17:43:10,966 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [887339555] [2021-12-19 17:43:10,966 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:43:10,966 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:43:10,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:43:10,966 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 7 times [2021-12-19 17:43:10,967 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:43:10,967 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840835708] [2021-12-19 17:43:10,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:10,967 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:43:10,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:43:10,969 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:43:10,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:43:10,971 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:43:11,004 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:43:11,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-12-19 17:43:11,005 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2021-12-19 17:43:11,005 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. cyclomatic complexity: 15 Second operand has 14 states, 13 states have (on average 2.076923076923077) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:43:11,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:43:11,092 INFO L93 Difference]: Finished difference Result 45 states and 58 transitions. [2021-12-19 17:43:11,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-19 17:43:11,092 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 58 transitions. [2021-12-19 17:43:11,093 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:43:11,093 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 57 transitions. [2021-12-19 17:43:11,093 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-12-19 17:43:11,093 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-12-19 17:43:11,093 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 57 transitions. [2021-12-19 17:43:11,093 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:43:11,093 INFO L681 BuchiCegarLoop]: Abstraction has 44 states and 57 transitions. [2021-12-19 17:43:11,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 57 transitions. [2021-12-19 17:43:11,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 33. [2021-12-19 17:43:11,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.3333333333333333) internal successors, (44), 32 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:43:11,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 44 transitions. [2021-12-19 17:43:11,095 INFO L704 BuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2021-12-19 17:43:11,095 INFO L587 BuchiCegarLoop]: Abstraction has 33 states and 44 transitions. [2021-12-19 17:43:11,095 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-12-19 17:43:11,095 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 44 transitions. [2021-12-19 17:43:11,096 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:43:11,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:43:11,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:43:11,096 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:43:11,096 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:43:11,096 INFO L791 eck$LassoCheckResult]: Stem: 1222#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1223#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1233#L367 assume !(main_~length~0#1 < 1); 1224#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1225#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1226#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1234#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1254#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1253#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1251#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1252#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1235#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1237#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1240#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1241#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1231#L370-4 main_~j~0#1 := 0; 1232#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1227#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1228#L378-2 [2021-12-19 17:43:11,096 INFO L793 eck$LassoCheckResult]: Loop: 1228#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1242#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1228#L378-2 [2021-12-19 17:43:11,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:43:11,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1119422815, now seen corresponding path program 2 times [2021-12-19 17:43:11,097 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:43:11,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337996138] [2021-12-19 17:43:11,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:43:11,097 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:43:11,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:43:11,247 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:11,248 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:43:11,248 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337996138] [2021-12-19 17:43:11,248 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337996138] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:43:11,248 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [949818849] [2021-12-19 17:43:11,248 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:43:11,248 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:43:11,248 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:43:11,249 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:43:11,253 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2021-12-19 17:43:11,290 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:43:11,291 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:43:11,291 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-19 17:43:11,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:43:11,328 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:43:11,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:43:11,380 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:43:11,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:43:11,390 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:43:11,424 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:43:11,424 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:43:11,475 INFO L173 IndexEqualityManager]: detected equality via solver [2021-12-19 17:43:11,477 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-19 17:43:11,477 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 12 [2021-12-19 17:43:11,486 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:43:11,486 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:13,325 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2021-12-19 17:44:13,330 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 98 [2021-12-19 17:44:13,389 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:44:13,389 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [949818849] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:13,389 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:13,389 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9] total 26 [2021-12-19 17:44:13,389 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494330847] [2021-12-19 17:44:13,389 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:13,390 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:13,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:13,390 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 8 times [2021-12-19 17:44:13,390 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:13,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48958671] [2021-12-19 17:44:13,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:13,390 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:13,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:13,392 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:13,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:13,396 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:13,430 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:13,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-12-19 17:44:13,431 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=557, Unknown=3, NotChecked=0, Total=702 [2021-12-19 17:44:13,431 INFO L87 Difference]: Start difference. First operand 33 states and 44 transitions. cyclomatic complexity: 15 Second operand has 27 states, 26 states have (on average 1.8076923076923077) internal successors, (47), 27 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:13,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:13,589 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2021-12-19 17:44:13,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-19 17:44:13,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 47 transitions. [2021-12-19 17:44:13,590 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:13,590 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 36 states and 46 transitions. [2021-12-19 17:44:13,590 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-19 17:44:13,590 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-19 17:44:13,590 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 46 transitions. [2021-12-19 17:44:13,591 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:13,591 INFO L681 BuchiCegarLoop]: Abstraction has 36 states and 46 transitions. [2021-12-19 17:44:13,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states and 46 transitions. [2021-12-19 17:44:13,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 29. [2021-12-19 17:44:13,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.3103448275862069) internal successors, (38), 28 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:13,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 38 transitions. [2021-12-19 17:44:13,592 INFO L704 BuchiCegarLoop]: Abstraction has 29 states and 38 transitions. [2021-12-19 17:44:13,592 INFO L587 BuchiCegarLoop]: Abstraction has 29 states and 38 transitions. [2021-12-19 17:44:13,592 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-12-19 17:44:13,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 38 transitions. [2021-12-19 17:44:13,592 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:13,592 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:13,592 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:13,592 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:13,592 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:13,593 INFO L791 eck$LassoCheckResult]: Stem: 1433#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1434#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1444#L367 assume !(main_~length~0#1 < 1); 1435#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1436#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1437#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1445#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1460#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1446#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1447#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1448#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1461#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1456#L370-4 main_~j~0#1 := 0; 1455#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1454#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1450#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1440#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1441#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1438#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1439#L378-2 [2021-12-19 17:44:13,593 INFO L793 eck$LassoCheckResult]: Loop: 1439#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1453#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1439#L378-2 [2021-12-19 17:44:13,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:13,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1717659101, now seen corresponding path program 2 times [2021-12-19 17:44:13,593 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:13,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306452041] [2021-12-19 17:44:13,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:13,593 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:13,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:13,640 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:13,640 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:13,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306452041] [2021-12-19 17:44:13,640 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306452041] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:13,641 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1532652095] [2021-12-19 17:44:13,641 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:44:13,641 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:13,641 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:13,642 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:13,643 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2021-12-19 17:44:13,681 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:44:13,681 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:13,682 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 8 conjunts are in the unsatisfiable core [2021-12-19 17:44:13,682 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:13,748 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:13,748 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:13,799 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:13,799 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1532652095] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:13,799 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:13,799 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2021-12-19 17:44:13,800 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812939915] [2021-12-19 17:44:13,800 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:13,800 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:13,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:13,800 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 9 times [2021-12-19 17:44:13,800 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:13,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256755465] [2021-12-19 17:44:13,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:13,800 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:13,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:13,803 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:13,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:13,806 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:13,865 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:13,866 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-12-19 17:44:13,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2021-12-19 17:44:13,866 INFO L87 Difference]: Start difference. First operand 29 states and 38 transitions. cyclomatic complexity: 13 Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 14 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:13,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:13,942 INFO L93 Difference]: Finished difference Result 41 states and 52 transitions. [2021-12-19 17:44:13,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-12-19 17:44:13,943 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 52 transitions. [2021-12-19 17:44:13,943 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:13,943 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 35 states and 45 transitions. [2021-12-19 17:44:13,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:44:13,943 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:44:13,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 45 transitions. [2021-12-19 17:44:13,944 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:13,944 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 45 transitions. [2021-12-19 17:44:13,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 45 transitions. [2021-12-19 17:44:13,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 31. [2021-12-19 17:44:13,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.2580645161290323) internal successors, (39), 30 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:13,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 39 transitions. [2021-12-19 17:44:13,945 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 39 transitions. [2021-12-19 17:44:13,945 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 39 transitions. [2021-12-19 17:44:13,945 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-12-19 17:44:13,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 39 transitions. [2021-12-19 17:44:13,945 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:13,945 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:13,945 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:13,945 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:13,945 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:13,946 INFO L791 eck$LassoCheckResult]: Stem: 1636#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1637#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1647#L367 assume !(main_~length~0#1 < 1); 1638#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1639#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1640#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1648#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1651#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1649#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1650#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1665#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1666#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1654#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1655#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1653#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1641#L370-4 main_~j~0#1 := 0; 1642#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1645#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1646#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1643#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1644#L378-2 [2021-12-19 17:44:13,946 INFO L793 eck$LassoCheckResult]: Loop: 1644#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1656#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1644#L378-2 [2021-12-19 17:44:13,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:13,946 INFO L85 PathProgramCache]: Analyzing trace with hash 2023500642, now seen corresponding path program 3 times [2021-12-19 17:44:13,946 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:13,946 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784529901] [2021-12-19 17:44:13,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:13,946 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:13,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:14,057 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:14,057 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:14,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784529901] [2021-12-19 17:44:14,058 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784529901] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:14,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1107220940] [2021-12-19 17:44:14,058 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:44:14,058 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:14,058 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:14,087 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:14,088 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-12-19 17:44:14,141 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2021-12-19 17:44:14,141 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:14,142 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-19 17:44:14,143 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:14,162 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:14,213 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:44:14,213 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:44:14,260 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2021-12-19 17:44:14,262 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:14,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:26,350 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_64| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_64| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_188 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_64| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_188) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2))))) is different from false [2021-12-19 17:44:26,361 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2021-12-19 17:44:26,368 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 182 [2021-12-19 17:44:26,429 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2021-12-19 17:44:26,429 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1107220940] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:26,429 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:26,429 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2021-12-19 17:44:26,429 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838232202] [2021-12-19 17:44:26,429 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:26,429 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:26,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:26,429 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 10 times [2021-12-19 17:44:26,430 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:26,430 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283732561] [2021-12-19 17:44:26,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:26,430 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:26,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:26,432 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:26,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:26,434 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:26,467 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:26,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-12-19 17:44:26,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=221, Unknown=1, NotChecked=30, Total=306 [2021-12-19 17:44:26,468 INFO L87 Difference]: Start difference. First operand 31 states and 39 transitions. cyclomatic complexity: 12 Second operand has 18 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 18 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:38,502 WARN L838 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_64| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_64| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_188 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_64| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_188) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 4)) 2))))) (<= |c_ULTIMATE.start_main_~i~0#1| 1) (<= 1 |c_ULTIMATE.start_main_~i~0#1|)) is different from false [2021-12-19 17:44:38,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:38,593 INFO L93 Difference]: Finished difference Result 45 states and 57 transitions. [2021-12-19 17:44:38,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-19 17:44:38,593 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 57 transitions. [2021-12-19 17:44:38,594 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:44:38,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 56 transitions. [2021-12-19 17:44:38,594 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:44:38,594 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:44:38,594 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 56 transitions. [2021-12-19 17:44:38,594 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:38,594 INFO L681 BuchiCegarLoop]: Abstraction has 44 states and 56 transitions. [2021-12-19 17:44:38,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 56 transitions. [2021-12-19 17:44:38,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 34. [2021-12-19 17:44:38,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:38,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 44 transitions. [2021-12-19 17:44:38,596 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 44 transitions. [2021-12-19 17:44:38,596 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 44 transitions. [2021-12-19 17:44:38,596 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-12-19 17:44:38,596 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 44 transitions. [2021-12-19 17:44:38,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:38,596 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:38,596 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:38,596 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:38,596 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:38,596 INFO L791 eck$LassoCheckResult]: Stem: 1851#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1852#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 1862#L367 assume !(main_~length~0#1 < 1); 1853#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 1854#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 1855#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1863#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1866#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1864#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1865#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 1883#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1881#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1870#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 1877#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 1875#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 1874#L370-4 main_~j~0#1 := 0; 1867#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1868#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1872#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1858#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 1859#L378-2 [2021-12-19 17:44:38,598 INFO L793 eck$LassoCheckResult]: Loop: 1859#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 1873#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 1859#L378-2 [2021-12-19 17:44:38,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:38,599 INFO L85 PathProgramCache]: Analyzing trace with hash -761055450, now seen corresponding path program 4 times [2021-12-19 17:44:38,599 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:38,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390008840] [2021-12-19 17:44:38,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:38,599 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:38,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:38,722 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:38,722 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:38,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390008840] [2021-12-19 17:44:38,722 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1390008840] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:38,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1777292506] [2021-12-19 17:44:38,722 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:44:38,722 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:38,722 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:38,744 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:38,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-12-19 17:44:38,803 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:44:38,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:38,804 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 26 conjunts are in the unsatisfiable core [2021-12-19 17:44:38,806 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:38,862 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:38,932 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:44:38,933 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:44:38,944 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:44:38,945 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:44:39,032 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:44:39,042 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:39,042 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:39,179 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:44:39,181 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:44:39,199 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:39,199 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1777292506] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:39,199 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:39,199 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 10] total 22 [2021-12-19 17:44:39,199 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932833864] [2021-12-19 17:44:39,199 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:39,201 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:39,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:39,201 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 11 times [2021-12-19 17:44:39,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:39,202 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518844251] [2021-12-19 17:44:39,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:39,202 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:39,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:39,205 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:39,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:39,207 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:39,244 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:39,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-12-19 17:44:39,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=419, Unknown=0, NotChecked=0, Total=506 [2021-12-19 17:44:39,245 INFO L87 Difference]: Start difference. First operand 34 states and 44 transitions. cyclomatic complexity: 14 Second operand has 23 states, 22 states have (on average 1.9090909090909092) internal successors, (42), 23 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:39,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:39,426 INFO L93 Difference]: Finished difference Result 38 states and 48 transitions. [2021-12-19 17:44:39,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-19 17:44:39,426 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 48 transitions. [2021-12-19 17:44:39,427 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:39,427 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 37 states and 47 transitions. [2021-12-19 17:44:39,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:44:39,427 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:44:39,427 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 47 transitions. [2021-12-19 17:44:39,427 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:39,427 INFO L681 BuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2021-12-19 17:44:39,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 47 transitions. [2021-12-19 17:44:39,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 24. [2021-12-19 17:44:39,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.25) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:39,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 30 transitions. [2021-12-19 17:44:39,428 INFO L704 BuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2021-12-19 17:44:39,428 INFO L587 BuchiCegarLoop]: Abstraction has 24 states and 30 transitions. [2021-12-19 17:44:39,428 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-12-19 17:44:39,428 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 30 transitions. [2021-12-19 17:44:39,428 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:39,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:39,429 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:39,429 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:39,429 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:39,429 INFO L791 eck$LassoCheckResult]: Stem: 2069#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2070#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2080#L367 assume !(main_~length~0#1 < 1); 2071#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2072#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2073#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2081#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2092#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2091#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2090#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2089#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2082#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2083#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2084#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2086#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2074#L370-4 main_~j~0#1 := 0; 2075#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2078#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2079#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2085#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2087#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2076#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2077#L378-2 [2021-12-19 17:44:39,432 INFO L793 eck$LassoCheckResult]: Loop: 2077#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2088#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2077#L378-2 [2021-12-19 17:44:39,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:39,433 INFO L85 PathProgramCache]: Analyzing trace with hash -1622874713, now seen corresponding path program 3 times [2021-12-19 17:44:39,434 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:39,434 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703385633] [2021-12-19 17:44:39,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:39,434 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:39,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:39,584 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:39,584 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:39,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703385633] [2021-12-19 17:44:39,584 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1703385633] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:39,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [378561398] [2021-12-19 17:44:39,584 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:44:39,584 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:39,584 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:39,585 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:39,628 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-12-19 17:44:39,643 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2021-12-19 17:44:39,643 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:39,643 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-19 17:44:39,645 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:39,696 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:39,915 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:44:39,915 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:44:39,927 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:39,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:40,235 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:44:40,239 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:44:40,260 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:40,260 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [378561398] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:40,260 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:40,260 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 12] total 28 [2021-12-19 17:44:40,261 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613051481] [2021-12-19 17:44:40,261 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:40,261 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:40,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:40,261 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 12 times [2021-12-19 17:44:40,261 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:40,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011465467] [2021-12-19 17:44:40,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:40,262 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:40,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:40,277 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:40,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:40,282 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:40,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:40,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-12-19 17:44:40,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=695, Unknown=0, NotChecked=0, Total=812 [2021-12-19 17:44:40,320 INFO L87 Difference]: Start difference. First operand 24 states and 30 transitions. cyclomatic complexity: 9 Second operand has 29 states, 28 states have (on average 1.75) internal successors, (49), 29 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:40,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:40,661 INFO L93 Difference]: Finished difference Result 43 states and 53 transitions. [2021-12-19 17:44:40,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-12-19 17:44:40,662 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 53 transitions. [2021-12-19 17:44:40,662 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:40,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 29 states and 36 transitions. [2021-12-19 17:44:40,663 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2021-12-19 17:44:40,663 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2021-12-19 17:44:40,663 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 36 transitions. [2021-12-19 17:44:40,663 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:40,663 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2021-12-19 17:44:40,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 36 transitions. [2021-12-19 17:44:40,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2021-12-19 17:44:40,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2592592592592593) internal successors, (34), 26 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:40,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 34 transitions. [2021-12-19 17:44:40,664 INFO L704 BuchiCegarLoop]: Abstraction has 27 states and 34 transitions. [2021-12-19 17:44:40,664 INFO L587 BuchiCegarLoop]: Abstraction has 27 states and 34 transitions. [2021-12-19 17:44:40,664 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-12-19 17:44:40,664 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 34 transitions. [2021-12-19 17:44:40,664 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:40,664 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:40,664 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:40,665 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:40,665 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:40,665 INFO L791 eck$LassoCheckResult]: Stem: 2324#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2335#L367 assume !(main_~length~0#1 < 1); 2326#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2327#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2328#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2336#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2350#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2337#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2338#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2341#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2342#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2349#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2348#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2346#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2344#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2345#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2343#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2333#L370-4 main_~j~0#1 := 0; 2334#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2339#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2340#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2331#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2332#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2329#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2330#L378-2 [2021-12-19 17:44:40,665 INFO L793 eck$LassoCheckResult]: Loop: 2330#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2347#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2330#L378-2 [2021-12-19 17:44:40,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:40,665 INFO L85 PathProgramCache]: Analyzing trace with hash 892120737, now seen corresponding path program 4 times [2021-12-19 17:44:40,665 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:40,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888318081] [2021-12-19 17:44:40,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:40,665 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:40,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:40,814 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:40,814 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:40,814 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [888318081] [2021-12-19 17:44:40,814 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [888318081] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:40,814 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2141108681] [2021-12-19 17:44:40,814 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:44:40,814 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:40,814 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:40,816 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:40,816 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-12-19 17:44:40,865 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:44:40,865 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:40,880 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 28 conjunts are in the unsatisfiable core [2021-12-19 17:44:40,881 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:40,962 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:41,035 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:44:41,036 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:44:41,160 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:44:41,171 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:41,172 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:41,297 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:44:41,299 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:44:41,326 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:41,326 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2141108681] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:41,326 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:41,326 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2021-12-19 17:44:41,326 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033620383] [2021-12-19 17:44:41,326 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:41,326 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:41,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:41,327 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 13 times [2021-12-19 17:44:41,327 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:41,327 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402946858] [2021-12-19 17:44:41,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:41,327 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:41,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:41,329 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:41,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:41,331 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:41,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:41,360 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-12-19 17:44:41,360 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2021-12-19 17:44:41,360 INFO L87 Difference]: Start difference. First operand 27 states and 34 transitions. cyclomatic complexity: 10 Second operand has 27 states, 26 states have (on average 2.0) internal successors, (52), 27 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:41,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:41,528 INFO L93 Difference]: Finished difference Result 31 states and 38 transitions. [2021-12-19 17:44:41,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-19 17:44:41,529 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 38 transitions. [2021-12-19 17:44:41,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:41,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 37 transitions. [2021-12-19 17:44:41,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2021-12-19 17:44:41,530 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2021-12-19 17:44:41,530 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 37 transitions. [2021-12-19 17:44:41,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:41,530 INFO L681 BuchiCegarLoop]: Abstraction has 30 states and 37 transitions. [2021-12-19 17:44:41,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 37 transitions. [2021-12-19 17:44:41,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2021-12-19 17:44:41,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2413793103448276) internal successors, (36), 28 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:41,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 36 transitions. [2021-12-19 17:44:41,531 INFO L704 BuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2021-12-19 17:44:41,531 INFO L587 BuchiCegarLoop]: Abstraction has 29 states and 36 transitions. [2021-12-19 17:44:41,531 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-12-19 17:44:41,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 36 transitions. [2021-12-19 17:44:41,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:41,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:41,531 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:41,531 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:41,531 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:41,532 INFO L791 eck$LassoCheckResult]: Stem: 2564#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2565#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2575#L367 assume !(main_~length~0#1 < 1); 2566#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2567#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2568#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2576#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2581#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2577#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2578#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2589#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2588#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2587#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2586#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2585#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2583#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2584#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2582#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2573#L370-4 main_~j~0#1 := 0; 2574#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2571#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2572#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2592#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2579#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2580#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2591#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2569#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2570#L378-2 [2021-12-19 17:44:41,532 INFO L793 eck$LassoCheckResult]: Loop: 2570#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2590#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2570#L378-2 [2021-12-19 17:44:41,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:41,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1665431516, now seen corresponding path program 5 times [2021-12-19 17:44:41,532 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:41,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539622294] [2021-12-19 17:44:41,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:41,532 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:41,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:41,693 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:41,693 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:41,693 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539622294] [2021-12-19 17:44:41,693 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [539622294] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:41,693 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [919096329] [2021-12-19 17:44:41,693 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:44:41,693 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:41,694 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:41,695 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:41,711 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-12-19 17:44:41,783 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2021-12-19 17:44:41,783 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:41,783 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 25 conjunts are in the unsatisfiable core [2021-12-19 17:44:41,789 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:41,856 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:42,013 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:44:42,015 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:42,015 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:42,129 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:44:42,131 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:44:42,162 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:42,162 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [919096329] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:42,162 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:42,162 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 21 [2021-12-19 17:44:42,162 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673572483] [2021-12-19 17:44:42,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:42,163 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:42,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:42,163 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 14 times [2021-12-19 17:44:42,164 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:42,164 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165086250] [2021-12-19 17:44:42,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:42,164 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:42,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:42,166 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:42,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:42,168 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:42,205 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:42,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2021-12-19 17:44:42,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2021-12-19 17:44:42,219 INFO L87 Difference]: Start difference. First operand 29 states and 36 transitions. cyclomatic complexity: 10 Second operand has 22 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 22 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:42,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:42,466 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2021-12-19 17:44:42,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-12-19 17:44:42,466 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 61 transitions. [2021-12-19 17:44:42,466 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:44:42,467 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 60 transitions. [2021-12-19 17:44:42,467 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2021-12-19 17:44:42,467 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-19 17:44:42,467 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 60 transitions. [2021-12-19 17:44:42,467 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:42,467 INFO L681 BuchiCegarLoop]: Abstraction has 48 states and 60 transitions. [2021-12-19 17:44:42,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 60 transitions. [2021-12-19 17:44:42,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 36. [2021-12-19 17:44:42,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.25) internal successors, (45), 35 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:42,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. [2021-12-19 17:44:42,468 INFO L704 BuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2021-12-19 17:44:42,468 INFO L587 BuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2021-12-19 17:44:42,468 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-12-19 17:44:42,468 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 45 transitions. [2021-12-19 17:44:42,469 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:42,469 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:42,469 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:42,469 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:42,469 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:42,469 INFO L791 eck$LassoCheckResult]: Stem: 2827#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2828#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 2838#L367 assume !(main_~length~0#1 < 1); 2829#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 2830#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 2831#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2839#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2853#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2840#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2841#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2844#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2845#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2852#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 2851#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2850#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2847#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 2849#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 2861#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 2860#L370-4 main_~j~0#1 := 0; 2842#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2834#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2835#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2858#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2857#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2856#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2855#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2832#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 2833#L378-2 [2021-12-19 17:44:42,470 INFO L793 eck$LassoCheckResult]: Loop: 2833#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 2854#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 2833#L378-2 [2021-12-19 17:44:42,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:42,471 INFO L85 PathProgramCache]: Analyzing trace with hash -1923596954, now seen corresponding path program 5 times [2021-12-19 17:44:42,471 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:42,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103200581] [2021-12-19 17:44:42,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:42,471 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:42,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:42,641 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:42,641 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:42,641 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103200581] [2021-12-19 17:44:42,641 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2103200581] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:42,641 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [769534471] [2021-12-19 17:44:42,641 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:44:42,642 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:42,642 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:42,643 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:42,644 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-12-19 17:44:42,695 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2021-12-19 17:44:42,695 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:42,696 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 23 conjunts are in the unsatisfiable core [2021-12-19 17:44:42,697 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:42,737 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:42,836 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2021-12-19 17:44:42,838 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:42,838 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:42,988 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2021-12-19 17:44:42,990 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 32 [2021-12-19 17:44:43,028 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:43,029 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [769534471] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:43,029 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:43,029 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 23 [2021-12-19 17:44:43,029 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [407617018] [2021-12-19 17:44:43,029 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:43,029 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:43,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:43,029 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 15 times [2021-12-19 17:44:43,029 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:43,029 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87298809] [2021-12-19 17:44:43,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:43,030 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:43,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:43,032 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:43,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:43,033 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:43,069 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:43,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-12-19 17:44:43,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=478, Unknown=0, NotChecked=0, Total=552 [2021-12-19 17:44:43,069 INFO L87 Difference]: Start difference. First operand 36 states and 45 transitions. cyclomatic complexity: 13 Second operand has 24 states, 23 states have (on average 2.130434782608696) internal successors, (49), 24 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:43,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:43,270 INFO L93 Difference]: Finished difference Result 55 states and 68 transitions. [2021-12-19 17:44:43,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-19 17:44:43,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 68 transitions. [2021-12-19 17:44:43,271 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:44:43,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 54 states and 67 transitions. [2021-12-19 17:44:43,271 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:44:43,271 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:44:43,271 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 67 transitions. [2021-12-19 17:44:43,271 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:43,271 INFO L681 BuchiCegarLoop]: Abstraction has 54 states and 67 transitions. [2021-12-19 17:44:43,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 67 transitions. [2021-12-19 17:44:43,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 39. [2021-12-19 17:44:43,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2820512820512822) internal successors, (50), 38 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:43,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 50 transitions. [2021-12-19 17:44:43,273 INFO L704 BuchiCegarLoop]: Abstraction has 39 states and 50 transitions. [2021-12-19 17:44:43,273 INFO L587 BuchiCegarLoop]: Abstraction has 39 states and 50 transitions. [2021-12-19 17:44:43,273 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-12-19 17:44:43,273 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 50 transitions. [2021-12-19 17:44:43,273 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:43,273 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:43,273 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:43,273 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:43,273 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:43,274 INFO L791 eck$LassoCheckResult]: Stem: 3103#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3104#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3114#L367 assume !(main_~length~0#1 < 1); 3105#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3106#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3107#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3115#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3122#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3116#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3117#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3141#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3140#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3139#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3138#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3137#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3119#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3120#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3136#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3112#L370-4 main_~j~0#1 := 0; 3113#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3110#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3111#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3118#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3130#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3129#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3128#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3126#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3125#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3108#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3109#L378-2 [2021-12-19 17:44:43,274 INFO L793 eck$LassoCheckResult]: Loop: 3109#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3127#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3109#L378-2 [2021-12-19 17:44:43,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:43,274 INFO L85 PathProgramCache]: Analyzing trace with hash -1740736087, now seen corresponding path program 6 times [2021-12-19 17:44:43,274 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:43,274 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656482176] [2021-12-19 17:44:43,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:43,274 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:43,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:43,353 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 13 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:43,354 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:43,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656482176] [2021-12-19 17:44:43,354 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656482176] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:43,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [603274631] [2021-12-19 17:44:43,354 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:44:43,354 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:43,354 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:43,355 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:43,356 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-12-19 17:44:43,414 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2021-12-19 17:44:43,414 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:44:43,414 INFO L263 TraceCheckSpWp]: Trace formula consists of 159 conjuncts, 12 conjunts are in the unsatisfiable core [2021-12-19 17:44:43,415 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:43,530 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:43,530 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:43,580 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 20 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:43,580 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [603274631] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:43,580 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:43,581 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 20 [2021-12-19 17:44:43,581 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18977937] [2021-12-19 17:44:43,581 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:43,581 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:43,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:43,581 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 16 times [2021-12-19 17:44:43,581 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:43,581 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633590356] [2021-12-19 17:44:43,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:43,581 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:43,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:43,584 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:43,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:43,585 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:43,621 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:43,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2021-12-19 17:44:43,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 [2021-12-19 17:44:43,622 INFO L87 Difference]: Start difference. First operand 39 states and 50 transitions. cyclomatic complexity: 15 Second operand has 20 states, 20 states have (on average 2.3) internal successors, (46), 20 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:43,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:44:43,727 INFO L93 Difference]: Finished difference Result 55 states and 68 transitions. [2021-12-19 17:44:43,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-19 17:44:43,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 68 transitions. [2021-12-19 17:44:43,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:43,728 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 45 states and 57 transitions. [2021-12-19 17:44:43,728 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:44:43,728 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:44:43,728 INFO L73 IsDeterministic]: Start isDeterministic. Operand 45 states and 57 transitions. [2021-12-19 17:44:43,728 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:44:43,728 INFO L681 BuchiCegarLoop]: Abstraction has 45 states and 57 transitions. [2021-12-19 17:44:43,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states and 57 transitions. [2021-12-19 17:44:43,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 41. [2021-12-19 17:44:43,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:44:43,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 51 transitions. [2021-12-19 17:44:43,729 INFO L704 BuchiCegarLoop]: Abstraction has 41 states and 51 transitions. [2021-12-19 17:44:43,729 INFO L587 BuchiCegarLoop]: Abstraction has 41 states and 51 transitions. [2021-12-19 17:44:43,729 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-12-19 17:44:43,729 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 51 transitions. [2021-12-19 17:44:43,730 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:44:43,730 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:44:43,730 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:44:43,730 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:44:43,730 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:44:43,730 INFO L791 eck$LassoCheckResult]: Stem: 3400#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3401#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3411#L367 assume !(main_~length~0#1 < 1); 3402#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3403#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3404#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3412#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3417#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3418#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3440#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3439#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3438#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3437#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3436#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3435#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3433#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3434#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3413#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3414#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3430#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3428#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3427#L370-4 main_~j~0#1 := 0; 3415#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3407#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3408#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3423#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3422#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3420#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3419#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3405#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3406#L378-2 [2021-12-19 17:44:43,730 INFO L793 eck$LassoCheckResult]: Loop: 3406#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3421#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3406#L378-2 [2021-12-19 17:44:43,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:43,731 INFO L85 PathProgramCache]: Analyzing trace with hash -548047128, now seen corresponding path program 7 times [2021-12-19 17:44:43,731 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:43,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146970476] [2021-12-19 17:44:43,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:43,731 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:43,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:43,875 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:43,875 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:44:43,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146970476] [2021-12-19 17:44:43,876 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [146970476] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:44:43,876 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [59491591] [2021-12-19 17:44:43,876 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:44:43,876 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:44:43,876 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:44:43,891 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:44:43,929 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-12-19 17:44:43,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:44:43,972 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 30 conjunts are in the unsatisfiable core [2021-12-19 17:44:43,973 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:44:44,085 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:44:44,134 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:44:44,134 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:44:44,288 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:44:44,290 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:44:44,290 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:44:56,489 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_118| Int)) (or (forall ((v_ArrVal_359 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_118| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_359) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_118| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from false [2021-12-19 17:44:56,497 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2021-12-19 17:44:56,500 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 182 [2021-12-19 17:44:56,589 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2021-12-19 17:44:56,589 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [59491591] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:44:56,589 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:44:56,589 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13] total 33 [2021-12-19 17:44:56,589 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542214386] [2021-12-19 17:44:56,589 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:44:56,589 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:44:56,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:44:56,590 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 17 times [2021-12-19 17:44:56,590 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:44:56,590 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701108407] [2021-12-19 17:44:56,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:44:56,590 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:44:56,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:56,592 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:44:56,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:44:56,594 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:44:56,635 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:44:56,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-12-19 17:44:56,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=931, Unknown=1, NotChecked=62, Total=1122 [2021-12-19 17:44:56,636 INFO L87 Difference]: Start difference. First operand 41 states and 51 transitions. cyclomatic complexity: 14 Second operand has 34 states, 33 states have (on average 2.1515151515151514) internal successors, (71), 34 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:08,749 WARN L838 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= |c_ULTIMATE.start_main_~i~0#1| 3) (forall ((|v_ULTIMATE.start_main_~i~0#1_118| Int)) (or (forall ((v_ArrVal_359 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_118| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_359) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_118| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:45:08,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:08,936 INFO L93 Difference]: Finished difference Result 59 states and 73 transitions. [2021-12-19 17:45:08,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-19 17:45:08,937 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 73 transitions. [2021-12-19 17:45:08,937 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:45:08,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 58 states and 72 transitions. [2021-12-19 17:45:08,937 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:45:08,937 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:45:08,937 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 72 transitions. [2021-12-19 17:45:08,937 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:08,938 INFO L681 BuchiCegarLoop]: Abstraction has 58 states and 72 transitions. [2021-12-19 17:45:08,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 72 transitions. [2021-12-19 17:45:08,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 44. [2021-12-19 17:45:08,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.2727272727272727) internal successors, (56), 43 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:08,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 56 transitions. [2021-12-19 17:45:08,939 INFO L704 BuchiCegarLoop]: Abstraction has 44 states and 56 transitions. [2021-12-19 17:45:08,939 INFO L587 BuchiCegarLoop]: Abstraction has 44 states and 56 transitions. [2021-12-19 17:45:08,939 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-12-19 17:45:08,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 56 transitions. [2021-12-19 17:45:08,939 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:08,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:08,939 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:08,940 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:08,940 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:08,940 INFO L791 eck$LassoCheckResult]: Stem: 3725#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3726#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 3736#L367 assume !(main_~length~0#1 < 1); 3727#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 3728#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 3729#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3737#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3757#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3738#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3739#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3742#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3743#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3756#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3755#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3754#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3752#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 3753#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3749#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3745#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 3767#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 3765#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 3764#L370-4 main_~j~0#1 := 0; 3740#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3732#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3733#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3762#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3761#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3759#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3758#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3730#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 3731#L378-2 [2021-12-19 17:45:08,940 INFO L793 eck$LassoCheckResult]: Loop: 3731#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 3760#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 3731#L378-2 [2021-12-19 17:45:08,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:08,940 INFO L85 PathProgramCache]: Analyzing trace with hash -2086076244, now seen corresponding path program 8 times [2021-12-19 17:45:08,940 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:08,940 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60317122] [2021-12-19 17:45:08,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:08,940 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:08,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:09,144 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:09,144 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:09,144 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [60317122] [2021-12-19 17:45:09,144 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [60317122] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:09,144 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [682423417] [2021-12-19 17:45:09,144 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:45:09,144 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:09,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:09,146 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:09,146 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-12-19 17:45:09,200 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:45:09,200 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:09,201 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 30 conjunts are in the unsatisfiable core [2021-12-19 17:45:09,202 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:09,231 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:09,299 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:45:09,299 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:45:09,317 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:45:09,317 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:45:09,452 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:45:09,453 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:09,453 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:09,573 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:45:09,575 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:45:09,608 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:09,609 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [682423417] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:09,609 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:09,609 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2021-12-19 17:45:09,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106612956] [2021-12-19 17:45:09,609 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:09,609 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:09,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:09,609 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 18 times [2021-12-19 17:45:09,610 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:09,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244217408] [2021-12-19 17:45:09,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:09,610 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:09,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:09,612 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:09,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:09,614 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:09,654 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:09,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-12-19 17:45:09,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2021-12-19 17:45:09,655 INFO L87 Difference]: Start difference. First operand 44 states and 56 transitions. cyclomatic complexity: 17 Second operand has 23 states, 22 states have (on average 2.1363636363636362) internal successors, (47), 23 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:09,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:09,996 INFO L93 Difference]: Finished difference Result 96 states and 121 transitions. [2021-12-19 17:45:09,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-12-19 17:45:09,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 121 transitions. [2021-12-19 17:45:09,997 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2021-12-19 17:45:09,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 95 states and 120 transitions. [2021-12-19 17:45:09,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2021-12-19 17:45:09,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2021-12-19 17:45:09,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 120 transitions. [2021-12-19 17:45:09,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:09,999 INFO L681 BuchiCegarLoop]: Abstraction has 95 states and 120 transitions. [2021-12-19 17:45:09,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 120 transitions. [2021-12-19 17:45:10,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 50. [2021-12-19 17:45:10,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.32) internal successors, (66), 49 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:10,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 66 transitions. [2021-12-19 17:45:10,004 INFO L704 BuchiCegarLoop]: Abstraction has 50 states and 66 transitions. [2021-12-19 17:45:10,004 INFO L587 BuchiCegarLoop]: Abstraction has 50 states and 66 transitions. [2021-12-19 17:45:10,004 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-12-19 17:45:10,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 66 transitions. [2021-12-19 17:45:10,005 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:10,005 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:10,005 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:10,006 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:10,007 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:10,007 INFO L791 eck$LassoCheckResult]: Stem: 4077#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4078#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4088#L367 assume !(main_~length~0#1 < 1); 4079#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4080#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4081#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4089#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4126#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4125#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4124#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4123#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4122#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4121#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4120#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4119#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4118#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4094#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4090#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4091#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4092#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4095#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4082#L370-4 main_~j~0#1 := 0; 4083#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4086#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4087#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4093#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4101#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4100#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4099#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4097#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4096#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4084#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4085#L378-2 [2021-12-19 17:45:10,007 INFO L793 eck$LassoCheckResult]: Loop: 4085#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4098#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4085#L378-2 [2021-12-19 17:45:10,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:10,007 INFO L85 PathProgramCache]: Analyzing trace with hash 1607686827, now seen corresponding path program 9 times [2021-12-19 17:45:10,007 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:10,007 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345108109] [2021-12-19 17:45:10,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:10,008 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:10,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:10,244 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:10,244 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:10,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [345108109] [2021-12-19 17:45:10,244 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [345108109] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:10,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1291471717] [2021-12-19 17:45:10,244 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:45:10,245 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:10,245 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:10,249 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:10,279 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2021-12-19 17:45:10,322 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-12-19 17:45:10,322 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:10,323 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 22 conjunts are in the unsatisfiable core [2021-12-19 17:45:10,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:10,417 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:10,759 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:45:10,759 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:45:10,773 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 16 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:10,773 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:11,835 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:45:11,838 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:45:11,862 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:11,863 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1291471717] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:11,863 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:11,863 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 16] total 38 [2021-12-19 17:45:11,863 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116704818] [2021-12-19 17:45:11,863 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:11,863 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:11,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:11,863 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 19 times [2021-12-19 17:45:11,863 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:11,863 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077116715] [2021-12-19 17:45:11,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:11,863 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:11,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:11,867 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:11,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:11,868 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:11,917 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:11,918 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-12-19 17:45:11,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=1291, Unknown=1, NotChecked=0, Total=1482 [2021-12-19 17:45:11,918 INFO L87 Difference]: Start difference. First operand 50 states and 66 transitions. cyclomatic complexity: 21 Second operand has 39 states, 38 states have (on average 1.9210526315789473) internal successors, (73), 39 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:12,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:12,584 INFO L93 Difference]: Finished difference Result 66 states and 85 transitions. [2021-12-19 17:45:12,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-12-19 17:45:12,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 85 transitions. [2021-12-19 17:45:12,585 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:12,585 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 53 states and 70 transitions. [2021-12-19 17:45:12,585 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:45:12,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:45:12,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 70 transitions. [2021-12-19 17:45:12,585 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:12,585 INFO L681 BuchiCegarLoop]: Abstraction has 53 states and 70 transitions. [2021-12-19 17:45:12,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 70 transitions. [2021-12-19 17:45:12,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2021-12-19 17:45:12,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.320754716981132) internal successors, (70), 52 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:12,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 70 transitions. [2021-12-19 17:45:12,587 INFO L704 BuchiCegarLoop]: Abstraction has 53 states and 70 transitions. [2021-12-19 17:45:12,587 INFO L587 BuchiCegarLoop]: Abstraction has 53 states and 70 transitions. [2021-12-19 17:45:12,587 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-12-19 17:45:12,587 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 70 transitions. [2021-12-19 17:45:12,587 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:12,587 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:12,587 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:12,587 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:12,587 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:12,587 INFO L791 eck$LassoCheckResult]: Stem: 4467#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4468#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4478#L367 assume !(main_~length~0#1 < 1); 4469#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4470#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4471#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4479#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4482#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4480#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4481#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4519#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4518#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4516#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4515#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4514#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4511#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4512#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4517#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4509#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4507#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4496#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4495#L370-4 main_~j~0#1 := 0; 4483#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4476#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4477#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4484#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4494#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4493#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4492#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4491#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4490#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4474#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4475#L378-2 [2021-12-19 17:45:12,588 INFO L793 eck$LassoCheckResult]: Loop: 4475#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4489#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4475#L378-2 [2021-12-19 17:45:12,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:12,588 INFO L85 PathProgramCache]: Analyzing trace with hash -1676163219, now seen corresponding path program 10 times [2021-12-19 17:45:12,588 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:12,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587162370] [2021-12-19 17:45:12,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:12,588 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:12,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:12,722 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:12,722 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:12,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587162370] [2021-12-19 17:45:12,722 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587162370] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:12,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [975303045] [2021-12-19 17:45:12,722 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:45:12,722 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:12,722 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:12,724 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:12,725 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2021-12-19 17:45:12,778 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:45:12,778 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:12,779 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 41 conjunts are in the unsatisfiable core [2021-12-19 17:45:12,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:12,887 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:12,945 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:45:12,946 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:45:12,954 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:45:12,954 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2021-12-19 17:45:13,191 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-19 17:45:13,191 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 10 [2021-12-19 17:45:13,193 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:13,193 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:13,516 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2021-12-19 17:45:13,520 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-12-19 17:45:13,521 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 107 treesize of output 99 [2021-12-19 17:45:13,661 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:13,661 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [975303045] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:13,661 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:13,661 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16, 15] total 42 [2021-12-19 17:45:13,662 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52934280] [2021-12-19 17:45:13,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:13,662 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:13,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:13,662 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 20 times [2021-12-19 17:45:13,673 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:13,673 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627693237] [2021-12-19 17:45:13,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:13,673 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:13,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:13,675 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:13,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:13,677 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:13,707 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:13,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-12-19 17:45:13,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=1598, Unknown=0, NotChecked=0, Total=1806 [2021-12-19 17:45:13,708 INFO L87 Difference]: Start difference. First operand 53 states and 70 transitions. cyclomatic complexity: 22 Second operand has 43 states, 42 states have (on average 2.0952380952380953) internal successors, (88), 43 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:14,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:14,555 INFO L93 Difference]: Finished difference Result 135 states and 169 transitions. [2021-12-19 17:45:14,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2021-12-19 17:45:14,556 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 169 transitions. [2021-12-19 17:45:14,565 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 16 [2021-12-19 17:45:14,568 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 132 states and 166 transitions. [2021-12-19 17:45:14,568 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2021-12-19 17:45:14,568 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2021-12-19 17:45:14,568 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 166 transitions. [2021-12-19 17:45:14,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:14,569 INFO L681 BuchiCegarLoop]: Abstraction has 132 states and 166 transitions. [2021-12-19 17:45:14,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 166 transitions. [2021-12-19 17:45:14,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 86. [2021-12-19 17:45:14,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.3255813953488371) internal successors, (114), 85 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:14,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 114 transitions. [2021-12-19 17:45:14,570 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 114 transitions. [2021-12-19 17:45:14,571 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 114 transitions. [2021-12-19 17:45:14,571 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-12-19 17:45:14,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 114 transitions. [2021-12-19 17:45:14,571 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:45:14,571 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:14,571 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:14,573 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:14,573 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:14,573 INFO L791 eck$LassoCheckResult]: Stem: 4929#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4930#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 4940#L367 assume !(main_~length~0#1 < 1); 4931#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 4932#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 4933#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4941#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4951#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4963#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4962#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4961#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4960#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4959#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4958#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4957#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4956#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4946#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4947#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 4986#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 4987#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 4999#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 4938#L370-4 main_~j~0#1 := 0; 4939#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4936#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4937#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4989#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4988#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4967#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4970#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4968#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4969#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4934#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 4935#L378-2 [2021-12-19 17:45:14,573 INFO L793 eck$LassoCheckResult]: Loop: 4935#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 4964#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 4935#L378-2 [2021-12-19 17:45:14,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:14,574 INFO L85 PathProgramCache]: Analyzing trace with hash 19338925, now seen corresponding path program 6 times [2021-12-19 17:45:14,574 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:14,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372055368] [2021-12-19 17:45:14,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:14,576 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:14,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:14,794 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:14,794 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:14,794 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372055368] [2021-12-19 17:45:14,794 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372055368] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:14,794 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2065203140] [2021-12-19 17:45:14,794 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:45:14,795 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:14,795 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:14,796 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:14,797 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2021-12-19 17:45:14,866 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2021-12-19 17:45:14,866 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:14,867 INFO L263 TraceCheckSpWp]: Trace formula consists of 167 conjuncts, 22 conjunts are in the unsatisfiable core [2021-12-19 17:45:14,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:14,961 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:15,318 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:45:15,318 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:45:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 16 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:15,332 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:15,756 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:45:15,758 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:45:15,783 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:15,783 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2065203140] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:15,783 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:15,783 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 16] total 38 [2021-12-19 17:45:15,783 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861344003] [2021-12-19 17:45:15,783 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:15,783 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:15,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:15,784 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 21 times [2021-12-19 17:45:15,784 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:15,784 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189062531] [2021-12-19 17:45:15,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:15,784 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:15,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:15,791 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:15,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:15,793 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:15,827 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:15,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-12-19 17:45:15,827 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=1292, Unknown=0, NotChecked=0, Total=1482 [2021-12-19 17:45:15,828 INFO L87 Difference]: Start difference. First operand 86 states and 114 transitions. cyclomatic complexity: 34 Second operand has 39 states, 38 states have (on average 1.9210526315789473) internal successors, (73), 39 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:16,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:16,433 INFO L93 Difference]: Finished difference Result 110 states and 143 transitions. [2021-12-19 17:45:16,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-12-19 17:45:16,433 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 143 transitions. [2021-12-19 17:45:16,434 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:45:16,434 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 97 states and 128 transitions. [2021-12-19 17:45:16,434 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2021-12-19 17:45:16,434 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2021-12-19 17:45:16,434 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 128 transitions. [2021-12-19 17:45:16,435 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:16,435 INFO L681 BuchiCegarLoop]: Abstraction has 97 states and 128 transitions. [2021-12-19 17:45:16,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 128 transitions. [2021-12-19 17:45:16,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2021-12-19 17:45:16,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.3195876288659794) internal successors, (128), 96 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:16,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 128 transitions. [2021-12-19 17:45:16,436 INFO L704 BuchiCegarLoop]: Abstraction has 97 states and 128 transitions. [2021-12-19 17:45:16,436 INFO L587 BuchiCegarLoop]: Abstraction has 97 states and 128 transitions. [2021-12-19 17:45:16,436 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-12-19 17:45:16,436 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 128 transitions. [2021-12-19 17:45:16,436 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:45:16,436 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:16,436 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:16,437 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:16,437 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:16,437 INFO L791 eck$LassoCheckResult]: Stem: 5400#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5401#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 5411#L367 assume !(main_~length~0#1 < 1); 5402#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 5403#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 5404#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5412#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5482#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5480#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5479#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5478#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5476#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5474#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5472#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5470#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5468#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5465#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5463#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5450#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5451#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5461#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 5409#L370-4 main_~j~0#1 := 0; 5410#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5407#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5408#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5433#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5431#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5423#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5428#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5424#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5425#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5405#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 5406#L378-2 [2021-12-19 17:45:16,437 INFO L793 eck$LassoCheckResult]: Loop: 5406#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5420#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5406#L378-2 [2021-12-19 17:45:16,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:16,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1824777259, now seen corresponding path program 11 times [2021-12-19 17:45:16,437 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:16,437 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499764327] [2021-12-19 17:45:16,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:16,438 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:16,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:16,653 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:16,653 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:16,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499764327] [2021-12-19 17:45:16,653 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499764327] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:16,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [894065767] [2021-12-19 17:45:16,653 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:45:16,654 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:16,654 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:16,677 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:16,679 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2021-12-19 17:45:16,757 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2021-12-19 17:45:16,757 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:16,759 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 29 conjunts are in the unsatisfiable core [2021-12-19 17:45:16,760 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:16,806 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:17,007 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:45:17,009 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:17,009 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:17,128 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:45:17,130 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:45:17,173 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:17,173 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [894065767] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:17,173 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:17,173 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 24 [2021-12-19 17:45:17,174 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302899366] [2021-12-19 17:45:17,174 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:17,174 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:17,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:17,174 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 22 times [2021-12-19 17:45:17,174 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:17,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322655434] [2021-12-19 17:45:17,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:17,174 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:17,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:17,176 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:17,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:17,178 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:17,211 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:17,212 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-12-19 17:45:17,212 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=526, Unknown=0, NotChecked=0, Total=600 [2021-12-19 17:45:17,212 INFO L87 Difference]: Start difference. First operand 97 states and 128 transitions. cyclomatic complexity: 37 Second operand has 25 states, 24 states have (on average 2.0833333333333335) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:17,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:17,471 INFO L93 Difference]: Finished difference Result 117 states and 152 transitions. [2021-12-19 17:45:17,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-12-19 17:45:17,472 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 152 transitions. [2021-12-19 17:45:17,472 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 12 [2021-12-19 17:45:17,472 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 116 states and 151 transitions. [2021-12-19 17:45:17,472 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2021-12-19 17:45:17,473 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2021-12-19 17:45:17,473 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 151 transitions. [2021-12-19 17:45:17,473 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:17,473 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 151 transitions. [2021-12-19 17:45:17,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 151 transitions. [2021-12-19 17:45:17,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 100. [2021-12-19 17:45:17,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.33) internal successors, (133), 99 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:17,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 133 transitions. [2021-12-19 17:45:17,474 INFO L704 BuchiCegarLoop]: Abstraction has 100 states and 133 transitions. [2021-12-19 17:45:17,474 INFO L587 BuchiCegarLoop]: Abstraction has 100 states and 133 transitions. [2021-12-19 17:45:17,474 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-12-19 17:45:17,474 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 133 transitions. [2021-12-19 17:45:17,475 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:45:17,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:17,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:17,475 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:17,475 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-12-19 17:45:17,475 INFO L791 eck$LassoCheckResult]: Stem: 5832#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5833#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 5843#L367 assume !(main_~length~0#1 < 1); 5834#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 5835#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 5836#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5844#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5912#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5911#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5910#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5909#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5907#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5905#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5903#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5901#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5881#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 5883#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5898#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5897#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5874#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5873#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5871#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 5870#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 5868#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 5867#L370-4 main_~j~0#1 := 0; 5866#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5865#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5864#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5863#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5862#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5861#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5855#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5856#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 5925#L378-2 [2021-12-19 17:45:17,475 INFO L793 eck$LassoCheckResult]: Loop: 5925#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5927#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 5926#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 5924#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 5925#L378-2 [2021-12-19 17:45:17,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:17,476 INFO L85 PathProgramCache]: Analyzing trace with hash -664584858, now seen corresponding path program 12 times [2021-12-19 17:45:17,476 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:17,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743443118] [2021-12-19 17:45:17,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:17,476 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:17,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:17,740 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:17,741 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:17,741 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743443118] [2021-12-19 17:45:17,741 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1743443118] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:17,741 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2005648279] [2021-12-19 17:45:17,741 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:45:17,741 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:17,741 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:17,742 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:17,743 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-12-19 17:45:17,825 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2021-12-19 17:45:17,825 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:17,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 36 conjunts are in the unsatisfiable core [2021-12-19 17:45:17,828 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:17,870 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:17,935 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:45:17,936 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:45:17,951 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:45:17,951 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:45:17,967 INFO L354 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2021-12-19 17:45:17,967 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 34 [2021-12-19 17:45:18,010 INFO L354 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2021-12-19 17:45:18,010 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 42 [2021-12-19 17:45:18,294 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-19 17:45:18,294 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2021-12-19 17:45:18,311 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 2 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:18,311 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:30,525 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:45:30,527 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:45:30,568 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 61 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-12-19 17:45:30,568 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2005648279] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:30,568 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:30,568 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 15] total 25 [2021-12-19 17:45:30,568 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001232110] [2021-12-19 17:45:30,568 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:30,568 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:30,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:30,569 INFO L85 PathProgramCache]: Analyzing trace with hash 2219337, now seen corresponding path program 1 times [2021-12-19 17:45:30,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:30,569 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734391422] [2021-12-19 17:45:30,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:30,569 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:30,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:30,571 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:30,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:30,574 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:30,649 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:30,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-12-19 17:45:30,649 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=557, Unknown=0, NotChecked=0, Total=650 [2021-12-19 17:45:30,649 INFO L87 Difference]: Start difference. First operand 100 states and 133 transitions. cyclomatic complexity: 40 Second operand has 26 states, 25 states have (on average 2.2) internal successors, (55), 26 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:30,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:30,861 INFO L93 Difference]: Finished difference Result 163 states and 203 transitions. [2021-12-19 17:45:30,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-12-19 17:45:30,862 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 203 transitions. [2021-12-19 17:45:30,862 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:30,863 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 161 states and 200 transitions. [2021-12-19 17:45:30,863 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-12-19 17:45:30,863 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-12-19 17:45:30,863 INFO L73 IsDeterministic]: Start isDeterministic. Operand 161 states and 200 transitions. [2021-12-19 17:45:30,863 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:30,863 INFO L681 BuchiCegarLoop]: Abstraction has 161 states and 200 transitions. [2021-12-19 17:45:30,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states and 200 transitions. [2021-12-19 17:45:30,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 85. [2021-12-19 17:45:30,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 85 states have (on average 1.3647058823529412) internal successors, (116), 84 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:30,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 116 transitions. [2021-12-19 17:45:30,865 INFO L704 BuchiCegarLoop]: Abstraction has 85 states and 116 transitions. [2021-12-19 17:45:30,865 INFO L587 BuchiCegarLoop]: Abstraction has 85 states and 116 transitions. [2021-12-19 17:45:30,865 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-12-19 17:45:30,865 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 116 transitions. [2021-12-19 17:45:30,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:30,865 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:30,865 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:30,865 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:30,866 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:30,866 INFO L791 eck$LassoCheckResult]: Stem: 6324#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 6335#L367 assume !(main_~length~0#1 < 1); 6326#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 6327#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 6328#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6336#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6385#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6384#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6382#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6381#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6380#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6379#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6378#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6377#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6375#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6376#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6404#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6405#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6406#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6403#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 6362#L370-4 main_~j~0#1 := 0; 6341#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6333#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6334#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6342#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6351#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6350#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6349#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6348#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6347#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6346#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6345#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6331#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 6332#L378-2 [2021-12-19 17:45:30,866 INFO L793 eck$LassoCheckResult]: Loop: 6332#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6344#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6332#L378-2 [2021-12-19 17:45:30,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:30,866 INFO L85 PathProgramCache]: Analyzing trace with hash -320666642, now seen corresponding path program 13 times [2021-12-19 17:45:30,867 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:30,867 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372310218] [2021-12-19 17:45:30,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:30,867 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:30,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:31,007 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:31,008 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:31,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372310218] [2021-12-19 17:45:31,008 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1372310218] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:31,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [597646116] [2021-12-19 17:45:31,008 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:45:31,008 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:31,008 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:31,017 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:31,021 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2021-12-19 17:45:31,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:31,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 200 conjuncts, 14 conjunts are in the unsatisfiable core [2021-12-19 17:45:31,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:31,251 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:31,251 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:45:31,317 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:31,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [597646116] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:45:31,318 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:45:31,318 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 23 [2021-12-19 17:45:31,318 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064168793] [2021-12-19 17:45:31,318 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:45:31,318 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:45:31,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:31,318 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 23 times [2021-12-19 17:45:31,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:31,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362956713] [2021-12-19 17:45:31,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:31,318 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:31,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:31,321 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:45:31,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:45:31,322 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:45:31,352 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:45:31,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-12-19 17:45:31,353 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2021-12-19 17:45:31,353 INFO L87 Difference]: Start difference. First operand 85 states and 116 transitions. cyclomatic complexity: 38 Second operand has 23 states, 23 states have (on average 2.3043478260869565) internal successors, (53), 23 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:31,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:45:31,454 INFO L93 Difference]: Finished difference Result 101 states and 132 transitions. [2021-12-19 17:45:31,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-12-19 17:45:31,455 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 132 transitions. [2021-12-19 17:45:31,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:31,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 89 states and 118 transitions. [2021-12-19 17:45:31,456 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-19 17:45:31,456 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-19 17:45:31,456 INFO L73 IsDeterministic]: Start isDeterministic. Operand 89 states and 118 transitions. [2021-12-19 17:45:31,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:45:31,456 INFO L681 BuchiCegarLoop]: Abstraction has 89 states and 118 transitions. [2021-12-19 17:45:31,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states and 118 transitions. [2021-12-19 17:45:31,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 74. [2021-12-19 17:45:31,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.337837837837838) internal successors, (99), 73 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:45:31,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 99 transitions. [2021-12-19 17:45:31,458 INFO L704 BuchiCegarLoop]: Abstraction has 74 states and 99 transitions. [2021-12-19 17:45:31,458 INFO L587 BuchiCegarLoop]: Abstraction has 74 states and 99 transitions. [2021-12-19 17:45:31,458 INFO L425 BuchiCegarLoop]: ======== Iteration 27============ [2021-12-19 17:45:31,458 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 99 transitions. [2021-12-19 17:45:31,458 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:45:31,458 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:45:31,458 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:45:31,458 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 5, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:45:31,458 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:45:31,459 INFO L791 eck$LassoCheckResult]: Stem: 6748#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6749#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 6759#L367 assume !(main_~length~0#1 < 1); 6750#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 6751#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 6752#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6760#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6765#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6761#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6762#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6763#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6821#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6820#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6819#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6817#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6814#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6815#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6816#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6812#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6811#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6810#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 6809#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 6793#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 6781#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 6753#L370-4 main_~j~0#1 := 0; 6754#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6764#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6773#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6772#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6771#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6770#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6769#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6767#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6766#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6755#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 6756#L378-2 [2021-12-19 17:45:31,459 INFO L793 eck$LassoCheckResult]: Loop: 6756#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 6768#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 6756#L378-2 [2021-12-19 17:45:31,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:45:31,459 INFO L85 PathProgramCache]: Analyzing trace with hash 1152648807, now seen corresponding path program 14 times [2021-12-19 17:45:31,459 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:45:31,459 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723335747] [2021-12-19 17:45:31,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:45:31,460 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:45:31,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:45:31,617 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:31,617 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:45:31,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723335747] [2021-12-19 17:45:31,618 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [723335747] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:45:31,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874777895] [2021-12-19 17:45:31,618 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:45:31,618 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:45:31,618 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:45:31,619 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:45:31,620 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2021-12-19 17:45:31,685 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:45:31,685 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:45:31,686 INFO L263 TraceCheckSpWp]: Trace formula consists of 196 conjuncts, 40 conjunts are in the unsatisfiable core [2021-12-19 17:45:31,687 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:45:31,710 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:45:31,745 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:45:31,745 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:45:31,754 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:45:31,754 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:45:31,822 INFO L354 Elim1Store]: treesize reduction 92, result has 20.7 percent of original size [2021-12-19 17:45:31,822 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 41 [2021-12-19 17:45:32,160 INFO L354 Elim1Store]: treesize reduction 44, result has 6.4 percent of original size [2021-12-19 17:45:32,161 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 13 [2021-12-19 17:45:32,163 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:45:32,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:48:57,675 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_203| Int) (v_ArrVal_647 Int)) (let ((.cse0 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0) (+ (* |v_ULTIMATE.start_main_~i~0#1_203| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_647))) (or (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_203| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2))))) is different from false [2021-12-19 17:49:20,789 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 64 [2021-12-19 17:49:20,804 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-12-19 17:49:20,805 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 760 treesize of output 744 [2021-12-19 17:49:21,044 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 59 refuted. 1 times theorem prover too weak. 0 trivial. 11 not checked. [2021-12-19 17:49:21,044 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874777895] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:49:21,044 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:49:21,044 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 42 [2021-12-19 17:49:21,044 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638176937] [2021-12-19 17:49:21,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:49:21,044 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:49:21,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:49:21,044 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 24 times [2021-12-19 17:49:21,044 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:49:21,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086430619] [2021-12-19 17:49:21,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:49:21,045 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:49:21,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:49:21,047 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:49:21,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:49:21,049 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:49:21,086 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:49:21,086 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-12-19 17:49:21,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=1517, Unknown=26, NotChecked=80, Total=1806 [2021-12-19 17:49:21,087 INFO L87 Difference]: Start difference. First operand 74 states and 99 transitions. cyclomatic complexity: 32 Second operand has 43 states, 42 states have (on average 2.0238095238095237) internal successors, (85), 43 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:49:22,050 WARN L838 $PredicateComparison]: unable to prove that (and (exists ((|v_ULTIMATE.start_main_~i~0#1_201| Int)) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse1 (* |v_ULTIMATE.start_main_~i~0#1_201| 4))) (and (<= (+ |v_ULTIMATE.start_main_~i~0#1_201| 1) |c_ULTIMATE.start_main_~i~0#1|) (= (select .cse0 (+ .cse1 |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4))) 0) (<= |v_ULTIMATE.start_main_~i~0#1_201| 4) (= (select .cse0 (+ .cse1 |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (<= 4 |v_ULTIMATE.start_main_~i~0#1_201|)))) (forall ((|v_ULTIMATE.start_main_~i~0#1_203| Int) (v_ArrVal_647 Int)) (let ((.cse2 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0) (+ (* |v_ULTIMATE.start_main_~i~0#1_203| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_647))) (or (not (= 0 (mod (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_203| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (= 0 (mod (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)))))) is different from false [2021-12-19 17:49:23,076 WARN L838 $PredicateComparison]: unable to prove that (and (not (= (* 4 |c_ULTIMATE.start_main_~i~0#1|) 16)) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_203| Int) (v_ArrVal_647 Int)) (let ((.cse0 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0) (+ (* |v_ULTIMATE.start_main_~i~0#1_203| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_647))) (or (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_203| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)))))) is different from false [2021-12-19 17:49:24,059 WARN L838 $PredicateComparison]: unable to prove that (and (exists ((|v_ULTIMATE.start_main_~i~0#1_201| Int)) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse1 (* |v_ULTIMATE.start_main_~i~0#1_201| 4))) (and (= (select .cse0 (+ .cse1 |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4))) 0) (<= |v_ULTIMATE.start_main_~i~0#1_201| 4) (= (select .cse0 (+ .cse1 |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (<= 4 |v_ULTIMATE.start_main_~i~0#1_201|)))) (forall ((|v_ULTIMATE.start_main_~i~0#1_203| Int) (v_ArrVal_647 Int)) (let ((.cse2 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0) (+ (* |v_ULTIMATE.start_main_~i~0#1_203| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_647))) (or (not (= 0 (mod (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_203| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (= 0 (mod (select .cse2 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)))))) is different from false [2021-12-19 17:49:24,990 WARN L838 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_203| Int) (v_ArrVal_647 Int)) (let ((.cse0 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0) (+ (* |v_ULTIMATE.start_main_~i~0#1_203| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_647))) (or (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 12)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_203| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)))))) is different from false [2021-12-19 17:50:13,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:50:13,318 INFO L93 Difference]: Finished difference Result 147 states and 184 transitions. [2021-12-19 17:50:13,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2021-12-19 17:50:13,318 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 147 states and 184 transitions. [2021-12-19 17:50:13,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:50:13,319 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 147 states to 145 states and 181 transitions. [2021-12-19 17:50:13,320 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2021-12-19 17:50:13,320 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2021-12-19 17:50:13,320 INFO L73 IsDeterministic]: Start isDeterministic. Operand 145 states and 181 transitions. [2021-12-19 17:50:13,320 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:50:13,320 INFO L681 BuchiCegarLoop]: Abstraction has 145 states and 181 transitions. [2021-12-19 17:50:13,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states and 181 transitions. [2021-12-19 17:50:13,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 101. [2021-12-19 17:50:13,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.3465346534653466) internal successors, (136), 100 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:13,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 136 transitions. [2021-12-19 17:50:13,321 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 136 transitions. [2021-12-19 17:50:13,321 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 136 transitions. [2021-12-19 17:50:13,321 INFO L425 BuchiCegarLoop]: ======== Iteration 28============ [2021-12-19 17:50:13,321 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 136 transitions. [2021-12-19 17:50:13,322 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:50:13,322 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:50:13,322 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:50:13,322 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 5, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:50:13,322 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:50:13,322 INFO L791 eck$LassoCheckResult]: Stem: 7241#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7242#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 7252#L367 assume !(main_~length~0#1 < 1); 7243#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 7244#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 7245#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7253#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7300#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7299#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7298#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7297#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7296#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7295#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7294#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7293#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7291#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7292#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7305#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7303#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7304#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7254#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7255#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7328#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7325#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 7324#L370-4 main_~j~0#1 := 0; 7323#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7256#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7308#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7307#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7306#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7265#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7268#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7266#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7267#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7248#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 7249#L378-2 [2021-12-19 17:50:13,322 INFO L793 eck$LassoCheckResult]: Loop: 7249#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7262#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7249#L378-2 [2021-12-19 17:50:13,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:13,323 INFO L85 PathProgramCache]: Analyzing trace with hash 575418155, now seen corresponding path program 15 times [2021-12-19 17:50:13,323 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:13,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500787813] [2021-12-19 17:50:13,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:13,323 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:13,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:13,587 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:13,587 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:50:13,587 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500787813] [2021-12-19 17:50:13,587 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500787813] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:50:13,587 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [474473537] [2021-12-19 17:50:13,587 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:50:13,587 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:50:13,587 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:50:13,589 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:50:13,589 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2021-12-19 17:50:13,676 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2021-12-19 17:50:13,676 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:50:13,677 INFO L263 TraceCheckSpWp]: Trace formula consists of 196 conjuncts, 34 conjunts are in the unsatisfiable core [2021-12-19 17:50:13,678 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:50:13,710 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:50:13,774 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:50:13,774 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:50:13,807 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:50:13,807 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:50:13,948 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:50:13,950 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:13,950 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:50:14,099 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:50:14,102 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:50:14,149 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:14,149 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [474473537] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:50:14,149 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:50:14,149 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2021-12-19 17:50:14,149 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451377001] [2021-12-19 17:50:14,150 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:50:14,150 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:50:14,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:14,150 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 25 times [2021-12-19 17:50:14,150 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:14,150 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592582324] [2021-12-19 17:50:14,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:14,151 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:14,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:14,154 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:50:14,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:14,157 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:50:14,214 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:50:14,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-12-19 17:50:14,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=576, Unknown=0, NotChecked=0, Total=650 [2021-12-19 17:50:14,215 INFO L87 Difference]: Start difference. First operand 101 states and 136 transitions. cyclomatic complexity: 43 Second operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 26 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:14,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:50:14,712 INFO L93 Difference]: Finished difference Result 183 states and 238 transitions. [2021-12-19 17:50:14,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-19 17:50:14,713 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 183 states and 238 transitions. [2021-12-19 17:50:14,714 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 22 [2021-12-19 17:50:14,714 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 183 states to 182 states and 237 transitions. [2021-12-19 17:50:14,714 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 53 [2021-12-19 17:50:14,721 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 53 [2021-12-19 17:50:14,721 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 237 transitions. [2021-12-19 17:50:14,721 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:50:14,721 INFO L681 BuchiCegarLoop]: Abstraction has 182 states and 237 transitions. [2021-12-19 17:50:14,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 237 transitions. [2021-12-19 17:50:14,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 111. [2021-12-19 17:50:14,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 111 states have (on average 1.3783783783783783) internal successors, (153), 110 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:14,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 153 transitions. [2021-12-19 17:50:14,723 INFO L704 BuchiCegarLoop]: Abstraction has 111 states and 153 transitions. [2021-12-19 17:50:14,723 INFO L587 BuchiCegarLoop]: Abstraction has 111 states and 153 transitions. [2021-12-19 17:50:14,723 INFO L425 BuchiCegarLoop]: ======== Iteration 29============ [2021-12-19 17:50:14,723 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 111 states and 153 transitions. [2021-12-19 17:50:14,723 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2021-12-19 17:50:14,723 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:50:14,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:50:14,724 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 5, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:50:14,724 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-12-19 17:50:14,724 INFO L791 eck$LassoCheckResult]: Stem: 7772#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7773#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 7783#L367 assume !(main_~length~0#1 < 1); 7774#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 7775#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 7776#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7784#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7833#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7832#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7831#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7830#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7829#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7828#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7827#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7826#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7824#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7823#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7822#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7820#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7819#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7818#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7816#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7817#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7812#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 7813#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 7809#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 7807#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 7806#L370-4 main_~j~0#1 := 0; 7805#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7804#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7803#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7802#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7801#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7800#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7794#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7795#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 7876#L378-2 [2021-12-19 17:50:14,724 INFO L793 eck$LassoCheckResult]: Loop: 7876#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7878#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 7877#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 7875#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 7876#L378-2 [2021-12-19 17:50:14,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:14,725 INFO L85 PathProgramCache]: Analyzing trace with hash 655136874, now seen corresponding path program 16 times [2021-12-19 17:50:14,725 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:14,725 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123775491] [2021-12-19 17:50:14,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:14,725 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:14,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:14,967 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 3 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:14,967 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:50:14,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1123775491] [2021-12-19 17:50:14,967 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1123775491] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:50:14,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [674419857] [2021-12-19 17:50:14,967 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:50:14,967 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:50:14,968 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:50:14,971 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:50:14,972 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2021-12-19 17:50:15,039 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:50:15,039 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:50:15,040 INFO L263 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 49 conjunts are in the unsatisfiable core [2021-12-19 17:50:15,042 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:50:15,049 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2021-12-19 17:50:15,088 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2021-12-19 17:50:15,171 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:50:15,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:15,263 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:50:15,274 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:15,275 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:50:15,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:15,314 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:50:15,325 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:15,332 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:50:15,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:15,374 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:50:15,552 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:50:15,562 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 5 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:15,563 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:50:15,790 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:50:15,792 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:50:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 2 proven. 75 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2021-12-19 17:50:15,837 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [674419857] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:50:15,837 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:50:15,837 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 16] total 35 [2021-12-19 17:50:15,837 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893537807] [2021-12-19 17:50:15,837 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:50:15,837 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:50:15,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:15,838 INFO L85 PathProgramCache]: Analyzing trace with hash 2219337, now seen corresponding path program 2 times [2021-12-19 17:50:15,838 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:15,838 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339946958] [2021-12-19 17:50:15,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:15,838 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:15,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:15,841 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:50:15,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:15,843 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:50:15,928 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:50:15,928 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-12-19 17:50:15,929 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1104, Unknown=0, NotChecked=0, Total=1260 [2021-12-19 17:50:15,929 INFO L87 Difference]: Start difference. First operand 111 states and 153 transitions. cyclomatic complexity: 50 Second operand has 36 states, 35 states have (on average 2.2285714285714286) internal successors, (78), 36 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:16,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:50:16,215 INFO L93 Difference]: Finished difference Result 117 states and 154 transitions. [2021-12-19 17:50:16,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-12-19 17:50:16,217 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 154 transitions. [2021-12-19 17:50:16,222 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:50:16,222 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 115 states and 152 transitions. [2021-12-19 17:50:16,223 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-12-19 17:50:16,223 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-12-19 17:50:16,223 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 152 transitions. [2021-12-19 17:50:16,223 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:50:16,224 INFO L681 BuchiCegarLoop]: Abstraction has 115 states and 152 transitions. [2021-12-19 17:50:16,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 152 transitions. [2021-12-19 17:50:16,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 59. [2021-12-19 17:50:16,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.3389830508474576) internal successors, (79), 58 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:16,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 79 transitions. [2021-12-19 17:50:16,231 INFO L704 BuchiCegarLoop]: Abstraction has 59 states and 79 transitions. [2021-12-19 17:50:16,231 INFO L587 BuchiCegarLoop]: Abstraction has 59 states and 79 transitions. [2021-12-19 17:50:16,231 INFO L425 BuchiCegarLoop]: ======== Iteration 30============ [2021-12-19 17:50:16,231 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 79 transitions. [2021-12-19 17:50:16,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:50:16,232 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:50:16,232 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:50:16,232 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:50:16,232 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:50:16,232 INFO L791 eck$LassoCheckResult]: Stem: 8259#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8260#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 8270#L367 assume !(main_~length~0#1 < 1); 8261#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 8262#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 8263#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8271#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8276#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8272#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8273#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8317#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8316#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8315#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8314#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8313#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8312#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8311#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8310#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8307#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8306#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8305#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8304#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8277#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8278#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 8268#L370-4 main_~j~0#1 := 0; 8269#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8289#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8275#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8266#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8267#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8288#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8284#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8283#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8282#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8281#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8280#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8264#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 8265#L378-2 [2021-12-19 17:50:16,232 INFO L793 eck$LassoCheckResult]: Loop: 8265#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8279#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8265#L378-2 [2021-12-19 17:50:16,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:16,233 INFO L85 PathProgramCache]: Analyzing trace with hash 833863658, now seen corresponding path program 17 times [2021-12-19 17:50:16,233 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:16,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555024140] [2021-12-19 17:50:16,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:16,233 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:16,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:16,419 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:16,419 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:50:16,419 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555024140] [2021-12-19 17:50:16,419 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555024140] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:50:16,419 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1217886171] [2021-12-19 17:50:16,419 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:50:16,420 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:50:16,420 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:50:16,421 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:50:16,423 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-12-19 17:50:16,509 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-12-19 17:50:16,509 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:50:16,510 INFO L263 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 41 conjunts are in the unsatisfiable core [2021-12-19 17:50:16,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:50:16,563 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:50:16,617 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:50:16,618 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:50:16,637 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:50:16,637 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:50:17,090 INFO L354 Elim1Store]: treesize reduction 48, result has 5.9 percent of original size [2021-12-19 17:50:17,090 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 35 treesize of output 13 [2021-12-19 17:50:17,103 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:17,103 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:50:18,279 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) is different from false [2021-12-19 17:50:19,083 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset| 4) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) is different from false [2021-12-19 17:50:19,092 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 56 [2021-12-19 17:50:19,097 INFO L354 Elim1Store]: treesize reduction 17, result has 5.6 percent of original size [2021-12-19 17:50:19,098 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 137 treesize of output 123 [2021-12-19 17:50:19,281 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 16 not checked. [2021-12-19 17:50:19,281 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1217886171] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:50:19,281 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:50:19,282 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 18] total 44 [2021-12-19 17:50:19,282 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941664313] [2021-12-19 17:50:19,282 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:50:19,282 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:50:19,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:19,282 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 26 times [2021-12-19 17:50:19,282 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:19,282 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236568633] [2021-12-19 17:50:19,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:19,282 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:19,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:19,284 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:50:19,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:19,286 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:50:19,321 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:50:19,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2021-12-19 17:50:19,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=1632, Unknown=2, NotChecked=166, Total=1980 [2021-12-19 17:50:19,322 INFO L87 Difference]: Start difference. First operand 59 states and 79 transitions. cyclomatic complexity: 24 Second operand has 45 states, 44 states have (on average 2.0) internal successors, (88), 45 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:20,209 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse3 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (and (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset| 4) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) (= (select .cse2 (+ .cse3 |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= (select .cse2 (+ .cse3 |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4))) 0) (exists ((|ULTIMATE.start_main_~i~0#1| Int)) (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse5 (* |ULTIMATE.start_main_~i~0#1| 4))) (and (= (select .cse4 (+ .cse5 |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= (select .cse4 (+ .cse5 |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4))) 0) (<= |ULTIMATE.start_main_~i~0#1| 5) (<= 5 |ULTIMATE.start_main_~i~0#1|)))) (<= |c_ULTIMATE.start_main_~i~0#1| 5) (<= 5 |c_ULTIMATE.start_main_~i~0#1|))) is different from false [2021-12-19 17:50:20,965 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset| 4) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (<= |c_ULTIMATE.start_main_~i~0#1| 5) (<= 5 |c_ULTIMATE.start_main_~i~0#1|)) is different from false [2021-12-19 17:50:21,692 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) (exists ((|ULTIMATE.start_main_~i~0#1| Int)) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|)) (.cse3 (* |ULTIMATE.start_main_~i~0#1| 4))) (and (= (select .cse2 (+ .cse3 |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= (select .cse2 (+ .cse3 |c_ULTIMATE.start_main_~arr~0#1.offset| (- 4))) 0) (<= |ULTIMATE.start_main_~i~0#1| 5) (<= 5 |ULTIMATE.start_main_~i~0#1|))))) is different from false [2021-12-19 17:50:22,504 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~j~0#1_272| Int)) (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) 0)) (.cse1 (* |v_ULTIMATE.start_main_~j~0#1_272| 4))) (or (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 20)) 2)) (< |v_ULTIMATE.start_main_~j~0#1_272| 0) (not (= 0 (mod (select .cse0 (+ |c_ULTIMATE.start_main_~arr~0#1.offset| .cse1 16)) 2))) (< 0 |v_ULTIMATE.start_main_~j~0#1_272|)))) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 20)) 0)) is different from false [2021-12-19 17:50:22,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:50:22,533 INFO L93 Difference]: Finished difference Result 105 states and 130 transitions. [2021-12-19 17:50:22,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2021-12-19 17:50:22,533 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 130 transitions. [2021-12-19 17:50:22,534 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:50:22,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 103 states and 127 transitions. [2021-12-19 17:50:22,534 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-12-19 17:50:22,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-12-19 17:50:22,534 INFO L73 IsDeterministic]: Start isDeterministic. Operand 103 states and 127 transitions. [2021-12-19 17:50:22,534 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:50:22,534 INFO L681 BuchiCegarLoop]: Abstraction has 103 states and 127 transitions. [2021-12-19 17:50:22,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states and 127 transitions. [2021-12-19 17:50:22,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 78. [2021-12-19 17:50:22,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.3076923076923077) internal successors, (102), 77 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:22,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 102 transitions. [2021-12-19 17:50:22,535 INFO L704 BuchiCegarLoop]: Abstraction has 78 states and 102 transitions. [2021-12-19 17:50:22,536 INFO L587 BuchiCegarLoop]: Abstraction has 78 states and 102 transitions. [2021-12-19 17:50:22,536 INFO L425 BuchiCegarLoop]: ======== Iteration 31============ [2021-12-19 17:50:22,536 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 102 transitions. [2021-12-19 17:50:22,536 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:50:22,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:50:22,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:50:22,536 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:50:22,536 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:50:22,536 INFO L791 eck$LassoCheckResult]: Stem: 8698#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8699#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 8709#L367 assume !(main_~length~0#1 < 1); 8700#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 8701#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 8702#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8710#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8757#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8756#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8755#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8754#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8753#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8752#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8751#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8750#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8749#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8748#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8747#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8745#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8746#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8773#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 8771#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 8772#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 8711#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 8703#L370-4 main_~j~0#1 := 0; 8704#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8707#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8708#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8761#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8760#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8759#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8758#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8720#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8724#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8722#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8723#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8705#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 8706#L378-2 [2021-12-19 17:50:22,537 INFO L793 eck$LassoCheckResult]: Loop: 8706#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 8721#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 8706#L378-2 [2021-12-19 17:50:22,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:22,537 INFO L85 PathProgramCache]: Analyzing trace with hash -187204696, now seen corresponding path program 18 times [2021-12-19 17:50:22,537 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:22,537 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1727101746] [2021-12-19 17:50:22,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:22,537 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:22,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:22,862 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:22,862 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:50:22,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1727101746] [2021-12-19 17:50:22,862 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1727101746] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:50:22,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1046056358] [2021-12-19 17:50:22,862 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:50:22,862 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:50:22,862 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:50:22,868 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:50:22,926 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-12-19 17:50:22,984 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2021-12-19 17:50:22,984 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:50:22,986 INFO L263 TraceCheckSpWp]: Trace formula consists of 201 conjuncts, 33 conjunts are in the unsatisfiable core [2021-12-19 17:50:22,987 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:50:23,048 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:50:23,280 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2021-12-19 17:50:23,298 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:23,299 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:50:23,446 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2021-12-19 17:50:23,447 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2021-12-19 17:50:23,521 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:23,521 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1046056358] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:50:23,521 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:50:23,521 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 25 [2021-12-19 17:50:23,522 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705183312] [2021-12-19 17:50:23,522 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:50:23,522 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:50:23,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:23,523 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 27 times [2021-12-19 17:50:23,523 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:23,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525308887] [2021-12-19 17:50:23,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:23,523 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:23,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:23,530 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:50:23,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:23,533 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:50:23,576 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:50:23,577 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-12-19 17:50:23,577 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=577, Unknown=0, NotChecked=0, Total=650 [2021-12-19 17:50:23,577 INFO L87 Difference]: Start difference. First operand 78 states and 102 transitions. cyclomatic complexity: 28 Second operand has 26 states, 25 states have (on average 2.2) internal successors, (55), 26 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:24,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:50:24,039 INFO L93 Difference]: Finished difference Result 125 states and 160 transitions. [2021-12-19 17:50:24,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-12-19 17:50:24,039 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 125 states and 160 transitions. [2021-12-19 17:50:24,040 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2021-12-19 17:50:24,040 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 125 states to 124 states and 159 transitions. [2021-12-19 17:50:24,040 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2021-12-19 17:50:24,040 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2021-12-19 17:50:24,041 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 159 transitions. [2021-12-19 17:50:24,041 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:50:24,041 INFO L681 BuchiCegarLoop]: Abstraction has 124 states and 159 transitions. [2021-12-19 17:50:24,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 159 transitions. [2021-12-19 17:50:24,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 106. [2021-12-19 17:50:24,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 106 states have (on average 1.3113207547169812) internal successors, (139), 105 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:50:24,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 139 transitions. [2021-12-19 17:50:24,042 INFO L704 BuchiCegarLoop]: Abstraction has 106 states and 139 transitions. [2021-12-19 17:50:24,042 INFO L587 BuchiCegarLoop]: Abstraction has 106 states and 139 transitions. [2021-12-19 17:50:24,042 INFO L425 BuchiCegarLoop]: ======== Iteration 32============ [2021-12-19 17:50:24,042 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 106 states and 139 transitions. [2021-12-19 17:50:24,042 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2021-12-19 17:50:24,042 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:50:24,042 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:50:24,043 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:50:24,043 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:50:24,043 INFO L791 eck$LassoCheckResult]: Stem: 9150#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9151#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 9161#L367 assume !(main_~length~0#1 < 1); 9152#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 9153#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 9154#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9162#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9225#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9224#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9223#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9222#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9221#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9220#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9219#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9218#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9217#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9216#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9215#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9214#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9168#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9163#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9164#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9165#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9235#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9233#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9205#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9207#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 9208#L370-4 main_~j~0#1 := 0; 9226#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9227#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9191#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9192#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9185#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9186#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9254#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9253#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9175#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9157#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 9158#L378-2 [2021-12-19 17:50:24,043 INFO L793 eck$LassoCheckResult]: Loop: 9158#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9174#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9158#L378-2 [2021-12-19 17:50:24,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:24,043 INFO L85 PathProgramCache]: Analyzing trace with hash -762539921, now seen corresponding path program 19 times [2021-12-19 17:50:24,043 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:24,043 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418220148] [2021-12-19 17:50:24,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:24,044 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:24,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:24,261 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:24,261 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:50:24,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418220148] [2021-12-19 17:50:24,261 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1418220148] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:50:24,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2089817404] [2021-12-19 17:50:24,261 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:50:24,261 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:50:24,261 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:50:24,277 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:50:24,310 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2021-12-19 17:50:24,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:50:24,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 218 conjuncts, 41 conjunts are in the unsatisfiable core [2021-12-19 17:50:24,375 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:50:24,532 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:50:24,586 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:24,586 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:50:24,596 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:24,597 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:50:24,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:24,634 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:50:24,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:50:24,645 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:50:24,841 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:50:24,843 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:50:24,843 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:50:37,088 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_266| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_266| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_872 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_266| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_872) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2))))) is different from false [2021-12-19 17:50:51,285 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_267| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_267| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_872 Int) (|v_ULTIMATE.start_main_~i~0#1_266| Int) (v_ArrVal_869 Int)) (or (= 0 (mod (select (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_267| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_869) (+ (* |v_ULTIMATE.start_main_~i~0#1_266| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_872) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)) (< |v_ULTIMATE.start_main_~i~0#1_266| (+ |v_ULTIMATE.start_main_~i~0#1_267| 1)))))) is different from false [2021-12-19 17:50:51,295 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2021-12-19 17:50:51,299 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 192 treesize of output 188 [2021-12-19 17:50:51,389 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 11 not checked. [2021-12-19 17:50:51,389 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2089817404] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:50:51,390 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:50:51,390 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 17] total 42 [2021-12-19 17:50:51,390 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689906811] [2021-12-19 17:50:51,390 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:50:51,390 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:50:51,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:50:51,391 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 28 times [2021-12-19 17:50:51,391 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:50:51,391 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935852352] [2021-12-19 17:50:51,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:50:51,391 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:50:51,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:51,400 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:50:51,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:50:51,403 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:50:51,438 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:50:51,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-12-19 17:50:51,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1470, Unknown=5, NotChecked=158, Total=1806 [2021-12-19 17:50:51,439 INFO L87 Difference]: Start difference. First operand 106 states and 139 transitions. cyclomatic complexity: 39 Second operand has 43 states, 42 states have (on average 2.1904761904761907) internal successors, (92), 43 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:03,554 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~i~0#1_267| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_267| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_872 Int) (|v_ULTIMATE.start_main_~i~0#1_266| Int) (v_ArrVal_869 Int)) (or (= 0 (mod (select (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_267| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_869) (+ (* |v_ULTIMATE.start_main_~i~0#1_266| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_872) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2)) (< |v_ULTIMATE.start_main_~i~0#1_266| (+ |v_ULTIMATE.start_main_~i~0#1_267| 1)))))) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= |c_ULTIMATE.start_main_~i~0#1| 4) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:51:15,586 WARN L838 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_266| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_266| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_872 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_266| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_872) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 16)) 2))))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0) (<= 5 |c_ULTIMATE.start_main_~i~0#1|)) is different from false [2021-12-19 17:51:15,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:15,744 INFO L93 Difference]: Finished difference Result 152 states and 186 transitions. [2021-12-19 17:51:15,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-12-19 17:51:15,745 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 186 transitions. [2021-12-19 17:51:15,745 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:51:15,746 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 150 states and 183 transitions. [2021-12-19 17:51:15,746 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 30 [2021-12-19 17:51:15,746 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 30 [2021-12-19 17:51:15,746 INFO L73 IsDeterministic]: Start isDeterministic. Operand 150 states and 183 transitions. [2021-12-19 17:51:15,746 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:15,746 INFO L681 BuchiCegarLoop]: Abstraction has 150 states and 183 transitions. [2021-12-19 17:51:15,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states and 183 transitions. [2021-12-19 17:51:15,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 83. [2021-12-19 17:51:15,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.3253012048192772) internal successors, (110), 82 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:15,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 110 transitions. [2021-12-19 17:51:15,747 INFO L704 BuchiCegarLoop]: Abstraction has 83 states and 110 transitions. [2021-12-19 17:51:15,747 INFO L587 BuchiCegarLoop]: Abstraction has 83 states and 110 transitions. [2021-12-19 17:51:15,747 INFO L425 BuchiCegarLoop]: ======== Iteration 33============ [2021-12-19 17:51:15,747 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 110 transitions. [2021-12-19 17:51:15,748 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:15,748 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:15,748 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:15,748 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:15,748 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:15,748 INFO L791 eck$LassoCheckResult]: Stem: 9684#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9685#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 9695#L367 assume !(main_~length~0#1 < 1); 9686#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 9687#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 9688#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9696#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9741#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9740#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9739#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9738#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9737#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9736#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9735#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9734#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9733#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9732#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9731#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9729#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 9728#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9727#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9725#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9724#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9723#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9721#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 9720#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 9718#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 9717#L370-4 main_~j~0#1 := 0; 9716#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9715#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9714#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9713#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9712#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9711#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9710#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9709#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9703#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9691#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 9692#L378-2 [2021-12-19 17:51:15,754 INFO L793 eck$LassoCheckResult]: Loop: 9692#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 9705#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 9692#L378-2 [2021-12-19 17:51:15,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:15,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1580188371, now seen corresponding path program 20 times [2021-12-19 17:51:15,755 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:15,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254934753] [2021-12-19 17:51:15,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:15,755 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:15,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:16,028 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:16,028 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:16,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254934753] [2021-12-19 17:51:16,028 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1254934753] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:16,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [639639852] [2021-12-19 17:51:16,028 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:51:16,028 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:16,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:16,030 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:16,031 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2021-12-19 17:51:16,110 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:51:16,110 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:16,112 INFO L263 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 39 conjunts are in the unsatisfiable core [2021-12-19 17:51:16,113 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:16,163 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:16,232 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:16,232 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:16,246 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:16,246 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:16,276 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:16,276 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:16,287 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:16,287 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:16,388 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:51:16,389 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:16,390 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:16,570 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:51:16,571 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:51:16,605 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 1 proven. 88 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:51:16,606 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [639639852] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:16,606 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:16,606 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 26 [2021-12-19 17:51:16,606 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679464080] [2021-12-19 17:51:16,606 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:16,606 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:16,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:16,607 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 29 times [2021-12-19 17:51:16,607 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:16,607 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548140402] [2021-12-19 17:51:16,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:16,607 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:16,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:16,610 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:16,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:16,611 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:16,662 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:16,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-12-19 17:51:16,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=621, Unknown=0, NotChecked=0, Total=702 [2021-12-19 17:51:16,662 INFO L87 Difference]: Start difference. First operand 83 states and 110 transitions. cyclomatic complexity: 33 Second operand has 27 states, 26 states have (on average 2.269230769230769) internal successors, (59), 27 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:17,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:17,062 INFO L93 Difference]: Finished difference Result 102 states and 129 transitions. [2021-12-19 17:51:17,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-12-19 17:51:17,063 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 102 states and 129 transitions. [2021-12-19 17:51:17,063 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:17,064 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 102 states to 101 states and 127 transitions. [2021-12-19 17:51:17,064 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-12-19 17:51:17,064 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-12-19 17:51:17,065 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 127 transitions. [2021-12-19 17:51:17,065 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:17,065 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 127 transitions. [2021-12-19 17:51:17,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 127 transitions. [2021-12-19 17:51:17,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 52. [2021-12-19 17:51:17,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.2884615384615385) internal successors, (67), 51 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:17,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 67 transitions. [2021-12-19 17:51:17,066 INFO L704 BuchiCegarLoop]: Abstraction has 52 states and 67 transitions. [2021-12-19 17:51:17,066 INFO L587 BuchiCegarLoop]: Abstraction has 52 states and 67 transitions. [2021-12-19 17:51:17,066 INFO L425 BuchiCegarLoop]: ======== Iteration 34============ [2021-12-19 17:51:17,066 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 67 transitions. [2021-12-19 17:51:17,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:17,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:17,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:17,067 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:17,067 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:17,067 INFO L791 eck$LassoCheckResult]: Stem: 10133#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10134#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 10144#L367 assume !(main_~length~0#1 < 1); 10135#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 10136#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 10137#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10145#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10148#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10146#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10147#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10184#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10183#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10182#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10181#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10180#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10179#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10178#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10177#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10176#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10175#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10174#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10173#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10172#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10171#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 10138#L370-4 main_~j~0#1 := 0; 10139#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10163#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10150#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10142#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10143#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10162#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10161#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10160#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10156#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10155#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10154#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10153#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10152#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10140#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 10141#L378-2 [2021-12-19 17:51:17,067 INFO L793 eck$LassoCheckResult]: Loop: 10141#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10151#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10141#L378-2 [2021-12-19 17:51:17,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:17,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1393207761, now seen corresponding path program 21 times [2021-12-19 17:51:17,068 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:17,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494826571] [2021-12-19 17:51:17,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:17,068 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:17,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:17,206 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 31 proven. 62 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:17,206 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:17,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494826571] [2021-12-19 17:51:17,206 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1494826571] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:17,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [612874447] [2021-12-19 17:51:17,206 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:51:17,206 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:17,206 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:17,207 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:17,210 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2021-12-19 17:51:17,337 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2021-12-19 17:51:17,337 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:17,339 INFO L263 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 16 conjunts are in the unsatisfiable core [2021-12-19 17:51:17,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:17,505 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 42 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:17,506 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:17,546 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 42 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:17,546 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [612874447] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:17,546 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:17,547 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 26 [2021-12-19 17:51:17,547 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232315730] [2021-12-19 17:51:17,547 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:17,551 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:17,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:17,552 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 30 times [2021-12-19 17:51:17,552 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:17,552 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387310349] [2021-12-19 17:51:17,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:17,552 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:17,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:17,554 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:17,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:17,556 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:17,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:17,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-12-19 17:51:17,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2021-12-19 17:51:17,593 INFO L87 Difference]: Start difference. First operand 52 states and 67 transitions. cyclomatic complexity: 19 Second operand has 26 states, 26 states have (on average 2.3076923076923075) internal successors, (60), 26 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:17,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:17,762 INFO L93 Difference]: Finished difference Result 71 states and 87 transitions. [2021-12-19 17:51:17,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-12-19 17:51:17,763 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 87 transitions. [2021-12-19 17:51:17,763 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:17,763 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 57 states and 72 transitions. [2021-12-19 17:51:17,764 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:51:17,764 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:51:17,764 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 72 transitions. [2021-12-19 17:51:17,764 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:17,764 INFO L681 BuchiCegarLoop]: Abstraction has 57 states and 72 transitions. [2021-12-19 17:51:17,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 72 transitions. [2021-12-19 17:51:17,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 54. [2021-12-19 17:51:17,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.2592592592592593) internal successors, (68), 53 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:17,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 68 transitions. [2021-12-19 17:51:17,765 INFO L704 BuchiCegarLoop]: Abstraction has 54 states and 68 transitions. [2021-12-19 17:51:17,765 INFO L587 BuchiCegarLoop]: Abstraction has 54 states and 68 transitions. [2021-12-19 17:51:17,765 INFO L425 BuchiCegarLoop]: ======== Iteration 35============ [2021-12-19 17:51:17,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 68 transitions. [2021-12-19 17:51:17,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:17,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:17,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:17,766 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:17,766 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:17,766 INFO L791 eck$LassoCheckResult]: Stem: 10529#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10530#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 10540#L367 assume !(main_~length~0#1 < 1); 10531#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 10532#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 10533#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10541#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10546#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10582#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10581#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10580#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10579#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10578#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10577#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10576#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10575#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10574#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10573#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10572#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10571#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10570#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10569#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10568#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10567#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10564#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 10562#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10560#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 10559#L370-4 main_~j~0#1 := 0; 10544#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10536#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10537#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10556#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10555#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10554#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10553#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10552#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10551#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10549#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10548#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10534#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 10535#L378-2 [2021-12-19 17:51:17,767 INFO L793 eck$LassoCheckResult]: Loop: 10535#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10550#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10535#L378-2 [2021-12-19 17:51:17,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:17,767 INFO L85 PathProgramCache]: Analyzing trace with hash 836329326, now seen corresponding path program 22 times [2021-12-19 17:51:17,767 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:17,767 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165357601] [2021-12-19 17:51:17,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:17,767 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:17,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:17,967 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:17,967 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:17,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [165357601] [2021-12-19 17:51:17,967 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [165357601] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:17,967 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [899629884] [2021-12-19 17:51:17,967 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:51:17,967 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:17,967 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:17,984 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:17,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2021-12-19 17:51:18,064 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:51:18,064 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:18,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 216 conjuncts, 38 conjunts are in the unsatisfiable core [2021-12-19 17:51:18,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:18,246 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:18,302 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:51:18,303 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:51:18,495 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:51:18,500 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:18,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:30,717 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_307| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_307| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_994 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_307| 4)) v_ArrVal_994) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 20)) 2))))) is different from false [2021-12-19 17:51:30,725 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2021-12-19 17:51:30,728 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2021-12-19 17:51:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2021-12-19 17:51:30,830 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [899629884] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:30,830 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:30,830 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 18, 17] total 43 [2021-12-19 17:51:30,830 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238068955] [2021-12-19 17:51:30,830 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:30,830 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:30,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:30,830 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 31 times [2021-12-19 17:51:30,830 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:30,830 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [759455816] [2021-12-19 17:51:30,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:30,831 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:30,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:30,833 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:30,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:30,836 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:30,876 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:30,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-12-19 17:51:30,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=1643, Unknown=1, NotChecked=82, Total=1892 [2021-12-19 17:51:30,877 INFO L87 Difference]: Start difference. First operand 54 states and 68 transitions. cyclomatic complexity: 18 Second operand has 44 states, 43 states have (on average 2.2093023255813953) internal successors, (95), 44 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:43,025 WARN L838 $PredicateComparison]: unable to prove that (and (= |c_ULTIMATE.start_main_~i~0#1| 5) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (forall ((|v_ULTIMATE.start_main_~i~0#1_307| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_307| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_994 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_307| 4)) v_ArrVal_994) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 20)) 2))))) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:51:43,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:43,320 INFO L93 Difference]: Finished difference Result 88 states and 106 transitions. [2021-12-19 17:51:43,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-12-19 17:51:43,321 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 88 states and 106 transitions. [2021-12-19 17:51:43,321 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:51:43,321 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 88 states to 87 states and 105 transitions. [2021-12-19 17:51:43,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-12-19 17:51:43,321 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-12-19 17:51:43,321 INFO L73 IsDeterministic]: Start isDeterministic. Operand 87 states and 105 transitions. [2021-12-19 17:51:43,322 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:43,322 INFO L681 BuchiCegarLoop]: Abstraction has 87 states and 105 transitions. [2021-12-19 17:51:43,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states and 105 transitions. [2021-12-19 17:51:43,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 54. [2021-12-19 17:51:43,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.2592592592592593) internal successors, (68), 53 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:43,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 68 transitions. [2021-12-19 17:51:43,322 INFO L704 BuchiCegarLoop]: Abstraction has 54 states and 68 transitions. [2021-12-19 17:51:43,322 INFO L587 BuchiCegarLoop]: Abstraction has 54 states and 68 transitions. [2021-12-19 17:51:43,323 INFO L425 BuchiCegarLoop]: ======== Iteration 36============ [2021-12-19 17:51:43,323 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 68 transitions. [2021-12-19 17:51:43,323 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:43,323 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:43,323 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:43,323 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:43,323 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:43,323 INFO L791 eck$LassoCheckResult]: Stem: 10968#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10969#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 10979#L367 assume !(main_~length~0#1 < 1); 10970#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 10971#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 10972#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 10980#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11021#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11020#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11019#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11018#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11017#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11016#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11015#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11014#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11013#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11012#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11011#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11010#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11009#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11008#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11007#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11006#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11005#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11002#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11001#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 10999#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 10998#L370-4 main_~j~0#1 := 0; 10984#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10985#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10997#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10996#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10995#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10994#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10993#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10992#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10991#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10989#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10988#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10975#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 10976#L378-2 [2021-12-19 17:51:43,325 INFO L793 eck$LassoCheckResult]: Loop: 10976#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 10990#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 10976#L378-2 [2021-12-19 17:51:43,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:43,326 INFO L85 PathProgramCache]: Analyzing trace with hash 168453938, now seen corresponding path program 23 times [2021-12-19 17:51:43,326 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:43,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1685596780] [2021-12-19 17:51:43,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:43,326 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:43,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:43,592 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:43,592 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:43,592 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1685596780] [2021-12-19 17:51:43,592 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1685596780] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:43,592 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [935507642] [2021-12-19 17:51:43,592 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:51:43,592 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:43,593 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:43,594 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:43,595 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2021-12-19 17:51:43,719 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2021-12-19 17:51:43,719 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:43,720 INFO L263 TraceCheckSpWp]: Trace formula consists of 216 conjuncts, 38 conjunts are in the unsatisfiable core [2021-12-19 17:51:43,721 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:43,797 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:43,883 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:51:43,883 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:51:43,902 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:51:43,902 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:51:44,134 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:51:44,136 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:44,137 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:44,361 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:51:44,363 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:51:44,420 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:44,421 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [935507642] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:44,421 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:44,421 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 19] total 30 [2021-12-19 17:51:44,421 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288463854] [2021-12-19 17:51:44,421 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:44,421 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:44,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:44,421 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 32 times [2021-12-19 17:51:44,421 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:44,421 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101184886] [2021-12-19 17:51:44,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:44,421 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:44,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:44,424 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:44,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:44,425 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:44,462 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:44,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2021-12-19 17:51:44,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=839, Unknown=0, NotChecked=0, Total=930 [2021-12-19 17:51:44,463 INFO L87 Difference]: Start difference. First operand 54 states and 68 transitions. cyclomatic complexity: 19 Second operand has 31 states, 30 states have (on average 2.1) internal successors, (63), 31 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:45,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:45,113 INFO L93 Difference]: Finished difference Result 118 states and 145 transitions. [2021-12-19 17:51:45,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-12-19 17:51:45,113 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118 states and 145 transitions. [2021-12-19 17:51:45,114 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2021-12-19 17:51:45,114 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118 states to 117 states and 144 transitions. [2021-12-19 17:51:45,114 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2021-12-19 17:51:45,114 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2021-12-19 17:51:45,114 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 144 transitions. [2021-12-19 17:51:45,114 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:45,114 INFO L681 BuchiCegarLoop]: Abstraction has 117 states and 144 transitions. [2021-12-19 17:51:45,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 144 transitions. [2021-12-19 17:51:45,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 60. [2021-12-19 17:51:45,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.3) internal successors, (78), 59 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:45,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 78 transitions. [2021-12-19 17:51:45,115 INFO L704 BuchiCegarLoop]: Abstraction has 60 states and 78 transitions. [2021-12-19 17:51:45,115 INFO L587 BuchiCegarLoop]: Abstraction has 60 states and 78 transitions. [2021-12-19 17:51:45,115 INFO L425 BuchiCegarLoop]: ======== Iteration 37============ [2021-12-19 17:51:45,115 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 78 transitions. [2021-12-19 17:51:45,115 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:45,115 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:45,115 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:45,116 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:45,116 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:45,116 INFO L791 eck$LassoCheckResult]: Stem: 11424#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11425#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11435#L367 assume !(main_~length~0#1 < 1); 11426#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 11427#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 11428#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11436#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11483#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11482#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11481#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11480#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11479#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11478#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11477#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11476#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11475#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11474#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11473#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11472#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11471#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11470#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11469#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11441#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11437#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11438#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11439#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11442#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 11429#L370-4 main_~j~0#1 := 0; 11430#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11433#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11434#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11440#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11452#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11451#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11450#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11449#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11448#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11447#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11446#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11444#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11443#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11431#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 11432#L378-2 [2021-12-19 17:51:45,127 INFO L793 eck$LassoCheckResult]: Loop: 11432#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11445#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11432#L378-2 [2021-12-19 17:51:45,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:45,127 INFO L85 PathProgramCache]: Analyzing trace with hash 553597361, now seen corresponding path program 24 times [2021-12-19 17:51:45,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:45,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658831944] [2021-12-19 17:51:45,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:45,127 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:45,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:45,415 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:45,415 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:45,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658831944] [2021-12-19 17:51:45,415 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658831944] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:45,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1160910055] [2021-12-19 17:51:45,415 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:51:45,415 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:45,416 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:45,417 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:45,417 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2021-12-19 17:51:45,581 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2021-12-19 17:51:45,581 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:45,582 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 26 conjunts are in the unsatisfiable core [2021-12-19 17:51:45,583 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:45,686 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:46,093 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:51:46,094 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:51:46,107 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 36 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:46,107 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:47,402 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:51:47,405 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:51:47,440 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 30 proven. 82 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:47,440 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1160910055] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:47,440 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:47,440 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20, 20] total 48 [2021-12-19 17:51:47,440 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1126399256] [2021-12-19 17:51:47,440 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:47,440 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:47,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:47,440 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 33 times [2021-12-19 17:51:47,440 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:47,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148713431] [2021-12-19 17:51:47,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:47,441 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:47,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:47,443 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:47,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:47,444 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:47,488 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:47,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-19 17:51:47,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=2068, Unknown=1, NotChecked=0, Total=2352 [2021-12-19 17:51:47,489 INFO L87 Difference]: Start difference. First operand 60 states and 78 transitions. cyclomatic complexity: 23 Second operand has 49 states, 48 states have (on average 2.0208333333333335) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:48,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:48,595 INFO L93 Difference]: Finished difference Result 82 states and 103 transitions. [2021-12-19 17:51:48,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-12-19 17:51:48,595 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 103 transitions. [2021-12-19 17:51:48,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:48,596 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 65 states and 83 transitions. [2021-12-19 17:51:48,596 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:51:48,596 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:51:48,596 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 83 transitions. [2021-12-19 17:51:48,596 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:48,596 INFO L681 BuchiCegarLoop]: Abstraction has 65 states and 83 transitions. [2021-12-19 17:51:48,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 83 transitions. [2021-12-19 17:51:48,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 63. [2021-12-19 17:51:48,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.2857142857142858) internal successors, (81), 62 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:48,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 81 transitions. [2021-12-19 17:51:48,597 INFO L704 BuchiCegarLoop]: Abstraction has 63 states and 81 transitions. [2021-12-19 17:51:48,597 INFO L587 BuchiCegarLoop]: Abstraction has 63 states and 81 transitions. [2021-12-19 17:51:48,597 INFO L425 BuchiCegarLoop]: ======== Iteration 38============ [2021-12-19 17:51:48,597 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 81 transitions. [2021-12-19 17:51:48,597 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:48,597 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:48,597 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:48,597 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:48,598 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:48,598 INFO L791 eck$LassoCheckResult]: Stem: 11934#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11935#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 11945#L367 assume !(main_~length~0#1 < 1); 11936#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 11937#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 11938#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11946#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11996#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11995#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11994#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11993#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11992#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11991#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11990#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11989#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11988#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11987#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11986#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11985#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 11984#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11983#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11981#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11982#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11947#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11948#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 11951#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 11963#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 11943#L370-4 main_~j~0#1 := 0; 11944#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11965#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11950#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11941#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11942#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11962#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11961#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11960#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11959#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11958#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11957#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11955#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11954#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11939#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 11940#L378-2 [2021-12-19 17:51:48,598 INFO L793 eck$LassoCheckResult]: Loop: 11940#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 11956#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 11940#L378-2 [2021-12-19 17:51:48,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:48,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1747225229, now seen corresponding path program 25 times [2021-12-19 17:51:48,599 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:48,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764066171] [2021-12-19 17:51:48,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:48,599 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:48,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:48,815 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:48,815 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:48,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764066171] [2021-12-19 17:51:48,815 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764066171] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:48,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1580459345] [2021-12-19 17:51:48,815 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:51:48,815 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:48,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:48,816 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:48,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2021-12-19 17:51:48,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:48,931 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 49 conjunts are in the unsatisfiable core [2021-12-19 17:51:48,932 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:49,111 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:49,168 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:51:49,169 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:51:49,178 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:51:49,179 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2021-12-19 17:51:49,549 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-12-19 17:51:49,549 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 10 [2021-12-19 17:51:49,551 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:49,551 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:50,032 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2021-12-19 17:51:50,035 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-12-19 17:51:50,036 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 107 treesize of output 99 [2021-12-19 17:51:50,284 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:50,284 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1580459345] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:50,284 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:50,284 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 20, 19] total 54 [2021-12-19 17:51:50,284 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609479001] [2021-12-19 17:51:50,284 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:50,284 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:50,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:50,285 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 34 times [2021-12-19 17:51:50,285 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:50,285 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494759151] [2021-12-19 17:51:50,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:50,285 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:50,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:50,287 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:50,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:50,289 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:50,324 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:50,324 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2021-12-19 17:51:50,325 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=266, Invalid=2704, Unknown=0, NotChecked=0, Total=2970 [2021-12-19 17:51:50,325 INFO L87 Difference]: Start difference. First operand 63 states and 81 transitions. cyclomatic complexity: 23 Second operand has 55 states, 54 states have (on average 2.185185185185185) internal successors, (118), 55 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:51,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:51,831 INFO L93 Difference]: Finished difference Result 165 states and 202 transitions. [2021-12-19 17:51:51,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2021-12-19 17:51:51,832 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 165 states and 202 transitions. [2021-12-19 17:51:51,833 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 20 [2021-12-19 17:51:51,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 165 states to 162 states and 199 transitions. [2021-12-19 17:51:51,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2021-12-19 17:51:51,833 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2021-12-19 17:51:51,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 199 transitions. [2021-12-19 17:51:51,833 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:51,833 INFO L681 BuchiCegarLoop]: Abstraction has 162 states and 199 transitions. [2021-12-19 17:51:51,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 199 transitions. [2021-12-19 17:51:51,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 104. [2021-12-19 17:51:51,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.2980769230769231) internal successors, (135), 103 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:51,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 135 transitions. [2021-12-19 17:51:51,835 INFO L704 BuchiCegarLoop]: Abstraction has 104 states and 135 transitions. [2021-12-19 17:51:51,835 INFO L587 BuchiCegarLoop]: Abstraction has 104 states and 135 transitions. [2021-12-19 17:51:51,835 INFO L425 BuchiCegarLoop]: ======== Iteration 39============ [2021-12-19 17:51:51,835 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 135 transitions. [2021-12-19 17:51:51,835 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2021-12-19 17:51:51,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:51,835 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:51,836 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 6, 6, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:51,836 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-12-19 17:51:51,836 INFO L791 eck$LassoCheckResult]: Stem: 12516#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 12517#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 12527#L367 assume !(main_~length~0#1 < 1); 12518#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 12519#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 12520#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12528#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12539#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12561#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12560#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12559#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12558#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12557#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12556#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12555#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12554#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12553#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12552#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12551#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12550#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12549#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12547#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 12548#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12543#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12544#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12587#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12585#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12583#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 12582#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 12580#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 12579#L370-4 main_~j~0#1 := 0; 12578#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12577#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12576#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12575#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12574#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12573#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12572#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12571#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12570#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12569#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12563#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12565#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 12609#L378-2 [2021-12-19 17:51:51,841 INFO L793 eck$LassoCheckResult]: Loop: 12609#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12611#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 12610#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 12608#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 12609#L378-2 [2021-12-19 17:51:51,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:51,843 INFO L85 PathProgramCache]: Analyzing trace with hash -308354518, now seen corresponding path program 26 times [2021-12-19 17:51:51,844 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:51,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035200463] [2021-12-19 17:51:51,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:51,844 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:51,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:52,165 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:52,165 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:52,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035200463] [2021-12-19 17:51:52,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2035200463] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:52,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462332378] [2021-12-19 17:51:52,165 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:51:52,165 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:52,165 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:52,177 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:52,193 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2021-12-19 17:51:52,293 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:51:52,294 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:52,295 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 43 conjunts are in the unsatisfiable core [2021-12-19 17:51:52,296 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:52,356 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:52,427 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:52,427 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:52,436 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:52,437 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:52,464 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:52,464 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:52,498 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:51:52,498 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:51:52,686 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:51:52,688 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 2 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:52,688 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:52,931 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:51:52,933 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:51:52,986 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 120 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:51:52,986 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462332378] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:52,987 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:52,987 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 29 [2021-12-19 17:51:52,987 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061803632] [2021-12-19 17:51:52,987 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:52,987 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:52,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:52,987 INFO L85 PathProgramCache]: Analyzing trace with hash 2219337, now seen corresponding path program 3 times [2021-12-19 17:51:52,987 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:52,987 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405156491] [2021-12-19 17:51:52,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:52,987 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:52,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:52,990 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:52,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:52,992 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:53,060 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:53,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2021-12-19 17:51:53,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=781, Unknown=0, NotChecked=0, Total=870 [2021-12-19 17:51:53,060 INFO L87 Difference]: Start difference. First operand 104 states and 135 transitions. cyclomatic complexity: 37 Second operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 30 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:53,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:53,551 INFO L93 Difference]: Finished difference Result 112 states and 136 transitions. [2021-12-19 17:51:53,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-12-19 17:51:53,552 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 112 states and 136 transitions. [2021-12-19 17:51:53,552 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:53,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 112 states to 110 states and 134 transitions. [2021-12-19 17:51:53,552 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-12-19 17:51:53,552 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-12-19 17:51:53,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 134 transitions. [2021-12-19 17:51:53,553 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:53,553 INFO L681 BuchiCegarLoop]: Abstraction has 110 states and 134 transitions. [2021-12-19 17:51:53,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 134 transitions. [2021-12-19 17:51:53,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 56. [2021-12-19 17:51:53,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.25) internal successors, (70), 55 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:53,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 70 transitions. [2021-12-19 17:51:53,554 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 70 transitions. [2021-12-19 17:51:53,554 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 70 transitions. [2021-12-19 17:51:53,554 INFO L425 BuchiCegarLoop]: ======== Iteration 40============ [2021-12-19 17:51:53,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 70 transitions. [2021-12-19 17:51:53,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:53,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:53,554 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:53,554 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:53,554 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:53,554 INFO L791 eck$LassoCheckResult]: Stem: 13031#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13032#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 13042#L367 assume !(main_~length~0#1 < 1); 13033#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 13034#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 13035#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13043#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13046#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13086#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13085#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13084#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13083#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13082#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13081#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13080#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13079#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13078#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13077#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13076#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13075#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13074#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13073#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13072#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13070#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13069#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13068#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 13036#L370-4 main_~j~0#1 := 0; 13037#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13063#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13048#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13040#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13041#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13062#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13061#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13060#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13059#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13058#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13055#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13054#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13053#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13051#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13050#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13038#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 13039#L378-2 [2021-12-19 17:51:53,555 INFO L793 eck$LassoCheckResult]: Loop: 13039#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13052#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13039#L378-2 [2021-12-19 17:51:53,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:53,555 INFO L85 PathProgramCache]: Analyzing trace with hash -1556671240, now seen corresponding path program 27 times [2021-12-19 17:51:53,555 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:53,555 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503027976] [2021-12-19 17:51:53,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:53,555 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:53,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:53,689 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 43 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:53,689 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:53,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503027976] [2021-12-19 17:51:53,689 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503027976] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:53,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1959713903] [2021-12-19 17:51:53,689 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:51:53,689 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:53,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:53,691 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:53,692 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2021-12-19 17:51:53,852 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-12-19 17:51:53,852 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:53,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 18 conjunts are in the unsatisfiable core [2021-12-19 17:51:53,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:54,078 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 56 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:54,079 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:51:54,158 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 56 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:54,158 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1959713903] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:51:54,159 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:51:54,159 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 29 [2021-12-19 17:51:54,159 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361921915] [2021-12-19 17:51:54,159 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:51:54,159 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:51:54,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:54,159 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 35 times [2021-12-19 17:51:54,159 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:54,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888075518] [2021-12-19 17:51:54,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:54,159 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:54,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:54,162 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:51:54,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:51:54,164 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:51:54,195 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:51:54,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-12-19 17:51:54,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=618, Unknown=0, NotChecked=0, Total=812 [2021-12-19 17:51:54,196 INFO L87 Difference]: Start difference. First operand 56 states and 70 transitions. cyclomatic complexity: 17 Second operand has 29 states, 29 states have (on average 2.310344827586207) internal successors, (67), 29 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:54,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:51:54,317 INFO L93 Difference]: Finished difference Result 74 states and 88 transitions. [2021-12-19 17:51:54,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-12-19 17:51:54,317 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 88 transitions. [2021-12-19 17:51:54,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:54,318 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 58 states and 72 transitions. [2021-12-19 17:51:54,318 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:51:54,318 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:51:54,318 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 72 transitions. [2021-12-19 17:51:54,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:51:54,318 INFO L681 BuchiCegarLoop]: Abstraction has 58 states and 72 transitions. [2021-12-19 17:51:54,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 72 transitions. [2021-12-19 17:51:54,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2021-12-19 17:51:54,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.2321428571428572) internal successors, (69), 55 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:51:54,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2021-12-19 17:51:54,319 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:51:54,320 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:51:54,320 INFO L425 BuchiCegarLoop]: ======== Iteration 41============ [2021-12-19 17:51:54,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 69 transitions. [2021-12-19 17:51:54,320 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:51:54,320 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:51:54,320 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:51:54,320 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:51:54,320 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:51:54,321 INFO L791 eck$LassoCheckResult]: Stem: 13469#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13470#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 13480#L367 assume !(main_~length~0#1 < 1); 13471#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 13472#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 13473#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13481#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13487#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13488#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13524#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13523#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13522#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13521#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13520#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13519#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13518#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13517#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13516#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13515#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13514#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13513#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13512#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13511#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13510#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13508#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13507#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13506#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13505#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13486#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13503#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 13502#L370-4 main_~j~0#1 := 0; 13484#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13476#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13477#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13499#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13498#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13497#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13496#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13495#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13494#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13493#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13492#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13490#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13489#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13474#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 13475#L378-2 [2021-12-19 17:51:54,321 INFO L793 eck$LassoCheckResult]: Loop: 13475#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13491#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13475#L378-2 [2021-12-19 17:51:54,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:51:54,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1970093653, now seen corresponding path program 28 times [2021-12-19 17:51:54,321 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:51:54,321 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502658400] [2021-12-19 17:51:54,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:51:54,321 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:51:54,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:51:54,552 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:54,552 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:51:54,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502658400] [2021-12-19 17:51:54,552 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1502658400] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:51:54,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1060914435] [2021-12-19 17:51:54,553 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:51:54,553 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:51:54,553 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:51:54,554 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:51:54,555 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2021-12-19 17:51:54,645 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:51:54,645 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:51:54,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 243 conjuncts, 42 conjunts are in the unsatisfiable core [2021-12-19 17:51:54,647 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:51:54,855 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:51:54,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:51:54,915 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:51:55,219 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:51:55,221 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:51:55,221 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:07,563 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_396| Int)) (or (forall ((v_ArrVal_1254 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_396| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_1254) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 24)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_396| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from false [2021-12-19 17:52:07,571 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2021-12-19 17:52:07,574 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2021-12-19 17:52:07,677 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 127 refuted. 0 times theorem prover too weak. 0 trivial. 7 not checked. [2021-12-19 17:52:07,677 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1060914435] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:07,677 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:07,677 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20, 19] total 48 [2021-12-19 17:52:07,677 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456369866] [2021-12-19 17:52:07,677 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:07,677 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:07,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:07,677 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 36 times [2021-12-19 17:52:07,678 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:07,678 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1238895821] [2021-12-19 17:52:07,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:07,678 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:07,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:07,680 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:07,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:07,682 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:07,715 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:07,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-12-19 17:52:07,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=2074, Unknown=1, NotChecked=92, Total=2352 [2021-12-19 17:52:07,718 INFO L87 Difference]: Start difference. First operand 56 states and 69 transitions. cyclomatic complexity: 16 Second operand has 49 states, 48 states have (on average 2.2291666666666665) internal successors, (107), 49 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:19,932 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~i~0#1_396| Int)) (or (forall ((v_ArrVal_1254 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_396| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_1254) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 24)) 2))) (< |v_ULTIMATE.start_main_~i~0#1_396| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= |c_ULTIMATE.start_main_~i~0#1| 6) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:52:20,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:20,314 INFO L93 Difference]: Finished difference Result 90 states and 107 transitions. [2021-12-19 17:52:20,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-12-19 17:52:20,315 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 90 states and 107 transitions. [2021-12-19 17:52:20,315 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:52:20,316 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 90 states to 89 states and 106 transitions. [2021-12-19 17:52:20,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:52:20,316 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:52:20,316 INFO L73 IsDeterministic]: Start isDeterministic. Operand 89 states and 106 transitions. [2021-12-19 17:52:20,316 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:20,316 INFO L681 BuchiCegarLoop]: Abstraction has 89 states and 106 transitions. [2021-12-19 17:52:20,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states and 106 transitions. [2021-12-19 17:52:20,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 56. [2021-12-19 17:52:20,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.2321428571428572) internal successors, (69), 55 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:20,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2021-12-19 17:52:20,317 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:52:20,317 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:52:20,317 INFO L425 BuchiCegarLoop]: ======== Iteration 42============ [2021-12-19 17:52:20,317 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 69 transitions. [2021-12-19 17:52:20,317 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:20,317 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:20,317 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:20,317 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 8, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:20,317 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:20,317 INFO L791 eck$LassoCheckResult]: Stem: 13949#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13950#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 13960#L367 assume !(main_~length~0#1 < 1); 13951#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 13952#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 13953#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13961#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13988#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13962#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13963#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13964#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13967#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13987#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13986#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13985#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13984#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13983#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13982#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13981#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13980#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13979#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13978#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13977#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13976#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 13974#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 13972#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 13973#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14003#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14004#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14002#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 14001#L370-4 main_~j~0#1 := 0; 13965#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13958#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13959#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13999#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13998#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13997#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13996#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13995#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13994#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13993#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13992#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13990#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13989#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13956#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 13957#L378-2 [2021-12-19 17:52:20,318 INFO L793 eck$LassoCheckResult]: Loop: 13957#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 13991#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 13957#L378-2 [2021-12-19 17:52:20,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:20,318 INFO L85 PathProgramCache]: Analyzing trace with hash -1547391827, now seen corresponding path program 7 times [2021-12-19 17:52:20,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:20,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728155296] [2021-12-19 17:52:20,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:20,318 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:20,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:20,614 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:20,615 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:20,615 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728155296] [2021-12-19 17:52:20,615 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728155296] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:20,615 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [386340810] [2021-12-19 17:52:20,615 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:52:20,615 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:20,615 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:20,617 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:20,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2021-12-19 17:52:20,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:20,714 INFO L263 TraceCheckSpWp]: Trace formula consists of 236 conjuncts, 44 conjunts are in the unsatisfiable core [2021-12-19 17:52:20,715 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:20,995 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:21,127 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:52:21,127 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:52:21,497 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:52:21,516 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:21,517 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:21,701 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:52:21,703 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:52:21,752 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:21,753 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [386340810] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:21,753 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:21,753 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21, 20] total 42 [2021-12-19 17:52:21,753 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928632459] [2021-12-19 17:52:21,753 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:21,753 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:21,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:21,754 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 37 times [2021-12-19 17:52:21,754 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:21,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182995087] [2021-12-19 17:52:21,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:21,754 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:21,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:21,756 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:21,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:21,759 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:21,785 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:21,786 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-12-19 17:52:21,786 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=1649, Unknown=0, NotChecked=0, Total=1806 [2021-12-19 17:52:21,786 INFO L87 Difference]: Start difference. First operand 56 states and 69 transitions. cyclomatic complexity: 17 Second operand has 43 states, 42 states have (on average 2.1904761904761907) internal successors, (92), 43 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:22,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:22,267 INFO L93 Difference]: Finished difference Result 70 states and 83 transitions. [2021-12-19 17:52:22,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-12-19 17:52:22,267 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 83 transitions. [2021-12-19 17:52:22,268 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:22,268 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 69 states and 82 transitions. [2021-12-19 17:52:22,268 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:52:22,268 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:52:22,268 INFO L73 IsDeterministic]: Start isDeterministic. Operand 69 states and 82 transitions. [2021-12-19 17:52:22,268 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:22,268 INFO L681 BuchiCegarLoop]: Abstraction has 69 states and 82 transitions. [2021-12-19 17:52:22,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states and 82 transitions. [2021-12-19 17:52:22,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 49. [2021-12-19 17:52:22,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.2244897959183674) internal successors, (60), 48 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:22,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 60 transitions. [2021-12-19 17:52:22,269 INFO L704 BuchiCegarLoop]: Abstraction has 49 states and 60 transitions. [2021-12-19 17:52:22,269 INFO L587 BuchiCegarLoop]: Abstraction has 49 states and 60 transitions. [2021-12-19 17:52:22,270 INFO L425 BuchiCegarLoop]: ======== Iteration 43============ [2021-12-19 17:52:22,270 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 60 transitions. [2021-12-19 17:52:22,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:22,270 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:22,270 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:22,270 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:22,270 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:22,270 INFO L791 eck$LassoCheckResult]: Stem: 14401#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 14402#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 14412#L367 assume !(main_~length~0#1 < 1); 14403#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 14404#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 14405#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14413#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14446#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14414#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14415#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14416#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14419#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14445#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14444#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14443#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14442#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14441#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14440#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14439#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14438#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14437#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14436#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14435#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14434#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14433#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14431#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14429#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14421#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14426#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14420#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 14406#L370-4 main_~j~0#1 := 0; 14407#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14417#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14418#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14410#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14411#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14449#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14448#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14447#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14432#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14430#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14428#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14427#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14425#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14423#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14422#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14408#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 14409#L378-2 [2021-12-19 17:52:22,271 INFO L793 eck$LassoCheckResult]: Loop: 14409#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14424#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14409#L378-2 [2021-12-19 17:52:22,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:22,271 INFO L85 PathProgramCache]: Analyzing trace with hash -984861904, now seen corresponding path program 8 times [2021-12-19 17:52:22,271 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:22,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179038108] [2021-12-19 17:52:22,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:22,271 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:22,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:22,542 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:22,542 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:22,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179038108] [2021-12-19 17:52:22,542 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179038108] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:22,543 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078767585] [2021-12-19 17:52:22,543 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:52:22,543 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:22,543 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:22,544 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:22,545 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2021-12-19 17:52:22,667 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:52:22,667 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:22,668 INFO L263 TraceCheckSpWp]: Trace formula consists of 248 conjuncts, 41 conjunts are in the unsatisfiable core [2021-12-19 17:52:22,669 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:22,724 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:23,022 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:52:23,024 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:23,024 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:23,139 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:52:23,141 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:52:23,212 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:23,212 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078767585] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:23,212 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:23,212 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 20] total 31 [2021-12-19 17:52:23,212 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589221018] [2021-12-19 17:52:23,213 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:23,213 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:23,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:23,213 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 38 times [2021-12-19 17:52:23,213 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:23,213 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164764185] [2021-12-19 17:52:23,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:23,213 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:23,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:23,215 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:23,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:23,217 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:23,301 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:23,301 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-12-19 17:52:23,301 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=901, Unknown=0, NotChecked=0, Total=992 [2021-12-19 17:52:23,302 INFO L87 Difference]: Start difference. First operand 49 states and 60 transitions. cyclomatic complexity: 14 Second operand has 32 states, 31 states have (on average 2.225806451612903) internal successors, (69), 32 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:23,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:23,823 INFO L93 Difference]: Finished difference Result 77 states and 93 transitions. [2021-12-19 17:52:23,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-12-19 17:52:23,824 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 93 transitions. [2021-12-19 17:52:23,830 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:52:23,830 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 76 states and 92 transitions. [2021-12-19 17:52:23,830 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2021-12-19 17:52:23,830 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-19 17:52:23,830 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 92 transitions. [2021-12-19 17:52:23,831 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:23,831 INFO L681 BuchiCegarLoop]: Abstraction has 76 states and 92 transitions. [2021-12-19 17:52:23,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 92 transitions. [2021-12-19 17:52:23,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 56. [2021-12-19 17:52:23,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.2321428571428572) internal successors, (69), 55 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:23,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 69 transitions. [2021-12-19 17:52:23,832 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:52:23,832 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 69 transitions. [2021-12-19 17:52:23,832 INFO L425 BuchiCegarLoop]: ======== Iteration 44============ [2021-12-19 17:52:23,832 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 69 transitions. [2021-12-19 17:52:23,832 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:23,833 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:23,833 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:23,833 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:23,833 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:23,833 INFO L791 eck$LassoCheckResult]: Stem: 14842#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 14843#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 14853#L367 assume !(main_~length~0#1 < 1); 14844#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 14845#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 14846#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14854#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14880#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14855#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14856#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14857#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14860#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14879#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14878#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14877#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14876#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14875#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14874#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14873#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14872#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14871#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14870#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14869#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14868#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14867#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 14866#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14865#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14862#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 14864#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 14896#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 14895#L370-4 main_~j~0#1 := 0; 14858#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14851#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14852#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14893#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14892#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14891#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14890#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14889#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14888#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14887#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14886#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14885#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14884#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14883#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14882#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14849#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 14850#L378-2 [2021-12-19 17:52:23,833 INFO L793 eck$LassoCheckResult]: Loop: 14850#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 14881#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 14850#L378-2 [2021-12-19 17:52:23,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:23,834 INFO L85 PathProgramCache]: Analyzing trace with hash -167213454, now seen corresponding path program 29 times [2021-12-19 17:52:23,834 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:23,834 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589769049] [2021-12-19 17:52:23,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:23,834 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:23,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:24,080 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:24,081 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:24,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589769049] [2021-12-19 17:52:24,081 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [589769049] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:24,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1765754458] [2021-12-19 17:52:24,081 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:52:24,081 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:24,081 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:24,082 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:24,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2021-12-19 17:52:24,242 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2021-12-19 17:52:24,242 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:24,244 INFO L263 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 39 conjunts are in the unsatisfiable core [2021-12-19 17:52:24,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:24,304 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:24,491 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2021-12-19 17:52:24,493 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:24,493 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:24,755 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2021-12-19 17:52:24,756 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 32 [2021-12-19 17:52:24,810 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:24,810 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1765754458] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:24,811 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:24,811 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 39 [2021-12-19 17:52:24,811 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140794198] [2021-12-19 17:52:24,811 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:24,811 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:24,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:24,811 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 39 times [2021-12-19 17:52:24,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:24,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950105741] [2021-12-19 17:52:24,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:24,812 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:24,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:24,814 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:24,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:24,816 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:24,852 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:24,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2021-12-19 17:52:24,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=1434, Unknown=0, NotChecked=0, Total=1560 [2021-12-19 17:52:24,853 INFO L87 Difference]: Start difference. First operand 56 states and 69 transitions. cyclomatic complexity: 17 Second operand has 40 states, 39 states have (on average 2.1794871794871793) internal successors, (85), 40 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:25,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:25,274 INFO L93 Difference]: Finished difference Result 83 states and 100 transitions. [2021-12-19 17:52:25,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-12-19 17:52:25,275 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 100 transitions. [2021-12-19 17:52:25,275 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:52:25,276 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 99 transitions. [2021-12-19 17:52:25,276 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:52:25,276 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:52:25,276 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 99 transitions. [2021-12-19 17:52:25,276 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:25,276 INFO L681 BuchiCegarLoop]: Abstraction has 82 states and 99 transitions. [2021-12-19 17:52:25,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 99 transitions. [2021-12-19 17:52:25,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 59. [2021-12-19 17:52:25,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.2542372881355932) internal successors, (74), 58 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:25,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 74 transitions. [2021-12-19 17:52:25,277 INFO L704 BuchiCegarLoop]: Abstraction has 59 states and 74 transitions. [2021-12-19 17:52:25,277 INFO L587 BuchiCegarLoop]: Abstraction has 59 states and 74 transitions. [2021-12-19 17:52:25,277 INFO L425 BuchiCegarLoop]: ======== Iteration 45============ [2021-12-19 17:52:25,277 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 74 transitions. [2021-12-19 17:52:25,278 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:25,278 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:25,278 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:25,278 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:25,278 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:25,278 INFO L791 eck$LassoCheckResult]: Stem: 15302#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 15303#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 15313#L367 assume !(main_~length~0#1 < 1); 15304#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 15305#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 15306#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15314#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15317#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15315#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15316#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15360#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15359#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15358#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15357#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15356#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15355#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15354#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15353#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15352#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15351#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15350#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15349#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15348#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15347#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15346#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15345#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15344#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15343#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15342#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15341#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 15307#L370-4 main_~j~0#1 := 0; 15308#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15311#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15312#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15318#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15335#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15334#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15333#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15332#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15331#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15330#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15329#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15328#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15327#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15326#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15325#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15324#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15323#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15309#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 15310#L378-2 [2021-12-19 17:52:25,279 INFO L793 eck$LassoCheckResult]: Loop: 15310#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15322#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15310#L378-2 [2021-12-19 17:52:25,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:25,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1778339915, now seen corresponding path program 30 times [2021-12-19 17:52:25,279 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:25,279 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776830232] [2021-12-19 17:52:25,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:25,279 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:25,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:25,470 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 57 proven. 107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:25,470 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:25,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776830232] [2021-12-19 17:52:25,470 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [776830232] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:25,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1244946153] [2021-12-19 17:52:25,470 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:52:25,470 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:25,470 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:25,472 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:25,473 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2021-12-19 17:52:25,659 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2021-12-19 17:52:25,660 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:25,662 INFO L263 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 20 conjunts are in the unsatisfiable core [2021-12-19 17:52:25,662 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:25,903 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:25,903 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:25,951 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 72 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:25,952 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1244946153] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:25,952 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:25,952 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21] total 32 [2021-12-19 17:52:25,952 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735228138] [2021-12-19 17:52:25,952 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:25,953 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:25,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:25,953 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 40 times [2021-12-19 17:52:25,953 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:25,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923127103] [2021-12-19 17:52:25,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:25,953 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:25,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:25,956 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:25,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:25,959 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:25,984 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:25,985 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-12-19 17:52:25,985 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=757, Unknown=0, NotChecked=0, Total=992 [2021-12-19 17:52:25,985 INFO L87 Difference]: Start difference. First operand 59 states and 74 transitions. cyclomatic complexity: 19 Second operand has 32 states, 32 states have (on average 2.3125) internal successors, (74), 32 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:26,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:26,142 INFO L93 Difference]: Finished difference Result 83 states and 100 transitions. [2021-12-19 17:52:26,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-12-19 17:52:26,143 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 100 transitions. [2021-12-19 17:52:26,143 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:26,145 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 65 states and 81 transitions. [2021-12-19 17:52:26,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:52:26,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:52:26,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 81 transitions. [2021-12-19 17:52:26,145 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:26,145 INFO L681 BuchiCegarLoop]: Abstraction has 65 states and 81 transitions. [2021-12-19 17:52:26,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 81 transitions. [2021-12-19 17:52:26,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 61. [2021-12-19 17:52:26,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.2295081967213115) internal successors, (75), 60 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:26,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 75 transitions. [2021-12-19 17:52:26,160 INFO L704 BuchiCegarLoop]: Abstraction has 61 states and 75 transitions. [2021-12-19 17:52:26,160 INFO L587 BuchiCegarLoop]: Abstraction has 61 states and 75 transitions. [2021-12-19 17:52:26,160 INFO L425 BuchiCegarLoop]: ======== Iteration 46============ [2021-12-19 17:52:26,160 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 75 transitions. [2021-12-19 17:52:26,167 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:26,168 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:26,168 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:26,168 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:26,168 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:26,168 INFO L791 eck$LassoCheckResult]: Stem: 15787#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 15788#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 15798#L367 assume !(main_~length~0#1 < 1); 15789#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 15790#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 15791#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15799#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15804#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15805#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15847#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15846#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15845#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15844#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15843#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15842#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15841#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15840#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15839#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15838#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15837#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15836#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15835#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15834#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15833#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15832#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15831#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15830#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15828#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15829#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15800#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 15801#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 15825#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 15823#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 15822#L370-4 main_~j~0#1 := 0; 15802#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15794#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15795#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15818#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15817#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15816#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15815#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15814#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15813#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15812#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15811#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15810#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15809#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15807#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15806#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15792#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 15793#L378-2 [2021-12-19 17:52:26,168 INFO L793 eck$LassoCheckResult]: Loop: 15793#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 15808#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 15793#L378-2 [2021-12-19 17:52:26,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:26,169 INFO L85 PathProgramCache]: Analyzing trace with hash -737319692, now seen corresponding path program 31 times [2021-12-19 17:52:26,169 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:26,169 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669958583] [2021-12-19 17:52:26,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:26,169 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:26,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:26,435 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 173 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:26,435 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:26,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669958583] [2021-12-19 17:52:26,435 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669958583] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:26,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [609658050] [2021-12-19 17:52:26,435 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:52:26,435 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:26,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:26,452 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:26,501 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2021-12-19 17:52:26,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:26,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 270 conjuncts, 46 conjunts are in the unsatisfiable core [2021-12-19 17:52:26,582 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:26,759 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:26,806 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:52:26,807 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-12-19 17:52:27,031 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-19 17:52:27,032 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 173 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:27,032 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:39,339 WARN L838 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_478| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_478| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_1463 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_478| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_1463) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 28)) 2))))) is different from false [2021-12-19 17:52:39,348 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2021-12-19 17:52:39,351 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 182 [2021-12-19 17:52:39,476 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 165 refuted. 0 times theorem prover too weak. 0 trivial. 8 not checked. [2021-12-19 17:52:39,476 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [609658050] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:39,476 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:39,476 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 22, 21] total 53 [2021-12-19 17:52:39,476 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901225905] [2021-12-19 17:52:39,476 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:39,476 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:39,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:39,477 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 41 times [2021-12-19 17:52:39,477 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:39,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65773575] [2021-12-19 17:52:39,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:39,477 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:39,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:39,479 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:39,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:39,481 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:39,507 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:39,508 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2021-12-19 17:52:39,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=2555, Unknown=1, NotChecked=102, Total=2862 [2021-12-19 17:52:39,508 INFO L87 Difference]: Start difference. First operand 61 states and 75 transitions. cyclomatic complexity: 18 Second operand has 54 states, 53 states have (on average 2.2452830188679247) internal successors, (119), 54 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:51,818 WARN L838 $PredicateComparison]: unable to prove that (and (forall ((|v_ULTIMATE.start_main_~i~0#1_478| Int)) (or (< |v_ULTIMATE.start_main_~i~0#1_478| (+ |c_ULTIMATE.start_main_~i~0#1| 1)) (forall ((v_ArrVal_1463 Int)) (= 0 (mod (select (store (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_478| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|) v_ArrVal_1463) (+ |c_ULTIMATE.start_main_~arr~0#1.offset| 28)) 2))))) (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~arr~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~arr~0#1.offset|)) 0) (= |c_ULTIMATE.start_main_~i~0#1| 7) (= |c_ULTIMATE.start_main_~arr~0#1.offset| 0)) is different from false [2021-12-19 17:52:52,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:52,256 INFO L93 Difference]: Finished difference Result 87 states and 105 transitions. [2021-12-19 17:52:52,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-12-19 17:52:52,257 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 105 transitions. [2021-12-19 17:52:52,257 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:52:52,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 86 states and 104 transitions. [2021-12-19 17:52:52,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:52:52,257 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:52:52,257 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 104 transitions. [2021-12-19 17:52:52,257 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:52,257 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 104 transitions. [2021-12-19 17:52:52,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 104 transitions. [2021-12-19 17:52:52,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 64. [2021-12-19 17:52:52,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.25) internal successors, (80), 63 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:52,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 80 transitions. [2021-12-19 17:52:52,258 INFO L704 BuchiCegarLoop]: Abstraction has 64 states and 80 transitions. [2021-12-19 17:52:52,258 INFO L587 BuchiCegarLoop]: Abstraction has 64 states and 80 transitions. [2021-12-19 17:52:52,258 INFO L425 BuchiCegarLoop]: ======== Iteration 47============ [2021-12-19 17:52:52,258 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 80 transitions. [2021-12-19 17:52:52,258 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:52,259 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:52,259 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:52,259 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:52,259 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:52,259 INFO L791 eck$LassoCheckResult]: Stem: 16306#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 16307#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 16317#L367 assume !(main_~length~0#1 < 1); 16308#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 16309#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 16310#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16318#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16350#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16319#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16320#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16323#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16324#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16349#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16348#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16347#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16346#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16345#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16344#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16343#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16342#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16341#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16340#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16339#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16338#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16337#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16336#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16335#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16333#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16334#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16330#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16326#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16368#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16366#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 16365#L370-4 main_~j~0#1 := 0; 16321#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16313#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16314#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16363#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16362#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16361#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16360#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16359#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16358#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16357#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16356#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16355#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16354#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16353#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16352#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16311#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 16312#L378-2 [2021-12-19 17:52:52,259 INFO L793 eck$LassoCheckResult]: Loop: 16312#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16351#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16312#L378-2 [2021-12-19 17:52:52,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:52,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1725109576, now seen corresponding path program 32 times [2021-12-19 17:52:52,259 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:52,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647551149] [2021-12-19 17:52:52,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:52,260 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:52,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:52,630 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 173 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:52,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:52,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647551149] [2021-12-19 17:52:52,630 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [647551149] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:52,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [263655972] [2021-12-19 17:52:52,631 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:52:52,631 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:52,631 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:52,639 INFO L229 MonitoredProcess]: Starting monitored process 59 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:52,641 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2021-12-19 17:52:52,776 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:52:52,776 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:52,777 INFO L263 TraceCheckSpWp]: Trace formula consists of 270 conjuncts, 46 conjunts are in the unsatisfiable core [2021-12-19 17:52:52,778 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:52,865 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:52,944 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:52:52,944 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:52:52,963 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:52:52,963 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:52:53,192 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:52:53,193 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 173 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:53,193 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:53,352 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:52:53,353 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:52:53,400 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 0 proven. 173 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:53,401 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [263655972] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:53,401 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:53,401 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 33 [2021-12-19 17:52:53,401 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799393185] [2021-12-19 17:52:53,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:53,401 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:53,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:53,402 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 42 times [2021-12-19 17:52:53,402 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:53,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888613509] [2021-12-19 17:52:53,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:53,402 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:53,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:53,404 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:53,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:53,406 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:53,434 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:53,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-12-19 17:52:53,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1028, Unknown=0, NotChecked=0, Total=1122 [2021-12-19 17:52:53,436 INFO L87 Difference]: Start difference. First operand 64 states and 80 transitions. cyclomatic complexity: 21 Second operand has 34 states, 33 states have (on average 2.212121212121212) internal successors, (73), 34 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:54,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:54,105 INFO L93 Difference]: Finished difference Result 140 states and 169 transitions. [2021-12-19 17:52:54,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2021-12-19 17:52:54,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 169 transitions. [2021-12-19 17:52:54,106 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2021-12-19 17:52:54,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 139 states and 168 transitions. [2021-12-19 17:52:54,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2021-12-19 17:52:54,107 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2021-12-19 17:52:54,107 INFO L73 IsDeterministic]: Start isDeterministic. Operand 139 states and 168 transitions. [2021-12-19 17:52:54,107 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:54,107 INFO L681 BuchiCegarLoop]: Abstraction has 139 states and 168 transitions. [2021-12-19 17:52:54,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states and 168 transitions. [2021-12-19 17:52:54,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 70. [2021-12-19 17:52:54,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.2857142857142858) internal successors, (90), 69 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:54,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 90 transitions. [2021-12-19 17:52:54,108 INFO L704 BuchiCegarLoop]: Abstraction has 70 states and 90 transitions. [2021-12-19 17:52:54,108 INFO L587 BuchiCegarLoop]: Abstraction has 70 states and 90 transitions. [2021-12-19 17:52:54,108 INFO L425 BuchiCegarLoop]: ======== Iteration 48============ [2021-12-19 17:52:54,108 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 90 transitions. [2021-12-19 17:52:54,109 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:54,109 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:54,109 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:54,109 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:54,109 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:54,109 INFO L791 eck$LassoCheckResult]: Stem: 16861#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 16862#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 16872#L367 assume !(main_~length~0#1 < 1); 16863#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 16864#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 16865#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16873#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16930#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16929#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16928#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16927#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16926#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16925#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16924#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16923#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16922#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16921#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16920#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16919#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16918#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16917#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16916#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16915#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16914#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16913#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16912#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16911#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16909#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16910#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16874#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 16875#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 16876#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 16878#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 16866#L370-4 main_~j~0#1 := 0; 16867#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16870#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16871#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16877#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16892#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16891#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16890#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16889#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16888#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16887#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16886#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16885#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16884#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16883#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16882#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16880#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16879#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16868#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 16869#L378-2 [2021-12-19 17:52:54,109 INFO L793 eck$LassoCheckResult]: Loop: 16869#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 16881#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 16869#L378-2 [2021-12-19 17:52:54,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:54,110 INFO L85 PathProgramCache]: Analyzing trace with hash 105379255, now seen corresponding path program 33 times [2021-12-19 17:52:54,110 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:54,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634771989] [2021-12-19 17:52:54,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:54,110 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:54,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:54,519 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:54,519 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:54,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634771989] [2021-12-19 17:52:54,520 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1634771989] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:54,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1220626019] [2021-12-19 17:52:54,520 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:52:54,520 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:54,520 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:54,552 INFO L229 MonitoredProcess]: Starting monitored process 60 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:54,553 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2021-12-19 17:52:54,732 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2021-12-19 17:52:54,732 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:54,734 INFO L263 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 30 conjunts are in the unsatisfiable core [2021-12-19 17:52:54,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:54,965 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:55,610 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:52:55,611 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:52:55,627 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 64 proven. 125 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:55,628 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:56,390 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:52:56,393 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:52:56,442 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 56 proven. 133 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:56,443 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1220626019] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:56,443 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:56,443 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24, 24] total 58 [2021-12-19 17:52:56,443 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96296394] [2021-12-19 17:52:56,443 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:56,444 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:56,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:56,444 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 43 times [2021-12-19 17:52:56,444 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:56,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [856731619] [2021-12-19 17:52:56,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:56,444 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:56,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:56,447 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:56,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:56,449 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:56,476 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:56,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2021-12-19 17:52:56,477 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=396, Invalid=3026, Unknown=0, NotChecked=0, Total=3422 [2021-12-19 17:52:56,477 INFO L87 Difference]: Start difference. First operand 70 states and 90 transitions. cyclomatic complexity: 25 Second operand has 59 states, 58 states have (on average 2.086206896551724) internal successors, (121), 59 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:57,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:52:57,864 INFO L93 Difference]: Finished difference Result 115 states and 140 transitions. [2021-12-19 17:52:57,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2021-12-19 17:52:57,864 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 115 states and 140 transitions. [2021-12-19 17:52:57,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:57,865 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 115 states to 77 states and 97 transitions. [2021-12-19 17:52:57,865 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:52:57,865 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:52:57,865 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 97 transitions. [2021-12-19 17:52:57,865 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:52:57,865 INFO L681 BuchiCegarLoop]: Abstraction has 77 states and 97 transitions. [2021-12-19 17:52:57,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 97 transitions. [2021-12-19 17:52:57,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 75. [2021-12-19 17:52:57,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.2666666666666666) internal successors, (95), 74 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:52:57,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 95 transitions. [2021-12-19 17:52:57,873 INFO L704 BuchiCegarLoop]: Abstraction has 75 states and 95 transitions. [2021-12-19 17:52:57,873 INFO L587 BuchiCegarLoop]: Abstraction has 75 states and 95 transitions. [2021-12-19 17:52:57,873 INFO L425 BuchiCegarLoop]: ======== Iteration 49============ [2021-12-19 17:52:57,873 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 95 transitions. [2021-12-19 17:52:57,873 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:52:57,873 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:52:57,873 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:52:57,874 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 9, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:52:57,874 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:52:57,874 INFO L791 eck$LassoCheckResult]: Stem: 17504#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 17505#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 17515#L367 assume !(main_~length~0#1 < 1); 17506#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 17507#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 17508#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17516#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17578#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17577#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17576#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17575#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17574#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17573#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17572#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17571#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17570#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17569#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17568#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17567#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17566#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17565#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17564#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17563#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17562#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17561#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17560#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17559#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17557#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17556#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17555#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17553#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17554#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17546#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 17524#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 17542#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 17523#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 17509#L370-4 main_~j~0#1 := 0; 17510#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17521#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17538#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17537#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17536#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17535#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17534#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17533#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17532#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17531#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17530#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17529#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17528#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17526#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17525#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17511#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 17512#L378-2 [2021-12-19 17:52:57,874 INFO L793 eck$LassoCheckResult]: Loop: 17512#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 17527#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 17512#L378-2 [2021-12-19 17:52:57,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:57,875 INFO L85 PathProgramCache]: Analyzing trace with hash -604089618, now seen corresponding path program 34 times [2021-12-19 17:52:57,875 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:57,875 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162936429] [2021-12-19 17:52:57,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:57,875 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:57,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:52:58,345 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 0 proven. 201 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:58,345 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:52:58,348 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162936429] [2021-12-19 17:52:58,348 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1162936429] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:52:58,348 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1620239861] [2021-12-19 17:52:58,348 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:52:58,348 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:52:58,348 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:52:58,350 INFO L229 MonitoredProcess]: Starting monitored process 61 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:52:58,351 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2021-12-19 17:52:58,498 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:52:58,498 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:52:58,500 INFO L263 TraceCheckSpWp]: Trace formula consists of 285 conjuncts, 60 conjunts are in the unsatisfiable core [2021-12-19 17:52:58,501 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:52:58,508 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2021-12-19 17:52:58,566 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2021-12-19 17:52:58,800 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:52:58,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:52:58,913 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:52:58,923 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:52:58,923 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:52:58,957 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:52:58,957 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:52:59,321 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:52:59,342 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 1 proven. 200 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:52:59,342 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:52:59,730 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2021-12-19 17:52:59,732 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2021-12-19 17:52:59,840 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 1 proven. 199 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:52:59,840 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1620239861] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:52:59,840 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:52:59,840 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24, 24] total 49 [2021-12-19 17:52:59,840 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294752135] [2021-12-19 17:52:59,840 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:52:59,840 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:52:59,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:52:59,841 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 44 times [2021-12-19 17:52:59,841 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:52:59,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283423995] [2021-12-19 17:52:59,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:52:59,841 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:52:59,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:59,844 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:52:59,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:52:59,845 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:52:59,879 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:52:59,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2021-12-19 17:52:59,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=2257, Unknown=0, NotChecked=0, Total=2450 [2021-12-19 17:52:59,880 INFO L87 Difference]: Start difference. First operand 75 states and 95 transitions. cyclomatic complexity: 25 Second operand has 50 states, 49 states have (on average 2.2857142857142856) internal successors, (112), 50 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:00,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:00,606 INFO L93 Difference]: Finished difference Result 91 states and 111 transitions. [2021-12-19 17:53:00,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-12-19 17:53:00,607 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 111 transitions. [2021-12-19 17:53:00,607 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:00,607 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 90 states and 110 transitions. [2021-12-19 17:53:00,607 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:00,607 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:00,607 INFO L73 IsDeterministic]: Start isDeterministic. Operand 90 states and 110 transitions. [2021-12-19 17:53:00,608 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:00,608 INFO L681 BuchiCegarLoop]: Abstraction has 90 states and 110 transitions. [2021-12-19 17:53:00,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states and 110 transitions. [2021-12-19 17:53:00,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 57. [2021-12-19 17:53:00,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 1.2280701754385965) internal successors, (70), 56 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:00,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 70 transitions. [2021-12-19 17:53:00,609 INFO L704 BuchiCegarLoop]: Abstraction has 57 states and 70 transitions. [2021-12-19 17:53:00,609 INFO L587 BuchiCegarLoop]: Abstraction has 57 states and 70 transitions. [2021-12-19 17:53:00,609 INFO L425 BuchiCegarLoop]: ======== Iteration 50============ [2021-12-19 17:53:00,609 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 70 transitions. [2021-12-19 17:53:00,609 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:00,609 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:00,609 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:00,609 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:00,610 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:00,610 INFO L791 eck$LassoCheckResult]: Stem: 18053#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 18054#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 18064#L367 assume !(main_~length~0#1 < 1); 18055#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 18056#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 18057#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18065#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18069#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18066#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18067#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18109#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18108#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18107#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18106#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18105#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18104#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18103#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18102#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18101#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18100#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18099#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18098#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18097#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18096#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18095#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18094#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18093#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18092#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18091#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18090#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18089#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18088#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18087#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18074#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18086#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18073#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 18062#L370-4 main_~j~0#1 := 0; 18063#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18060#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18061#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18068#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18085#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18084#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18083#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18082#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18081#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18080#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18079#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18078#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18077#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18076#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18075#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18071#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18070#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18058#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 18059#L378-2 [2021-12-19 17:53:00,610 INFO L793 eck$LassoCheckResult]: Loop: 18059#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18072#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18059#L378-2 [2021-12-19 17:53:00,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:00,610 INFO L85 PathProgramCache]: Analyzing trace with hash -568989901, now seen corresponding path program 9 times [2021-12-19 17:53:00,610 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:00,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151279154] [2021-12-19 17:53:00,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:00,611 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:00,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:01,009 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:01,009 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:01,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151279154] [2021-12-19 17:53:01,009 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1151279154] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:01,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1910115163] [2021-12-19 17:53:01,009 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:53:01,009 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:01,009 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:01,024 INFO L229 MonitoredProcess]: Starting monitored process 62 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:01,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2021-12-19 17:53:01,200 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-19 17:53:01,201 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:01,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 48 conjunts are in the unsatisfiable core [2021-12-19 17:53:01,204 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:01,299 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:01,398 INFO L354 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2021-12-19 17:53:01,398 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2021-12-19 17:53:01,688 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:53:01,689 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:01,690 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:01,851 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:01,854 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:01,922 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:01,922 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1910115163] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:01,922 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:01,922 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 37 [2021-12-19 17:53:01,922 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960412786] [2021-12-19 17:53:01,922 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:01,923 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:01,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:01,923 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 45 times [2021-12-19 17:53:01,923 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:01,923 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818455953] [2021-12-19 17:53:01,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:01,923 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:01,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:01,927 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:01,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:01,929 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:01,954 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:01,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2021-12-19 17:53:01,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1300, Unknown=0, NotChecked=0, Total=1406 [2021-12-19 17:53:01,955 INFO L87 Difference]: Start difference. First operand 57 states and 70 transitions. cyclomatic complexity: 16 Second operand has 38 states, 37 states have (on average 2.189189189189189) internal successors, (81), 38 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:02,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:02,589 INFO L93 Difference]: Finished difference Result 85 states and 102 transitions. [2021-12-19 17:53:02,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-12-19 17:53:02,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 102 transitions. [2021-12-19 17:53:02,590 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:53:02,590 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 84 states and 101 transitions. [2021-12-19 17:53:02,590 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2021-12-19 17:53:02,590 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-19 17:53:02,590 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 101 transitions. [2021-12-19 17:53:02,591 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:02,591 INFO L681 BuchiCegarLoop]: Abstraction has 84 states and 101 transitions. [2021-12-19 17:53:02,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 101 transitions. [2021-12-19 17:53:02,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 64. [2021-12-19 17:53:02,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.234375) internal successors, (79), 63 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:02,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 79 transitions. [2021-12-19 17:53:02,591 INFO L704 BuchiCegarLoop]: Abstraction has 64 states and 79 transitions. [2021-12-19 17:53:02,592 INFO L587 BuchiCegarLoop]: Abstraction has 64 states and 79 transitions. [2021-12-19 17:53:02,592 INFO L425 BuchiCegarLoop]: ======== Iteration 51============ [2021-12-19 17:53:02,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 79 transitions. [2021-12-19 17:53:02,592 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:02,592 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:02,592 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:02,592 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:02,592 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:02,592 INFO L791 eck$LassoCheckResult]: Stem: 18562#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 18563#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 18573#L367 assume !(main_~length~0#1 < 1); 18564#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 18565#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 18566#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18574#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18606#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18575#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18576#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18579#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18580#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18605#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18604#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18603#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18602#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18601#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18600#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18599#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18598#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18597#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18596#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18595#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18594#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18593#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18592#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18591#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18590#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18589#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18588#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18587#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18586#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18585#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 18584#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 18583#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 18581#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 18571#L370-4 main_~j~0#1 := 0; 18572#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18622#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18578#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18569#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18570#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18621#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18620#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18619#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18618#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18617#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18616#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18615#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18614#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18613#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18612#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18611#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18610#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18609#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18608#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18567#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 18568#L378-2 [2021-12-19 17:53:02,595 INFO L793 eck$LassoCheckResult]: Loop: 18568#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 18607#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 18568#L378-2 [2021-12-19 17:53:02,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:02,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1338448842, now seen corresponding path program 10 times [2021-12-19 17:53:02,596 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:02,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667069367] [2021-12-19 17:53:02,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:02,596 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:02,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:03,048 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 0 proven. 235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:03,048 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:03,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667069367] [2021-12-19 17:53:03,048 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1667069367] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:03,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [297958751] [2021-12-19 17:53:03,048 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:53:03,048 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:03,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:03,061 INFO L229 MonitoredProcess]: Starting monitored process 63 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:03,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2021-12-19 17:53:03,184 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:53:03,185 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:03,187 INFO L263 TraceCheckSpWp]: Trace formula consists of 302 conjuncts, 53 conjunts are in the unsatisfiable core [2021-12-19 17:53:03,188 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:03,490 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-12-19 17:53:03,916 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:53:03,933 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 0 proven. 235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:03,933 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:04,043 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:04,044 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:04,140 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 0 proven. 235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:04,140 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [297958751] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:04,140 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:04,140 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 24] total 50 [2021-12-19 17:53:04,140 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922178514] [2021-12-19 17:53:04,141 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:04,141 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:04,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:04,141 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 46 times [2021-12-19 17:53:04,141 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:04,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963558740] [2021-12-19 17:53:04,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:04,142 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:04,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:04,144 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:04,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:04,146 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:04,185 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:04,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2021-12-19 17:53:04,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=2367, Unknown=0, NotChecked=0, Total=2550 [2021-12-19 17:53:04,186 INFO L87 Difference]: Start difference. First operand 64 states and 79 transitions. cyclomatic complexity: 18 Second operand has 51 states, 50 states have (on average 2.32) internal successors, (116), 51 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:05,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:05,295 INFO L93 Difference]: Finished difference Result 129 states and 158 transitions. [2021-12-19 17:53:05,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-12-19 17:53:05,296 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 158 transitions. [2021-12-19 17:53:05,296 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 22 [2021-12-19 17:53:05,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 128 states and 157 transitions. [2021-12-19 17:53:05,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2021-12-19 17:53:05,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2021-12-19 17:53:05,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 128 states and 157 transitions. [2021-12-19 17:53:05,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:05,297 INFO L681 BuchiCegarLoop]: Abstraction has 128 states and 157 transitions. [2021-12-19 17:53:05,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states and 157 transitions. [2021-12-19 17:53:05,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 108. [2021-12-19 17:53:05,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.25) internal successors, (135), 107 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:05,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 135 transitions. [2021-12-19 17:53:05,299 INFO L704 BuchiCegarLoop]: Abstraction has 108 states and 135 transitions. [2021-12-19 17:53:05,299 INFO L587 BuchiCegarLoop]: Abstraction has 108 states and 135 transitions. [2021-12-19 17:53:05,299 INFO L425 BuchiCegarLoop]: ======== Iteration 52============ [2021-12-19 17:53:05,299 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 135 transitions. [2021-12-19 17:53:05,299 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2021-12-19 17:53:05,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:05,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:05,299 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 10, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:05,299 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:05,299 INFO L791 eck$LassoCheckResult]: Stem: 19153#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 19154#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 19164#L367 assume !(main_~length~0#1 < 1); 19155#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 19156#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 19157#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19165#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19168#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19166#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19167#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19171#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19172#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19198#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19197#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19196#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19195#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19194#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19193#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19192#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19191#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19190#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19189#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19188#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19187#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19186#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19185#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19184#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19183#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19182#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19181#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19180#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19179#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19177#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19178#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19227#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19226#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19224#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19176#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19173#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 19174#L370-4 main_~j~0#1 := 0; 19240#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19239#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19238#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19237#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19236#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19235#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19234#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19233#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19232#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19231#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19230#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19229#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19228#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19201#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19205#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19203#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19204#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19160#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 19161#L378-2 [2021-12-19 17:53:05,300 INFO L793 eck$LassoCheckResult]: Loop: 19161#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19199#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19161#L378-2 [2021-12-19 17:53:05,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:05,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1447112763, now seen corresponding path program 35 times [2021-12-19 17:53:05,300 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:05,300 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450833950] [2021-12-19 17:53:05,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:05,300 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:05,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:05,728 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 0 proven. 248 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:05,728 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:05,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450833950] [2021-12-19 17:53:05,729 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [450833950] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:05,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [436644782] [2021-12-19 17:53:05,729 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:53:05,729 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:05,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:05,730 INFO L229 MonitoredProcess]: Starting monitored process 64 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:05,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2021-12-19 17:53:05,924 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2021-12-19 17:53:05,924 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:05,926 INFO L263 TraceCheckSpWp]: Trace formula consists of 312 conjuncts, 53 conjunts are in the unsatisfiable core [2021-12-19 17:53:05,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:06,017 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:06,094 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:06,094 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:06,141 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:06,141 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:06,153 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:06,153 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:06,509 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:53:06,511 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 2 proven. 246 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:06,511 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:06,837 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:06,838 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:06,892 INFO L134 CoverageAnalysis]: Checked inductivity of 248 backedges. 1 proven. 246 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:53:06,892 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [436644782] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:06,892 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:06,892 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 26, 26] total 40 [2021-12-19 17:53:06,892 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241295631] [2021-12-19 17:53:06,892 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:06,893 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:06,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:06,893 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 47 times [2021-12-19 17:53:06,893 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:06,893 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395062831] [2021-12-19 17:53:06,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:06,893 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:06,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:06,896 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:06,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:06,898 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:06,944 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:06,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-12-19 17:53:06,944 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1518, Unknown=0, NotChecked=0, Total=1640 [2021-12-19 17:53:06,944 INFO L87 Difference]: Start difference. First operand 108 states and 135 transitions. cyclomatic complexity: 32 Second operand has 41 states, 40 states have (on average 2.25) internal successors, (90), 41 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:07,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:07,818 INFO L93 Difference]: Finished difference Result 106 states and 123 transitions. [2021-12-19 17:53:07,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-12-19 17:53:07,818 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 106 states and 123 transitions. [2021-12-19 17:53:07,819 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:07,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 106 states to 104 states and 121 transitions. [2021-12-19 17:53:07,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-19 17:53:07,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-19 17:53:07,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 104 states and 121 transitions. [2021-12-19 17:53:07,819 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:07,819 INFO L681 BuchiCegarLoop]: Abstraction has 104 states and 121 transitions. [2021-12-19 17:53:07,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states and 121 transitions. [2021-12-19 17:53:07,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 67. [2021-12-19 17:53:07,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 67 states have (on average 1.2388059701492538) internal successors, (83), 66 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:07,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 83 transitions. [2021-12-19 17:53:07,820 INFO L704 BuchiCegarLoop]: Abstraction has 67 states and 83 transitions. [2021-12-19 17:53:07,820 INFO L587 BuchiCegarLoop]: Abstraction has 67 states and 83 transitions. [2021-12-19 17:53:07,820 INFO L425 BuchiCegarLoop]: ======== Iteration 53============ [2021-12-19 17:53:07,820 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 83 transitions. [2021-12-19 17:53:07,820 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:07,820 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:07,820 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:07,821 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:07,821 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:07,821 INFO L791 eck$LassoCheckResult]: Stem: 19773#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 19774#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 19784#L367 assume !(main_~length~0#1 < 1); 19775#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 19776#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 19777#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19785#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19826#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19786#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19787#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19790#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19791#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19825#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19824#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19823#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19822#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19821#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19820#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19819#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19818#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19817#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19816#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19815#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19814#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19813#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19812#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19811#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19810#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19809#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19808#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19807#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19806#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19805#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 19803#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 19801#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 19798#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 19782#L370-4 main_~j~0#1 := 0; 19783#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19835#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19789#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19780#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19781#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19834#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19833#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19832#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19831#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19830#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19829#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19828#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19827#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19804#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19802#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19800#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19797#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19796#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19795#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19793#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19792#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19778#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 19779#L378-2 [2021-12-19 17:53:07,821 INFO L793 eck$LassoCheckResult]: Loop: 19779#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 19794#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 19779#L378-2 [2021-12-19 17:53:07,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:07,821 INFO L85 PathProgramCache]: Analyzing trace with hash -2054116231, now seen corresponding path program 11 times [2021-12-19 17:53:07,822 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:07,822 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553255296] [2021-12-19 17:53:07,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:07,822 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:07,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:08,033 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 91 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:08,034 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:08,034 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553255296] [2021-12-19 17:53:08,034 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1553255296] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:08,034 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [199408629] [2021-12-19 17:53:08,034 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:53:08,034 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:08,034 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:08,035 INFO L229 MonitoredProcess]: Starting monitored process 65 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:08,036 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2021-12-19 17:53:08,235 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2021-12-19 17:53:08,235 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:08,237 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 24 conjunts are in the unsatisfiable core [2021-12-19 17:53:08,238 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:08,460 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 110 proven. 145 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:08,460 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:08,538 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 100 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:08,538 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [199408629] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:08,538 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:08,538 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 38 [2021-12-19 17:53:08,538 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255169803] [2021-12-19 17:53:08,538 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:08,539 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:08,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:08,539 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 48 times [2021-12-19 17:53:08,539 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:08,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256465636] [2021-12-19 17:53:08,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:08,539 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:08,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:08,542 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:08,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:08,549 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:08,589 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:08,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2021-12-19 17:53:08,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=329, Invalid=1077, Unknown=0, NotChecked=0, Total=1406 [2021-12-19 17:53:08,590 INFO L87 Difference]: Start difference. First operand 67 states and 83 transitions. cyclomatic complexity: 20 Second operand has 38 states, 38 states have (on average 2.289473684210526) internal successors, (87), 38 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:08,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:08,794 INFO L93 Difference]: Finished difference Result 94 states and 111 transitions. [2021-12-19 17:53:08,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-12-19 17:53:08,794 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 111 transitions. [2021-12-19 17:53:08,795 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:08,795 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 72 states and 89 transitions. [2021-12-19 17:53:08,795 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:08,795 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:08,795 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72 states and 89 transitions. [2021-12-19 17:53:08,801 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:08,801 INFO L681 BuchiCegarLoop]: Abstraction has 72 states and 89 transitions. [2021-12-19 17:53:08,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states and 89 transitions. [2021-12-19 17:53:08,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 69. [2021-12-19 17:53:08,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 68 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:08,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 85 transitions. [2021-12-19 17:53:08,807 INFO L704 BuchiCegarLoop]: Abstraction has 69 states and 85 transitions. [2021-12-19 17:53:08,807 INFO L587 BuchiCegarLoop]: Abstraction has 69 states and 85 transitions. [2021-12-19 17:53:08,807 INFO L425 BuchiCegarLoop]: ======== Iteration 54============ [2021-12-19 17:53:08,807 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 85 transitions. [2021-12-19 17:53:08,808 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:08,808 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:08,808 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:08,808 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:08,808 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:08,808 INFO L791 eck$LassoCheckResult]: Stem: 20347#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 20348#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 20358#L367 assume !(main_~length~0#1 < 1); 20349#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 20350#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 20351#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20359#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20415#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20360#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20361#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20362#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20364#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20414#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20413#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20412#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20411#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20410#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20409#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20408#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20407#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20406#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20405#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20404#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20403#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20402#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20401#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20400#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20399#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20398#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20397#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20396#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20395#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20394#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20393#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 20392#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20391#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20389#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 20385#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 20365#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 20352#L370-4 main_~j~0#1 := 0; 20353#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20363#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20384#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20383#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20382#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20381#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20380#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20379#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20378#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20377#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20376#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20375#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20374#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20373#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20372#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20371#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20370#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20368#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20367#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20354#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 20355#L378-2 [2021-12-19 17:53:08,809 INFO L793 eck$LassoCheckResult]: Loop: 20355#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 20369#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 20355#L378-2 [2021-12-19 17:53:08,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:08,809 INFO L85 PathProgramCache]: Analyzing trace with hash -894039234, now seen corresponding path program 36 times [2021-12-19 17:53:08,809 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:08,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103778659] [2021-12-19 17:53:08,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:08,809 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:08,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:09,311 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 0 proven. 266 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:09,311 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:09,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103778659] [2021-12-19 17:53:09,311 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2103778659] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:09,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [821170843] [2021-12-19 17:53:09,312 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:53:09,312 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:09,312 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:09,313 INFO L229 MonitoredProcess]: Starting monitored process 66 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:09,314 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2021-12-19 17:53:09,553 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2021-12-19 17:53:09,554 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:09,556 INFO L263 TraceCheckSpWp]: Trace formula consists of 324 conjuncts, 40 conjunts are in the unsatisfiable core [2021-12-19 17:53:09,557 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:09,838 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:09,954 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:53:09,954 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 29 [2021-12-19 17:53:09,967 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:53:09,967 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 29 [2021-12-19 17:53:10,883 INFO L354 Elim1Store]: treesize reduction 24, result has 52.9 percent of original size [2021-12-19 17:53:10,884 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 38 [2021-12-19 17:53:10,935 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 81 proven. 185 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:10,935 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:21,073 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 53 [2021-12-19 17:53:21,081 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 59 [2021-12-19 17:53:21,130 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 74 proven. 190 refuted. 2 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:21,130 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [821170843] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:21,130 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:21,130 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 28, 28] total 68 [2021-12-19 17:53:21,130 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016014230] [2021-12-19 17:53:21,130 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:21,130 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:21,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:21,131 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 49 times [2021-12-19 17:53:21,131 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:21,131 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519739596] [2021-12-19 17:53:21,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:21,131 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:21,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:21,133 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:21,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:21,135 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:21,174 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:21,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2021-12-19 17:53:21,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=4156, Unknown=10, NotChecked=0, Total=4692 [2021-12-19 17:53:21,175 INFO L87 Difference]: Start difference. First operand 69 states and 85 transitions. cyclomatic complexity: 20 Second operand has 69 states, 68 states have (on average 2.088235294117647) internal successors, (142), 69 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:24,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:24,547 INFO L93 Difference]: Finished difference Result 185 states and 209 transitions. [2021-12-19 17:53:24,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2021-12-19 17:53:24,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 185 states and 209 transitions. [2021-12-19 17:53:24,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:24,549 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 185 states to 121 states and 141 transitions. [2021-12-19 17:53:24,549 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-19 17:53:24,549 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-19 17:53:24,549 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 141 transitions. [2021-12-19 17:53:24,549 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:24,549 INFO L681 BuchiCegarLoop]: Abstraction has 121 states and 141 transitions. [2021-12-19 17:53:24,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 141 transitions. [2021-12-19 17:53:24,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 73. [2021-12-19 17:53:24,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.2465753424657535) internal successors, (91), 72 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:24,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 91 transitions. [2021-12-19 17:53:24,550 INFO L704 BuchiCegarLoop]: Abstraction has 73 states and 91 transitions. [2021-12-19 17:53:24,550 INFO L587 BuchiCegarLoop]: Abstraction has 73 states and 91 transitions. [2021-12-19 17:53:24,550 INFO L425 BuchiCegarLoop]: ======== Iteration 55============ [2021-12-19 17:53:24,550 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 91 transitions. [2021-12-19 17:53:24,551 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:24,551 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:24,551 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:24,551 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:24,551 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:24,552 INFO L791 eck$LassoCheckResult]: Stem: 21166#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 21167#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 21177#L367 assume !(main_~length~0#1 < 1); 21168#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 21169#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 21170#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21178#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21183#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21179#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21180#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21181#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21238#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21237#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21236#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21235#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21234#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21233#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21232#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21231#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21230#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21229#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21228#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21227#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21226#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21225#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21224#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21223#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21222#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21221#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21220#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21219#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21218#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21217#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21216#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21215#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21214#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21213#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21209#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21207#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 21171#L370-4 main_~j~0#1 := 0; 21172#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21175#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21176#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21182#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21201#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21200#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21199#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21198#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21197#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21196#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21195#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21194#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21193#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21192#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21191#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21190#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21189#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21188#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21187#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21185#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21184#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21173#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 21174#L378-2 [2021-12-19 17:53:24,552 INFO L793 eck$LassoCheckResult]: Loop: 21174#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21186#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21174#L378-2 [2021-12-19 17:53:24,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:24,553 INFO L85 PathProgramCache]: Analyzing trace with hash -116205633, now seen corresponding path program 12 times [2021-12-19 17:53:24,553 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:24,553 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84891576] [2021-12-19 17:53:24,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:24,553 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:24,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:25,049 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 286 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:25,049 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:25,049 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84891576] [2021-12-19 17:53:25,049 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84891576] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:25,049 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1234361432] [2021-12-19 17:53:25,049 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:53:25,049 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:25,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:25,051 INFO L229 MonitoredProcess]: Starting monitored process 67 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:25,052 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2021-12-19 17:53:25,303 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2021-12-19 17:53:25,303 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:25,306 INFO L263 TraceCheckSpWp]: Trace formula consists of 329 conjuncts, 34 conjunts are in the unsatisfiable core [2021-12-19 17:53:25,307 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:25,656 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:26,926 INFO L354 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2021-12-19 17:53:26,926 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2021-12-19 17:53:26,952 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 100 proven. 186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:26,952 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:28,100 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 37 [2021-12-19 17:53:28,102 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2021-12-19 17:53:28,160 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 90 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:28,160 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1234361432] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:28,160 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:28,160 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 28, 28] total 68 [2021-12-19 17:53:28,160 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999126556] [2021-12-19 17:53:28,160 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:28,161 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:28,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:28,161 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 50 times [2021-12-19 17:53:28,161 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:28,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929974965] [2021-12-19 17:53:28,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:28,161 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:28,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:28,163 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:28,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:28,165 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:28,202 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:28,202 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2021-12-19 17:53:28,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=529, Invalid=4163, Unknown=0, NotChecked=0, Total=4692 [2021-12-19 17:53:28,203 INFO L87 Difference]: Start difference. First operand 73 states and 91 transitions. cyclomatic complexity: 23 Second operand has 69 states, 68 states have (on average 2.1323529411764706) internal successors, (145), 69 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:29,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:29,981 INFO L93 Difference]: Finished difference Result 127 states and 154 transitions. [2021-12-19 17:53:29,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2021-12-19 17:53:29,982 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 154 transitions. [2021-12-19 17:53:29,982 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:29,983 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 102 states and 127 transitions. [2021-12-19 17:53:29,983 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:29,983 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:29,983 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 127 transitions. [2021-12-19 17:53:29,983 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:29,983 INFO L681 BuchiCegarLoop]: Abstraction has 102 states and 127 transitions. [2021-12-19 17:53:29,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 127 transitions. [2021-12-19 17:53:29,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 96. [2021-12-19 17:53:29,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 96 states have (on average 1.2604166666666667) internal successors, (121), 95 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:29,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 121 transitions. [2021-12-19 17:53:29,984 INFO L704 BuchiCegarLoop]: Abstraction has 96 states and 121 transitions. [2021-12-19 17:53:29,985 INFO L587 BuchiCegarLoop]: Abstraction has 96 states and 121 transitions. [2021-12-19 17:53:29,985 INFO L425 BuchiCegarLoop]: ======== Iteration 56============ [2021-12-19 17:53:29,985 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 96 states and 121 transitions. [2021-12-19 17:53:29,985 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:29,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:29,985 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:29,987 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:29,987 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:29,990 INFO L791 eck$LassoCheckResult]: Stem: 21907#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 21908#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 21918#L367 assume !(main_~length~0#1 < 1); 21909#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 21910#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 21911#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21919#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21992#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21991#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21990#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21989#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21988#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21987#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21986#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21985#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21983#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21984#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22002#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21922#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21923#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21920#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21921#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22001#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22000#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21999#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21974#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21998#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21997#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21970#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21996#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21995#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21966#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21994#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21993#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21959#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21957#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 21951#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 21950#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 21948#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 21947#L370-4 main_~j~0#1 := 0; 21946#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21916#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21917#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21924#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21944#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21943#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21942#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21941#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21940#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21939#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21938#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21937#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21936#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21935#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21934#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21933#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21932#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21931#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21930#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21929#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21928#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21914#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 21915#L378-2 [2021-12-19 17:53:29,990 INFO L793 eck$LassoCheckResult]: Loop: 21915#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 21927#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 21915#L378-2 [2021-12-19 17:53:29,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:29,990 INFO L85 PathProgramCache]: Analyzing trace with hash 236882749, now seen corresponding path program 37 times [2021-12-19 17:53:29,990 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:29,991 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927252743] [2021-12-19 17:53:29,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:29,991 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:30,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:30,553 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 286 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:30,554 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:30,554 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927252743] [2021-12-19 17:53:30,554 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [927252743] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:30,554 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1617872672] [2021-12-19 17:53:30,554 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:53:30,554 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:30,554 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:30,556 INFO L229 MonitoredProcess]: Starting monitored process 68 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:30,557 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2021-12-19 17:53:30,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:30,688 INFO L263 TraceCheckSpWp]: Trace formula consists of 336 conjuncts, 57 conjunts are in the unsatisfiable core [2021-12-19 17:53:30,689 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:31,042 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-12-19 17:53:31,567 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:53:31,589 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 286 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:31,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:31,718 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:31,719 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:31,805 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 286 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:31,806 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1617872672] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:31,806 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:31,806 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 26] total 54 [2021-12-19 17:53:31,806 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504920364] [2021-12-19 17:53:31,806 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:31,806 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:31,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:31,807 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 51 times [2021-12-19 17:53:31,807 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:31,807 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891332633] [2021-12-19 17:53:31,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:31,807 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:31,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:31,810 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:31,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:31,812 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:31,839 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:31,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2021-12-19 17:53:31,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=2772, Unknown=0, NotChecked=0, Total=2970 [2021-12-19 17:53:31,840 INFO L87 Difference]: Start difference. First operand 96 states and 121 transitions. cyclomatic complexity: 30 Second operand has 55 states, 54 states have (on average 2.3333333333333335) internal successors, (126), 55 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:33,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:33,174 INFO L93 Difference]: Finished difference Result 171 states and 212 transitions. [2021-12-19 17:53:33,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-12-19 17:53:33,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 171 states and 212 transitions. [2021-12-19 17:53:33,175 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 24 [2021-12-19 17:53:33,176 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 171 states to 170 states and 211 transitions. [2021-12-19 17:53:33,176 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2021-12-19 17:53:33,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2021-12-19 17:53:33,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 170 states and 211 transitions. [2021-12-19 17:53:33,176 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:33,176 INFO L681 BuchiCegarLoop]: Abstraction has 170 states and 211 transitions. [2021-12-19 17:53:33,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states and 211 transitions. [2021-12-19 17:53:33,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 147. [2021-12-19 17:53:33,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 147 states have (on average 1.2653061224489797) internal successors, (186), 146 states have internal predecessors, (186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:33,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 186 transitions. [2021-12-19 17:53:33,177 INFO L704 BuchiCegarLoop]: Abstraction has 147 states and 186 transitions. [2021-12-19 17:53:33,177 INFO L587 BuchiCegarLoop]: Abstraction has 147 states and 186 transitions. [2021-12-19 17:53:33,177 INFO L425 BuchiCegarLoop]: ======== Iteration 57============ [2021-12-19 17:53:33,177 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 186 transitions. [2021-12-19 17:53:33,178 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 22 [2021-12-19 17:53:33,178 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:33,178 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:33,178 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 10, 10, 9, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:33,178 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-12-19 17:53:33,178 INFO L791 eck$LassoCheckResult]: Stem: 22606#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 22607#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 22617#L367 assume !(main_~length~0#1 < 1); 22608#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 22609#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 22610#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22618#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22669#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22668#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22667#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22666#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22665#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22664#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22663#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22662#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22661#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22624#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22625#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22622#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22623#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22619#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22620#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22679#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22678#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22677#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22652#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22676#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22675#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22648#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22674#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22673#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22644#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22672#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22671#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22640#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22733#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22732#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22636#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22731#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 22730#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 22729#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 22727#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 22726#L370-4 main_~j~0#1 := 0; 22725#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22724#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22723#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22722#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22721#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22720#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22718#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22717#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22714#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22713#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22710#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22709#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22706#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22705#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22702#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22701#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22698#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22697#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22693#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22692#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 22686#L378-2 [2021-12-19 17:53:33,185 INFO L793 eck$LassoCheckResult]: Loop: 22686#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22688#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 22689#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 22690#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 22686#L378-2 [2021-12-19 17:53:33,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:33,186 INFO L85 PathProgramCache]: Analyzing trace with hash -649789130, now seen corresponding path program 38 times [2021-12-19 17:53:33,186 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:33,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204314698] [2021-12-19 17:53:33,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:33,186 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:33,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:33,770 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:33,770 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:33,771 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204314698] [2021-12-19 17:53:33,771 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204314698] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:33,771 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1219758475] [2021-12-19 17:53:33,771 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:53:33,771 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:33,771 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:33,772 INFO L229 MonitoredProcess]: Starting monitored process 69 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:33,773 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2021-12-19 17:53:33,920 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:53:33,920 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:33,922 INFO L263 TraceCheckSpWp]: Trace formula consists of 346 conjuncts, 57 conjunts are in the unsatisfiable core [2021-12-19 17:53:33,924 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:34,023 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:34,083 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:34,083 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:34,096 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:34,097 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:34,137 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-12-19 17:53:34,138 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 28 [2021-12-19 17:53:34,470 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:53:34,472 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 1 proven. 299 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:34,472 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:34,762 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:34,764 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:34,865 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 1 proven. 298 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-12-19 17:53:34,866 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1219758475] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:34,866 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:34,866 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 40 [2021-12-19 17:53:34,866 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018993664] [2021-12-19 17:53:34,866 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:34,866 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:34,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:34,867 INFO L85 PathProgramCache]: Analyzing trace with hash 2221257, now seen corresponding path program 4 times [2021-12-19 17:53:34,867 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:34,867 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759599183] [2021-12-19 17:53:34,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:34,867 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:34,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:34,871 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:34,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:34,874 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:34,948 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:34,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-12-19 17:53:34,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1523, Unknown=0, NotChecked=0, Total=1640 [2021-12-19 17:53:34,949 INFO L87 Difference]: Start difference. First operand 147 states and 186 transitions. cyclomatic complexity: 46 Second operand has 41 states, 40 states have (on average 2.275) internal successors, (91), 41 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:36,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:36,402 INFO L93 Difference]: Finished difference Result 146 states and 174 transitions. [2021-12-19 17:53:36,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-12-19 17:53:36,402 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 174 transitions. [2021-12-19 17:53:36,403 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:36,403 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 144 states and 172 transitions. [2021-12-19 17:53:36,404 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-19 17:53:36,404 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-19 17:53:36,404 INFO L73 IsDeterministic]: Start isDeterministic. Operand 144 states and 172 transitions. [2021-12-19 17:53:36,404 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:36,404 INFO L681 BuchiCegarLoop]: Abstraction has 144 states and 172 transitions. [2021-12-19 17:53:36,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states and 172 transitions. [2021-12-19 17:53:36,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 101. [2021-12-19 17:53:36,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.2574257425742574) internal successors, (127), 100 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:36,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 127 transitions. [2021-12-19 17:53:36,405 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 127 transitions. [2021-12-19 17:53:36,405 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 127 transitions. [2021-12-19 17:53:36,405 INFO L425 BuchiCegarLoop]: ======== Iteration 58============ [2021-12-19 17:53:36,405 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 127 transitions. [2021-12-19 17:53:36,405 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:36,406 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:36,406 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:36,406 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:36,406 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:36,406 INFO L791 eck$LassoCheckResult]: Stem: 23337#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 23338#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 23348#L367 assume !(main_~length~0#1 < 1); 23339#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 23340#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 23341#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23349#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23425#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23424#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23423#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23422#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23421#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23420#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23419#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23418#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23416#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23417#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23437#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23354#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23355#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23356#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23436#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23435#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23434#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23433#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23407#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23432#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23431#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23403#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23430#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23429#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23399#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23428#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23427#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23395#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23426#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 23380#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 23365#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 23363#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 23346#L370-4 main_~j~0#1 := 0; 23347#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23344#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23345#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23353#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23378#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23377#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23376#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23375#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23374#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23373#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23372#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23371#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23370#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23369#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23368#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23367#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23366#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23364#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23362#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23361#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23360#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23358#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23357#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23342#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 23343#L378-2 [2021-12-19 17:53:36,406 INFO L793 eck$LassoCheckResult]: Loop: 23343#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 23359#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 23343#L378-2 [2021-12-19 17:53:36,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:36,407 INFO L85 PathProgramCache]: Analyzing trace with hash 11054528, now seen corresponding path program 39 times [2021-12-19 17:53:36,407 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:36,407 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728200936] [2021-12-19 17:53:36,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:36,407 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:36,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:36,726 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 111 proven. 197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:36,726 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:36,727 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728200936] [2021-12-19 17:53:36,727 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728200936] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:36,727 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844320340] [2021-12-19 17:53:36,727 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-19 17:53:36,727 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:36,727 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:36,729 INFO L229 MonitoredProcess]: Starting monitored process 70 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:36,730 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2021-12-19 17:53:36,971 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2021-12-19 17:53:36,971 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:36,974 INFO L263 TraceCheckSpWp]: Trace formula consists of 348 conjuncts, 26 conjunts are in the unsatisfiable core [2021-12-19 17:53:36,974 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:37,265 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 132 proven. 176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:37,265 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:37,343 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 132 proven. 176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:37,344 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1844320340] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:37,344 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:37,344 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 41 [2021-12-19 17:53:37,344 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202586965] [2021-12-19 17:53:37,344 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:37,344 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:37,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:37,345 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 52 times [2021-12-19 17:53:37,345 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:37,345 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363297325] [2021-12-19 17:53:37,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:37,345 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:37,348 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:37,351 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:37,395 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:37,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-12-19 17:53:37,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=1258, Unknown=0, NotChecked=0, Total=1640 [2021-12-19 17:53:37,396 INFO L87 Difference]: Start difference. First operand 101 states and 127 transitions. cyclomatic complexity: 31 Second operand has 41 states, 41 states have (on average 2.317073170731707) internal successors, (95), 41 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:37,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:37,715 INFO L93 Difference]: Finished difference Result 131 states and 158 transitions. [2021-12-19 17:53:37,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-12-19 17:53:37,716 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 158 transitions. [2021-12-19 17:53:37,716 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:37,716 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 107 states and 134 transitions. [2021-12-19 17:53:37,716 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:37,716 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:37,716 INFO L73 IsDeterministic]: Start isDeterministic. Operand 107 states and 134 transitions. [2021-12-19 17:53:37,717 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:37,717 INFO L681 BuchiCegarLoop]: Abstraction has 107 states and 134 transitions. [2021-12-19 17:53:37,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states and 134 transitions. [2021-12-19 17:53:37,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 80. [2021-12-19 17:53:37,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 80 states have (on average 1.2375) internal successors, (99), 79 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:37,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 99 transitions. [2021-12-19 17:53:37,718 INFO L704 BuchiCegarLoop]: Abstraction has 80 states and 99 transitions. [2021-12-19 17:53:37,718 INFO L587 BuchiCegarLoop]: Abstraction has 80 states and 99 transitions. [2021-12-19 17:53:37,718 INFO L425 BuchiCegarLoop]: ======== Iteration 59============ [2021-12-19 17:53:37,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 80 states and 99 transitions. [2021-12-19 17:53:37,718 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:37,718 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:37,718 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:37,718 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:37,718 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:37,718 INFO L791 eck$LassoCheckResult]: Stem: 24017#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 24018#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 24028#L367 assume !(main_~length~0#1 < 1); 24019#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 24020#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 24021#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24029#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24032#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24030#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24031#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24096#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24095#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24094#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24093#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24092#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24091#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24090#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24089#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24088#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24087#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24086#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24085#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24084#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24083#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24082#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24081#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24080#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24079#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24078#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24077#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24076#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24075#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24074#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24073#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24072#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24071#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24069#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24070#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24065#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24060#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24056#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24034#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 24022#L370-4 main_~j~0#1 := 0; 24023#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24033#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24055#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24054#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24053#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24052#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24051#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24050#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24049#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24048#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24047#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24046#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24045#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24044#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24043#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24042#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24041#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24040#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24039#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24037#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24036#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24024#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 24025#L378-2 [2021-12-19 17:53:37,719 INFO L793 eck$LassoCheckResult]: Loop: 24025#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24038#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24025#L378-2 [2021-12-19 17:53:37,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:37,719 INFO L85 PathProgramCache]: Analyzing trace with hash -834013061, now seen corresponding path program 40 times [2021-12-19 17:53:37,719 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:37,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95013558] [2021-12-19 17:53:37,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:37,719 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:37,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:38,299 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 0 proven. 320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:38,300 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:38,300 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95013558] [2021-12-19 17:53:38,300 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [95013558] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:38,300 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [862573249] [2021-12-19 17:53:38,300 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-19 17:53:38,300 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:38,300 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:38,309 INFO L229 MonitoredProcess]: Starting monitored process 71 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:38,310 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Waiting until timeout for monitored process [2021-12-19 17:53:38,478 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-19 17:53:38,478 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:38,481 INFO L263 TraceCheckSpWp]: Trace formula consists of 351 conjuncts, 62 conjunts are in the unsatisfiable core [2021-12-19 17:53:38,482 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:38,949 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:39,056 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:53:39,057 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:53:39,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-12-19 17:53:39,064 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-12-19 17:53:39,620 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2021-12-19 17:53:39,644 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 0 proven. 320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:39,644 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:39,914 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:39,920 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:40,062 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 0 proven. 320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:40,062 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [862573249] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:40,062 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:40,062 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 29, 28] total 58 [2021-12-19 17:53:40,062 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907112182] [2021-12-19 17:53:40,063 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:40,063 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:40,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:40,063 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 53 times [2021-12-19 17:53:40,063 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:40,063 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89026735] [2021-12-19 17:53:40,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:40,063 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:40,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:40,066 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:40,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:40,068 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:40,103 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:40,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2021-12-19 17:53:40,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=3209, Unknown=0, NotChecked=0, Total=3422 [2021-12-19 17:53:40,104 INFO L87 Difference]: Start difference. First operand 80 states and 99 transitions. cyclomatic complexity: 24 Second operand has 59 states, 58 states have (on average 2.2758620689655173) internal successors, (132), 59 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:41,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:41,437 INFO L93 Difference]: Finished difference Result 102 states and 121 transitions. [2021-12-19 17:53:41,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-12-19 17:53:41,438 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 102 states and 121 transitions. [2021-12-19 17:53:41,438 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:41,439 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 102 states to 101 states and 120 transitions. [2021-12-19 17:53:41,439 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:41,439 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:41,439 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 120 transitions. [2021-12-19 17:53:41,439 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:41,439 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 120 transitions. [2021-12-19 17:53:41,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 120 transitions. [2021-12-19 17:53:41,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 72. [2021-12-19 17:53:41,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 72 states have (on average 1.2222222222222223) internal successors, (88), 71 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:41,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 88 transitions. [2021-12-19 17:53:41,440 INFO L704 BuchiCegarLoop]: Abstraction has 72 states and 88 transitions. [2021-12-19 17:53:41,440 INFO L587 BuchiCegarLoop]: Abstraction has 72 states and 88 transitions. [2021-12-19 17:53:41,440 INFO L425 BuchiCegarLoop]: ======== Iteration 60============ [2021-12-19 17:53:41,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72 states and 88 transitions. [2021-12-19 17:53:41,440 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:41,440 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:41,440 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:41,440 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:41,440 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:41,440 INFO L791 eck$LassoCheckResult]: Stem: 24669#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 24670#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 24680#L367 assume !(main_~length~0#1 < 1); 24671#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 24672#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 24673#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24681#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24684#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24727#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24726#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24725#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24724#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24723#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24722#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24721#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24720#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24719#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24718#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24717#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24716#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24715#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24714#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24713#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24712#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24711#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24710#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24709#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24708#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24707#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24706#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24705#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24704#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24703#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24702#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24701#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24700#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24699#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24687#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24682#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 24683#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 24694#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 24688#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 24674#L370-4 main_~j~0#1 := 0; 24675#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24685#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24686#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24678#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24679#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24740#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24739#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24738#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24737#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24736#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24735#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24734#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24733#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24732#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24731#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24730#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24729#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24728#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24696#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24695#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24693#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24691#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24690#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24676#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 24677#L378-2 [2021-12-19 17:53:41,441 INFO L793 eck$LassoCheckResult]: Loop: 24677#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 24692#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 24677#L378-2 [2021-12-19 17:53:41,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:41,441 INFO L85 PathProgramCache]: Analyzing trace with hash 461259194, now seen corresponding path program 41 times [2021-12-19 17:53:41,441 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:41,441 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763005681] [2021-12-19 17:53:41,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:41,441 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:41,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:41,994 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:41,994 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:41,994 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763005681] [2021-12-19 17:53:41,994 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763005681] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:41,994 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2022950241] [2021-12-19 17:53:41,994 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-19 17:53:41,994 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:41,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:41,996 INFO L229 MonitoredProcess]: Starting monitored process 72 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:41,997 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2021-12-19 17:53:42,321 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2021-12-19 17:53:42,321 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:42,325 INFO L263 TraceCheckSpWp]: Trace formula consists of 363 conjuncts, 57 conjunts are in the unsatisfiable core [2021-12-19 17:53:42,326 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:42,447 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:43,096 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 11 [2021-12-19 17:53:43,099 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:43,099 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:43,351 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2021-12-19 17:53:43,353 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2021-12-19 17:53:43,475 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:43,476 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2022950241] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:43,476 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:43,476 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29] total 45 [2021-12-19 17:53:43,476 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228028973] [2021-12-19 17:53:43,476 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:43,476 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:43,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:43,476 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 54 times [2021-12-19 17:53:43,476 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:43,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889298836] [2021-12-19 17:53:43,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:43,476 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:43,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:43,479 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:43,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:43,481 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:43,534 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:43,534 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2021-12-19 17:53:43,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=1933, Unknown=0, NotChecked=0, Total=2070 [2021-12-19 17:53:43,534 INFO L87 Difference]: Start difference. First operand 72 states and 88 transitions. cyclomatic complexity: 20 Second operand has 46 states, 45 states have (on average 2.2) internal successors, (99), 46 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:44,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:44,677 INFO L93 Difference]: Finished difference Result 111 states and 133 transitions. [2021-12-19 17:53:44,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2021-12-19 17:53:44,677 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 133 transitions. [2021-12-19 17:53:44,678 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:53:44,678 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 110 states and 132 transitions. [2021-12-19 17:53:44,678 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2021-12-19 17:53:44,678 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2021-12-19 17:53:44,678 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 132 transitions. [2021-12-19 17:53:44,678 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:44,678 INFO L681 BuchiCegarLoop]: Abstraction has 110 states and 132 transitions. [2021-12-19 17:53:44,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 132 transitions. [2021-12-19 17:53:44,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 82. [2021-12-19 17:53:44,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.2317073170731707) internal successors, (101), 81 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:44,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 101 transitions. [2021-12-19 17:53:44,679 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 101 transitions. [2021-12-19 17:53:44,679 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 101 transitions. [2021-12-19 17:53:44,679 INFO L425 BuchiCegarLoop]: ======== Iteration 61============ [2021-12-19 17:53:44,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 101 transitions. [2021-12-19 17:53:44,680 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:44,680 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:44,680 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:44,680 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:44,680 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:44,680 INFO L791 eck$LassoCheckResult]: Stem: 25301#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 25302#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 25312#L367 assume !(main_~length~0#1 < 1); 25303#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 25304#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 25305#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25313#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25316#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25356#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25355#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25354#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25353#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25352#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25351#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25350#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25349#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25348#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25347#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25346#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25345#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25344#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25343#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25342#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25341#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25340#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25339#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25338#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25337#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25336#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25335#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25334#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25333#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25332#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25331#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25330#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25329#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25327#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25326#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25325#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25321#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25323#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25380#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 25379#L370-4 main_~j~0#1 := 0; 25317#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25310#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25311#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25377#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25376#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25375#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25374#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25373#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25372#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25371#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25370#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25369#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25368#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25367#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25366#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25365#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25364#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25363#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25362#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25361#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25360#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25359#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25358#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25308#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 25309#L378-2 [2021-12-19 17:53:44,684 INFO L793 eck$LassoCheckResult]: Loop: 25309#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25357#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25309#L378-2 [2021-12-19 17:53:44,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:44,684 INFO L85 PathProgramCache]: Analyzing trace with hash 1672332158, now seen corresponding path program 42 times [2021-12-19 17:53:44,684 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:44,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585222127] [2021-12-19 17:53:44,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:44,684 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:44,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:45,111 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:45,112 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:45,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585222127] [2021-12-19 17:53:45,112 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [585222127] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:45,112 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [102258330] [2021-12-19 17:53:45,112 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-19 17:53:45,112 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:45,112 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:45,128 INFO L229 MonitoredProcess]: Starting monitored process 73 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:45,165 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Waiting until timeout for monitored process [2021-12-19 17:53:45,509 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2021-12-19 17:53:45,510 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:45,513 INFO L263 TraceCheckSpWp]: Trace formula consists of 363 conjuncts, 55 conjunts are in the unsatisfiable core [2021-12-19 17:53:45,515 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:45,585 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:45,866 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2021-12-19 17:53:45,868 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:45,868 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:46,268 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2021-12-19 17:53:46,269 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2021-12-19 17:53:46,343 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:46,344 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [102258330] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:46,344 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:46,344 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27, 27] total 53 [2021-12-19 17:53:46,344 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452661439] [2021-12-19 17:53:46,344 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:46,344 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:46,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:46,345 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 55 times [2021-12-19 17:53:46,345 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:46,345 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205180] [2021-12-19 17:53:46,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:46,345 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:46,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:46,359 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:46,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:46,364 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:46,388 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:46,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2021-12-19 17:53:46,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=2694, Unknown=0, NotChecked=0, Total=2862 [2021-12-19 17:53:46,390 INFO L87 Difference]: Start difference. First operand 82 states and 101 transitions. cyclomatic complexity: 24 Second operand has 54 states, 53 states have (on average 2.2452830188679247) internal successors, (119), 54 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:47,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:47,346 INFO L93 Difference]: Finished difference Result 119 states and 142 transitions. [2021-12-19 17:53:47,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-12-19 17:53:47,347 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 142 transitions. [2021-12-19 17:53:47,363 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-12-19 17:53:47,364 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 118 states and 141 transitions. [2021-12-19 17:53:47,364 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2021-12-19 17:53:47,364 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2021-12-19 17:53:47,364 INFO L73 IsDeterministic]: Start isDeterministic. Operand 118 states and 141 transitions. [2021-12-19 17:53:47,365 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:47,365 INFO L681 BuchiCegarLoop]: Abstraction has 118 states and 141 transitions. [2021-12-19 17:53:47,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states and 141 transitions. [2021-12-19 17:53:47,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 85. [2021-12-19 17:53:47,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 85 states have (on average 1.2470588235294118) internal successors, (106), 84 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:47,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 106 transitions. [2021-12-19 17:53:47,366 INFO L704 BuchiCegarLoop]: Abstraction has 85 states and 106 transitions. [2021-12-19 17:53:47,366 INFO L587 BuchiCegarLoop]: Abstraction has 85 states and 106 transitions. [2021-12-19 17:53:47,366 INFO L425 BuchiCegarLoop]: ======== Iteration 62============ [2021-12-19 17:53:47,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 106 transitions. [2021-12-19 17:53:47,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:47,367 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:47,367 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:47,367 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 12, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:47,367 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:47,367 INFO L791 eck$LassoCheckResult]: Stem: 25957#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 25958#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 25968#L367 assume !(main_~length~0#1 < 1); 25959#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 25960#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 25961#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25969#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26041#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26040#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26039#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26038#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26037#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26036#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26035#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26034#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26033#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26032#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26031#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26030#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26029#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26028#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26027#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26026#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26025#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26024#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26023#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26022#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26021#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26020#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26019#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26018#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26017#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26016#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26015#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26014#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26013#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26012#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25975#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25970#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 25971#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 25973#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 25976#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 25962#L370-4 main_~j~0#1 := 0; 25963#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25966#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25967#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25974#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25999#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25998#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25997#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25996#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25995#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25994#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25993#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25992#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25991#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25990#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25989#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25988#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25987#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25986#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25985#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25984#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25983#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25982#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25981#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25980#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25979#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25964#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 25965#L378-2 [2021-12-19 17:53:47,367 INFO L793 eck$LassoCheckResult]: Loop: 25965#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 25978#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 25965#L378-2 [2021-12-19 17:53:47,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:47,368 INFO L85 PathProgramCache]: Analyzing trace with hash 888453373, now seen corresponding path program 43 times [2021-12-19 17:53:47,368 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:47,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107891730] [2021-12-19 17:53:47,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:47,369 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:47,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:47,679 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 133 proven. 233 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:47,680 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:47,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107891730] [2021-12-19 17:53:47,680 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [107891730] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:47,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [849933291] [2021-12-19 17:53:47,680 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-12-19 17:53:47,680 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:47,680 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:47,682 INFO L229 MonitoredProcess]: Starting monitored process 74 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:47,682 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2021-12-19 17:53:47,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:47,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 375 conjuncts, 28 conjunts are in the unsatisfiable core [2021-12-19 17:53:47,826 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:48,190 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 156 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:48,190 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-19 17:53:48,261 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 156 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:48,262 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [849933291] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-19 17:53:48,262 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-19 17:53:48,262 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29] total 44 [2021-12-19 17:53:48,262 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510075246] [2021-12-19 17:53:48,262 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-19 17:53:48,263 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-12-19 17:53:48,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:48,263 INFO L85 PathProgramCache]: Analyzing trace with hash 2308, now seen corresponding path program 56 times [2021-12-19 17:53:48,263 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:48,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943544677] [2021-12-19 17:53:48,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:48,264 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:48,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:48,267 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-19 17:53:48,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-19 17:53:48,270 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-19 17:53:48,295 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-19 17:53:48,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-12-19 17:53:48,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=439, Invalid=1453, Unknown=0, NotChecked=0, Total=1892 [2021-12-19 17:53:48,296 INFO L87 Difference]: Start difference. First operand 85 states and 106 transitions. cyclomatic complexity: 26 Second operand has 44 states, 44 states have (on average 2.3181818181818183) internal successors, (102), 44 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:48,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-19 17:53:48,544 INFO L93 Difference]: Finished difference Result 121 states and 145 transitions. [2021-12-19 17:53:48,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-12-19 17:53:48,544 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 145 transitions. [2021-12-19 17:53:48,545 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:48,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 95 states and 118 transitions. [2021-12-19 17:53:48,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2021-12-19 17:53:48,545 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2021-12-19 17:53:48,545 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 118 transitions. [2021-12-19 17:53:48,545 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-12-19 17:53:48,546 INFO L681 BuchiCegarLoop]: Abstraction has 95 states and 118 transitions. [2021-12-19 17:53:48,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 118 transitions. [2021-12-19 17:53:48,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 87. [2021-12-19 17:53:48,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 87 states have (on average 1.2298850574712643) internal successors, (107), 86 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-19 17:53:48,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 107 transitions. [2021-12-19 17:53:48,547 INFO L704 BuchiCegarLoop]: Abstraction has 87 states and 107 transitions. [2021-12-19 17:53:48,547 INFO L587 BuchiCegarLoop]: Abstraction has 87 states and 107 transitions. [2021-12-19 17:53:48,547 INFO L425 BuchiCegarLoop]: ======== Iteration 63============ [2021-12-19 17:53:48,547 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 107 transitions. [2021-12-19 17:53:48,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-12-19 17:53:48,547 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-19 17:53:48,548 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-19 17:53:48,548 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 12, 11, 11, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-19 17:53:48,548 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-12-19 17:53:48,548 INFO L791 eck$LassoCheckResult]: Stem: 26646#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 26647#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet208#1, main_#t~mem209#1, main_#t~post207#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1; 26657#L367 assume !(main_~length~0#1 < 1); 26648#L367-2 call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset; 26649#L369 assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0; 26650#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26658#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26663#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26732#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26731#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26730#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26729#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26728#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26727#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26726#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26725#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26724#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26723#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26722#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26721#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26720#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26719#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26718#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26717#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26716#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26715#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26714#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26713#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26712#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26711#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26710#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26709#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26708#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26707#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26706#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26705#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26704#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26702#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26700#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26696#L372 assume 0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2);havoc main_#t~mem209#1;call write~int(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26664#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26659#L370-3 assume !!(main_~i~0#1 < main_~length~0#1);call write~int(main_#t~nondet208#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet208#1;call main_#t~mem209#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4); 26660#L372 assume !(0 != (if main_#t~mem209#1 < 0 && 0 != main_#t~mem209#1 % 2 then main_#t~mem209#1 % 2 - 2 else main_#t~mem209#1 % 2));havoc main_#t~mem209#1; 26693#L370-2 main_#t~post207#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post207#1;havoc main_#t~post207#1; 26690#L370-3 assume !(main_~i~0#1 < main_~length~0#1); 26689#L370-4 main_~j~0#1 := 0; 26661#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26653#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26654#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26685#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26684#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26683#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26682#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26681#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26680#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26679#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26678#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26677#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26676#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26675#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26674#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26673#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26672#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26671#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26670#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26669#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26668#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26666#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26665#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26651#L378 assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1; 26652#L378-2 [2021-12-19 17:53:48,548 INFO L793 eck$LassoCheckResult]: Loop: 26652#L378-2 assume !!(0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1);call main_#t~mem210#1 := read~int(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4); 26667#L378 assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1; 26652#L378-2 [2021-12-19 17:53:48,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-19 17:53:48,549 INFO L85 PathProgramCache]: Analyzing trace with hash 2082225858, now seen corresponding path program 44 times [2021-12-19 17:53:48,549 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-19 17:53:48,549 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453157690] [2021-12-19 17:53:48,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-19 17:53:48,549 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-19 17:53:48,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-19 17:53:49,072 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 379 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:49,072 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-19 17:53:49,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453157690] [2021-12-19 17:53:49,072 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [453157690] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-19 17:53:49,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1662357198] [2021-12-19 17:53:49,072 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-19 17:53:49,072 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-19 17:53:49,072 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-19 17:53:49,074 INFO L229 MonitoredProcess]: Starting monitored process 75 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-19 17:53:49,075 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2021-12-19 17:53:49,223 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-19 17:53:49,223 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-19 17:53:49,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 385 conjuncts, 68 conjunts are in the unsatisfiable core [2021-12-19 17:53:49,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-19 17:53:49,340 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2021-12-19 17:53:49,415 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:53:49,415 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:53:49,424 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-12-19 17:53:49,425 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2021-12-19 17:53:49,504 INFO L354 Elim1Store]: treesize reduction 92, result has 20.7 percent of original size [2021-12-19 17:53:49,505 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 41 [2021-12-19 17:53:50,319 INFO L354 Elim1Store]: treesize reduction 44, result has 6.4 percent of original size [2021-12-19 17:53:50,320 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 13 [2021-12-19 17:53:50,321 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 379 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-19 17:53:50,321 INFO L328 TraceCheckSpWp]: Computing backward predicates... Killed by 15