./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c3fed411 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 --- Real Ultimate output --- This is Ultimate 0.2.2-tmp.no-commuhash-c3fed41 [2021-12-18 05:10:58,547 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-18 05:10:58,550 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-18 05:10:58,607 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-18 05:10:58,608 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-18 05:10:58,612 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-18 05:10:58,614 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-18 05:10:58,619 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-18 05:10:58,622 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-18 05:10:58,626 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-18 05:10:58,627 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-18 05:10:58,630 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-18 05:10:58,630 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-18 05:10:58,633 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-18 05:10:58,635 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-18 05:10:58,638 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-18 05:10:58,641 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-18 05:10:58,642 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-18 05:10:58,646 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-18 05:10:58,648 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-18 05:10:58,652 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-18 05:10:58,653 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-18 05:10:58,655 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-18 05:10:58,656 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-18 05:10:58,668 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-18 05:10:58,668 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-18 05:10:58,668 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-18 05:10:58,669 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-18 05:10:58,669 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-18 05:10:58,670 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-18 05:10:58,670 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-18 05:10:58,670 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-18 05:10:58,671 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-18 05:10:58,671 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-18 05:10:58,672 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-18 05:10:58,672 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-18 05:10:58,672 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-18 05:10:58,672 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-18 05:10:58,672 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-18 05:10:58,673 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-18 05:10:58,673 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-18 05:10:58,674 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-12-18 05:10:58,694 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-18 05:10:58,696 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-18 05:10:58,697 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-18 05:10:58,697 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-18 05:10:58,698 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-12-18 05:10:58,698 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-12-18 05:10:58,699 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-18 05:10:58,699 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-18 05:10:58,699 INFO L138 SettingsManager]: * Use SBE=true [2021-12-18 05:10:58,699 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-18 05:10:58,700 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-18 05:10:58,701 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-18 05:10:58,701 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-12-18 05:10:58,701 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-12-18 05:10:58,701 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-12-18 05:10:58,701 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-18 05:10:58,702 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-18 05:10:58,702 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-12-18 05:10:58,702 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-18 05:10:58,702 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-18 05:10:58,702 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-12-18 05:10:58,703 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-18 05:10:58,703 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-18 05:10:58,703 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-12-18 05:10:58,703 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-12-18 05:10:58,703 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-18 05:10:58,704 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-12-18 05:10:58,704 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-12-18 05:10:58,704 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-12-18 05:10:58,704 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-12-18 05:10:58,705 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-12-18 05:10:58,705 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 [2021-12-18 05:10:58,939 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-18 05:10:58,964 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-18 05:10:58,966 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-18 05:10:58,967 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-18 05:10:58,967 INFO L275 PluginConnector]: CDTParser initialized [2021-12-18 05:10:58,969 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-18 05:10:59,026 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9be5ad893/127511638c5d4b5cbfc403c09942cde3/FLAG7bbf09049 [2021-12-18 05:10:59,627 INFO L306 CDTParser]: Found 1 translation units. [2021-12-18 05:10:59,628 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-18 05:10:59,672 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9be5ad893/127511638c5d4b5cbfc403c09942cde3/FLAG7bbf09049 [2021-12-18 05:10:59,806 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9be5ad893/127511638c5d4b5cbfc403c09942cde3 [2021-12-18 05:10:59,809 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-18 05:10:59,812 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-18 05:10:59,815 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-18 05:10:59,815 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-18 05:10:59,818 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-18 05:10:59,819 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.12 05:10:59" (1/1) ... [2021-12-18 05:10:59,820 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@271e88d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:10:59, skipping insertion in model container [2021-12-18 05:10:59,821 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.12 05:10:59" (1/1) ... [2021-12-18 05:10:59,827 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-18 05:10:59,927 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-18 05:11:00,337 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-12-18 05:11:00,727 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-18 05:11:00,752 INFO L203 MainTranslator]: Completed pre-run [2021-12-18 05:11:00,824 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-12-18 05:11:00,961 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-18 05:11:01,038 INFO L208 MainTranslator]: Completed translation [2021-12-18 05:11:01,040 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01 WrapperNode [2021-12-18 05:11:01,040 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-18 05:11:01,041 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-18 05:11:01,041 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-18 05:11:01,042 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-18 05:11:01,046 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,104 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,178 INFO L137 Inliner]: procedures = 160, calls = 1221, calls flagged for inlining = 70, calls inlined = 70, statements flattened = 3023 [2021-12-18 05:11:01,179 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-18 05:11:01,179 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-18 05:11:01,180 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-18 05:11:01,180 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-18 05:11:01,191 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,191 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,211 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,212 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,283 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,292 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,321 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,338 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-18 05:11:01,339 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-18 05:11:01,339 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-18 05:11:01,339 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-18 05:11:01,340 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (1/1) ... [2021-12-18 05:11:01,345 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-12-18 05:11:01,351 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-18 05:11:01,376 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-12-18 05:11:01,394 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-12-18 05:11:01,411 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_rds_radio_text [2021-12-18 05:11:01,411 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_rds_radio_text [2021-12-18 05:11:01,411 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2021-12-18 05:11:01,411 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-12-18 05:11:01,411 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-12-18 05:11:01,411 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2021-12-18 05:11:01,412 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2021-12-18 05:11:01,412 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-18 05:11:01,412 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_is_valid [2021-12-18 05:11:01,412 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_is_valid [2021-12-18 05:11:01,412 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_wait_stc [2021-12-18 05:11:01,412 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_wait_stc [2021-12-18 05:11:01,412 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_usecs [2021-12-18 05:11:01,412 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_usecs [2021-12-18 05:11:01,412 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_mute [2021-12-18 05:11:01,413 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_mute [2021-12-18 05:11:01,413 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2021-12-18 05:11:01,413 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2021-12-18 05:11:01,413 INFO L130 BoogieDeclarations]: Found specification of procedure wait_for_completion_timeout [2021-12-18 05:11:01,413 INFO L138 BoogieDeclarations]: Found implementation of procedure wait_for_completion_timeout [2021-12-18 05:11:01,413 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2021-12-18 05:11:01,413 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2021-12-18 05:11:01,414 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_power_state [2021-12-18 05:11:01,414 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_power_state [2021-12-18 05:11:01,414 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_choose_econtrol_action [2021-12-18 05:11:01,414 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_choose_econtrol_action [2021-12-18 05:11:01,414 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_len [2021-12-18 05:11:01,414 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_len [2021-12-18 05:11:01,414 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2021-12-18 05:11:01,414 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2021-12-18 05:11:01,414 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2021-12-18 05:11:01,415 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2021-12-18 05:11:01,415 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_econtrol_tune [2021-12-18 05:11:01,415 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_econtrol_tune [2021-12-18 05:11:01,415 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-18 05:11:01,415 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2021-12-18 05:11:01,415 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2021-12-18 05:11:01,415 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2021-12-18 05:11:01,415 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2021-12-18 05:11:01,416 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2021-12-18 05:11:01,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2021-12-18 05:11:01,416 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2021-12-18 05:11:01,416 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2021-12-18 05:11:01,416 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__copy_from_user_1 [2021-12-18 05:11:01,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__copy_from_user_1 [2021-12-18 05:11:01,416 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2021-12-18 05:11:01,417 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2021-12-18 05:11:01,417 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_strlen [2021-12-18 05:11:01,417 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_strlen [2021-12-18 05:11:01,417 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_set_value [2021-12-18 05:11:01,417 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_set_value [2021-12-18 05:11:01,417 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_tx_rds_buff [2021-12-18 05:11:01,417 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_tx_rds_buff [2021-12-18 05:11:01,417 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2021-12-18 05:11:01,418 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2021-12-18 05:11:01,418 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-12-18 05:11:01,418 INFO L130 BoogieDeclarations]: Found specification of procedure v4l2_ctrl_query_fill [2021-12-18 05:11:01,419 INFO L138 BoogieDeclarations]: Found implementation of procedure v4l2_ctrl_query_fill [2021-12-18 05:11:01,419 INFO L130 BoogieDeclarations]: Found specification of procedure validate_range [2021-12-18 05:11:01,419 INFO L138 BoogieDeclarations]: Found implementation of procedure validate_range [2021-12-18 05:11:01,420 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_bulk_free [2021-12-18 05:11:01,420 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_bulk_free [2021-12-18 05:11:01,420 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_econtrol_integers [2021-12-18 05:11:01,420 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_econtrol_integers [2021-12-18 05:11:01,420 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-12-18 05:11:01,420 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2021-12-18 05:11:01,421 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2021-12-18 05:11:01,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-12-18 05:11:01,421 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_bulk_disable [2021-12-18 05:11:01,421 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_bulk_disable [2021-12-18 05:11:01,421 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-18 05:11:01,421 INFO L130 BoogieDeclarations]: Found specification of procedure gpio_free [2021-12-18 05:11:01,422 INFO L138 BoogieDeclarations]: Found implementation of procedure gpio_free [2021-12-18 05:11:01,422 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2021-12-18 05:11:01,422 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2021-12-18 05:11:01,422 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_send_command [2021-12-18 05:11:01,422 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_send_command [2021-12-18 05:11:01,422 INFO L130 BoogieDeclarations]: Found specification of procedure v4l2_get_subdevdata [2021-12-18 05:11:01,422 INFO L138 BoogieDeclarations]: Found implementation of procedure v4l2_get_subdevdata [2021-12-18 05:11:01,422 INFO L130 BoogieDeclarations]: Found specification of procedure usecs_to_jiffies [2021-12-18 05:11:01,422 INFO L138 BoogieDeclarations]: Found implementation of procedure usecs_to_jiffies [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_write_property [2021-12-18 05:11:01,423 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_write_property [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure strlcpy [2021-12-18 05:11:01,423 INFO L138 BoogieDeclarations]: Found implementation of procedure strlcpy [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-12-18 05:11:01,423 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_read_property [2021-12-18 05:11:01,424 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_read_property [2021-12-18 05:11:01,424 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2021-12-18 05:11:01,424 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2021-12-18 05:11:01,424 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_s_frequency [2021-12-18 05:11:01,424 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_s_frequency [2021-12-18 05:11:01,424 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_copy_from_user_7 [2021-12-18 05:11:01,425 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_copy_from_user_7 [2021-12-18 05:11:01,425 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2021-12-18 05:11:01,425 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2021-12-18 05:11:01,425 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock_nested [2021-12-18 05:11:01,426 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock_nested [2021-12-18 05:11:01,426 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-12-18 05:11:01,426 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_tx_tune_status [2021-12-18 05:11:01,426 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_tx_tune_status [2021-12-18 05:11:01,426 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_ret_val [2021-12-18 05:11:01,426 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_ret_val [2021-12-18 05:11:01,427 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_update_tune_status [2021-12-18 05:11:01,427 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_update_tune_status [2021-12-18 05:11:01,427 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_set_rds_ps_name [2021-12-18 05:11:01,427 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_set_rds_ps_name [2021-12-18 05:11:01,427 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_queryctrl [2021-12-18 05:11:01,427 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_queryctrl [2021-12-18 05:11:01,427 INFO L130 BoogieDeclarations]: Found specification of procedure si4713_s_modulator [2021-12-18 05:11:01,427 INFO L138 BoogieDeclarations]: Found implementation of procedure si4713_s_modulator [2021-12-18 05:11:01,428 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2021-12-18 05:11:01,428 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2021-12-18 05:11:01,428 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2021-12-18 05:11:01,428 INFO L130 BoogieDeclarations]: Found specification of procedure strncpy [2021-12-18 05:11:01,428 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-18 05:11:01,429 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-18 05:11:01,906 INFO L236 CfgBuilder]: Building ICFG [2021-12-18 05:11:01,910 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-18 05:11:02,117 INFO L768 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2021-12-18 05:11:04,834 INFO L277 CfgBuilder]: Performing block encoding [2021-12-18 05:11:04,849 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-18 05:11:04,850 INFO L301 CfgBuilder]: Removed 0 assume(true) statements. [2021-12-18 05:11:04,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.12 05:11:04 BoogieIcfgContainer [2021-12-18 05:11:04,853 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-18 05:11:04,854 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-12-18 05:11:04,858 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-12-18 05:11:04,860 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-12-18 05:11:04,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.12 05:10:59" (1/3) ... [2021-12-18 05:11:04,861 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5959fd48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.12 05:11:04, skipping insertion in model container [2021-12-18 05:11:04,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.12 05:11:01" (2/3) ... [2021-12-18 05:11:04,862 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5959fd48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.12 05:11:04, skipping insertion in model container [2021-12-18 05:11:04,862 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.12 05:11:04" (3/3) ... [2021-12-18 05:11:04,863 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-12-18 05:11:04,866 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-12-18 05:11:04,867 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-12-18 05:11:04,913 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-12-18 05:11:04,920 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-12-18 05:11:04,921 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-12-18 05:11:04,954 INFO L276 IsEmpty]: Start isEmpty. Operand has 1040 states, 771 states have (on average 1.404669260700389) internal successors, (1083), 787 states have internal predecessors, (1083), 217 states have call successors, (217), 51 states have call predecessors, (217), 50 states have return successors, (210), 210 states have call predecessors, (210), 210 states have call successors, (210) [2021-12-18 05:11:04,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-12-18 05:11:04,973 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:11:04,974 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:11:04,974 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:11:04,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:11:04,978 INFO L85 PathProgramCache]: Analyzing trace with hash 1678977370, now seen corresponding path program 1 times [2021-12-18 05:11:04,984 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:11:04,985 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995786666] [2021-12-18 05:11:04,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:11:04,985 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:11:05,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:05,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,315 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:11:05,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:11:05,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2021-12-18 05:11:05,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,349 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:05,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:05,359 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-12-18 05:11:05,360 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:11:05,360 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995786666] [2021-12-18 05:11:05,360 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995786666] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:11:05,361 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:11:05,361 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-18 05:11:05,362 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639705824] [2021-12-18 05:11:05,376 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:11:05,379 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-12-18 05:11:05,380 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:11:05,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-18 05:11:05,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-18 05:11:05,410 INFO L87 Difference]: Start difference. First operand has 1040 states, 771 states have (on average 1.404669260700389) internal successors, (1083), 787 states have internal predecessors, (1083), 217 states have call successors, (217), 51 states have call predecessors, (217), 50 states have return successors, (210), 210 states have call predecessors, (210), 210 states have call successors, (210) Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-18 05:11:08,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:11:08,351 INFO L93 Difference]: Finished difference Result 2587 states and 3777 transitions. [2021-12-18 05:11:08,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-12-18 05:11:08,354 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 58 [2021-12-18 05:11:08,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:11:08,379 INFO L225 Difference]: With dead ends: 2587 [2021-12-18 05:11:08,379 INFO L226 Difference]: Without dead ends: 1520 [2021-12-18 05:11:08,387 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-12-18 05:11:08,389 INFO L933 BasicCegarLoop]: 1518 mSDtfsCounter, 910 mSDsluCounter, 1889 mSDsCounter, 0 mSdLazyCounter, 838 mSolverCounterSat, 325 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1008 SdHoareTripleChecker+Valid, 3407 SdHoareTripleChecker+Invalid, 1163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 325 IncrementalHoareTripleChecker+Valid, 838 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2021-12-18 05:11:08,390 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1008 Valid, 3407 Invalid, 1163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [325 Valid, 838 Invalid, 0 Unknown, 0 Unchecked, 2.7s Time] [2021-12-18 05:11:08,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1520 states. [2021-12-18 05:11:08,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1520 to 1462. [2021-12-18 05:11:08,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1462 states, 1098 states have (on average 1.3852459016393444) internal successors, (1521), 1110 states have internal predecessors, (1521), 286 states have call successors, (286), 78 states have call predecessors, (286), 77 states have return successors, (285), 284 states have call predecessors, (285), 285 states have call successors, (285) [2021-12-18 05:11:08,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1462 states to 1462 states and 2092 transitions. [2021-12-18 05:11:08,522 INFO L78 Accepts]: Start accepts. Automaton has 1462 states and 2092 transitions. Word has length 58 [2021-12-18 05:11:08,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:11:08,523 INFO L470 AbstractCegarLoop]: Abstraction has 1462 states and 2092 transitions. [2021-12-18 05:11:08,523 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-12-18 05:11:08,523 INFO L276 IsEmpty]: Start isEmpty. Operand 1462 states and 2092 transitions. [2021-12-18 05:11:08,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-12-18 05:11:08,530 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:11:08,530 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:11:08,530 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-12-18 05:11:08,531 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:11:08,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:11:08,532 INFO L85 PathProgramCache]: Analyzing trace with hash 1282308759, now seen corresponding path program 1 times [2021-12-18 05:11:08,532 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:11:08,533 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585993850] [2021-12-18 05:11:08,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:11:08,533 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:11:08,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,783 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:08,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,790 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:11:08,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,795 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:11:08,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,806 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:11:08,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:11:08,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,818 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:11:08,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,824 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:11:08,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:11:08,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:11:08,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,857 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:11:08,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,863 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:11:08,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,913 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:08,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:08,921 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:11:08,921 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:11:08,921 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585993850] [2021-12-18 05:11:08,921 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [585993850] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:11:08,921 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:11:08,922 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2021-12-18 05:11:08,922 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193632520] [2021-12-18 05:11:08,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:11:08,923 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2021-12-18 05:11:08,923 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:11:08,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-12-18 05:11:08,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2021-12-18 05:11:08,924 INFO L87 Difference]: Start difference. First operand 1462 states and 2092 transitions. Second operand has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:17,843 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:18,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:11:18,842 INFO L93 Difference]: Finished difference Result 3309 states and 4814 transitions. [2021-12-18 05:11:18,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-18 05:11:18,843 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 116 [2021-12-18 05:11:18,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:11:18,854 INFO L225 Difference]: With dead ends: 3309 [2021-12-18 05:11:18,855 INFO L226 Difference]: Without dead ends: 1856 [2021-12-18 05:11:18,861 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2021-12-18 05:11:18,862 INFO L933 BasicCegarLoop]: 1688 mSDtfsCounter, 542 mSDsluCounter, 6623 mSDsCounter, 0 mSdLazyCounter, 3892 mSolverCounterSat, 226 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 614 SdHoareTripleChecker+Valid, 8311 SdHoareTripleChecker+Invalid, 4119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 226 IncrementalHoareTripleChecker+Valid, 3892 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.7s IncrementalHoareTripleChecker+Time [2021-12-18 05:11:18,863 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [614 Valid, 8311 Invalid, 4119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [226 Valid, 3892 Invalid, 1 Unknown, 0 Unchecked, 9.7s Time] [2021-12-18 05:11:18,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1856 states. [2021-12-18 05:11:18,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1856 to 1468. [2021-12-18 05:11:18,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1468 states, 1103 states have (on average 1.3844061650045332) internal successors, (1527), 1115 states have internal predecessors, (1527), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-18 05:11:18,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1468 states to 1468 states and 2101 transitions. [2021-12-18 05:11:18,925 INFO L78 Accepts]: Start accepts. Automaton has 1468 states and 2101 transitions. Word has length 116 [2021-12-18 05:11:18,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:11:18,926 INFO L470 AbstractCegarLoop]: Abstraction has 1468 states and 2101 transitions. [2021-12-18 05:11:18,927 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 7 states have (on average 8.714285714285714) internal successors, (61), 8 states have internal predecessors, (61), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:18,927 INFO L276 IsEmpty]: Start isEmpty. Operand 1468 states and 2101 transitions. [2021-12-18 05:11:18,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-12-18 05:11:18,932 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:11:18,932 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:11:18,932 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-12-18 05:11:18,932 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:11:18,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:11:18,933 INFO L85 PathProgramCache]: Analyzing trace with hash -942216361, now seen corresponding path program 1 times [2021-12-18 05:11:18,933 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:11:18,933 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179493982] [2021-12-18 05:11:18,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:11:18,934 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:11:19,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,134 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:19,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,144 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:11:19,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:11:19,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,159 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:11:19,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,167 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:11:19,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:11:19,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:11:19,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,189 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:11:19,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:11:19,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:11:19,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:11:19,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,330 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2021-12-18 05:11:19,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:19,340 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:11:19,341 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:11:19,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179493982] [2021-12-18 05:11:19,341 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179493982] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:11:19,341 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:11:19,341 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-18 05:11:19,342 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [725761429] [2021-12-18 05:11:19,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:11:19,343 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-18 05:11:19,344 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:11:19,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-18 05:11:19,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-18 05:11:19,345 INFO L87 Difference]: Start difference. First operand 1468 states and 2101 transitions. Second operand has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:28,928 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:30,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:11:30,238 INFO L93 Difference]: Finished difference Result 3324 states and 4839 transitions. [2021-12-18 05:11:30,239 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-18 05:11:30,239 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 117 [2021-12-18 05:11:30,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:11:30,247 INFO L225 Difference]: With dead ends: 3324 [2021-12-18 05:11:30,247 INFO L226 Difference]: Without dead ends: 1865 [2021-12-18 05:11:30,252 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2021-12-18 05:11:30,255 INFO L933 BasicCegarLoop]: 1678 mSDtfsCounter, 599 mSDsluCounter, 8919 mSDsCounter, 0 mSdLazyCounter, 5351 mSolverCounterSat, 261 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 653 SdHoareTripleChecker+Valid, 10597 SdHoareTripleChecker+Invalid, 5612 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 261 IncrementalHoareTripleChecker+Valid, 5351 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 10.6s IncrementalHoareTripleChecker+Time [2021-12-18 05:11:30,258 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [653 Valid, 10597 Invalid, 5612 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [261 Valid, 5351 Invalid, 0 Unknown, 0 Unchecked, 10.6s Time] [2021-12-18 05:11:30,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1865 states. [2021-12-18 05:11:30,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1865 to 1468. [2021-12-18 05:11:30,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1468 states, 1103 states have (on average 1.3844061650045332) internal successors, (1527), 1115 states have internal predecessors, (1527), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-18 05:11:30,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1468 states to 1468 states and 2101 transitions. [2021-12-18 05:11:30,297 INFO L78 Accepts]: Start accepts. Automaton has 1468 states and 2101 transitions. Word has length 117 [2021-12-18 05:11:30,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:11:30,298 INFO L470 AbstractCegarLoop]: Abstraction has 1468 states and 2101 transitions. [2021-12-18 05:11:30,298 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:30,298 INFO L276 IsEmpty]: Start isEmpty. Operand 1468 states and 2101 transitions. [2021-12-18 05:11:30,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2021-12-18 05:11:30,301 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:11:30,302 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:11:30,302 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-12-18 05:11:30,302 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:11:30,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:11:30,302 INFO L85 PathProgramCache]: Analyzing trace with hash -1025870257, now seen corresponding path program 1 times [2021-12-18 05:11:30,303 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:11:30,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740241155] [2021-12-18 05:11:30,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:11:30,303 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:11:30,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,440 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:30,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,446 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:11:30,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:11:30,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:11:30,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,461 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:11:30,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,467 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:11:30,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,473 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:11:30,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,479 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:11:30,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,484 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:11:30,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,492 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:11:30,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,499 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:11:30,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,563 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:30,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:30,572 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:11:30,572 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:11:30,572 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740241155] [2021-12-18 05:11:30,572 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1740241155] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:11:30,573 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:11:30,573 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-18 05:11:30,573 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591390916] [2021-12-18 05:11:30,573 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:11:30,573 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-18 05:11:30,573 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:11:30,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-18 05:11:30,575 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-18 05:11:30,575 INFO L87 Difference]: Start difference. First operand 1468 states and 2101 transitions. Second operand has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:39,158 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.71s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:45,790 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:47,820 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:48,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:11:48,122 INFO L93 Difference]: Finished difference Result 4257 states and 6338 transitions. [2021-12-18 05:11:48,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-12-18 05:11:48,123 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 117 [2021-12-18 05:11:48,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:11:48,133 INFO L225 Difference]: With dead ends: 4257 [2021-12-18 05:11:48,134 INFO L226 Difference]: Without dead ends: 2798 [2021-12-18 05:11:48,137 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2021-12-18 05:11:48,139 INFO L933 BasicCegarLoop]: 2518 mSDtfsCounter, 1070 mSDsluCounter, 12021 mSDsCounter, 0 mSdLazyCounter, 5596 mSolverCounterSat, 328 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 16.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1259 SdHoareTripleChecker+Valid, 14539 SdHoareTripleChecker+Invalid, 5926 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 328 IncrementalHoareTripleChecker+Valid, 5596 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 17.2s IncrementalHoareTripleChecker+Time [2021-12-18 05:11:48,140 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1259 Valid, 14539 Invalid, 5926 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [328 Valid, 5596 Invalid, 2 Unknown, 0 Unchecked, 17.2s Time] [2021-12-18 05:11:48,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2798 states. [2021-12-18 05:11:48,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2798 to 1475. [2021-12-18 05:11:48,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1475 states, 1109 states have (on average 1.3832281334535617) internal successors, (1534), 1121 states have internal predecessors, (1534), 286 states have call successors, (286), 78 states have call predecessors, (286), 79 states have return successors, (291), 286 states have call predecessors, (291), 285 states have call successors, (291) [2021-12-18 05:11:48,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 1475 states and 2111 transitions. [2021-12-18 05:11:48,187 INFO L78 Accepts]: Start accepts. Automaton has 1475 states and 2111 transitions. Word has length 117 [2021-12-18 05:11:48,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:11:48,188 INFO L470 AbstractCegarLoop]: Abstraction has 1475 states and 2111 transitions. [2021-12-18 05:11:48,188 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 7.75) internal successors, (62), 9 states have internal predecessors, (62), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:48,188 INFO L276 IsEmpty]: Start isEmpty. Operand 1475 states and 2111 transitions. [2021-12-18 05:11:48,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-12-18 05:11:48,191 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:11:48,191 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:11:48,191 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-12-18 05:11:48,193 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:11:48,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:11:48,193 INFO L85 PathProgramCache]: Analyzing trace with hash -1266672241, now seen corresponding path program 1 times [2021-12-18 05:11:48,193 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:11:48,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179047296] [2021-12-18 05:11:48,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:11:48,194 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:11:48,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:11:48,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,330 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:11:48,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:11:48,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,348 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:11:48,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:11:48,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,362 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:11:48,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,368 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:11:48,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,372 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:11:48,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,378 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:11:48,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,384 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:11:48,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,388 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:11:48,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,455 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2021-12-18 05:11:48,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:11:48,461 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:11:48,462 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:11:48,462 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179047296] [2021-12-18 05:11:48,462 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179047296] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:11:48,462 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:11:48,462 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2021-12-18 05:11:48,462 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896619261] [2021-12-18 05:11:48,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:11:48,463 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-12-18 05:11:48,463 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:11:48,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-12-18 05:11:48,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2021-12-18 05:11:48,463 INFO L87 Difference]: Start difference. First operand 1475 states and 2111 transitions. Second operand has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:11:58,169 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:11:59,203 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.03s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:03,583 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:04,767 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.18s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:07,589 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:09,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:12:09,644 INFO L93 Difference]: Finished difference Result 4268 states and 6357 transitions. [2021-12-18 05:12:09,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-18 05:12:09,645 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 118 [2021-12-18 05:12:09,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:12:09,657 INFO L225 Difference]: With dead ends: 4268 [2021-12-18 05:12:09,657 INFO L226 Difference]: Without dead ends: 2802 [2021-12-18 05:12:09,662 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2021-12-18 05:12:09,663 INFO L933 BasicCegarLoop]: 2493 mSDtfsCounter, 1149 mSDsluCounter, 13735 mSDsCounter, 0 mSdLazyCounter, 6532 mSolverCounterSat, 361 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 19.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1319 SdHoareTripleChecker+Valid, 16228 SdHoareTripleChecker+Invalid, 6895 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 361 IncrementalHoareTripleChecker+Valid, 6532 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 20.9s IncrementalHoareTripleChecker+Time [2021-12-18 05:12:09,663 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1319 Valid, 16228 Invalid, 6895 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [361 Valid, 6532 Invalid, 2 Unknown, 0 Unchecked, 20.9s Time] [2021-12-18 05:12:09,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2802 states. [2021-12-18 05:12:09,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2802 to 1469. [2021-12-18 05:12:09,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1469 states, 1104 states have (on average 1.3840579710144927) internal successors, (1528), 1116 states have internal predecessors, (1528), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-18 05:12:09,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1469 states to 1469 states and 2102 transitions. [2021-12-18 05:12:09,714 INFO L78 Accepts]: Start accepts. Automaton has 1469 states and 2102 transitions. Word has length 118 [2021-12-18 05:12:09,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:12:09,715 INFO L470 AbstractCegarLoop]: Abstraction has 1469 states and 2102 transitions. [2021-12-18 05:12:09,715 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 7.0) internal successors, (63), 10 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:09,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1469 states and 2102 transitions. [2021-12-18 05:12:09,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-12-18 05:12:09,720 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:12:09,720 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:12:09,720 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-12-18 05:12:09,721 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:12:09,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:12:09,721 INFO L85 PathProgramCache]: Analyzing trace with hash 1187863646, now seen corresponding path program 1 times [2021-12-18 05:12:09,721 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:12:09,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299027946] [2021-12-18 05:12:09,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:12:09,722 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:12:09,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,872 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:12:09,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,876 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:12:09,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,881 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:12:09,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,885 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:12:09,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,888 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:12:09,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,893 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:12:09,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,897 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:12:09,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,901 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:12:09,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,904 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:12:09,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,908 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:12:09,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,912 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:12:09,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:09,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2021-12-18 05:12:09,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:10,001 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:12:10,002 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:12:10,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299027946] [2021-12-18 05:12:10,002 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1299027946] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:12:10,002 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:12:10,002 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-18 05:12:10,002 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575578945] [2021-12-18 05:12:10,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:12:10,003 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-18 05:12:10,003 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:12:10,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-18 05:12:10,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-18 05:12:10,004 INFO L87 Difference]: Start difference. First operand 1469 states and 2102 transitions. Second operand has 10 states, 8 states have (on average 7.875) internal successors, (63), 9 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:16,987 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.37s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:19,748 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:23,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:12:23,599 INFO L93 Difference]: Finished difference Result 3326 states and 4841 transitions. [2021-12-18 05:12:23,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-18 05:12:23,599 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 7.875) internal successors, (63), 9 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 118 [2021-12-18 05:12:23,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:12:23,606 INFO L225 Difference]: With dead ends: 3326 [2021-12-18 05:12:23,606 INFO L226 Difference]: Without dead ends: 1866 [2021-12-18 05:12:23,609 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2021-12-18 05:12:23,611 INFO L933 BasicCegarLoop]: 1670 mSDtfsCounter, 595 mSDsluCounter, 8868 mSDsCounter, 0 mSdLazyCounter, 5341 mSolverCounterSat, 266 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 649 SdHoareTripleChecker+Valid, 10538 SdHoareTripleChecker+Invalid, 5608 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 266 IncrementalHoareTripleChecker+Valid, 5341 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 13.4s IncrementalHoareTripleChecker+Time [2021-12-18 05:12:23,611 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [649 Valid, 10538 Invalid, 5608 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [266 Valid, 5341 Invalid, 1 Unknown, 0 Unchecked, 13.4s Time] [2021-12-18 05:12:23,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1866 states. [2021-12-18 05:12:23,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1866 to 1475. [2021-12-18 05:12:23,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1475 states, 1109 states have (on average 1.3832281334535617) internal successors, (1534), 1121 states have internal predecessors, (1534), 286 states have call successors, (286), 78 states have call predecessors, (286), 79 states have return successors, (291), 286 states have call predecessors, (291), 285 states have call successors, (291) [2021-12-18 05:12:23,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 1475 states and 2111 transitions. [2021-12-18 05:12:23,648 INFO L78 Accepts]: Start accepts. Automaton has 1475 states and 2111 transitions. Word has length 118 [2021-12-18 05:12:23,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:12:23,649 INFO L470 AbstractCegarLoop]: Abstraction has 1475 states and 2111 transitions. [2021-12-18 05:12:23,649 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 7.875) internal successors, (63), 9 states have internal predecessors, (63), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:23,649 INFO L276 IsEmpty]: Start isEmpty. Operand 1475 states and 2111 transitions. [2021-12-18 05:12:23,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2021-12-18 05:12:23,652 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:12:23,653 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:12:23,653 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-12-18 05:12:23,653 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:12:23,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:12:23,653 INFO L85 PathProgramCache]: Analyzing trace with hash 341298536, now seen corresponding path program 1 times [2021-12-18 05:12:23,654 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:12:23,654 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034249450] [2021-12-18 05:12:23,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:12:23,654 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:12:23,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,771 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:12:23,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,775 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:12:23,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:12:23,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:12:23,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,789 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:12:23,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,793 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:12:23,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,797 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:12:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,801 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:12:23,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,807 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:12:23,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:12:23,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,816 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:12:23,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,898 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2021-12-18 05:12:23,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:23,907 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:12:23,907 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:12:23,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034249450] [2021-12-18 05:12:23,907 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1034249450] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:12:23,908 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:12:23,908 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2021-12-18 05:12:23,908 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434396680] [2021-12-18 05:12:23,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:12:23,908 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-12-18 05:12:23,908 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:12:23,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-12-18 05:12:23,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2021-12-18 05:12:23,909 INFO L87 Difference]: Start difference. First operand 1475 states and 2111 transitions. Second operand has 11 states, 9 states have (on average 7.111111111111111) internal successors, (64), 10 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:31,487 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:34,528 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:36,570 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:37,759 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.19s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:39,656 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.23s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:43,572 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.33s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:44,611 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.04s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:47,296 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:49,338 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:49,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:12:49,699 INFO L93 Difference]: Finished difference Result 4268 states and 6357 transitions. [2021-12-18 05:12:49,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-18 05:12:49,708 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 7.111111111111111) internal successors, (64), 10 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 119 [2021-12-18 05:12:49,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:12:49,719 INFO L225 Difference]: With dead ends: 4268 [2021-12-18 05:12:49,720 INFO L226 Difference]: Without dead ends: 2802 [2021-12-18 05:12:49,724 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2021-12-18 05:12:49,724 INFO L933 BasicCegarLoop]: 2518 mSDtfsCounter, 1127 mSDsluCounter, 13859 mSDsCounter, 0 mSdLazyCounter, 6563 mSolverCounterSat, 359 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 24.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1297 SdHoareTripleChecker+Valid, 16377 SdHoareTripleChecker+Invalid, 6927 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 359 IncrementalHoareTripleChecker+Valid, 6563 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 25.5s IncrementalHoareTripleChecker+Time [2021-12-18 05:12:49,725 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1297 Valid, 16377 Invalid, 6927 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [359 Valid, 6563 Invalid, 5 Unknown, 0 Unchecked, 25.5s Time] [2021-12-18 05:12:49,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2802 states. [2021-12-18 05:12:49,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2802 to 1469. [2021-12-18 05:12:49,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1469 states, 1104 states have (on average 1.3840579710144927) internal successors, (1528), 1116 states have internal predecessors, (1528), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-18 05:12:49,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1469 states to 1469 states and 2102 transitions. [2021-12-18 05:12:49,795 INFO L78 Accepts]: Start accepts. Automaton has 1469 states and 2102 transitions. Word has length 119 [2021-12-18 05:12:49,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:12:49,795 INFO L470 AbstractCegarLoop]: Abstraction has 1469 states and 2102 transitions. [2021-12-18 05:12:49,795 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 7.111111111111111) internal successors, (64), 10 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:49,796 INFO L276 IsEmpty]: Start isEmpty. Operand 1469 states and 2102 transitions. [2021-12-18 05:12:49,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2021-12-18 05:12:49,799 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:12:49,799 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:12:49,799 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-12-18 05:12:49,800 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:12:49,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:12:49,800 INFO L85 PathProgramCache]: Analyzing trace with hash 871749118, now seen corresponding path program 1 times [2021-12-18 05:12:49,800 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:12:49,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201159007] [2021-12-18 05:12:49,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:12:49,801 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:12:49,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,892 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:12:49,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,897 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:12:49,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,902 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:12:49,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,907 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:12:49,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,911 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:12:49,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,915 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:12:49,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,919 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:12:49,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,923 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:12:49,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,926 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:12:49,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,930 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:12:49,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:49,934 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:12:49,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:50,004 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2021-12-18 05:12:50,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:12:50,012 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:12:50,012 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:12:50,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201159007] [2021-12-18 05:12:50,013 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [201159007] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:12:50,013 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:12:50,013 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2021-12-18 05:12:50,013 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245280172] [2021-12-18 05:12:50,013 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:12:50,013 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-12-18 05:12:50,014 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:12:50,014 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-18 05:12:50,014 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2021-12-18 05:12:50,015 INFO L87 Difference]: Start difference. First operand 1469 states and 2102 transitions. Second operand has 10 states, 8 states have (on average 8.0) internal successors, (64), 9 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:12:52,497 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:54,561 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.06s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:12:56,634 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.07s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:02,634 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.25s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:04,393 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.76s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:06,198 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.80s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:09,112 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.30s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:10,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:13:10,756 INFO L93 Difference]: Finished difference Result 3326 states and 4841 transitions. [2021-12-18 05:13:10,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-12-18 05:13:10,757 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 8.0) internal successors, (64), 9 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 119 [2021-12-18 05:13:10,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:13:10,763 INFO L225 Difference]: With dead ends: 3326 [2021-12-18 05:13:10,764 INFO L226 Difference]: Without dead ends: 1866 [2021-12-18 05:13:10,767 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2021-12-18 05:13:10,768 INFO L933 BasicCegarLoop]: 1682 mSDtfsCounter, 599 mSDsluCounter, 7798 mSDsCounter, 0 mSdLazyCounter, 4612 mSolverCounterSat, 263 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 19.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 652 SdHoareTripleChecker+Valid, 9480 SdHoareTripleChecker+Invalid, 4878 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 263 IncrementalHoareTripleChecker+Valid, 4612 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 20.5s IncrementalHoareTripleChecker+Time [2021-12-18 05:13:10,768 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [652 Valid, 9480 Invalid, 4878 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [263 Valid, 4612 Invalid, 3 Unknown, 0 Unchecked, 20.5s Time] [2021-12-18 05:13:10,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1866 states. [2021-12-18 05:13:10,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1866 to 1475. [2021-12-18 05:13:10,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1475 states, 1109 states have (on average 1.3832281334535617) internal successors, (1534), 1121 states have internal predecessors, (1534), 286 states have call successors, (286), 78 states have call predecessors, (286), 79 states have return successors, (291), 286 states have call predecessors, (291), 285 states have call successors, (291) [2021-12-18 05:13:10,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 1475 states and 2111 transitions. [2021-12-18 05:13:10,802 INFO L78 Accepts]: Start accepts. Automaton has 1475 states and 2111 transitions. Word has length 119 [2021-12-18 05:13:10,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:13:10,803 INFO L470 AbstractCegarLoop]: Abstraction has 1475 states and 2111 transitions. [2021-12-18 05:13:10,803 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 8.0) internal successors, (64), 9 states have internal predecessors, (64), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:13:10,803 INFO L276 IsEmpty]: Start isEmpty. Operand 1475 states and 2111 transitions. [2021-12-18 05:13:10,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2021-12-18 05:13:10,806 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:13:10,806 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:13:10,807 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-12-18 05:13:10,807 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:13:10,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:13:10,807 INFO L85 PathProgramCache]: Analyzing trace with hash -868317240, now seen corresponding path program 1 times [2021-12-18 05:13:10,807 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:13:10,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648867392] [2021-12-18 05:13:10,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:13:10,808 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:13:10,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,904 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2021-12-18 05:13:10,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,909 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2021-12-18 05:13:10,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,913 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2021-12-18 05:13:10,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,917 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2021-12-18 05:13:10,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,921 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2021-12-18 05:13:10,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,925 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2021-12-18 05:13:10,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,929 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2021-12-18 05:13:10,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,932 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2021-12-18 05:13:10,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2021-12-18 05:13:10,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,940 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2021-12-18 05:13:10,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:10,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2021-12-18 05:13:10,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:11,022 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2021-12-18 05:13:11,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-18 05:13:11,028 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2021-12-18 05:13:11,029 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-18 05:13:11,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648867392] [2021-12-18 05:13:11,029 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648867392] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-18 05:13:11,029 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-18 05:13:11,029 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2021-12-18 05:13:11,029 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572784374] [2021-12-18 05:13:11,029 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-18 05:13:11,030 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-12-18 05:13:11,030 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-18 05:13:11,030 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-12-18 05:13:11,030 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2021-12-18 05:13:11,031 INFO L87 Difference]: Start difference. First operand 1475 states and 2111 transitions. Second operand has 11 states, 9 states have (on average 7.222222222222222) internal successors, (65), 10 states have internal predecessors, (65), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:13:20,448 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:22,492 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:24,655 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.20s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:26,688 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:27,900 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.21s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:31,188 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:32,862 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.67s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:34,889 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2021-12-18 05:13:35,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-18 05:13:35,310 INFO L93 Difference]: Finished difference Result 4268 states and 6357 transitions. [2021-12-18 05:13:35,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-12-18 05:13:35,310 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 7.222222222222222) internal successors, (65), 10 states have internal predecessors, (65), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 120 [2021-12-18 05:13:35,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-12-18 05:13:35,321 INFO L225 Difference]: With dead ends: 4268 [2021-12-18 05:13:35,321 INFO L226 Difference]: Without dead ends: 2802 [2021-12-18 05:13:35,325 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2021-12-18 05:13:35,327 INFO L933 BasicCegarLoop]: 2525 mSDtfsCounter, 1122 mSDsluCounter, 13888 mSDsCounter, 0 mSdLazyCounter, 6657 mSolverCounterSat, 356 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 22.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1291 SdHoareTripleChecker+Valid, 16413 SdHoareTripleChecker+Invalid, 7016 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 356 IncrementalHoareTripleChecker+Valid, 6657 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 24.0s IncrementalHoareTripleChecker+Time [2021-12-18 05:13:35,328 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1291 Valid, 16413 Invalid, 7016 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [356 Valid, 6657 Invalid, 3 Unknown, 0 Unchecked, 24.0s Time] [2021-12-18 05:13:35,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2802 states. [2021-12-18 05:13:35,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2802 to 1469. [2021-12-18 05:13:35,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1469 states, 1104 states have (on average 1.3840579710144927) internal successors, (1528), 1116 states have internal predecessors, (1528), 286 states have call successors, (286), 78 states have call predecessors, (286), 78 states have return successors, (288), 285 states have call predecessors, (288), 285 states have call successors, (288) [2021-12-18 05:13:35,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1469 states to 1469 states and 2102 transitions. [2021-12-18 05:13:35,376 INFO L78 Accepts]: Start accepts. Automaton has 1469 states and 2102 transitions. Word has length 120 [2021-12-18 05:13:35,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-12-18 05:13:35,377 INFO L470 AbstractCegarLoop]: Abstraction has 1469 states and 2102 transitions. [2021-12-18 05:13:35,377 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 7.222222222222222) internal successors, (65), 10 states have internal predecessors, (65), 4 states have call successors, (15), 3 states have call predecessors, (15), 2 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2021-12-18 05:13:35,377 INFO L276 IsEmpty]: Start isEmpty. Operand 1469 states and 2102 transitions. [2021-12-18 05:13:35,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2021-12-18 05:13:35,382 INFO L506 BasicCegarLoop]: Found error trace [2021-12-18 05:13:35,383 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:13:35,383 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-12-18 05:13:35,383 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-12-18 05:13:35,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-18 05:13:35,383 INFO L85 PathProgramCache]: Analyzing trace with hash 2033015333, now seen corresponding path program 1 times [2021-12-18 05:13:35,384 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-18 05:13:35,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [702753533] [2021-12-18 05:13:35,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-18 05:13:35,385 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-18 05:13:35,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-18 05:13:35,534 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-18 05:13:35,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-18 05:13:35,684 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-18 05:13:35,684 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-12-18 05:13:35,685 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-12-18 05:13:35,686 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-12-18 05:13:35,689 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-12-18 05:13:35,692 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-12-18 05:13:35,844 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.12 05:13:35 BoogieIcfgContainer [2021-12-18 05:13:35,845 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-12-18 05:13:35,845 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-12-18 05:13:35,845 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-12-18 05:13:35,845 INFO L275 PluginConnector]: Witness Printer initialized [2021-12-18 05:13:35,846 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.12 05:11:04" (3/4) ... [2021-12-18 05:13:35,847 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-12-18 05:13:35,968 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2021-12-18 05:13:35,969 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-12-18 05:13:35,969 INFO L158 Benchmark]: Toolchain (without parser) took 156157.44ms. Allocated memory was 125.8MB in the beginning and 476.1MB in the end (delta: 350.2MB). Free memory was 85.4MB in the beginning and 152.3MB in the end (delta: -66.9MB). Peak memory consumption was 282.5MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,969 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 77.6MB. Free memory is still 38.1MB. There was no memory consumed. Max. memory is 16.1GB. [2021-12-18 05:13:35,970 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1225.75ms. Allocated memory was 125.8MB in the beginning and 151.0MB in the end (delta: 25.2MB). Free memory was 85.2MB in the beginning and 88.9MB in the end (delta: -3.7MB). Peak memory consumption was 62.9MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,970 INFO L158 Benchmark]: Boogie Procedure Inliner took 137.64ms. Allocated memory is still 151.0MB. Free memory was 88.9MB in the beginning and 71.3MB in the end (delta: 17.6MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,971 INFO L158 Benchmark]: Boogie Preprocessor took 158.89ms. Allocated memory is still 151.0MB. Free memory was 71.3MB in the beginning and 83.3MB in the end (delta: -12.0MB). Peak memory consumption was 20.3MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,971 INFO L158 Benchmark]: RCFGBuilder took 3513.99ms. Allocated memory was 151.0MB in the beginning and 325.1MB in the end (delta: 174.1MB). Free memory was 83.3MB in the beginning and 241.6MB in the end (delta: -158.4MB). Peak memory consumption was 194.2MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,971 INFO L158 Benchmark]: TraceAbstraction took 150990.83ms. Allocated memory was 325.1MB in the beginning and 476.1MB in the end (delta: 151.0MB). Free memory was 241.6MB in the beginning and 204.8MB in the end (delta: 36.9MB). Peak memory consumption was 187.9MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,972 INFO L158 Benchmark]: Witness Printer took 123.63ms. Allocated memory is still 476.1MB. Free memory was 204.8MB in the beginning and 152.3MB in the end (delta: 52.4MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. [2021-12-18 05:13:35,976 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 77.6MB. Free memory is still 38.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1225.75ms. Allocated memory was 125.8MB in the beginning and 151.0MB in the end (delta: 25.2MB). Free memory was 85.2MB in the beginning and 88.9MB in the end (delta: -3.7MB). Peak memory consumption was 62.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 137.64ms. Allocated memory is still 151.0MB. Free memory was 88.9MB in the beginning and 71.3MB in the end (delta: 17.6MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * Boogie Preprocessor took 158.89ms. Allocated memory is still 151.0MB. Free memory was 71.3MB in the beginning and 83.3MB in the end (delta: -12.0MB). Peak memory consumption was 20.3MB. Max. memory is 16.1GB. * RCFGBuilder took 3513.99ms. Allocated memory was 151.0MB in the beginning and 325.1MB in the end (delta: 174.1MB). Free memory was 83.3MB in the beginning and 241.6MB in the end (delta: -158.4MB). Peak memory consumption was 194.2MB. Max. memory is 16.1GB. * TraceAbstraction took 150990.83ms. Allocated memory was 325.1MB in the beginning and 476.1MB in the end (delta: 151.0MB). Free memory was 241.6MB in the beginning and 204.8MB in the end (delta: 36.9MB). Peak memory consumption was 187.9MB. Max. memory is 16.1GB. * Witness Printer took 123.63ms. Allocated memory is still 476.1MB. Free memory was 204.8MB in the beginning and 152.3MB in the end (delta: 52.4MB). Peak memory consumption was 52.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 3957]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L3980] struct v4l2_subdev *si4713_subdev_tuner_ops_group1 ; [L3981] int ldv_irq_1_3 = 0; [L3982] void *ldv_irq_data_1_1 ; [L3983] int ldv_irq_1_0 = 0; [L3984] void *ldv_irq_data_1_0 ; [L3985] int ldv_state_variable_0 ; [L3986] struct v4l2_frequency *si4713_subdev_tuner_ops_group0 ; [L3987] struct v4l2_control *si4713_subdev_core_ops_group2 ; [L3988] int ldv_state_variable_2 ; [L3989] void *ldv_irq_data_1_3 ; [L3990] void *ldv_irq_data_1_2 ; [L3991] int ldv_irq_1_2 = 0; [L3992] int LDV_IN_INTERRUPT = 1; [L3993] int ldv_irq_1_1 = 0; [L3994] int ldv_irq_line_1_3 ; [L3995] struct v4l2_subdev *si4713_subdev_core_ops_group1 ; [L3996] struct v4l2_ext_controls *si4713_subdev_core_ops_group0 ; [L3997] int ldv_state_variable_3 ; [L3998] int ldv_irq_line_1_0 ; [L3999] int ref_cnt ; [L4000] struct v4l2_modulator *si4713_subdev_tuner_ops_group2 ; [L4001] int ldv_irq_line_1_1 ; [L4002] struct i2c_client *si4713_i2c_driver_group0 ; [L4003] int ldv_state_variable_1 ; [L4004] int ldv_irq_line_1_2 ; [L4005] int ldv_state_variable_4 ; [L4144] static int debug ; [L4145] static char const *si4713_supply_names[2U] = { "vio", "vdd"}; [L4146-L4156] static long limiter_times[40U] = { 2000L, 250L, 1000L, 500L, 510L, 1000L, 255L, 2000L, 170L, 3000L, 127L, 4020L, 102L, 5010L, 85L, 6020L, 73L, 7010L, 64L, 7990L, 57L, 8970L, 51L, 10030L, 25L, 20470L, 17L, 30110L, 13L, 39380L, 10L, 51190L, 8L, 63690L, 7L, 73140L, 6L, 85330L, 5L, 102390L}; [L4157-L4160] static unsigned long acomp_rtimes[10U] = { 0UL, 100000UL, 1UL, 200000UL, 2UL, 350000UL, 3UL, 525000UL, 4UL, 1000000UL}; [L4161-L4162] static unsigned long preemphasis_values[6U] = { 2UL, 0UL, 1UL, 1UL, 0UL, 2UL}; [L5779-L5781] static struct v4l2_subdev_core_ops const si4713_subdev_core_ops = {0, 0, 0, 0, 0, 0, 0, & si4713_queryctrl, & si4713_g_ctrl, & si4713_s_ctrl, & si4713_g_ext_ctrls, & si4713_s_ext_ctrls, 0, 0, 0, & si4713_ioctl, 0, 0, 0, 0, 0, 0}; [L5949-L5951] static struct v4l2_subdev_tuner_ops const si4713_subdev_tuner_ops = {0, 0, & si4713_s_frequency, & si4713_g_frequency, 0, 0, & si4713_g_modulator, & si4713_s_modulator, 0, 0}; [L5952-L5953] static struct v4l2_subdev_ops const si4713_subdev_ops = {& si4713_subdev_core_ops, & si4713_subdev_tuner_ops, 0, 0, 0, 0, 0, 0}; [L6083] static struct i2c_device_id const si4713_id[2U] = { {{'s', 'i', '4', '7', '1', '3', '\000'}, 0UL}}; [L6084] struct i2c_device_id const __mod_i2c_device_table ; [L6085-L6089] static struct i2c_driver si4713_i2c_driver = {0U, 0, 0, & si4713_probe, & si4713_remove, 0, 0, 0, 0, 0, {"si4713", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, (struct i2c_device_id const *)(& si4713_id), 0, 0, {0, 0}}; [L6105] int ldv_retval_0 ; [L6106] int ldv_retval_1 ; VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6271] unsigned int ldvarg1 ; [L6272] unsigned int tmp ; [L6273] void *ldvarg0 ; [L6274] void *tmp___0 ; [L6275] struct v4l2_queryctrl *ldvarg2 ; [L6276] void *tmp___1 ; [L6277] struct i2c_device_id *ldvarg3 ; [L6278] void *tmp___2 ; [L6279] int tmp___3 ; [L6280] int tmp___4 ; [L6281] int tmp___5 ; [L6282] int tmp___6 ; [L6283] int tmp___7 ; [L6285] tmp = __VERIFIER_nondet_uint() [L6286] ldvarg1 = tmp VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22] [L6287] CALL, EXPR ldv_zalloc(1UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1, tmp___0=-2] [L6287] RET, EXPR ldv_zalloc(1UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(1UL)={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22] [L6287] tmp___0 = ldv_zalloc(1UL) [L6288] ldvarg0 = tmp___0 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}] [L6289] CALL, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=68, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=68, tmp___0=-3] [L6289] RET, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(68UL)={0:0}, ldvarg0={0:0}, ldvarg1=22, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}] [L6289] tmp___1 = ldv_zalloc(68UL) [L6290] ldvarg2 = (struct v4l2_queryctrl *)tmp___1 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}] [L6291] CALL, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=32, \result={0:0}, __mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=32, tmp___0=-4] [L6291] RET, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(32UL)={0:0}, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}] [L6291] tmp___2 = ldv_zalloc(32UL) [L6292] ldvarg3 = (struct i2c_device_id *)tmp___2 [L6293] FCALL ldv_initialize() [L6294] ldv_state_variable_4 = 0 [L6295] ldv_state_variable_1 = 1 [L6296] ref_cnt = 0 [L6297] ldv_state_variable_0 = 1 [L6298] ldv_state_variable_3 = 0 [L6299] ldv_state_variable_2 = 0 VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: [L6356] case 1: [L6362] case 2: VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2] [L6363] COND TRUE ldv_state_variable_0 != 0 [L6364] tmp___5 = __VERIFIER_nondet_int() [L6366] case 0: [L6374] case 1: VAL [__mod_i2c_device_table=0, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2, tmp___5=1] [L6375] COND TRUE ldv_state_variable_0 == 1 [L6376] CALL, EXPR si4713_module_init() [L6092] int tmp ; [L6094] CALL, EXPR i2c_add_driver(& si4713_i2c_driver) [L4108] int tmp ; [L4110] CALL, EXPR i2c_register_driver(& __this_module, driver) [L6677] return __VERIFIER_nondet_int(); [L4110] RET, EXPR i2c_register_driver(& __this_module, driver) [L4110] tmp = i2c_register_driver(& __this_module, driver) [L4111] return (tmp); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, driver={67:0}, driver={67:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=0] [L6094] RET, EXPR i2c_add_driver(& si4713_i2c_driver) [L6094] tmp = i2c_add_driver(& si4713_i2c_driver) [L6095] return (tmp); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=0] [L6376] RET, EXPR si4713_module_init() [L6376] ldv_retval_0 = si4713_module_init() [L6377] COND TRUE ldv_retval_0 == 0 [L6378] ldv_state_variable_0 = 3 [L6379] ldv_state_variable_2 = 1 [L6380] CALL ldv_initialize_i2c_driver_2() [L6111] void *tmp ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6113] CALL, EXPR ldv_zalloc(1168UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1168, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1168, tmp___0=-5] [L6113] RET, EXPR ldv_zalloc(1168UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_zalloc(1168UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6113] tmp = ldv_zalloc(1168UL) [L6114] si4713_i2c_driver_group0 = (struct i2c_client *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6380] RET ldv_initialize_i2c_driver_2() [L6381] ldv_state_variable_3 = 1 [L6382] CALL ldv_initialize_v4l2_subdev_tuner_ops_3() [L6256] void *tmp ; [L6257] void *tmp___0 ; [L6258] void *tmp___1 ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6260] CALL, EXPR ldv_zalloc(44UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=44, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=44, tmp___0=-6] [L6260] RET, EXPR ldv_zalloc(44UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(44UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6260] tmp = ldv_zalloc(44UL) [L6261] si4713_subdev_tuner_ops_group0 = (struct v4l2_frequency *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6262] CALL, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1736, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1736, tmp___0=-7] [L6262] RET, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(1736UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6262] tmp___0 = ldv_zalloc(1736UL) [L6263] si4713_subdev_tuner_ops_group1 = (struct v4l2_subdev *)tmp___0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6264] CALL, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=68, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=68, tmp___0=-8] [L6264] RET, EXPR ldv_zalloc(68UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_zalloc(68UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6264] tmp___1 = ldv_zalloc(68UL) [L6265] si4713_subdev_tuner_ops_group2 = (struct v4l2_modulator *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}, tmp___1={0:0}] [L6382] RET ldv_initialize_v4l2_subdev_tuner_ops_3() [L6383] ldv_state_variable_4 = 1 [L6384] CALL ldv_initialize_v4l2_subdev_core_ops_4() [L6120] void *tmp ; [L6121] void *tmp___0 ; [L6122] void *tmp___1 ; VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6124] CALL, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=32, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=32, tmp___0=-9] [L6124] RET, EXPR ldv_zalloc(32UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(32UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6124] tmp = ldv_zalloc(32UL) [L6125] si4713_subdev_core_ops_group0 = (struct v4l2_ext_controls *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6126] CALL, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=1736, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=1736, tmp___0=-10] [L6126] RET, EXPR ldv_zalloc(1736UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(1736UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}] [L6126] tmp___0 = ldv_zalloc(1736UL) [L6127] si4713_subdev_core_ops_group1 = (struct v4l2_subdev *)tmp___0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6128] CALL, EXPR ldv_zalloc(8UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [\old(size)=8, \result={0:0}, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, size=8, tmp___0=-11] [L6128] RET, EXPR ldv_zalloc(8UL) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_zalloc(8UL)={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}] [L6128] tmp___1 = ldv_zalloc(8UL) [L6129] si4713_subdev_core_ops_group2 = (struct v4l2_control *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp={0:0}, tmp___0={0:0}, tmp___1={0:0}] [L6384] RET ldv_initialize_v4l2_subdev_core_ops_4() [L6387] COND FALSE !(ldv_retval_0 != 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=2, tmp___5=1] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=0, tmp___5=1] [L6304] COND TRUE ldv_state_variable_4 != 0 [L6305] tmp___4 = __VERIFIER_nondet_int() [L6307] case 0: [L6314] case 1: [L6321] case 2: [L6328] case 3: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldvarg0={0:0}, ldvarg1=22, ldvarg2={0:0}, ldvarg3={0:0}, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, tmp=22, tmp___0={0:0}, tmp___1={0:0}, tmp___2={0:0}, tmp___3=0, tmp___4=3, tmp___5=1] [L6329] COND TRUE ldv_state_variable_4 == 1 [L6330] CALL si4713_s_ext_ctrls(si4713_subdev_core_ops_group1, si4713_subdev_core_ops_group0) [L5502] struct si4713_device *sdev ; [L5503] struct v4l2_subdev const *__mptr ; [L5504] int i ; [L5505] int err ; [L5507] __mptr = (struct v4l2_subdev const *)sd [L5508] sdev = (struct si4713_device *)__mptr [L5509] EXPR ctrls->ctrl_class VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->ctrl_class=10158080, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5509] COND FALSE !(ctrls->ctrl_class != 10158080U) [L5513] i = 0 VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5536] EXPR ctrls->count VAL [__mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->count=4294967297, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5536] COND TRUE (__u32 )i < ctrls->count [L5516] EXPR ctrls->controls [L5516] (ctrls->controls + (unsigned long )i)->id [L5517] case 10160389U: VAL [(ctrls->controls + (unsigned long )i)->id=10160389, __mod_i2c_device_table=0, __mptr={0:0}, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, ctrls={0:0}, ctrls={0:0}, ctrls->controls={4294967308:0}, debug=0, i=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, sd={0:0}, sd={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5518] case 10160390U: [L5519] EXPR ctrls->controls [L5519] CALL si4713_write_econtrol_string(sdev, ctrls->controls + (unsigned long )i) [L4924] struct v4l2_queryctrl vqc ; [L4925] int len ; [L4926] s32 rval ; [L4927] char ps_name[97U] ; [L4928] unsigned long tmp ; [L4929] size_t tmp___0 ; [L4930] char radio_text[385U] ; [L4931] unsigned long tmp___1 ; [L4932] size_t tmp___2 ; [L4934] rval = 0 [L4935] EXPR control->id [L4935] vqc.id = control->id [L4936] CALL, EXPR si4713_queryctrl(& sdev->sd, & vqc) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={70:0}, ref_cnt=0, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5588] int rval ; [L5590] rval = 0 [L5591] qc->id [L5592] case 9963785U: [L5595] case 10160386U: [L5598] case 10160387U: [L5601] case 10160385U: [L5604] case 10160389U: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={70:0}, qc={70:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L5605] CALL, EXPR v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) VAL [\old(arg1)=0, \old(arg2)=96, \old(arg3)=8, \old(arg4)=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, arg0={70:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6730] return __VERIFIER_nondet_int(); [L5605] RET, EXPR v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={70:0}, qc={70:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, v4l2_ctrl_query_fill(qc, 0, 96, 8, 0)=0] [L5605] rval = v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) [L5657] return (rval); VAL [\result=0, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, qc={70:0}, qc={70:0}, qc->id=10160389, ref_cnt=0, rval=0, sd={0:0}, sd={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L4936] RET, EXPR si4713_queryctrl(& sdev->sd, & vqc) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, control={4294967308:0}, control={4294967308:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ps_name={71:0}, radio_text={69:0}, ref_cnt=0, rval=0, sdev={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_queryctrl(& sdev->sd, & vqc)=0, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, vqc={70:0}] [L4936] rval = si4713_queryctrl(& sdev->sd, & vqc) [L4937] COND FALSE !(rval < 0) [L4941] control->id [L4942] case 10160389U: [L4943] EXPR control->size [L4943] len = (int )(control->size - 1U) [L4944] COND FALSE !(len > 96) [L4949] EXPR control->ldv_23757.string VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, control={4294967308:0}, control={4294967308:0}, control->id=10160389, control->ldv_23757.string={4294967305:4294967309}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, len=-1, limiter_times={60:0}, preemphasis_values={62:0}, ps_name={71:0}, radio_text={69:0}, ref_cnt=0, rval=0, sdev={0:0}, sdev={0:0}, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, vqc={70:0}] [L4949-L4950] CALL ldv_copy_from_user_7((void *)(& ps_name), (void const *)control->ldv_23757.string, (unsigned long )len) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6524] unsigned long tmp ; VAL [\old(n)=-1, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, from={4294967305:4294967309}, from={4294967305:4294967309}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, n=-1, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}, to={71:0}, to={71:0}] [L6526] CALL ldv_check_len((long )n) VAL [\old(n)=-1, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6599] COND FALSE !(n >= 0L) VAL [\old(n)=-1, __mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, n=-1, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L6601] CALL ldv_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] [L3957] reach_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967299}, acomp_rtimes={61:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={60:0}, preemphasis_values={62:0}, ref_cnt=0, si4713_i2c_driver={67:0}, si4713_i2c_driver_group0={0:0}, si4713_id={66:0}, si4713_subdev_core_ops={63:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={65:0}, si4713_subdev_tuner_ops={64:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={59:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 52 procedures, 1041 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 150.8s, OverallIterations: 10, TraceHistogramMax: 10, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 147.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 17 mSolverCounterUnknown, 8742 SdHoareTripleChecker+Valid, 144.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 7713 mSDsluCounter, 105890 SdHoareTripleChecker+Invalid, 135.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 87600 mSDsCounter, 2745 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 45382 IncrementalHoareTripleChecker+Invalid, 48144 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 2745 mSolverCounterUnsat, 18290 mSDtfsCounter, 45382 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 339 GetRequests, 216 SyntacticMatches, 0 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1475occurred in iteration=4, InterpolantAutomatonStates: 103, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 9 MinimizatonAttempts, 6947 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 1122 NumberOfCodeBlocks, 1122 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 993 ConstructedInterpolants, 0 QuantifiedInterpolants, 2518 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 1468/1468 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-12-18 05:13:36,192 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2021-12-18 05:13:36,209 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE