./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version ae007674 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.2-dev-ae00767 [2021-12-28 09:08:45,281 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-12-28 09:08:45,283 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-12-28 09:08:45,312 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-12-28 09:08:45,314 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-12-28 09:08:45,315 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-12-28 09:08:45,317 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-12-28 09:08:45,320 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-12-28 09:08:45,321 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-12-28 09:08:45,322 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-12-28 09:08:45,323 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-12-28 09:08:45,324 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-12-28 09:08:45,325 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-12-28 09:08:45,327 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-12-28 09:08:45,329 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-12-28 09:08:45,330 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-12-28 09:08:45,331 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-12-28 09:08:45,333 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-12-28 09:08:45,334 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-12-28 09:08:45,339 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-12-28 09:08:45,340 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-12-28 09:08:45,343 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-12-28 09:08:45,344 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-12-28 09:08:45,344 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-12-28 09:08:45,346 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-12-28 09:08:45,346 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-12-28 09:08:45,346 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-12-28 09:08:45,347 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-12-28 09:08:45,347 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-12-28 09:08:45,348 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-12-28 09:08:45,348 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-12-28 09:08:45,348 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-12-28 09:08:45,349 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-12-28 09:08:45,349 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-12-28 09:08:45,350 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-12-28 09:08:45,350 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-12-28 09:08:45,351 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-12-28 09:08:45,351 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-12-28 09:08:45,351 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-12-28 09:08:45,352 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-12-28 09:08:45,352 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-12-28 09:08:45,354 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-12-28 09:08:45,375 INFO L113 SettingsManager]: Loading preferences was successful [2021-12-28 09:08:45,375 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-12-28 09:08:45,376 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-12-28 09:08:45,376 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-12-28 09:08:45,377 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-12-28 09:08:45,377 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-12-28 09:08:45,377 INFO L138 SettingsManager]: * Use SBE=true [2021-12-28 09:08:45,377 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-12-28 09:08:45,377 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-12-28 09:08:45,377 INFO L138 SettingsManager]: * Use old map elimination=false [2021-12-28 09:08:45,379 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-12-28 09:08:45,379 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-12-28 09:08:45,379 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-12-28 09:08:45,379 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-12-28 09:08:45,379 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-12-28 09:08:45,380 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-12-28 09:08:45,381 INFO L138 SettingsManager]: * Use constant arrays=true [2021-12-28 09:08:45,381 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-12-28 09:08:45,384 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-12-28 09:08:45,384 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-12-28 09:08:45,385 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-12-28 09:08:45,385 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-12-28 09:08:45,386 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-12-28 09:08:45,387 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2021-12-28 09:08:45,579 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-12-28 09:08:45,597 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-12-28 09:08:45,600 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-12-28 09:08:45,601 INFO L271 PluginConnector]: Initializing CDTParser... [2021-12-28 09:08:45,602 INFO L275 PluginConnector]: CDTParser initialized [2021-12-28 09:08:45,603 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2021-12-28 09:08:45,657 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c7cfa2109/c7a55902979e484c8657b024adab95b8/FLAGf6bfece57 [2021-12-28 09:08:46,053 INFO L306 CDTParser]: Found 1 translation units. [2021-12-28 09:08:46,054 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2021-12-28 09:08:46,063 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c7cfa2109/c7a55902979e484c8657b024adab95b8/FLAGf6bfece57 [2021-12-28 09:08:46,458 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c7cfa2109/c7a55902979e484c8657b024adab95b8 [2021-12-28 09:08:46,459 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-12-28 09:08:46,460 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-12-28 09:08:46,461 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-12-28 09:08:46,461 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-12-28 09:08:46,463 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-12-28 09:08:46,463 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,464 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f348580 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46, skipping insertion in model container [2021-12-28 09:08:46,464 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,468 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-12-28 09:08:46,494 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-12-28 09:08:46,687 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-28 09:08:46,733 INFO L203 MainTranslator]: Completed pre-run [2021-12-28 09:08:46,779 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-12-28 09:08:46,807 INFO L208 MainTranslator]: Completed translation [2021-12-28 09:08:46,808 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46 WrapperNode [2021-12-28 09:08:46,808 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-12-28 09:08:46,809 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-12-28 09:08:46,809 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-12-28 09:08:46,810 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-12-28 09:08:46,815 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,831 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,845 INFO L137 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 34 [2021-12-28 09:08:46,846 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-12-28 09:08:46,847 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-12-28 09:08:46,847 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-12-28 09:08:46,847 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-12-28 09:08:46,852 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,852 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,864 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,864 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,869 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,873 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,876 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,878 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-12-28 09:08:46,880 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-12-28 09:08:46,880 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-12-28 09:08:46,880 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-12-28 09:08:46,881 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (1/1) ... [2021-12-28 09:08:46,885 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-12-28 09:08:46,893 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:46,902 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-12-28 09:08:46,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-12-28 09:08:46,935 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-12-28 09:08:46,935 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-12-28 09:08:46,935 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-12-28 09:08:46,936 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-12-28 09:08:46,936 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-12-28 09:08:46,936 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-12-28 09:08:47,009 INFO L234 CfgBuilder]: Building ICFG [2021-12-28 09:08:47,010 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2021-12-28 09:08:47,135 INFO L275 CfgBuilder]: Performing block encoding [2021-12-28 09:08:47,146 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-12-28 09:08:47,159 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2021-12-28 09:08:47,161 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 09:08:47 BoogieIcfgContainer [2021-12-28 09:08:47,161 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-12-28 09:08:47,161 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-12-28 09:08:47,162 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-12-28 09:08:47,163 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-12-28 09:08:47,164 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-28 09:08:47,164 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.12 09:08:46" (1/3) ... [2021-12-28 09:08:47,165 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42397c0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.12 09:08:47, skipping insertion in model container [2021-12-28 09:08:47,165 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-28 09:08:47,165 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 09:08:46" (2/3) ... [2021-12-28 09:08:47,165 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@42397c0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.12 09:08:47, skipping insertion in model container [2021-12-28 09:08:47,165 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-12-28 09:08:47,165 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 09:08:47" (3/3) ... [2021-12-28 09:08:47,166 INFO L388 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2021-12-28 09:08:47,203 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-12-28 09:08:47,204 INFO L360 BuchiCegarLoop]: Hoare is false [2021-12-28 09:08:47,204 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-12-28 09:08:47,204 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-12-28 09:08:47,204 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-12-28 09:08:47,204 INFO L364 BuchiCegarLoop]: Difference is false [2021-12-28 09:08:47,204 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-12-28 09:08:47,204 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-12-28 09:08:47,213 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,229 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-12-28 09:08:47,229 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:47,230 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:47,233 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:47,233 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-28 09:08:47,233 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-12-28 09:08:47,234 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-12-28 09:08:47,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:47,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:47,236 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:47,236 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-12-28 09:08:47,241 INFO L791 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 7#L549-3true [2021-12-28 09:08:47,242 INFO L793 eck$LassoCheckResult]: Loop: 7#L549-3true call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 3#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 8#L551-3true assume !true; 12#L551-4true call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 7#L549-3true [2021-12-28 09:08:47,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,249 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-12-28 09:08:47,255 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,255 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169433637] [2021-12-28 09:08:47,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,256 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,348 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:47,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,382 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:47,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2021-12-28 09:08:47,384 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57144008] [2021-12-28 09:08:47,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,385 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:47,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:47,440 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:47,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57144008] [2021-12-28 09:08:47,441 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [57144008] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-28 09:08:47,441 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-28 09:08:47,441 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-12-28 09:08:47,441 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902445922] [2021-12-28 09:08:47,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-28 09:08:47,445 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:47,445 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:47,481 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-12-28 09:08:47,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-12-28 09:08:47,483 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:47,488 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2021-12-28 09:08:47,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-12-28 09:08:47,492 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2021-12-28 09:08:47,493 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-12-28 09:08:47,495 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2021-12-28 09:08:47,496 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-12-28 09:08:47,496 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-12-28 09:08:47,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2021-12-28 09:08:47,497 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:47,497 INFO L681 BuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2021-12-28 09:08:47,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2021-12-28 09:08:47,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2021-12-28 09:08:47,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2021-12-28 09:08:47,514 INFO L704 BuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2021-12-28 09:08:47,514 INFO L587 BuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2021-12-28 09:08:47,514 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-12-28 09:08:47,514 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2021-12-28 09:08:47,515 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-12-28 09:08:47,515 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:47,515 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:47,515 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:47,516 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-12-28 09:08:47,516 INFO L791 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 33#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 34#L549-3 [2021-12-28 09:08:47,516 INFO L793 eck$LassoCheckResult]: Loop: 34#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 34#L549-3 [2021-12-28 09:08:47,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,517 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2021-12-28 09:08:47,517 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,517 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005302451] [2021-12-28 09:08:47,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,518 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,543 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:47,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,554 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:47,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,555 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2021-12-28 09:08:47,555 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,555 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643874983] [2021-12-28 09:08:47,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,556 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:47,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:47,602 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:47,602 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643874983] [2021-12-28 09:08:47,603 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1643874983] provided 1 perfect and 0 imperfect interpolant sequences [2021-12-28 09:08:47,603 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-12-28 09:08:47,604 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-12-28 09:08:47,604 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665178076] [2021-12-28 09:08:47,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-12-28 09:08:47,605 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:47,605 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:47,605 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-12-28 09:08:47,606 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-12-28 09:08:47,606 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:47,637 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2021-12-28 09:08:47,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-12-28 09:08:47,638 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2021-12-28 09:08:47,638 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2021-12-28 09:08:47,639 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2021-12-28 09:08:47,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2021-12-28 09:08:47,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2021-12-28 09:08:47,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2021-12-28 09:08:47,640 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:47,640 INFO L681 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-28 09:08:47,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2021-12-28 09:08:47,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2021-12-28 09:08:47,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2021-12-28 09:08:47,641 INFO L704 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-28 09:08:47,642 INFO L587 BuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2021-12-28 09:08:47,642 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-12-28 09:08:47,642 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2021-12-28 09:08:47,642 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2021-12-28 09:08:47,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:47,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:47,643 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:47,643 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2021-12-28 09:08:47,643 INFO L791 eck$LassoCheckResult]: Stem: 57#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 58#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 59#L549-3 [2021-12-28 09:08:47,643 INFO L793 eck$LassoCheckResult]: Loop: 59#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 60#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 61#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 59#L549-3 [2021-12-28 09:08:47,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,644 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2021-12-28 09:08:47,644 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,644 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081633910] [2021-12-28 09:08:47,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,645 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,655 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:47,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:47,667 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:47,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:47,668 INFO L85 PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times [2021-12-28 09:08:47,668 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:47,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956197028] [2021-12-28 09:08:47,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,668 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:47,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:47,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:47,732 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:47,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956197028] [2021-12-28 09:08:47,733 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1956197028] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:08:47,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1624316115] [2021-12-28 09:08:47,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:47,733 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:08:47,734 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:47,743 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:08:47,747 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-12-28 09:08:47,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:47,791 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core [2021-12-28 09:08:47,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-28 09:08:47,852 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-28 09:08:47,892 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:47,903 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-28 09:08:47,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:47,908 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-28 09:08:47,957 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:47,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1624316115] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-28 09:08:47,957 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-28 09:08:47,958 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2021-12-28 09:08:47,958 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2051641048] [2021-12-28 09:08:47,958 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-28 09:08:47,958 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:47,958 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:47,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-12-28 09:08:47,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2021-12-28 09:08:47,959 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:47,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:47,998 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2021-12-28 09:08:47,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-12-28 09:08:47,999 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2021-12-28 09:08:48,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2021-12-28 09:08:48,003 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2021-12-28 09:08:48,003 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2021-12-28 09:08:48,003 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2021-12-28 09:08:48,003 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2021-12-28 09:08:48,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:48,003 INFO L681 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-28 09:08:48,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2021-12-28 09:08:48,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2021-12-28 09:08:48,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:48,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2021-12-28 09:08:48,005 INFO L704 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-28 09:08:48,005 INFO L587 BuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2021-12-28 09:08:48,005 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-12-28 09:08:48,005 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2021-12-28 09:08:48,005 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2021-12-28 09:08:48,005 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:48,006 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:48,006 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:48,006 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2021-12-28 09:08:48,006 INFO L791 eck$LassoCheckResult]: Stem: 136#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 138#L549-3 [2021-12-28 09:08:48,006 INFO L793 eck$LassoCheckResult]: Loop: 138#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 140#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 141#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 138#L549-3 [2021-12-28 09:08:48,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:48,007 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2021-12-28 09:08:48,007 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:48,010 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379233098] [2021-12-28 09:08:48,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:48,010 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:48,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:48,016 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:48,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:48,030 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:48,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:48,031 INFO L85 PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times [2021-12-28 09:08:48,031 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:48,031 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951897560] [2021-12-28 09:08:48,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:48,032 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:48,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:48,164 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:48,164 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:48,164 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951897560] [2021-12-28 09:08:48,164 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1951897560] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:08:48,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1723967745] [2021-12-28 09:08:48,165 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-12-28 09:08:48,165 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:08:48,165 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:48,167 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:08:48,168 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-12-28 09:08:48,215 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-12-28 09:08:48,216 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-28 09:08:48,217 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 17 conjunts are in the unsatisfiable core [2021-12-28 09:08:48,219 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-28 09:08:48,228 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-28 09:08:48,248 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:48,266 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:48,292 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:48,321 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:48,328 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-28 09:08:48,333 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:48,334 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-28 09:08:48,424 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:48,424 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1723967745] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-28 09:08:48,424 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-28 09:08:48,424 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2021-12-28 09:08:48,424 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507948721] [2021-12-28 09:08:48,425 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-28 09:08:48,425 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:48,425 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:48,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-12-28 09:08:48,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=202, Unknown=0, NotChecked=0, Total=342 [2021-12-28 09:08:48,426 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 19 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:48,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:48,539 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2021-12-28 09:08:48,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-12-28 09:08:48,540 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2021-12-28 09:08:48,543 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2021-12-28 09:08:48,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2021-12-28 09:08:48,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2021-12-28 09:08:48,546 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2021-12-28 09:08:48,546 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2021-12-28 09:08:48,547 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:48,547 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-28 09:08:48,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2021-12-28 09:08:48,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2021-12-28 09:08:48,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:48,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2021-12-28 09:08:48,549 INFO L704 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-28 09:08:48,549 INFO L587 BuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2021-12-28 09:08:48,549 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-12-28 09:08:48,549 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2021-12-28 09:08:48,550 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2021-12-28 09:08:48,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:48,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:48,550 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:48,550 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2021-12-28 09:08:48,550 INFO L791 eck$LassoCheckResult]: Stem: 284#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 285#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 286#L549-3 [2021-12-28 09:08:48,551 INFO L793 eck$LassoCheckResult]: Loop: 286#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 282#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 283#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 287#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 288#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 289#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 308#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 307#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 306#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 305#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 304#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 303#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 302#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 301#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 300#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 299#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 298#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 297#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 296#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 295#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 294#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 293#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 292#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 291#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 290#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 286#L549-3 [2021-12-28 09:08:48,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:48,551 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2021-12-28 09:08:48,551 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:48,551 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648604840] [2021-12-28 09:08:48,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:48,552 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:48,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:48,557 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:48,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:48,563 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:48,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:48,563 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times [2021-12-28 09:08:48,563 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:48,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2147085310] [2021-12-28 09:08:48,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:48,564 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:48,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:48,880 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:48,881 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:48,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2147085310] [2021-12-28 09:08:48,881 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2147085310] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:08:48,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1262182736] [2021-12-28 09:08:48,881 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-12-28 09:08:48,881 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:08:48,882 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:48,883 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:08:48,925 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-12-28 09:08:49,028 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2021-12-28 09:08:49,028 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-28 09:08:49,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 35 conjunts are in the unsatisfiable core [2021-12-28 09:08:49,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-28 09:08:49,053 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-28 09:08:49,063 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,074 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,085 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,096 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,107 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,117 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,128 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,138 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,148 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,161 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:49,168 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-28 09:08:49,172 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:49,172 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-28 09:08:49,413 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:49,413 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1262182736] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-28 09:08:49,413 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-28 09:08:49,413 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 36 [2021-12-28 09:08:49,413 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430776183] [2021-12-28 09:08:49,414 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-28 09:08:49,414 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:49,414 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:49,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-12-28 09:08:49,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=541, Invalid=719, Unknown=0, NotChecked=0, Total=1260 [2021-12-28 09:08:49,415 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 36 states, 36 states have (on average 1.8888888888888888) internal successors, (68), 36 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:49,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:49,678 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2021-12-28 09:08:49,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-12-28 09:08:49,679 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2021-12-28 09:08:49,680 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2021-12-28 09:08:49,681 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2021-12-28 09:08:49,681 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2021-12-28 09:08:49,681 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2021-12-28 09:08:49,681 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2021-12-28 09:08:49,681 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:49,681 INFO L681 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-28 09:08:49,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2021-12-28 09:08:49,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2021-12-28 09:08:49,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:49,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2021-12-28 09:08:49,684 INFO L704 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-28 09:08:49,684 INFO L587 BuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2021-12-28 09:08:49,684 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-12-28 09:08:49,684 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2021-12-28 09:08:49,684 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2021-12-28 09:08:49,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:49,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:49,685 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:49,685 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2021-12-28 09:08:49,685 INFO L791 eck$LassoCheckResult]: Stem: 569#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 570#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 571#L549-3 [2021-12-28 09:08:49,685 INFO L793 eck$LassoCheckResult]: Loop: 571#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 567#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 568#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 574#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 572#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 573#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 617#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 616#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 615#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 614#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 613#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 612#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 611#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 610#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 609#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 608#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 607#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 606#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 605#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 604#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 603#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 602#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 601#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 600#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 599#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 598#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 597#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 596#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 595#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 594#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 593#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 592#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 591#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 590#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 589#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 588#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 587#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 586#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 585#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 584#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 583#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 582#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 581#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 580#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 579#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 578#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 577#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 576#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 575#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 571#L549-3 [2021-12-28 09:08:49,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:49,685 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2021-12-28 09:08:49,686 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:49,686 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [746373920] [2021-12-28 09:08:49,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:49,686 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:49,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:49,692 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:49,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:49,696 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:49,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:49,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times [2021-12-28 09:08:49,699 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:49,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349055306] [2021-12-28 09:08:49,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:49,699 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:49,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:50,452 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:50,452 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:50,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349055306] [2021-12-28 09:08:50,452 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349055306] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:08:50,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [453633559] [2021-12-28 09:08:50,452 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-12-28 09:08:50,452 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:08:50,452 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:50,454 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:08:50,455 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-12-28 09:08:50,715 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-12-28 09:08:50,715 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-28 09:08:50,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 71 conjunts are in the unsatisfiable core [2021-12-28 09:08:50,725 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-28 09:08:50,735 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-28 09:08:50,765 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,778 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,793 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,819 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,831 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,841 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,850 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,861 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,873 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,881 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,890 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,902 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,928 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,937 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,946 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,954 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,963 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,984 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:50,993 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:51,001 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:51,011 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:51,021 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:08:51,027 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-28 09:08:51,030 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:51,030 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-28 09:08:51,727 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:51,727 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [453633559] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-28 09:08:51,727 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-28 09:08:51,727 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 73 [2021-12-28 09:08:51,727 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1742770193] [2021-12-28 09:08:51,727 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-28 09:08:51,728 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:08:51,728 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:08:51,729 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2021-12-28 09:08:51,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2282, Invalid=2974, Unknown=0, NotChecked=0, Total=5256 [2021-12-28 09:08:51,730 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 73 states, 73 states have (on average 1.9315068493150684) internal successors, (141), 73 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:52,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:08:52,452 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2021-12-28 09:08:52,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2021-12-28 09:08:52,453 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2021-12-28 09:08:52,454 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2021-12-28 09:08:52,455 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2021-12-28 09:08:52,455 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2021-12-28 09:08:52,455 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2021-12-28 09:08:52,455 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2021-12-28 09:08:52,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:08:52,456 INFO L681 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-28 09:08:52,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2021-12-28 09:08:52,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2021-12-28 09:08:52,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:08:52,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2021-12-28 09:08:52,459 INFO L704 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-28 09:08:52,459 INFO L587 BuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2021-12-28 09:08:52,459 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-12-28 09:08:52,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2021-12-28 09:08:52,460 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2021-12-28 09:08:52,460 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:08:52,460 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:08:52,461 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:08:52,461 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2021-12-28 09:08:52,461 INFO L791 eck$LassoCheckResult]: Stem: 1131#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1132#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1133#L549-3 [2021-12-28 09:08:52,461 INFO L793 eck$LassoCheckResult]: Loop: 1133#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1129#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1130#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1136#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1134#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1135#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1227#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1226#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1225#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1224#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1223#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1222#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1221#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1220#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1219#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1218#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1217#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1216#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1215#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1214#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1213#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1212#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1211#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1210#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1209#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1208#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1207#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1206#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1205#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1204#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1203#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1202#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1201#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1200#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1199#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1198#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1197#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1196#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1195#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1194#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1193#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1192#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1191#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1190#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1189#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1188#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1187#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1186#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1185#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1184#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1183#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1182#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1181#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1180#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1179#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1178#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1177#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1176#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1175#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1174#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1173#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1172#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1171#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1170#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1169#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1168#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1167#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1166#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1165#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1164#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1163#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1162#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1161#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1160#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1159#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1158#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1157#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1156#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1155#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1154#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1153#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1152#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1151#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1150#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1149#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1148#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1147#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1146#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1145#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1144#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1143#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1142#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1141#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1140#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1139#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1138#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1137#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1133#L549-3 [2021-12-28 09:08:52,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:52,462 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2021-12-28 09:08:52,462 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:52,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220104766] [2021-12-28 09:08:52,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:52,462 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:52,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:52,467 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:08:52,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:08:52,470 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:08:52,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:08:52,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times [2021-12-28 09:08:52,470 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:08:52,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649446855] [2021-12-28 09:08:52,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:08:52,471 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:08:52,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:08:54,644 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:08:54,644 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:08:54,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649446855] [2021-12-28 09:08:54,644 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1649446855] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:08:54,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [632382912] [2021-12-28 09:08:54,644 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-12-28 09:08:54,644 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:08:54,644 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:08:54,646 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:08:54,646 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-12-28 09:09:02,589 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2021-12-28 09:09:02,590 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-12-28 09:09:02,606 INFO L263 TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 143 conjunts are in the unsatisfiable core [2021-12-28 09:09:02,620 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-12-28 09:09:02,626 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-12-28 09:09:02,651 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,661 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,675 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,687 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,695 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,708 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,719 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,730 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,749 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,757 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,768 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,775 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,783 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,794 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,804 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,812 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,825 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,833 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,841 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,848 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,856 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,864 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,871 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,879 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,889 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,896 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,904 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,911 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,918 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,925 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,932 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,938 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,947 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,954 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,962 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,969 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,977 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,985 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:02,992 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,000 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,009 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,023 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,039 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,048 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,055 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,063 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2021-12-28 09:09:03,070 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-12-28 09:09:03,074 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:09:03,074 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-12-28 09:09:05,377 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:09:05,377 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [632382912] provided 0 perfect and 2 imperfect interpolant sequences [2021-12-28 09:09:05,377 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-12-28 09:09:05,377 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 50, 50] total 145 [2021-12-28 09:09:05,377 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770562944] [2021-12-28 09:09:05,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-12-28 09:09:05,378 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-12-28 09:09:05,378 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-12-28 09:09:05,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 145 interpolants. [2021-12-28 09:09:05,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9170, Invalid=11710, Unknown=0, NotChecked=0, Total=20880 [2021-12-28 09:09:05,385 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 145 states, 145 states have (on average 1.9655172413793103) internal successors, (285), 145 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:09:07,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-12-28 09:09:07,712 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2021-12-28 09:09:07,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2021-12-28 09:09:07,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2021-12-28 09:09:07,714 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2021-12-28 09:09:07,715 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2021-12-28 09:09:07,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2021-12-28 09:09:07,715 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2021-12-28 09:09:07,715 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2021-12-28 09:09:07,716 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-12-28 09:09:07,716 INFO L681 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-28 09:09:07,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2021-12-28 09:09:07,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2021-12-28 09:09:07,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-12-28 09:09:07,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2021-12-28 09:09:07,724 INFO L704 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-28 09:09:07,724 INFO L587 BuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2021-12-28 09:09:07,724 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-12-28 09:09:07,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2021-12-28 09:09:07,725 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2021-12-28 09:09:07,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-12-28 09:09:07,725 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-12-28 09:09:07,726 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-12-28 09:09:07,726 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1] [2021-12-28 09:09:07,726 INFO L791 eck$LassoCheckResult]: Stem: 2245#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2246#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2247#L549-3 [2021-12-28 09:09:07,726 INFO L793 eck$LassoCheckResult]: Loop: 2247#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2243#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2244#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2250#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2248#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2249#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2437#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2436#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2435#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2434#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2433#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2432#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2431#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2430#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2429#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2428#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2427#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2426#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2425#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2424#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2423#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2422#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2421#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2420#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2419#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2418#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2417#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2416#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2415#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2414#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2413#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2412#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2411#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2410#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2409#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2408#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2407#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2406#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2405#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2404#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2403#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2402#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2401#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2400#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2399#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2398#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2397#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2396#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2395#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2394#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2393#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2392#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2391#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2390#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2389#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2388#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2387#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2386#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2385#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2384#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2383#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2382#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2381#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2380#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2379#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2378#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2377#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2376#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2375#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2374#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2373#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2372#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2371#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2370#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2369#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2368#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2367#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2366#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2365#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2364#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2363#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2362#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2361#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2360#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2359#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2358#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2357#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2356#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2355#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2354#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2353#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2352#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2351#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2350#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2349#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2348#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2347#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2346#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2345#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2344#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2343#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2342#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2341#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2340#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2339#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2338#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2337#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2336#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2335#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2334#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2333#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2332#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2331#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2330#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2329#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2328#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2327#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2325#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2323#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2321#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2319#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2317#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2315#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2313#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2311#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2309#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2307#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2305#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2303#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2301#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2299#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2297#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2295#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2293#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2291#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2290#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2289#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2288#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2287#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2285#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2283#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2282#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2281#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2280#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2279#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2278#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2277#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2276#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2275#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2274#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2273#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2272#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2271#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2270#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2269#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2268#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2267#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2266#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2265#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2264#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2263#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2262#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2261#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2260#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2259#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2258#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2257#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2256#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2255#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2254#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2253#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2252#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2251#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2247#L549-3 [2021-12-28 09:09:07,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:09:07,727 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2021-12-28 09:09:07,727 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:09:07,727 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389654495] [2021-12-28 09:09:07,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:09:07,727 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:09:07,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:09:07,731 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-12-28 09:09:07,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-12-28 09:09:07,734 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-12-28 09:09:07,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-12-28 09:09:07,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1384860837, now seen corresponding path program 6 times [2021-12-28 09:09:07,734 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-12-28 09:09:07,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053451260] [2021-12-28 09:09:07,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-12-28 09:09:07,734 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-12-28 09:09:07,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-12-28 09:09:14,932 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-12-28 09:09:14,932 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-12-28 09:09:14,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053451260] [2021-12-28 09:09:14,932 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2053451260] provided 0 perfect and 1 imperfect interpolant sequences [2021-12-28 09:09:14,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [720079858] [2021-12-28 09:09:14,933 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-12-28 09:09:14,933 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-12-28 09:09:14,933 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-12-28 09:09:14,972 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-12-28 09:09:14,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process