./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-ext/31_simple_loop5_vs.i --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for ERROR reachability
Using default analysis
Version 7b2dab56
Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-ext/31_simple_loop5_vs.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b5ec22ab-ff02-4197-bfc7-42ddb0979a56/bin/utaipan-WLngWcDbfI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 98bb8bab8344002025ffbce3428f833c05650599
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................