./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/float-benchs/divmul_buf_diverge.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG/config/TaipanReach.xml -i ../../sv-benchmarks/c/float-benchs/divmul_buf_diverge.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8e4e4895-d07e-4b75-a00e-d4a2d99f9517/bin/utaipan-SDwSMHVbGG --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8967c0a6dd6f26859048ef07f7346401bdb19327ee452e685df9b5c4b7492d34 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................