./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread/fib_unsafe-7.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 9ad7fb26 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread/fib_unsafe-7.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a938b9e3b803ef0b08d2618a78ac055be54a6e48f84c6853aab11e3467af8157 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-9ad7fb2 [2021-11-03 05:24:09,820 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-03 05:24:09,822 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-03 05:24:09,878 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-03 05:24:09,879 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-03 05:24:09,880 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-03 05:24:09,881 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-03 05:24:09,884 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-03 05:24:09,886 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-03 05:24:09,887 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-03 05:24:09,889 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-03 05:24:09,890 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-03 05:24:09,891 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-03 05:24:09,892 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-03 05:24:09,894 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-03 05:24:09,896 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-03 05:24:09,897 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-03 05:24:09,905 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-03 05:24:09,908 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-03 05:24:09,913 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-03 05:24:09,920 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-03 05:24:09,926 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-03 05:24:09,928 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-03 05:24:09,933 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-03 05:24:09,937 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-03 05:24:09,937 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-03 05:24:09,938 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-03 05:24:09,939 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-03 05:24:09,939 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-03 05:24:09,941 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-03 05:24:09,941 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-03 05:24:09,942 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-03 05:24:09,943 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-03 05:24:09,944 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-03 05:24:09,945 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-03 05:24:09,946 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-03 05:24:09,947 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-03 05:24:09,947 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-03 05:24:09,947 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-03 05:24:09,949 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-03 05:24:09,950 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-03 05:24:09,951 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-03 05:24:09,985 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-03 05:24:09,988 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-03 05:24:09,990 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-03 05:24:09,990 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-03 05:24:09,991 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-03 05:24:09,991 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-03 05:24:09,991 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-03 05:24:09,991 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-03 05:24:09,998 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-03 05:24:09,998 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-03 05:24:09,999 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-03 05:24:09,999 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-03 05:24:10,000 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-03 05:24:10,000 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-03 05:24:10,000 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2021-11-03 05:24:10,001 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-03 05:24:10,001 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-03 05:24:10,001 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-03 05:24:10,002 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-03 05:24:10,002 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-03 05:24:10,002 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-03 05:24:10,002 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-03 05:24:10,002 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-03 05:24:10,003 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2021-11-03 05:24:10,003 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-03 05:24:10,003 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-03 05:24:10,003 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-03 05:24:10,004 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-03 05:24:10,004 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-03 05:24:10,004 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-03 05:24:10,004 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-03 05:24:10,005 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-03 05:24:10,005 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-03 05:24:10,005 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-03 05:24:10,005 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-03 05:24:10,006 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-03 05:24:10,006 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-03 05:24:10,006 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-03 05:24:10,006 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-03 05:24:10,007 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a938b9e3b803ef0b08d2618a78ac055be54a6e48f84c6853aab11e3467af8157 [2021-11-03 05:24:10,251 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-03 05:24:10,271 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-03 05:24:10,274 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-03 05:24:10,275 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-03 05:24:10,276 INFO L275 PluginConnector]: CDTParser initialized [2021-11-03 05:24:10,277 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/../../sv-benchmarks/c/pthread/fib_unsafe-7.i [2021-11-03 05:24:10,357 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/67be7e3ee/70534204560c4721813374b5cd1184cf/FLAG366ffa1a1 [2021-11-03 05:24:10,875 INFO L306 CDTParser]: Found 1 translation units. [2021-11-03 05:24:10,876 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i [2021-11-03 05:24:10,889 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/67be7e3ee/70534204560c4721813374b5cd1184cf/FLAG366ffa1a1 [2021-11-03 05:24:11,192 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/67be7e3ee/70534204560c4721813374b5cd1184cf [2021-11-03 05:24:11,195 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-03 05:24:11,196 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-03 05:24:11,201 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-03 05:24:11,202 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-03 05:24:11,205 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-03 05:24:11,206 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,208 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f3784ee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11, skipping insertion in model container [2021-11-03 05:24:11,208 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,216 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-03 05:24:11,269 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-03 05:24:11,702 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i[30811,30824] [2021-11-03 05:24:11,707 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-03 05:24:11,719 INFO L203 MainTranslator]: Completed pre-run [2021-11-03 05:24:11,783 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i[30811,30824] [2021-11-03 05:24:11,794 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-03 05:24:11,839 INFO L208 MainTranslator]: Completed translation [2021-11-03 05:24:11,839 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11 WrapperNode [2021-11-03 05:24:11,839 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-03 05:24:11,841 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-03 05:24:11,841 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-03 05:24:11,841 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-03 05:24:11,849 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,862 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,883 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-03 05:24:11,884 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-03 05:24:11,884 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-03 05:24:11,884 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-03 05:24:11,893 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,893 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,896 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,896 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,902 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,906 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,908 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,911 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-03 05:24:11,912 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-03 05:24:11,912 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-03 05:24:11,924 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-03 05:24:11,925 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (1/1) ... [2021-11-03 05:24:11,932 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-03 05:24:11,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:24:11,961 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-03 05:24:11,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-03 05:24:12,014 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2021-11-03 05:24:12,014 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2021-11-03 05:24:12,016 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2021-11-03 05:24:12,016 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2021-11-03 05:24:12,016 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-03 05:24:12,016 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-11-03 05:24:12,017 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-03 05:24:12,017 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-03 05:24:12,017 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-03 05:24:12,017 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-11-03 05:24:12,017 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-03 05:24:12,017 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-03 05:24:12,019 WARN L209 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-11-03 05:24:12,349 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-03 05:24:12,349 INFO L299 CfgBuilder]: Removed 9 assume(true) statements. [2021-11-03 05:24:12,351 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 05:24:12 BoogieIcfgContainer [2021-11-03 05:24:12,351 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-03 05:24:12,353 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-03 05:24:12,353 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-03 05:24:12,367 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-03 05:24:12,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 05:24:11" (1/3) ... [2021-11-03 05:24:12,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e8abed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 05:24:12, skipping insertion in model container [2021-11-03 05:24:12,369 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:24:11" (2/3) ... [2021-11-03 05:24:12,369 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3e8abed5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 05:24:12, skipping insertion in model container [2021-11-03 05:24:12,369 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 05:24:12" (3/3) ... [2021-11-03 05:24:12,370 INFO L111 eAbstractionObserver]: Analyzing ICFG fib_unsafe-7.i [2021-11-03 05:24:12,376 WARN L149 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-11-03 05:24:12,376 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-03 05:24:12,376 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-03 05:24:12,376 INFO L513 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-11-03 05:24:12,404 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,404 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,404 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,404 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,404 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,405 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,405 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,405 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,405 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,405 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,406 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,406 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,406 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,406 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,407 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,407 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,407 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,407 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,408 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,409 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,409 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,409 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,409 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,410 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,410 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,410 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,410 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,410 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,411 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,411 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,414 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,414 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,414 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,415 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,415 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,419 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,420 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,420 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,420 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,420 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:24:12,422 INFO L148 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-11-03 05:24:12,466 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-03 05:24:12,471 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-03 05:24:12,471 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-11-03 05:24:12,486 INFO L118 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2021-11-03 05:24:12,496 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 90 places, 90 transitions, 190 flow [2021-11-03 05:24:12,499 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 90 places, 90 transitions, 190 flow [2021-11-03 05:24:12,501 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 90 places, 90 transitions, 190 flow [2021-11-03 05:24:12,550 INFO L129 PetriNetUnfolder]: 7/88 cut-off events. [2021-11-03 05:24:12,551 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2021-11-03 05:24:12,556 INFO L84 FinitePrefix]: Finished finitePrefix Result has 95 conditions, 88 events. 7/88 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 79 event pairs, 0 based on Foata normal form. 0/80 useless extension candidates. Maximal degree in co-relation 61. Up to 2 conditions per place. [2021-11-03 05:24:12,559 INFO L116 LiptonReduction]: Number of co-enabled transitions 1738 [2021-11-03 05:24:16,376 INFO L131 LiptonReduction]: Checked pairs total: 1312 [2021-11-03 05:24:16,376 INFO L133 LiptonReduction]: Total number of compositions: 83 [2021-11-03 05:24:16,388 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 20 places, 16 transitions, 42 flow [2021-11-03 05:24:16,399 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:16,401 INFO L276 IsEmpty]: Start isEmpty. Operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:16,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-11-03 05:24:16,405 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:24:16,406 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-11-03 05:24:16,407 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:24:16,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:24:16,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1657331388, now seen corresponding path program 1 times [2021-11-03 05:24:16,420 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-03 05:24:16,421 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081656521] [2021-11-03 05:24:16,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:16,422 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-03 05:24:16,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:16,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:16,635 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-03 05:24:16,636 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081656521] [2021-11-03 05:24:16,636 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1081656521] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-03 05:24:16,638 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-03 05:24:16,638 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-03 05:24:16,640 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536450026] [2021-11-03 05:24:16,654 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-03 05:24:16,657 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-03 05:24:16,673 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-03 05:24:16,674 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-03 05:24:16,676 INFO L87 Difference]: Start difference. First operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:16,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:24:16,707 INFO L93 Difference]: Finished difference Result 44 states and 122 transitions. [2021-11-03 05:24:16,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-03 05:24:16,709 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-11-03 05:24:16,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:24:16,727 INFO L225 Difference]: With dead ends: 44 [2021-11-03 05:24:16,727 INFO L226 Difference]: Without dead ends: 44 [2021-11-03 05:24:16,729 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-03 05:24:16,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2021-11-03 05:24:16,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2021-11-03 05:24:16,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 2.8372093023255816) internal successors, (122), 43 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:16,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 122 transitions. [2021-11-03 05:24:16,770 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 122 transitions. Word has length 6 [2021-11-03 05:24:16,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:24:16,772 INFO L470 AbstractCegarLoop]: Abstraction has 44 states and 122 transitions. [2021-11-03 05:24:16,772 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:16,773 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 122 transitions. [2021-11-03 05:24:16,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2021-11-03 05:24:16,774 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:24:16,774 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-03 05:24:16,775 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-03 05:24:16,775 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:24:16,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:24:16,776 INFO L85 PathProgramCache]: Analyzing trace with hash -162334149, now seen corresponding path program 1 times [2021-11-03 05:24:16,776 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-03 05:24:16,776 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187689046] [2021-11-03 05:24:16,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:16,777 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-03 05:24:16,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:16,862 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:16,862 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-03 05:24:16,863 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187689046] [2021-11-03 05:24:16,863 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1187689046] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-03 05:24:16,864 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [573886332] [2021-11-03 05:24:16,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:16,865 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:16,865 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:24:16,873 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:24:16,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-03 05:24:16,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:16,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-03 05:24:16,972 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:24:17,017 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:17,018 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:24:17,062 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:17,062 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [573886332] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:24:17,063 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1758244527] [2021-11-03 05:24:17,069 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-03 05:24:17,086 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2021-11-03 05:24:17,086 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2021-11-03 05:24:17,087 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416698885] [2021-11-03 05:24:17,087 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-11-03 05:24:17,087 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-03 05:24:17,088 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-11-03 05:24:17,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-03 05:24:17,088 INFO L87 Difference]: Start difference. First operand 44 states and 122 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:24:17,109 INFO L93 Difference]: Finished difference Result 71 states and 203 transitions. [2021-11-03 05:24:17,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-11-03 05:24:17,110 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2021-11-03 05:24:17,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:24:17,112 INFO L225 Difference]: With dead ends: 71 [2021-11-03 05:24:17,112 INFO L226 Difference]: Without dead ends: 71 [2021-11-03 05:24:17,113 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-03 05:24:17,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2021-11-03 05:24:17,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2021-11-03 05:24:17,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 70 states have (on average 2.9) internal successors, (203), 70 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 203 transitions. [2021-11-03 05:24:17,124 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 203 transitions. Word has length 7 [2021-11-03 05:24:17,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:24:17,125 INFO L470 AbstractCegarLoop]: Abstraction has 71 states and 203 transitions. [2021-11-03 05:24:17,125 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,125 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 203 transitions. [2021-11-03 05:24:17,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2021-11-03 05:24:17,126 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:24:17,127 INFO L513 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2021-11-03 05:24:17,177 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-11-03 05:24:17,348 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2021-11-03 05:24:17,348 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:24:17,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:24:17,349 INFO L85 PathProgramCache]: Analyzing trace with hash 36914812, now seen corresponding path program 2 times [2021-11-03 05:24:17,349 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-03 05:24:17,349 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1367283609] [2021-11-03 05:24:17,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:17,350 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-03 05:24:17,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:17,481 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:17,481 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-03 05:24:17,481 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1367283609] [2021-11-03 05:24:17,482 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1367283609] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-03 05:24:17,483 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [339184823] [2021-11-03 05:24:17,483 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-03 05:24:17,483 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:17,483 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:24:17,489 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:24:17,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-03 05:24:17,569 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-11-03 05:24:17,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:24:17,570 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 6 conjunts are in the unsatisfiable core [2021-11-03 05:24:17,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:24:17,612 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:17,612 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:24:17,695 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:17,695 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [339184823] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:24:17,696 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1925505697] [2021-11-03 05:24:17,696 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-03 05:24:17,697 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2021-11-03 05:24:17,699 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2021-11-03 05:24:17,699 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578620312] [2021-11-03 05:24:17,700 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-11-03 05:24:17,702 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-03 05:24:17,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-11-03 05:24:17,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-03 05:24:17,704 INFO L87 Difference]: Start difference. First operand 71 states and 203 transitions. Second operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:24:17,769 INFO L93 Difference]: Finished difference Result 125 states and 365 transitions. [2021-11-03 05:24:17,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-03 05:24:17,770 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2021-11-03 05:24:17,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:24:17,773 INFO L225 Difference]: With dead ends: 125 [2021-11-03 05:24:17,777 INFO L226 Difference]: Without dead ends: 125 [2021-11-03 05:24:17,777 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-03 05:24:17,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2021-11-03 05:24:17,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2021-11-03 05:24:17,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 124 states have (on average 2.943548387096774) internal successors, (365), 124 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 365 transitions. [2021-11-03 05:24:17,811 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 365 transitions. Word has length 10 [2021-11-03 05:24:17,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:24:17,811 INFO L470 AbstractCegarLoop]: Abstraction has 125 states and 365 transitions. [2021-11-03 05:24:17,812 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:17,812 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 365 transitions. [2021-11-03 05:24:17,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2021-11-03 05:24:17,816 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:24:17,816 INFO L513 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2021-11-03 05:24:17,850 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-11-03 05:24:18,040 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:18,041 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:24:18,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:24:18,041 INFO L85 PathProgramCache]: Analyzing trace with hash 2028559900, now seen corresponding path program 3 times [2021-11-03 05:24:18,042 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-03 05:24:18,042 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185492143] [2021-11-03 05:24:18,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:18,042 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-03 05:24:18,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:18,215 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:18,215 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-03 05:24:18,215 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185492143] [2021-11-03 05:24:18,216 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185492143] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-03 05:24:18,216 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1484126934] [2021-11-03 05:24:18,216 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-03 05:24:18,216 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:18,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:24:18,221 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:24:18,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-03 05:24:18,322 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-03 05:24:18,322 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:24:18,323 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 12 conjunts are in the unsatisfiable core [2021-11-03 05:24:18,325 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:24:18,402 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:18,403 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:24:18,559 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:18,559 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1484126934] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:24:18,559 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1356641239] [2021-11-03 05:24:18,560 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-03 05:24:18,560 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2021-11-03 05:24:18,560 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 18 [2021-11-03 05:24:18,561 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809942236] [2021-11-03 05:24:18,562 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2021-11-03 05:24:18,562 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-03 05:24:18,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-11-03 05:24:18,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2021-11-03 05:24:18,567 INFO L87 Difference]: Start difference. First operand 125 states and 365 transitions. Second operand has 19 states, 18 states have (on average 1.3888888888888888) internal successors, (25), 19 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:18,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:24:18,654 INFO L93 Difference]: Finished difference Result 179 states and 527 transitions. [2021-11-03 05:24:18,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-11-03 05:24:18,654 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.3888888888888888) internal successors, (25), 19 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2021-11-03 05:24:18,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:24:18,657 INFO L225 Difference]: With dead ends: 179 [2021-11-03 05:24:18,658 INFO L226 Difference]: Without dead ends: 179 [2021-11-03 05:24:18,658 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2021-11-03 05:24:18,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2021-11-03 05:24:18,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2021-11-03 05:24:18,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 178 states have (on average 2.960674157303371) internal successors, (527), 178 states have internal predecessors, (527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:18,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 527 transitions. [2021-11-03 05:24:18,677 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 527 transitions. Word has length 16 [2021-11-03 05:24:18,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:24:18,677 INFO L470 AbstractCegarLoop]: Abstraction has 179 states and 527 transitions. [2021-11-03 05:24:18,677 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.3888888888888888) internal successors, (25), 19 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:24:18,677 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 527 transitions. [2021-11-03 05:24:18,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2021-11-03 05:24:18,680 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:24:18,680 INFO L513 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1] [2021-11-03 05:24:18,716 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-11-03 05:24:18,903 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:18,903 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:24:18,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:24:18,904 INFO L85 PathProgramCache]: Analyzing trace with hash 1314340284, now seen corresponding path program 4 times [2021-11-03 05:24:18,904 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-03 05:24:18,904 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854412189] [2021-11-03 05:24:18,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:24:18,904 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-03 05:24:19,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:19,452 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:19,452 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-03 05:24:19,453 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854412189] [2021-11-03 05:24:19,453 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1854412189] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-03 05:24:19,453 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1771986332] [2021-11-03 05:24:19,453 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-03 05:24:19,453 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:24:19,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:24:19,455 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:24:19,480 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-03 05:24:19,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:24:19,571 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-03 05:24:19,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:24:20,599 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 105 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:24:20,600 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:26:47,111 WARN L207 SmtUtils]: Spent 36.40 s on a formula simplification that was a NOOP. DAG size: 58 [2021-11-03 05:26:51,984 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:26:51,985 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1771986332] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:26:51,985 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1225078100] [2021-11-03 05:26:51,985 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-03 05:26:51,987 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2021-11-03 05:26:51,987 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 51 [2021-11-03 05:26:51,987 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756885653] [2021-11-03 05:26:51,988 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2021-11-03 05:26:51,988 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-03 05:26:51,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2021-11-03 05:26:51,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=492, Invalid=2233, Unknown=31, NotChecked=0, Total=2756 [2021-11-03 05:26:51,993 INFO L87 Difference]: Start difference. First operand 179 states and 527 transitions. Second operand has 53 states, 52 states have (on average 1.2692307692307692) internal successors, (66), 52 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:26:54,891 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (+ c_~prev~0 c_~cur~0 1)) (.cse10 (* c_~j~0 (- 1))) (.cse13 (* c_~i~0 (- 1))) (.cse16 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse0 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse0 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse9 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse9 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse9 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse10 (- 1) c_~cur~0) (- 2)) .cse11) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse12 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse12 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse12 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse13 c_~cur~0) (- 2)) .cse11) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse15 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse15 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse15 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse10 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse16) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse13 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse16) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse21 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))))) is different from false [2021-11-03 05:28:46,213 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse23 (* 2 c_~cur~0))) (let ((.cse11 (+ c_~prev~0 c_~cur~0 1)) (.cse10 (* c_~j~0 (- 1))) (.cse17 (+ .cse23 c_~prev~0)) (.cse13 (* c_~i~0 (- 1))) (.cse16 (+ .cse23 c_~prev~0 1))) (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse0 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse0 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse9 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse9 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse9 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse10 (- 1) c_~cur~0) (- 2)) .cse11) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse12 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse12 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse12 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse13 c_~cur~0) (- 2)) .cse11) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse15 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse15 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse15 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse10 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse16) (< c_~i~0 .cse17) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse17) (<= (div (+ .cse13 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse16) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse21 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse22 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse22 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse22 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:28:48,512 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse21 (* 2 c_~cur~0))) (let ((.cse9 (+ c_~prev~0 c_~cur~0 1)) (.cse8 (* c_~j~0 (- 1))) (.cse15 (+ .cse21 c_~prev~0)) (.cse11 (* c_~i~0 (- 1))) (.cse14 (+ .cse21 c_~prev~0 1))) (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse0 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse0 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse8 (- 1) c_~cur~0) (- 2)) .cse9) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse10 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse10 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse10 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse11 c_~cur~0) (- 2)) .cse9) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse12 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse12 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse12 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse13 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse8 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse14) (< c_~i~0 .cse15) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse16 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse16 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse16 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse15) (<= (div (+ .cse11 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse14) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse20 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:30:13,729 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse24 (* 2 c_~cur~0))) (let ((.cse12 (+ c_~prev~0 c_~cur~0 1)) (.cse11 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse18 (+ .cse24 c_~prev~0)) (.cse14 (* c_~i~0 (- 1))) (.cse17 (+ .cse24 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse9 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse9 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse9 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse10 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse10 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse10 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse11 (- 1) c_~cur~0) (- 2)) .cse12) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse13 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse14 c_~cur~0) (- 2)) .cse12) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse15 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse15 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse15 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse16 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse16 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse16 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse11 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse17) (< c_~i~0 .cse18) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse18) (<= (div (+ .cse14 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse17) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse21 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse22 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse22 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse22 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse23 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse23 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse23 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:30:16,333 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse22 (* 2 c_~cur~0))) (let ((.cse10 (+ c_~prev~0 c_~cur~0 1)) (.cse9 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse16 (+ .cse22 c_~prev~0)) (.cse12 (* c_~i~0 (- 1))) (.cse15 (+ .cse22 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse9 (- 1) c_~cur~0) (- 2)) .cse10) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse11 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse11 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse11 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse12 c_~cur~0) (- 2)) .cse10) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse13 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse9 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (< c_~i~0 .cse16) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse16) (<= (div (+ .cse12 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse21 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:30:32,318 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse20 (* 2 c_~cur~0))) (let ((.cse10 (+ c_~prev~0 c_~cur~0 1)) (.cse9 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse16 (+ .cse20 c_~prev~0)) (.cse12 (* c_~i~0 (- 1))) (.cse15 (+ .cse20 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse9 (- 1) c_~cur~0) (- 2)) .cse10) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse11 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse11 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse11 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse12 c_~cur~0) (- 2)) .cse10) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse13 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse9 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (< c_~i~0 .cse16) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse16) (<= (div (+ .cse12 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse19 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:32:36,774 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse24 (* 2 c_~cur~0))) (let ((.cse12 (+ c_~prev~0 c_~cur~0 1)) (.cse11 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse18 (+ .cse24 c_~prev~0)) (.cse14 (* c_~i~0 (- 1))) (.cse17 (+ .cse24 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_74 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_74))) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50) (< v_~cur~0_74 (+ (* 2 c_~cur~0) c_~prev~0))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse9 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse9 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse9 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse10 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse10 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse10 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse11 (- 1) c_~cur~0) (- 2)) .cse12) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse13 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse14 c_~cur~0) (- 2)) .cse12) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse15 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse15 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse15 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse16 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse16 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse16 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse11 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse17) (< c_~i~0 .cse18) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse18) (<= (div (+ .cse14 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse17) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse21 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse22 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse22 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse22 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (< c_~j~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse23 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse23 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse23 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:32:40,816 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse22 (* 2 c_~cur~0))) (let ((.cse10 (+ c_~prev~0 c_~cur~0 1)) (.cse9 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse16 (+ .cse22 c_~prev~0)) (.cse12 (* c_~i~0 (- 1))) (.cse15 (+ .cse22 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse9 (- 1) c_~cur~0) (- 2)) .cse10) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse11 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse11 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse11 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse12 c_~cur~0) (- 2)) .cse10) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse13 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse9 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (< c_~i~0 .cse16) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse16) (<= (div (+ .cse12 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (forall ((v_~cur~0_74 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse19 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse20 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse20 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72) v_~cur~0_74)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_74 v_~cur~0_72 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse20 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_72 (+ c_~cur~0 (* 2 v_~cur~0_74))) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_74 v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_74 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50))))) (< v_~cur~0_74 (+ c_~prev~0 c_~cur~0)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (< c_~j~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse21 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse21 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse21 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:32:43,126 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse20 (* 2 c_~cur~0))) (let ((.cse10 (+ c_~prev~0 c_~cur~0 1)) (.cse9 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse16 (+ .cse20 c_~prev~0)) (.cse12 (* c_~i~0 (- 1))) (.cse15 (+ .cse20 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (v_~cur~0_72 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse7 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse7 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_72 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_72))) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse7 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0 v_~cur~0_72)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse8 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse8 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse8 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse9 (- 1) c_~cur~0) (- 2)) .cse10) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse11 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse11 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse11 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse12 c_~cur~0) (- 2)) .cse10) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse13 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse13 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse13 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse14 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse14 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse14 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse9 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (< c_~i~0 .cse16) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse17 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse18 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse18 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse18 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse16) (<= (div (+ .cse12 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse15) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (< c_~j~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse19 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse19 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse19 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:32:57,286 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse18 (* 2 c_~cur~0))) (let ((.cse8 (+ c_~prev~0 c_~cur~0 1)) (.cse7 (* c_~j~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse14 (+ .cse18 c_~prev~0)) (.cse10 (* c_~i~0 (- 1))) (.cse13 (+ .cse18 c_~prev~0 1))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse1 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse1 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse1 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse2 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse2 3 c_~j~0 v_~cur~0_68)) (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse2 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse3 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 1)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< v_~cur~0_68 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse3 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse3 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((v_~cur~0_72 Int)) (or (and (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse4 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse4 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse4 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1))))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse5 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse5 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_72 v_~cur~0_70)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0 v_~cur~0_72)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_72 v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse5 3 c_~i~0 v_~cur~0_68)) (< v_~cur~0_70 (+ c_~cur~0 (* 2 v_~cur~0_72))) (<= 2 aux_mod_v_~cur~0_65_50) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_72 v_~cur~0_70 1)))))) (< v_~cur~0_72 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~cur~0_65_50 Int) (v_~cur~0_70 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse6 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (< v_~cur~0_70 (+ (* 2 c_~cur~0) c_~prev~0)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~prev~0 c_~cur~0)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse6 3 c_~i~0 v_~cur~0_68)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse6 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ .cse7 (- 1) c_~cur~0) (- 2)) .cse8) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse9 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse9 c_~cur~0 3 c_~i~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse9 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50)))) (< (div (+ (- 1) .cse10 c_~cur~0) (- 2)) .cse8) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse11 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse11 3 c_~j~0 v_~cur~0_68)) (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse11 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (v_~cur~0_68 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse12 (* 2 aux_div_v_~cur~0_65_50))) (or (< v_~cur~0_68 (+ (* 2 v_~cur~0_70) c_~cur~0)) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 v_~cur~0_70 1)) (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse12 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68) v_~cur~0_70)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50) v_~cur~0_70)) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse12 3 c_~i~0 v_~cur~0_68)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (<= (div (+ .cse7 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse13) (< c_~i~0 .cse14) (< c_~i~0 .cse0) (forall ((v_~cur~0_68 Int)) (or (< v_~cur~0_68 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse15 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ 6 c_~i~0 aux_mod_v_~cur~0_65_50) (+ .cse15 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse15 3 c_~i~0 v_~cur~0_68)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50)))) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse16 (* 2 aux_div_v_~cur~0_65_50))) (or (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse16 3 c_~j~0 v_~cur~0_68)) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ .cse16 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) (* 3 v_~cur~0_68))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~cur~0 (* 4 v_~cur~0_68) (* 4 aux_div_v_~cur~0_65_50))) (< aux_div_v_~cur~0_65_50 (+ c_~cur~0 v_~cur~0_68 1)) (<= 2 aux_mod_v_~cur~0_65_50))))))) (< c_~j~0 .cse14) (<= (div (+ .cse10 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse13) (forall ((v_~cur~0_65 Int) (aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~i~0) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (< v_~cur~0_65 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((v_~cur~0_65 Int)) (or (< v_~cur~0_65 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (+ 5 c_~j~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65)) (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~j~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)))) (forall ((aux_div_v_~prev~0_90_61 Int)) (or (<= (* 3 aux_div_v_~prev~0_90_61) (+ c_~i~0 4 v_~cur~0_65)) (<= aux_div_v_~prev~0_90_61 (+ c_~cur~0 (* 2 v_~cur~0_65) 1)) (<= (+ 5 c_~i~0) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_90_61) v_~cur~0_65))))))) (< c_~j~0 c_~cur~0) (forall ((aux_div_v_~cur~0_65_50 Int) (aux_mod_v_~cur~0_65_50 Int) (aux_div_v_~prev~0_90_61 Int)) (let ((.cse17 (* 2 aux_div_v_~cur~0_65_50))) (or (< aux_div_v_~cur~0_65_50 (+ c_~prev~0 c_~cur~0 1)) (<= (+ aux_mod_v_~cur~0_65_50 (* 3 aux_div_v_~prev~0_90_61)) (+ .cse17 c_~cur~0 3 c_~j~0)) (<= (+ aux_div_v_~prev~0_90_61 (* 2 aux_mod_v_~cur~0_65_50) 1) (+ c_~prev~0 (* 4 c_~cur~0) (* 4 aux_div_v_~cur~0_65_50))) (< aux_mod_v_~cur~0_65_50 0) (<= (+ 6 c_~j~0 aux_mod_v_~cur~0_65_50) (+ c_~prev~0 .cse17 (* 3 c_~cur~0) (* 2 aux_div_v_~prev~0_90_61))) (<= 2 aux_mod_v_~cur~0_65_50))))))) is different from false [2021-11-03 05:35:26,430 WARN L228 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2021-11-03 05:35:26,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-11-03 05:35:26,431 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 101 [2021-11-03 05:35:26,456 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:26,631 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:35:26,631 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:241) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:260) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:138) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:829) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:773) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:345) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicateForConjunction(PredicateUnifier.java:388) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicateForConjunction(PredicateUnifier.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.getOrConstructPredicate(DeterministicInterpolantAutomaton.java:282) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.constructSuccessorsAndTransitions(DeterministicInterpolantAutomaton.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:79) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:233) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.TotalizeNwa.internalSuccessors(TotalizeNwa.java:213) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ComplementDeterministicNwa.internalSuccessors(ComplementDeterministicNwa.java:121) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:216) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:208) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1058) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:960) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:182) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.computeAutomataDifference(BasicCegarLoop.java:869) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.refineAbstraction(BasicCegarLoop.java:783) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.refineAbstractionInternal(AbstractCegarLoop.java:462) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:420) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1465) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:658) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:237) ... 49 more [2021-11-03 05:35:26,633 INFO L168 Benchmark]: Toolchain (without parser) took 675436.51 ms. Allocated memory was 125.8 MB in the beginning and 182.5 MB in the end (delta: 56.6 MB). Free memory was 91.1 MB in the beginning and 115.5 MB in the end (delta: -24.4 MB). Peak memory consumption was 31.7 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,634 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 94.4 MB. Free memory is still 49.8 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-11-03 05:35:26,634 INFO L168 Benchmark]: CACSL2BoogieTranslator took 638.50 ms. Allocated memory is still 125.8 MB. Free memory was 90.9 MB in the beginning and 92.2 MB in the end (delta: -1.3 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,635 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.31 ms. Allocated memory is still 125.8 MB. Free memory was 92.2 MB in the beginning and 90.3 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,635 INFO L168 Benchmark]: Boogie Preprocessor took 27.61 ms. Allocated memory is still 125.8 MB. Free memory was 90.3 MB in the beginning and 88.7 MB in the end (delta: 1.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,636 INFO L168 Benchmark]: RCFGBuilder took 439.50 ms. Allocated memory is still 125.8 MB. Free memory was 88.7 MB in the beginning and 76.6 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,637 INFO L168 Benchmark]: TraceAbstraction took 674278.92 ms. Allocated memory was 125.8 MB in the beginning and 182.5 MB in the end (delta: 56.6 MB). Free memory was 76.2 MB in the beginning and 115.5 MB in the end (delta: -39.4 MB). Peak memory consumption was 19.7 MB. Max. memory is 16.1 GB. [2021-11-03 05:35:26,639 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 94.4 MB. Free memory is still 49.8 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 638.50 ms. Allocated memory is still 125.8 MB. Free memory was 90.9 MB in the beginning and 92.2 MB in the end (delta: -1.3 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 42.31 ms. Allocated memory is still 125.8 MB. Free memory was 92.2 MB in the beginning and 90.3 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 27.61 ms. Allocated memory is still 125.8 MB. Free memory was 90.3 MB in the beginning and 88.7 MB in the end (delta: 1.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 439.50 ms. Allocated memory is still 125.8 MB. Free memory was 88.7 MB in the beginning and 76.6 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. * TraceAbstraction took 674278.92 ms. Allocated memory was 125.8 MB in the beginning and 182.5 MB in the end (delta: 56.6 MB). Free memory was 76.2 MB in the beginning and 115.5 MB in the end (delta: -39.4 MB). Peak memory consumption was 19.7 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks Lipton Reduction Statistics: ReductionTime: 3.8s, 90 PlacesBefore, 20 PlacesAfterwards, 90 TransitionsBefore, 16 TransitionsAfterwards, 1738 CoEnabledTransitionPairs, 6 FixpointIterations, 27 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 7 ConcurrentYvCompositions, 4 ChoiceCompositions, 83 TotalNumberOfCompositions, 1312 MoverChecksTotal, Independence Relation Statistics: CachedIndependenceRelation.Independence Queries: [ total: 1171, positive: 1163, positive conditional: 0, positive unconditional: 1163, negative: 8, negative conditional: 0, negative unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1022, positive: 1015, positive conditional: 0, positive unconditional: 1015, negative: 7, negative conditional: 0, negative unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1022, positive: 1015, positive conditional: 0, positive unconditional: 1015, negative: 7, negative conditional: 0, negative unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Independence Queries: [ total: 7, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 7, negative conditional: 0, negative unconditional: 7, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 22, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] ], Cache Queries: [ total: 1171, positive: 148, positive conditional: 0, positive unconditional: 148, negative: 1, negative conditional: 0, negative unconditional: 1, unknown: 1022, unknown conditional: 0, unknown unconditional: 1022] , Statistics on independence cache: Total cache size (in pairs): 3, Positive cache size: 3, Positive conditional cache size: 0, Positive unconditional cache size: 3, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0 - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:241) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread/fib_unsafe-7.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a938b9e3b803ef0b08d2618a78ac055be54a6e48f84c6853aab11e3467af8157 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-9ad7fb2 [2021-11-03 05:35:29,100 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-03 05:35:29,104 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-03 05:35:29,157 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-03 05:35:29,158 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-03 05:35:29,162 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-03 05:35:29,164 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-03 05:35:29,169 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-03 05:35:29,173 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-03 05:35:29,181 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-03 05:35:29,183 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-03 05:35:29,185 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-03 05:35:29,186 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-03 05:35:29,188 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-03 05:35:29,191 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-03 05:35:29,196 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-03 05:35:29,197 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-03 05:35:29,198 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-03 05:35:29,217 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-03 05:35:29,226 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-03 05:35:29,228 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-03 05:35:29,230 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-03 05:35:29,233 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-03 05:35:29,235 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-03 05:35:29,246 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-03 05:35:29,246 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-03 05:35:29,247 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-03 05:35:29,249 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-03 05:35:29,250 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-03 05:35:29,251 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-03 05:35:29,251 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-03 05:35:29,252 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-03 05:35:29,255 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-03 05:35:29,256 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-03 05:35:29,258 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-03 05:35:29,258 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-03 05:35:29,259 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-03 05:35:29,259 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-03 05:35:29,260 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-03 05:35:29,262 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-03 05:35:29,263 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-03 05:35:29,265 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2021-11-03 05:35:29,317 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-03 05:35:29,318 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-03 05:35:29,319 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-03 05:35:29,320 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-03 05:35:29,320 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-03 05:35:29,320 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-03 05:35:29,320 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-03 05:35:29,321 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-03 05:35:29,321 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-03 05:35:29,323 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-03 05:35:29,324 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-03 05:35:29,324 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-03 05:35:29,325 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-03 05:35:29,325 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-03 05:35:29,325 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-03 05:35:29,326 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-03 05:35:29,326 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2021-11-03 05:35:29,326 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2021-11-03 05:35:29,326 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2021-11-03 05:35:29,327 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-03 05:35:29,327 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-03 05:35:29,327 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-03 05:35:29,327 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-03 05:35:29,328 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-03 05:35:29,328 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-03 05:35:29,328 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-03 05:35:29,328 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-03 05:35:29,329 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-03 05:35:29,329 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-03 05:35:29,329 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-03 05:35:29,330 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2021-11-03 05:35:29,330 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:29,330 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-03 05:35:29,330 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-03 05:35:29,331 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-03 05:35:29,331 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a938b9e3b803ef0b08d2618a78ac055be54a6e48f84c6853aab11e3467af8157 [2021-11-03 05:35:29,865 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-03 05:35:29,892 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-03 05:35:29,897 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-03 05:35:29,898 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-03 05:35:29,899 INFO L275 PluginConnector]: CDTParser initialized [2021-11-03 05:35:29,900 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/../../sv-benchmarks/c/pthread/fib_unsafe-7.i [2021-11-03 05:35:30,005 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/46995a5a3/b2252eb7e0e747f6bbef700c4b63d1ec/FLAGeea9f4c93 [2021-11-03 05:35:30,830 INFO L306 CDTParser]: Found 1 translation units. [2021-11-03 05:35:30,830 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i [2021-11-03 05:35:30,858 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/46995a5a3/b2252eb7e0e747f6bbef700c4b63d1ec/FLAGeea9f4c93 [2021-11-03 05:35:31,071 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/data/46995a5a3/b2252eb7e0e747f6bbef700c4b63d1ec [2021-11-03 05:35:31,076 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-03 05:35:31,078 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-03 05:35:31,084 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-03 05:35:31,084 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-03 05:35:31,089 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-03 05:35:31,095 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,098 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ef848f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31, skipping insertion in model container [2021-11-03 05:35:31,098 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,108 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-03 05:35:31,174 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-03 05:35:31,580 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i[30811,30824] [2021-11-03 05:35:31,583 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-03 05:35:31,598 INFO L203 MainTranslator]: Completed pre-run [2021-11-03 05:35:31,647 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/sv-benchmarks/c/pthread/fib_unsafe-7.i[30811,30824] [2021-11-03 05:35:31,648 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-03 05:35:31,696 INFO L208 MainTranslator]: Completed translation [2021-11-03 05:35:31,697 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31 WrapperNode [2021-11-03 05:35:31,697 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-03 05:35:31,698 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-03 05:35:31,698 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-03 05:35:31,699 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-03 05:35:31,707 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,727 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,753 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-03 05:35:31,754 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-03 05:35:31,754 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-03 05:35:31,754 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-03 05:35:31,762 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,763 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,767 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,768 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,779 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,784 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,787 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,792 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-03 05:35:31,793 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-03 05:35:31,793 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-03 05:35:31,793 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-03 05:35:31,794 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (1/1) ... [2021-11-03 05:35:31,801 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-03 05:35:31,814 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:35:31,838 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-03 05:35:31,856 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-03 05:35:31,892 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2021-11-03 05:35:31,892 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2021-11-03 05:35:31,893 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2021-11-03 05:35:31,893 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2021-11-03 05:35:31,893 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-11-03 05:35:31,893 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-03 05:35:31,898 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-03 05:35:31,898 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2021-11-03 05:35:31,899 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2021-11-03 05:35:31,899 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-11-03 05:35:31,899 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-03 05:35:31,899 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-03 05:35:31,900 WARN L209 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-11-03 05:35:32,358 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-03 05:35:32,358 INFO L299 CfgBuilder]: Removed 9 assume(true) statements. [2021-11-03 05:35:32,361 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 05:35:32 BoogieIcfgContainer [2021-11-03 05:35:32,361 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-03 05:35:32,363 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-03 05:35:32,363 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-03 05:35:32,366 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-03 05:35:32,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 05:35:31" (1/3) ... [2021-11-03 05:35:32,367 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11f1acfa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 05:35:32, skipping insertion in model container [2021-11-03 05:35:32,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 05:35:31" (2/3) ... [2021-11-03 05:35:32,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11f1acfa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 05:35:32, skipping insertion in model container [2021-11-03 05:35:32,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 05:35:32" (3/3) ... [2021-11-03 05:35:32,370 INFO L111 eAbstractionObserver]: Analyzing ICFG fib_unsafe-7.i [2021-11-03 05:35:32,376 WARN L149 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-11-03 05:35:32,376 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-03 05:35:32,376 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-03 05:35:32,377 INFO L513 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-11-03 05:35:32,410 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,410 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,411 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,411 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,411 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,412 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,412 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,412 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,413 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,413 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,414 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,414 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,414 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,415 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,415 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,415 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,416 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,416 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,417 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,432 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,433 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,433 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,434 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,435 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,436 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,436 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,437 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,438 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,439 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,439 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,439 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,441 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,442 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,444 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,444 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,445 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,448 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,453 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,454 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,454 WARN L313 ript$VariableManager]: TermVariabe t2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,454 WARN L313 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,461 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,465 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,465 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,466 WARN L313 ript$VariableManager]: TermVariabe t1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,466 WARN L313 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-03 05:35:32,473 INFO L148 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-11-03 05:35:32,549 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-03 05:35:32,559 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-03 05:35:32,559 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-11-03 05:35:32,588 INFO L118 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2021-11-03 05:35:32,603 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 90 places, 90 transitions, 190 flow [2021-11-03 05:35:32,613 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 90 places, 90 transitions, 190 flow [2021-11-03 05:35:32,615 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 90 places, 90 transitions, 190 flow [2021-11-03 05:35:32,705 INFO L129 PetriNetUnfolder]: 7/88 cut-off events. [2021-11-03 05:35:32,705 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2021-11-03 05:35:32,713 INFO L84 FinitePrefix]: Finished finitePrefix Result has 95 conditions, 88 events. 7/88 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 83 event pairs, 0 based on Foata normal form. 0/80 useless extension candidates. Maximal degree in co-relation 60. Up to 2 conditions per place. [2021-11-03 05:35:32,719 INFO L116 LiptonReduction]: Number of co-enabled transitions 1694 [2021-11-03 05:35:40,233 INFO L131 LiptonReduction]: Checked pairs total: 1373 [2021-11-03 05:35:40,233 INFO L133 LiptonReduction]: Total number of compositions: 86 [2021-11-03 05:35:40,243 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 20 places, 16 transitions, 42 flow [2021-11-03 05:35:40,268 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:40,271 INFO L276 IsEmpty]: Start isEmpty. Operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:40,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-11-03 05:35:40,276 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:35:40,277 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-11-03 05:35:40,277 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:35:40,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:35:40,285 INFO L85 PathProgramCache]: Analyzing trace with hash 1714679147, now seen corresponding path program 1 times [2021-11-03 05:35:40,296 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:35:40,296 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1095145160] [2021-11-03 05:35:40,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:35:40,298 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:35:40,298 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:35:40,304 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:35:40,310 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2021-11-03 05:35:40,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:35:40,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 57 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-03 05:35:40,414 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:40,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:40,473 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:40,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:40,542 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:35:40,542 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1095145160] [2021-11-03 05:35:40,543 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1095145160] provided 2 perfect and 0 imperfect interpolant sequences [2021-11-03 05:35:40,543 INFO L186 FreeRefinementEngine]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2021-11-03 05:35:40,543 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [] total 3 [2021-11-03 05:35:40,545 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514013225] [2021-11-03 05:35:40,549 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-03 05:35:40,555 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:35:40,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-03 05:35:40,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-11-03 05:35:40,571 INFO L87 Difference]: Start difference. First operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:40,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:35:40,610 INFO L93 Difference]: Finished difference Result 53 states and 149 transitions. [2021-11-03 05:35:40,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-03 05:35:40,613 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-11-03 05:35:40,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:35:40,636 INFO L225 Difference]: With dead ends: 53 [2021-11-03 05:35:40,636 INFO L226 Difference]: Without dead ends: 53 [2021-11-03 05:35:40,637 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-11-03 05:35:40,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2021-11-03 05:35:40,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2021-11-03 05:35:40,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 2.8653846153846154) internal successors, (149), 52 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:40,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 149 transitions. [2021-11-03 05:35:40,708 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 149 transitions. Word has length 6 [2021-11-03 05:35:40,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:35:40,711 INFO L470 AbstractCegarLoop]: Abstraction has 53 states and 149 transitions. [2021-11-03 05:35:40,711 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:40,711 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 149 transitions. [2021-11-03 05:35:40,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2021-11-03 05:35:40,713 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:35:40,713 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2021-11-03 05:35:40,726 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:40,915 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 [2021-11-03 05:35:40,916 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:35:40,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:35:40,917 INFO L85 PathProgramCache]: Analyzing trace with hash -1460759765, now seen corresponding path program 1 times [2021-11-03 05:35:40,918 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:35:40,921 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1290961270] [2021-11-03 05:35:40,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:35:40,921 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:35:40,922 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:35:40,923 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:35:40,976 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2021-11-03 05:35:41,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:35:41,062 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-03 05:35:41,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:41,131 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,131 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:41,208 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,208 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:35:41,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1290961270] [2021-11-03 05:35:41,210 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1290961270] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:41,210 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1363157354] [2021-11-03 05:35:41,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:35:41,211 INFO L168 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:41,211 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 [2021-11-03 05:35:41,217 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2021-11-03 05:35:41,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2021-11-03 05:35:41,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:35:41,414 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-03 05:35:41,414 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:41,443 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,444 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:41,472 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,473 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1363157354] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:41,473 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1121566024] [2021-11-03 05:35:41,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:35:41,474 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:35:41,474 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:35:41,476 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:35:41,507 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-03 05:35:41,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:35:41,590 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-03 05:35:41,591 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:41,625 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,625 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:41,679 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:41,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1121566024] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:41,681 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 6 imperfect interpolant sequences. [2021-11-03 05:35:41,682 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4, 4] total 7 [2021-11-03 05:35:41,683 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672508259] [2021-11-03 05:35:41,684 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-11-03 05:35:41,685 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:35:41,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-11-03 05:35:41,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-11-03 05:35:41,690 INFO L87 Difference]: Start difference. First operand 53 states and 149 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:41,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:35:41,860 INFO L93 Difference]: Finished difference Result 89 states and 257 transitions. [2021-11-03 05:35:41,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-11-03 05:35:41,864 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2021-11-03 05:35:41,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:35:41,867 INFO L225 Difference]: With dead ends: 89 [2021-11-03 05:35:41,867 INFO L226 Difference]: Without dead ends: 89 [2021-11-03 05:35:41,868 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2021-11-03 05:35:41,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2021-11-03 05:35:41,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2021-11-03 05:35:41,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 88 states have (on average 2.9204545454545454) internal successors, (257), 88 states have internal predecessors, (257), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:41,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 257 transitions. [2021-11-03 05:35:41,903 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 257 transitions. Word has length 8 [2021-11-03 05:35:41,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:35:41,904 INFO L470 AbstractCegarLoop]: Abstraction has 89 states and 257 transitions. [2021-11-03 05:35:41,905 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:41,905 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 257 transitions. [2021-11-03 05:35:41,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2021-11-03 05:35:41,909 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:35:41,909 INFO L513 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1] [2021-11-03 05:35:41,954 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:42,143 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:42,335 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (4)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:42,533 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:42,534 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:35:42,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:35:42,535 INFO L85 PathProgramCache]: Analyzing trace with hash -1660383573, now seen corresponding path program 2 times [2021-11-03 05:35:42,535 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:35:42,535 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2119157612] [2021-11-03 05:35:42,536 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-03 05:35:42,536 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:35:42,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:35:42,549 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:35:42,584 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2021-11-03 05:35:42,688 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-03 05:35:42,688 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:42,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 8 conjunts are in the unsatisfiable core [2021-11-03 05:35:42,696 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:42,815 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:42,816 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:43,059 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:43,059 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:35:43,060 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2119157612] [2021-11-03 05:35:43,060 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2119157612] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:43,060 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [30070349] [2021-11-03 05:35:43,060 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-03 05:35:43,060 INFO L168 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:43,061 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 [2021-11-03 05:35:43,069 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2021-11-03 05:35:43,088 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2021-11-03 05:35:43,342 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-03 05:35:43,343 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:43,347 INFO L263 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 8 conjunts are in the unsatisfiable core [2021-11-03 05:35:43,348 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:43,418 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:43,426 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:43,492 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:43,493 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [30070349] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:43,493 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1058380124] [2021-11-03 05:35:43,493 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-03 05:35:43,494 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:35:43,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:35:43,495 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:35:43,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-11-03 05:35:43,632 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-03 05:35:43,632 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:43,636 INFO L263 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 8 conjunts are in the unsatisfiable core [2021-11-03 05:35:43,637 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:43,685 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:43,685 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:43,741 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:43,741 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1058380124] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:43,741 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 6 imperfect interpolant sequences. [2021-11-03 05:35:43,742 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8, 8] total 15 [2021-11-03 05:35:43,742 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [153430227] [2021-11-03 05:35:43,743 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-11-03 05:35:43,743 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:35:43,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-11-03 05:35:43,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2021-11-03 05:35:43,744 INFO L87 Difference]: Start difference. First operand 89 states and 257 transitions. Second operand has 16 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:44,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:35:44,269 INFO L93 Difference]: Finished difference Result 161 states and 473 transitions. [2021-11-03 05:35:44,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-03 05:35:44,270 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2021-11-03 05:35:44,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:35:44,274 INFO L225 Difference]: With dead ends: 161 [2021-11-03 05:35:44,274 INFO L226 Difference]: Without dead ends: 161 [2021-11-03 05:35:44,275 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=174, Invalid=288, Unknown=0, NotChecked=0, Total=462 [2021-11-03 05:35:44,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2021-11-03 05:35:44,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2021-11-03 05:35:44,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 160 states have (on average 2.95625) internal successors, (473), 160 states have internal predecessors, (473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:44,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 473 transitions. [2021-11-03 05:35:44,297 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 473 transitions. Word has length 12 [2021-11-03 05:35:44,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:35:44,298 INFO L470 AbstractCegarLoop]: Abstraction has 161 states and 473 transitions. [2021-11-03 05:35:44,298 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:44,298 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 473 transitions. [2021-11-03 05:35:44,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2021-11-03 05:35:44,301 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:35:44,301 INFO L513 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1] [2021-11-03 05:35:44,309 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (7)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:44,527 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-11-03 05:35:44,716 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (6)] Ended with exit code 0 [2021-11-03 05:35:44,905 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 [2021-11-03 05:35:44,905 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:35:44,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:35:44,906 INFO L85 PathProgramCache]: Analyzing trace with hash -1159772757, now seen corresponding path program 3 times [2021-11-03 05:35:44,906 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:35:44,907 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1093647442] [2021-11-03 05:35:44,907 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-03 05:35:44,907 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:35:44,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:35:44,909 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:35:44,912 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2021-11-03 05:35:45,100 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-11-03 05:35:45,100 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:45,106 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-03 05:35:45,107 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:45,410 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:45,411 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:46,140 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:46,140 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:35:46,140 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1093647442] [2021-11-03 05:35:46,141 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1093647442] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:46,141 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1880115095] [2021-11-03 05:35:46,141 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-03 05:35:46,141 INFO L168 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:46,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 [2021-11-03 05:35:46,144 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2021-11-03 05:35:46,148 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2021-11-03 05:35:46,447 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-11-03 05:35:46,447 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:46,450 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-03 05:35:46,451 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:46,534 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:46,535 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:46,636 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:46,637 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1880115095] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:46,637 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1869796359] [2021-11-03 05:35:46,637 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-03 05:35:46,637 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:35:46,638 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:35:46,649 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:35:46,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-11-03 05:35:46,836 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-11-03 05:35:46,836 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:46,841 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-03 05:35:46,842 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:46,930 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:46,931 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:47,028 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:47,029 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1869796359] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:47,029 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 6 imperfect interpolant sequences. [2021-11-03 05:35:47,029 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16, 16] total 31 [2021-11-03 05:35:47,029 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420673050] [2021-11-03 05:35:47,030 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2021-11-03 05:35:47,030 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:35:47,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-11-03 05:35:47,032 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=797, Unknown=0, NotChecked=0, Total=992 [2021-11-03 05:35:47,032 INFO L87 Difference]: Start difference. First operand 161 states and 473 transitions. Second operand has 32 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:47,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:35:47,536 INFO L93 Difference]: Finished difference Result 179 states and 527 transitions. [2021-11-03 05:35:47,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-11-03 05:35:47,537 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2021-11-03 05:35:47,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:35:47,540 INFO L225 Difference]: With dead ends: 179 [2021-11-03 05:35:47,540 INFO L226 Difference]: Without dead ends: 179 [2021-11-03 05:35:47,541 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=195, Invalid=797, Unknown=0, NotChecked=0, Total=992 [2021-11-03 05:35:47,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2021-11-03 05:35:47,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2021-11-03 05:35:47,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 178 states have (on average 2.960674157303371) internal successors, (527), 178 states have internal predecessors, (527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:47,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 527 transitions. [2021-11-03 05:35:47,559 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 527 transitions. Word has length 20 [2021-11-03 05:35:47,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:35:47,559 INFO L470 AbstractCegarLoop]: Abstraction has 179 states and 527 transitions. [2021-11-03 05:35:47,560 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:35:47,560 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 527 transitions. [2021-11-03 05:35:47,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2021-11-03 05:35:47,562 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:35:47,563 INFO L513 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1] [2021-11-03 05:35:47,602 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:47,800 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:47,993 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (10)] Forceful destruction successful, exit code 0 [2021-11-03 05:35:48,189 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:48,189 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:35:48,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:35:48,190 INFO L85 PathProgramCache]: Analyzing trace with hash -2145068181, now seen corresponding path program 4 times [2021-11-03 05:35:48,190 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:35:48,191 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1691793440] [2021-11-03 05:35:48,191 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-03 05:35:48,191 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:35:48,191 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:35:48,192 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:35:48,193 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2021-11-03 05:35:48,376 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-03 05:35:48,376 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:48,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-03 05:35:48,384 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:49,450 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:49,450 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:54,344 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:54,345 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:35:54,345 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1691793440] [2021-11-03 05:35:54,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1691793440] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:54,345 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1314367931] [2021-11-03 05:35:54,346 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-03 05:35:54,346 INFO L168 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2021-11-03 05:35:54,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 [2021-11-03 05:35:54,353 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2021-11-03 05:35:54,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (13)] Waiting until timeout for monitored process [2021-11-03 05:35:54,691 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-03 05:35:54,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:54,709 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-03 05:35:54,711 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:55,408 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:55,408 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:55,947 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:55,948 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1314367931] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:55,948 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [367650975] [2021-11-03 05:35:55,948 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-03 05:35:55,948 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:35:55,949 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:35:55,949 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:35:55,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-11-03 05:35:56,187 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-03 05:35:56,187 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-03 05:35:56,193 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-03 05:35:56,195 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:35:56,894 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:56,894 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:35:57,387 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:35:57,387 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [367650975] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:35:57,387 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 6 imperfect interpolant sequences. [2021-11-03 05:35:57,387 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17, 17] total 34 [2021-11-03 05:35:57,388 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521268423] [2021-11-03 05:35:57,389 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2021-11-03 05:35:57,389 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:35:57,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-11-03 05:35:57,391 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=320, Invalid=940, Unknown=0, NotChecked=0, Total=1260 [2021-11-03 05:35:57,391 INFO L87 Difference]: Start difference. First operand 179 states and 527 transitions. Second operand has 36 states, 35 states have (on average 1.2571428571428571) internal successors, (44), 35 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:36:56,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-03 05:36:56,310 INFO L93 Difference]: Finished difference Result 1595 states and 4767 transitions. [2021-11-03 05:36:56,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2021-11-03 05:36:56,320 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 1.2571428571428571) internal successors, (44), 35 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2021-11-03 05:36:56,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-03 05:36:56,340 INFO L225 Difference]: With dead ends: 1595 [2021-11-03 05:36:56,340 INFO L226 Difference]: Without dead ends: 1595 [2021-11-03 05:36:56,343 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 76 SyntacticMatches, 16 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 938 ImplicationChecksByTransitivity, 53.3s TimeCoverageRelationStatistics Valid=1282, Invalid=2878, Unknown=0, NotChecked=0, Total=4160 [2021-11-03 05:36:56,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1595 states. [2021-11-03 05:36:56,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1595 to 1434. [2021-11-03 05:36:56,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1434 states, 1433 states have (on average 3.2086531751570133) internal successors, (4598), 1433 states have internal predecessors, (4598), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:36:56,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1434 states to 1434 states and 4598 transitions. [2021-11-03 05:36:56,442 INFO L78 Accepts]: Start accepts. Automaton has 1434 states and 4598 transitions. Word has length 22 [2021-11-03 05:36:56,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-03 05:36:56,442 INFO L470 AbstractCegarLoop]: Abstraction has 1434 states and 4598 transitions. [2021-11-03 05:36:56,443 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 1.2571428571428571) internal successors, (44), 35 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-03 05:36:56,443 INFO L276 IsEmpty]: Start isEmpty. Operand 1434 states and 4598 transitions. [2021-11-03 05:36:56,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2021-11-03 05:36:56,454 INFO L505 BasicCegarLoop]: Found error trace [2021-11-03 05:36:56,454 INFO L513 BasicCegarLoop]: trace histogram [16, 2, 1, 1, 1, 1, 1, 1, 1] [2021-11-03 05:36:56,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (13)] Forceful destruction successful, exit code 0 [2021-11-03 05:36:56,670 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2021-11-03 05:36:56,884 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2021-11-03 05:36:57,058 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:36:57,058 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-03 05:36:57,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-03 05:36:57,059 INFO L85 PathProgramCache]: Analyzing trace with hash -1903749053, now seen corresponding path program 1 times [2021-11-03 05:36:57,059 INFO L121 FreeRefinementEngine]: Executing refinement strategy WALRUS [2021-11-03 05:36:57,059 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1753114304] [2021-11-03 05:36:57,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:36:57,060 INFO L168 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2021-11-03 05:36:57,060 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat [2021-11-03 05:36:57,061 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2021-11-03 05:36:57,063 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2021-11-03 05:36:57,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:36:57,332 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 54 conjunts are in the unsatisfiable core [2021-11-03 05:36:57,334 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:37:00,219 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:00,219 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:37:08,759 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:08,759 INFO L139 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2021-11-03 05:37:08,760 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1753114304] [2021-11-03 05:37:08,760 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1753114304] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:37:08,760 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1933773023] [2021-11-03 05:37:08,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:37:08,760 INFO L168 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2021-11-03 05:37:08,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 [2021-11-03 05:37:08,762 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2021-11-03 05:37:08,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/cvc4 --incremental --print-success --lang smt (16)] Waiting until timeout for monitored process [2021-11-03 05:37:09,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:37:09,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 54 conjunts are in the unsatisfiable core [2021-11-03 05:37:09,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:37:10,400 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:10,400 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:37:11,165 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:11,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1933773023] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:37:11,165 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265088189] [2021-11-03 05:37:11,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-03 05:37:11,165 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-03 05:37:11,166 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 [2021-11-03 05:37:11,173 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-03 05:37:11,174 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_920ca99a-8201-49ae-9f9a-2e1103540ec1/bin/utaipan-aC7eJsxGYH/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2021-11-03 05:37:11,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-03 05:37:11,579 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 54 conjunts are in the unsatisfiable core [2021-11-03 05:37:11,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-03 05:37:12,730 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:12,730 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-03 05:37:13,366 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-03 05:37:13,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265088189] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-03 05:37:13,366 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 6 imperfect interpolant sequences. [2021-11-03 05:37:13,366 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19, 19] total 38 [2021-11-03 05:37:13,367 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906175190] [2021-11-03 05:37:13,368 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2021-11-03 05:37:13,368 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2021-11-03 05:37:13,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2021-11-03 05:37:13,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=1180, Unknown=0, NotChecked=0, Total=1560 [2021-11-03 05:37:13,370 INFO L87 Difference]: Start difference. First operand 1434 states and 4598 transitions. Second operand has 40 states, 39 states have (on average 1.2820512820512822) internal successors, (50), 39 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)