./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.15.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0f8a17c6 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/config/TaipanReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.15.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 05397c7941b2acd95b1b6d02c6c64b476ab8b290a5b56301ff8db7ca1986067b --- Real Ultimate output --- This is Ultimate 0.2.1-dev-0f8a17c [2021-11-19 15:45:21,304 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-19 15:45:21,310 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-19 15:45:21,346 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-19 15:45:21,351 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-19 15:45:21,353 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-19 15:45:21,356 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-19 15:45:21,361 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-19 15:45:21,365 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-19 15:45:21,367 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-19 15:45:21,369 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-19 15:45:21,372 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-19 15:45:21,373 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-19 15:45:21,379 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-19 15:45:21,381 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-19 15:45:21,383 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-19 15:45:21,386 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-19 15:45:21,388 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-19 15:45:21,394 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-19 15:45:21,399 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-19 15:45:21,406 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-19 15:45:21,412 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-19 15:45:21,413 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-19 15:45:21,415 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-19 15:45:21,420 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-19 15:45:21,427 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-19 15:45:21,427 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-19 15:45:21,428 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-19 15:45:21,430 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-19 15:45:21,432 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-19 15:45:21,434 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-19 15:45:21,435 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-19 15:45:21,437 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-19 15:45:21,438 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-19 15:45:21,440 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-19 15:45:21,441 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-19 15:45:21,442 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-19 15:45:21,442 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-19 15:45:21,443 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-19 15:45:21,444 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-19 15:45:21,444 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-19 15:45:21,447 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-19 15:45:21,478 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-19 15:45:21,487 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-19 15:45:21,488 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-19 15:45:21,488 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-11-19 15:45:21,489 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-19 15:45:21,489 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-19 15:45:21,489 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-19 15:45:21,489 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-19 15:45:21,489 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-19 15:45:21,490 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-19 15:45:21,490 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-19 15:45:21,490 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-19 15:45:21,490 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-19 15:45:21,491 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-19 15:45:21,491 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-19 15:45:21,491 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2021-11-19 15:45:21,492 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-19 15:45:21,492 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-19 15:45:21,492 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-19 15:45:21,492 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-19 15:45:21,494 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-19 15:45:21,494 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-19 15:45:21,495 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-19 15:45:21,496 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-19 15:45:21,496 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-19 15:45:21,496 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-19 15:45:21,496 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-19 15:45:21,496 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-19 15:45:21,497 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-19 15:45:21,497 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-19 15:45:21,497 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-19 15:45:21,497 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-19 15:45:21,497 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-19 15:45:21,498 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-19 15:45:21,498 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-19 15:45:21,498 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 05397c7941b2acd95b1b6d02c6c64b476ab8b290a5b56301ff8db7ca1986067b [2021-11-19 15:45:21,791 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-19 15:45:21,819 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-19 15:45:21,840 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-19 15:45:21,841 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-19 15:45:21,842 INFO L275 PluginConnector]: CDTParser initialized [2021-11-19 15:45:21,844 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/../../sv-benchmarks/c/systemc/transmitter.15.cil.c [2021-11-19 15:45:21,941 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/data/6985aeb03/b2d9cfdd5643410bad42f80ef2f64371/FLAG9b5a4b71f [2021-11-19 15:45:22,612 INFO L306 CDTParser]: Found 1 translation units. [2021-11-19 15:45:22,613 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/sv-benchmarks/c/systemc/transmitter.15.cil.c [2021-11-19 15:45:22,644 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/data/6985aeb03/b2d9cfdd5643410bad42f80ef2f64371/FLAG9b5a4b71f [2021-11-19 15:45:22,845 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/data/6985aeb03/b2d9cfdd5643410bad42f80ef2f64371 [2021-11-19 15:45:22,850 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-19 15:45:22,853 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-19 15:45:22,857 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-19 15:45:22,857 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-19 15:45:22,860 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-19 15:45:22,861 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 03:45:22" (1/1) ... [2021-11-19 15:45:22,866 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@146ee43e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:22, skipping insertion in model container [2021-11-19 15:45:22,867 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 03:45:22" (1/1) ... [2021-11-19 15:45:22,873 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-19 15:45:22,948 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-19 15:45:23,105 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/sv-benchmarks/c/systemc/transmitter.15.cil.c[706,719] [2021-11-19 15:45:23,271 INFO L207 PostProcessor]: Analyzing one entry point: main [2021-11-19 15:45:23,282 INFO L203 MainTranslator]: Completed pre-run [2021-11-19 15:45:23,294 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/sv-benchmarks/c/systemc/transmitter.15.cil.c[706,719] [2021-11-19 15:45:23,366 INFO L207 PostProcessor]: Analyzing one entry point: main [2021-11-19 15:45:23,390 INFO L208 MainTranslator]: Completed translation [2021-11-19 15:45:23,391 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23 WrapperNode [2021-11-19 15:45:23,391 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-19 15:45:23,392 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-19 15:45:23,392 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-19 15:45:23,393 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-19 15:45:23,400 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,416 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,501 INFO L137 Inliner]: procedures = 54, calls = 69, calls flagged for inlining = 38, calls inlined = 38, statements flattened = 891 [2021-11-19 15:45:23,502 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-19 15:45:23,503 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-19 15:45:23,503 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-19 15:45:23,503 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-19 15:45:23,512 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,512 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,518 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,518 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,537 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,557 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,561 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,584 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-19 15:45:23,585 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-19 15:45:23,585 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-19 15:45:23,585 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-19 15:45:23,586 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (1/1) ... [2021-11-19 15:45:23,593 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-19 15:45:23,605 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/z3 [2021-11-19 15:45:23,617 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-19 15:45:23,620 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-19 15:45:23,654 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-19 15:45:23,654 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2021-11-19 15:45:23,654 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2021-11-19 15:45:23,654 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2021-11-19 15:45:23,655 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2021-11-19 15:45:23,655 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2021-11-19 15:45:23,655 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2021-11-19 15:45:23,655 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2021-11-19 15:45:23,655 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2021-11-19 15:45:23,656 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2021-11-19 15:45:23,656 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2021-11-19 15:45:23,656 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2021-11-19 15:45:23,656 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2021-11-19 15:45:23,656 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-19 15:45:23,656 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-19 15:45:23,657 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-19 15:45:23,775 INFO L236 CfgBuilder]: Building ICFG [2021-11-19 15:45:23,776 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-19 15:45:24,673 INFO L277 CfgBuilder]: Performing block encoding [2021-11-19 15:45:25,255 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-19 15:45:25,255 INFO L301 CfgBuilder]: Removed 17 assume(true) statements. [2021-11-19 15:45:25,259 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 03:45:25 BoogieIcfgContainer [2021-11-19 15:45:25,259 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-19 15:45:25,261 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-19 15:45:25,262 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-19 15:45:25,265 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-19 15:45:25,265 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.11 03:45:22" (1/3) ... [2021-11-19 15:45:25,267 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@568fd29e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 03:45:25, skipping insertion in model container [2021-11-19 15:45:25,267 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 03:45:23" (2/3) ... [2021-11-19 15:45:25,267 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@568fd29e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.11 03:45:25, skipping insertion in model container [2021-11-19 15:45:25,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 03:45:25" (3/3) ... [2021-11-19 15:45:25,269 INFO L111 eAbstractionObserver]: Analyzing ICFG transmitter.15.cil.c [2021-11-19 15:45:25,275 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-19 15:45:25,276 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-19 15:45:25,349 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-19 15:45:25,363 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-19 15:45:25,363 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-11-19 15:45:25,413 INFO L276 IsEmpty]: Start isEmpty. Operand has 193 states, 159 states have (on average 1.5534591194968554) internal successors, (247), 161 states have internal predecessors, (247), 26 states have call successors, (26), 6 states have call predecessors, (26), 6 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) [2021-11-19 15:45:25,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:25,424 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:25,425 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:25,426 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:25,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:25,442 INFO L85 PathProgramCache]: Analyzing trace with hash 1444001915, now seen corresponding path program 1 times [2021-11-19 15:45:25,451 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:25,452 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842041155] [2021-11-19 15:45:25,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:25,453 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:25,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:25,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:25,840 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:25,841 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842041155] [2021-11-19 15:45:25,842 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842041155] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:25,842 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:25,842 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-19 15:45:25,844 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264650328] [2021-11-19 15:45:25,844 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:25,849 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-19 15:45:25,849 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:25,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-19 15:45:25,878 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:25,881 INFO L87 Difference]: Start difference. First operand has 193 states, 159 states have (on average 1.5534591194968554) internal successors, (247), 161 states have internal predecessors, (247), 26 states have call successors, (26), 6 states have call predecessors, (26), 6 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:26,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:26,341 INFO L93 Difference]: Finished difference Result 562 states and 901 transitions. [2021-11-19 15:45:26,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-19 15:45:26,344 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:26,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:26,358 INFO L225 Difference]: With dead ends: 562 [2021-11-19 15:45:26,358 INFO L226 Difference]: Without dead ends: 370 [2021-11-19 15:45:26,366 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:26,369 INFO L933 BasicCegarLoop]: 460 mSDtfsCounter, 516 mSDsluCounter, 462 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 516 SdHoareTripleChecker+Valid, 826 SdHoareTripleChecker+Invalid, 316 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:26,370 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [516 Valid, 826 Invalid, 316 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-11-19 15:45:26,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2021-11-19 15:45:26,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 367. [2021-11-19 15:45:26,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 367 states, 307 states have (on average 1.511400651465798) internal successors, (464), 308 states have internal predecessors, (464), 47 states have call successors, (47), 12 states have call predecessors, (47), 12 states have return successors, (47), 47 states have call predecessors, (47), 47 states have call successors, (47) [2021-11-19 15:45:26,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367 states to 367 states and 558 transitions. [2021-11-19 15:45:26,460 INFO L78 Accepts]: Start accepts. Automaton has 367 states and 558 transitions. Word has length 67 [2021-11-19 15:45:26,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:26,461 INFO L470 AbstractCegarLoop]: Abstraction has 367 states and 558 transitions. [2021-11-19 15:45:26,462 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:26,462 INFO L276 IsEmpty]: Start isEmpty. Operand 367 states and 558 transitions. [2021-11-19 15:45:26,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:26,468 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:26,468 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:26,469 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-19 15:45:26,469 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:26,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:26,472 INFO L85 PathProgramCache]: Analyzing trace with hash 1684269244, now seen corresponding path program 1 times [2021-11-19 15:45:26,472 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:26,473 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [575881380] [2021-11-19 15:45:26,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:26,473 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:26,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:26,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:26,680 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:26,681 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [575881380] [2021-11-19 15:45:26,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [575881380] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:26,681 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:26,681 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-19 15:45:26,682 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1627237700] [2021-11-19 15:45:26,682 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:26,683 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-19 15:45:26,684 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:26,684 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-19 15:45:26,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-19 15:45:26,685 INFO L87 Difference]: Start difference. First operand 367 states and 558 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:27,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:27,528 INFO L93 Difference]: Finished difference Result 1259 states and 1939 transitions. [2021-11-19 15:45:27,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-19 15:45:27,530 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:27,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:27,545 INFO L225 Difference]: With dead ends: 1259 [2021-11-19 15:45:27,545 INFO L226 Difference]: Without dead ends: 870 [2021-11-19 15:45:27,553 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-19 15:45:27,554 INFO L933 BasicCegarLoop]: 493 mSDtfsCounter, 1096 mSDsluCounter, 1012 mSDsCounter, 0 mSdLazyCounter, 499 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1320 SdHoareTripleChecker+Invalid, 709 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:27,556 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1320 Invalid, 709 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 499 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-19 15:45:27,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 870 states. [2021-11-19 15:45:27,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 870 to 858. [2021-11-19 15:45:27,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 858 states, 737 states have (on average 1.5006784260515604) internal successors, (1106), 726 states have internal predecessors, (1106), 92 states have call successors, (92), 26 states have call predecessors, (92), 28 states have return successors, (106), 106 states have call predecessors, (106), 92 states have call successors, (106) [2021-11-19 15:45:27,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 858 states to 858 states and 1304 transitions. [2021-11-19 15:45:27,687 INFO L78 Accepts]: Start accepts. Automaton has 858 states and 1304 transitions. Word has length 67 [2021-11-19 15:45:27,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:27,689 INFO L470 AbstractCegarLoop]: Abstraction has 858 states and 1304 transitions. [2021-11-19 15:45:27,689 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:27,689 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 1304 transitions. [2021-11-19 15:45:27,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:27,697 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:27,698 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:27,698 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-11-19 15:45:27,699 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:27,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:27,700 INFO L85 PathProgramCache]: Analyzing trace with hash -416571971, now seen corresponding path program 1 times [2021-11-19 15:45:27,700 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:27,701 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135440468] [2021-11-19 15:45:27,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:27,701 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:27,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:27,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:27,887 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:27,888 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135440468] [2021-11-19 15:45:27,888 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135440468] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:27,889 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:27,889 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-19 15:45:27,890 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022544273] [2021-11-19 15:45:27,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:27,891 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-19 15:45:27,891 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:27,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-19 15:45:27,893 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-19 15:45:27,893 INFO L87 Difference]: Start difference. First operand 858 states and 1304 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:28,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:28,732 INFO L93 Difference]: Finished difference Result 3017 states and 4652 transitions. [2021-11-19 15:45:28,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-19 15:45:28,733 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:28,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:28,754 INFO L225 Difference]: With dead ends: 3017 [2021-11-19 15:45:28,755 INFO L226 Difference]: Without dead ends: 2113 [2021-11-19 15:45:28,759 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-19 15:45:28,768 INFO L933 BasicCegarLoop]: 493 mSDtfsCounter, 1096 mSDsluCounter, 983 mSDsCounter, 0 mSdLazyCounter, 495 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1295 SdHoareTripleChecker+Invalid, 705 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 495 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:28,769 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1295 Invalid, 705 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 495 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-19 15:45:28,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2113 states. [2021-11-19 15:45:28,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2113 to 1645. [2021-11-19 15:45:28,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1645 states, 1416 states have (on average 1.502824858757062) internal successors, (2128), 1406 states have internal predecessors, (2128), 172 states have call successors, (172), 50 states have call predecessors, (172), 56 states have return successors, (213), 189 states have call predecessors, (213), 172 states have call successors, (213) [2021-11-19 15:45:28,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1645 states to 1645 states and 2513 transitions. [2021-11-19 15:45:28,905 INFO L78 Accepts]: Start accepts. Automaton has 1645 states and 2513 transitions. Word has length 67 [2021-11-19 15:45:28,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:28,905 INFO L470 AbstractCegarLoop]: Abstraction has 1645 states and 2513 transitions. [2021-11-19 15:45:28,906 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:28,906 INFO L276 IsEmpty]: Start isEmpty. Operand 1645 states and 2513 transitions. [2021-11-19 15:45:28,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:28,910 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:28,910 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:28,911 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-11-19 15:45:28,911 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:28,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:28,911 INFO L85 PathProgramCache]: Analyzing trace with hash 1016262748, now seen corresponding path program 1 times [2021-11-19 15:45:28,912 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:28,912 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630571787] [2021-11-19 15:45:28,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:28,913 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:28,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:29,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:29,078 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:29,079 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630571787] [2021-11-19 15:45:29,079 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630571787] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:29,079 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:29,079 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-19 15:45:29,079 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159360812] [2021-11-19 15:45:29,079 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:29,080 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-19 15:45:29,080 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:29,080 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-19 15:45:29,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:29,081 INFO L87 Difference]: Start difference. First operand 1645 states and 2513 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:29,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:29,538 INFO L93 Difference]: Finished difference Result 4896 states and 7618 transitions. [2021-11-19 15:45:29,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-19 15:45:29,539 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:29,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:29,567 INFO L225 Difference]: With dead ends: 4896 [2021-11-19 15:45:29,567 INFO L226 Difference]: Without dead ends: 3256 [2021-11-19 15:45:29,577 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:29,578 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 531 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 531 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:29,578 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [531 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-11-19 15:45:29,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3256 states. [2021-11-19 15:45:29,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3256 to 3244. [2021-11-19 15:45:29,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3244 states, 2799 states have (on average 1.4948195784208647) internal successors, (4184), 2779 states have internal predecessors, (4184), 332 states have call successors, (332), 100 states have call predecessors, (332), 112 states have return successors, (411), 365 states have call predecessors, (411), 332 states have call successors, (411) [2021-11-19 15:45:29,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3244 states to 3244 states and 4927 transitions. [2021-11-19 15:45:29,823 INFO L78 Accepts]: Start accepts. Automaton has 3244 states and 4927 transitions. Word has length 67 [2021-11-19 15:45:29,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:29,823 INFO L470 AbstractCegarLoop]: Abstraction has 3244 states and 4927 transitions. [2021-11-19 15:45:29,824 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:29,824 INFO L276 IsEmpty]: Start isEmpty. Operand 3244 states and 4927 transitions. [2021-11-19 15:45:29,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:29,825 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:29,825 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:29,825 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-11-19 15:45:29,826 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:29,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:29,826 INFO L85 PathProgramCache]: Analyzing trace with hash -1139251653, now seen corresponding path program 1 times [2021-11-19 15:45:29,826 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:29,827 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671642976] [2021-11-19 15:45:29,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:29,827 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:29,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:29,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:29,898 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:29,898 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671642976] [2021-11-19 15:45:29,898 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [671642976] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:29,899 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:29,899 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-19 15:45:29,899 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323860061] [2021-11-19 15:45:29,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:29,900 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-19 15:45:29,900 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:29,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-19 15:45:29,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:29,901 INFO L87 Difference]: Start difference. First operand 3244 states and 4927 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:30,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:30,525 INFO L93 Difference]: Finished difference Result 9665 states and 14945 transitions. [2021-11-19 15:45:30,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-19 15:45:30,526 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:30,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:30,623 INFO L225 Difference]: With dead ends: 9665 [2021-11-19 15:45:30,623 INFO L226 Difference]: Without dead ends: 6426 [2021-11-19 15:45:30,637 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:30,641 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 537 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 537 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:30,642 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [537 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-11-19 15:45:30,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6426 states. [2021-11-19 15:45:31,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6426 to 6404. [2021-11-19 15:45:31,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6404 states, 5535 states have (on average 1.4863595302619692) internal successors, (8227), 5496 states have internal predecessors, (8227), 644 states have call successors, (644), 200 states have call predecessors, (644), 224 states have return successors, (796), 708 states have call predecessors, (796), 644 states have call successors, (796) [2021-11-19 15:45:31,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6404 states to 6404 states and 9667 transitions. [2021-11-19 15:45:31,124 INFO L78 Accepts]: Start accepts. Automaton has 6404 states and 9667 transitions. Word has length 67 [2021-11-19 15:45:31,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:31,125 INFO L470 AbstractCegarLoop]: Abstraction has 6404 states and 9667 transitions. [2021-11-19 15:45:31,125 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:31,125 INFO L276 IsEmpty]: Start isEmpty. Operand 6404 states and 9667 transitions. [2021-11-19 15:45:31,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:31,126 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:31,126 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:31,126 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-11-19 15:45:31,127 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:31,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:31,127 INFO L85 PathProgramCache]: Analyzing trace with hash 1390899034, now seen corresponding path program 1 times [2021-11-19 15:45:31,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:31,128 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702111114] [2021-11-19 15:45:31,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:31,128 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:31,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:31,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:31,202 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:31,202 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702111114] [2021-11-19 15:45:31,202 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1702111114] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:31,202 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:31,202 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-19 15:45:31,202 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948622992] [2021-11-19 15:45:31,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:31,203 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-19 15:45:31,203 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:31,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-19 15:45:31,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-19 15:45:31,204 INFO L87 Difference]: Start difference. First operand 6404 states and 9667 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:32,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:32,472 INFO L93 Difference]: Finished difference Result 21857 states and 33614 transitions. [2021-11-19 15:45:32,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-19 15:45:32,472 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:32,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:32,602 INFO L225 Difference]: With dead ends: 21857 [2021-11-19 15:45:32,602 INFO L226 Difference]: Without dead ends: 15082 [2021-11-19 15:45:32,646 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-19 15:45:32,647 INFO L933 BasicCegarLoop]: 487 mSDtfsCounter, 1096 mSDsluCounter, 739 mSDsCounter, 0 mSdLazyCounter, 444 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 444 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:32,648 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1089 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 444 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2021-11-19 15:45:32,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15082 states. [2021-11-19 15:45:33,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15082 to 12392. [2021-11-19 15:45:33,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12392 states, 10707 states have (on average 1.4852899971980946) internal successors, (15903), 10684 states have internal predecessors, (15903), 1236 states have call successors, (1236), 392 states have call predecessors, (1236), 448 states have return successors, (1580), 1316 states have call predecessors, (1580), 1236 states have call successors, (1580) [2021-11-19 15:45:33,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12392 states to 12392 states and 18719 transitions. [2021-11-19 15:45:33,533 INFO L78 Accepts]: Start accepts. Automaton has 12392 states and 18719 transitions. Word has length 67 [2021-11-19 15:45:33,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:33,534 INFO L470 AbstractCegarLoop]: Abstraction has 12392 states and 18719 transitions. [2021-11-19 15:45:33,534 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:33,534 INFO L276 IsEmpty]: Start isEmpty. Operand 12392 states and 18719 transitions. [2021-11-19 15:45:33,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:33,535 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:33,535 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:33,535 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-11-19 15:45:33,536 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:33,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:33,536 INFO L85 PathProgramCache]: Analyzing trace with hash 1333754809, now seen corresponding path program 1 times [2021-11-19 15:45:33,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:33,537 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408677804] [2021-11-19 15:45:33,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:33,537 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:33,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:33,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:33,611 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:33,611 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408677804] [2021-11-19 15:45:33,611 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1408677804] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:33,611 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:33,612 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-19 15:45:33,612 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995544330] [2021-11-19 15:45:33,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:33,612 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-19 15:45:33,613 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:33,613 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-19 15:45:33,613 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-19 15:45:33,613 INFO L87 Difference]: Start difference. First operand 12392 states and 18719 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:35,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:35,583 INFO L93 Difference]: Finished difference Result 41661 states and 64226 transitions. [2021-11-19 15:45:35,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-19 15:45:35,584 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:35,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:35,744 INFO L225 Difference]: With dead ends: 41661 [2021-11-19 15:45:35,744 INFO L226 Difference]: Without dead ends: 28546 [2021-11-19 15:45:35,803 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-19 15:45:35,803 INFO L933 BasicCegarLoop]: 487 mSDtfsCounter, 1096 mSDsluCounter, 739 mSDsCounter, 0 mSdLazyCounter, 444 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 444 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:35,804 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1089 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 444 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-11-19 15:45:35,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28546 states. [2021-11-19 15:45:37,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28546 to 24208. [2021-11-19 15:45:37,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24208 states, 20923 states have (on average 1.4831047172967549) internal successors, (31031), 20932 states have internal predecessors, (31031), 2388 states have call successors, (2388), 776 states have call predecessors, (2388), 896 states have return successors, (3100), 2500 states have call predecessors, (3100), 2388 states have call successors, (3100) [2021-11-19 15:45:37,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24208 states to 24208 states and 36519 transitions. [2021-11-19 15:45:37,379 INFO L78 Accepts]: Start accepts. Automaton has 24208 states and 36519 transitions. Word has length 67 [2021-11-19 15:45:37,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:37,379 INFO L470 AbstractCegarLoop]: Abstraction has 24208 states and 36519 transitions. [2021-11-19 15:45:37,380 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:37,380 INFO L276 IsEmpty]: Start isEmpty. Operand 24208 states and 36519 transitions. [2021-11-19 15:45:37,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:37,387 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:37,387 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:37,387 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-11-19 15:45:37,388 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:37,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:37,389 INFO L85 PathProgramCache]: Analyzing trace with hash -256640168, now seen corresponding path program 1 times [2021-11-19 15:45:37,389 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:37,389 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489623579] [2021-11-19 15:45:37,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:37,390 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:37,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:37,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:37,485 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:37,486 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1489623579] [2021-11-19 15:45:37,486 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1489623579] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:37,486 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:37,486 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-19 15:45:37,486 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869468417] [2021-11-19 15:45:37,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:37,488 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-19 15:45:37,488 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:37,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-19 15:45:37,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:37,489 INFO L87 Difference]: Start difference. First operand 24208 states and 36519 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:39,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:39,930 INFO L93 Difference]: Finished difference Result 72165 states and 110840 transitions. [2021-11-19 15:45:39,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-19 15:45:39,930 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:39,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:40,174 INFO L225 Difference]: With dead ends: 72165 [2021-11-19 15:45:40,175 INFO L226 Difference]: Without dead ends: 47962 [2021-11-19 15:45:40,252 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-19 15:45:40,253 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 552 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 552 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:40,253 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [552 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-11-19 15:45:40,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47962 states. [2021-11-19 15:45:42,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47962 to 47824. [2021-11-19 15:45:42,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47824 states, 41387 states have (on average 1.4730954164351124) internal successors, (60967), 41408 states have internal predecessors, (60967), 4644 states have call successors, (4644), 1552 states have call predecessors, (4644), 1792 states have return successors, (6008), 4864 states have call predecessors, (6008), 4644 states have call successors, (6008) [2021-11-19 15:45:43,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47824 states to 47824 states and 71619 transitions. [2021-11-19 15:45:43,164 INFO L78 Accepts]: Start accepts. Automaton has 47824 states and 71619 transitions. Word has length 67 [2021-11-19 15:45:43,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:43,165 INFO L470 AbstractCegarLoop]: Abstraction has 47824 states and 71619 transitions. [2021-11-19 15:45:43,165 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:43,165 INFO L276 IsEmpty]: Start isEmpty. Operand 47824 states and 71619 transitions. [2021-11-19 15:45:43,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-19 15:45:43,166 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:43,167 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:43,167 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-11-19 15:45:43,167 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:43,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:43,168 INFO L85 PathProgramCache]: Analyzing trace with hash -1230129127, now seen corresponding path program 1 times [2021-11-19 15:45:43,168 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:43,168 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105534930] [2021-11-19 15:45:43,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:43,168 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:43,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-19 15:45:43,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-19 15:45:43,317 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-19 15:45:43,318 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105534930] [2021-11-19 15:45:43,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105534930] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-19 15:45:43,318 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-19 15:45:43,318 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-11-19 15:45:43,318 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243767814] [2021-11-19 15:45:43,319 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-19 15:45:43,319 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-11-19 15:45:43,320 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-19 15:45:43,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-11-19 15:45:43,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-11-19 15:45:43,321 INFO L87 Difference]: Start difference. First operand 47824 states and 71619 transitions. Second operand has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:47,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-19 15:45:47,938 INFO L93 Difference]: Finished difference Result 152068 states and 227817 transitions. [2021-11-19 15:45:47,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-11-19 15:45:47,939 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-19 15:45:47,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-19 15:45:48,889 INFO L225 Difference]: With dead ends: 152068 [2021-11-19 15:45:48,889 INFO L226 Difference]: Without dead ends: 104250 [2021-11-19 15:45:49,082 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2021-11-19 15:45:49,084 INFO L933 BasicCegarLoop]: 260 mSDtfsCounter, 1143 mSDsluCounter, 583 mSDsCounter, 0 mSdLazyCounter, 297 mSolverCounterSat, 161 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1150 SdHoareTripleChecker+Valid, 744 SdHoareTripleChecker+Invalid, 458 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 161 IncrementalHoareTripleChecker+Valid, 297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-11-19 15:45:49,085 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1150 Valid, 744 Invalid, 458 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [161 Valid, 297 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-11-19 15:45:49,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104250 states. [2021-11-19 15:45:53,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104250 to 81344. [2021-11-19 15:45:53,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81344 states, 71227 states have (on average 1.4598256279219959) internal successors, (103979), 71268 states have internal predecessors, (103979), 7044 states have call successors, (7044), 2592 states have call predecessors, (7044), 3072 states have return successors, (9772), 7484 states have call predecessors, (9772), 7044 states have call successors, (9772) [2021-11-19 15:45:53,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81344 states to 81344 states and 120795 transitions. [2021-11-19 15:45:53,876 INFO L78 Accepts]: Start accepts. Automaton has 81344 states and 120795 transitions. Word has length 67 [2021-11-19 15:45:53,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-19 15:45:53,877 INFO L470 AbstractCegarLoop]: Abstraction has 81344 states and 120795 transitions. [2021-11-19 15:45:53,877 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-19 15:45:53,877 INFO L276 IsEmpty]: Start isEmpty. Operand 81344 states and 120795 transitions. [2021-11-19 15:45:53,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-11-19 15:45:53,878 INFO L506 BasicCegarLoop]: Found error trace [2021-11-19 15:45:53,878 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:53,879 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-11-19 15:45:53,879 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-19 15:45:53,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-19 15:45:53,880 INFO L85 PathProgramCache]: Analyzing trace with hash 473361867, now seen corresponding path program 1 times [2021-11-19 15:45:53,880 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-19 15:45:53,880 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295760133] [2021-11-19 15:45:53,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-19 15:45:53,880 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-19 15:45:53,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-19 15:45:53,919 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-19 15:45:53,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-19 15:45:54,074 INFO L133 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2021-11-19 15:45:54,075 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-11-19 15:45:54,076 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-11-19 15:45:54,078 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-11-19 15:45:54,085 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-19 15:45:54,088 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-11-19 15:45:54,292 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 19.11 03:45:54 BoogieIcfgContainer [2021-11-19 15:45:54,292 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-11-19 15:45:54,293 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-11-19 15:45:54,293 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-11-19 15:45:54,293 INFO L275 PluginConnector]: Witness Printer initialized [2021-11-19 15:45:54,294 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 03:45:25" (3/4) ... [2021-11-19 15:45:54,295 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-11-19 15:45:54,767 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/witness.graphml [2021-11-19 15:45:54,767 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-11-19 15:45:54,768 INFO L158 Benchmark]: Toolchain (without parser) took 31915.53ms. Allocated memory was 92.3MB in the beginning and 9.2GB in the end (delta: 9.1GB). Free memory was 58.4MB in the beginning and 8.4GB in the end (delta: -8.4GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2021-11-19 15:45:54,769 INFO L158 Benchmark]: CDTParser took 0.33ms. Allocated memory is still 92.3MB. Free memory was 66.0MB in the beginning and 65.9MB in the end (delta: 29.0kB). There was no memory consumed. Max. memory is 16.1GB. [2021-11-19 15:45:54,769 INFO L158 Benchmark]: CACSL2BoogieTranslator took 534.68ms. Allocated memory was 92.3MB in the beginning and 125.8MB in the end (delta: 33.6MB). Free memory was 58.2MB in the beginning and 92.0MB in the end (delta: -33.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2021-11-19 15:45:54,770 INFO L158 Benchmark]: Boogie Procedure Inliner took 109.95ms. Allocated memory is still 125.8MB. Free memory was 92.0MB in the beginning and 87.7MB in the end (delta: 4.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2021-11-19 15:45:54,770 INFO L158 Benchmark]: Boogie Preprocessor took 81.12ms. Allocated memory is still 125.8MB. Free memory was 87.7MB in the beginning and 84.3MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2021-11-19 15:45:54,770 INFO L158 Benchmark]: RCFGBuilder took 1674.91ms. Allocated memory is still 125.8MB. Free memory was 84.3MB in the beginning and 66.1MB in the end (delta: 18.2MB). Peak memory consumption was 57.0MB. Max. memory is 16.1GB. [2021-11-19 15:45:54,771 INFO L158 Benchmark]: TraceAbstraction took 29030.82ms. Allocated memory was 125.8MB in the beginning and 9.2GB in the end (delta: 9.1GB). Free memory was 66.1MB in the beginning and 8.1GB in the end (delta: -8.1GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2021-11-19 15:45:54,772 INFO L158 Benchmark]: Witness Printer took 474.84ms. Allocated memory is still 9.2GB. Free memory was 8.1GB in the beginning and 8.4GB in the end (delta: -312.5MB). Peak memory consumption was 87.0MB. Max. memory is 16.1GB. [2021-11-19 15:45:54,774 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33ms. Allocated memory is still 92.3MB. Free memory was 66.0MB in the beginning and 65.9MB in the end (delta: 29.0kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 534.68ms. Allocated memory was 92.3MB in the beginning and 125.8MB in the end (delta: 33.6MB). Free memory was 58.2MB in the beginning and 92.0MB in the end (delta: -33.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 109.95ms. Allocated memory is still 125.8MB. Free memory was 92.0MB in the beginning and 87.7MB in the end (delta: 4.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 81.12ms. Allocated memory is still 125.8MB. Free memory was 87.7MB in the beginning and 84.3MB in the end (delta: 3.4MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1674.91ms. Allocated memory is still 125.8MB. Free memory was 84.3MB in the beginning and 66.1MB in the end (delta: 18.2MB). Peak memory consumption was 57.0MB. Max. memory is 16.1GB. * TraceAbstraction took 29030.82ms. Allocated memory was 125.8MB in the beginning and 9.2GB in the end (delta: 9.1GB). Free memory was 66.1MB in the beginning and 8.1GB in the end (delta: -8.1GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. * Witness Printer took 474.84ms. Allocated memory is still 9.2GB. Free memory was 8.1GB in the beginning and 8.4GB in the end (delta: -312.5MB). Peak memory consumption was 87.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] int m_pc = 0; [L26] int t1_pc = 0; [L27] int t2_pc = 0; [L28] int t3_pc = 0; [L29] int t4_pc = 0; [L30] int t5_pc = 0; [L31] int t6_pc = 0; [L32] int t7_pc = 0; [L33] int t8_pc = 0; [L34] int t9_pc = 0; [L35] int t10_pc = 0; [L36] int t11_pc = 0; [L37] int t12_pc = 0; [L38] int t13_pc = 0; [L39] int m_st ; [L40] int t1_st ; [L41] int t2_st ; [L42] int t3_st ; [L43] int t4_st ; [L44] int t5_st ; [L45] int t6_st ; [L46] int t7_st ; [L47] int t8_st ; [L48] int t9_st ; [L49] int t10_st ; [L50] int t11_st ; [L51] int t12_st ; [L52] int t13_st ; [L53] int m_i ; [L54] int t1_i ; [L55] int t2_i ; [L56] int t3_i ; [L57] int t4_i ; [L58] int t5_i ; [L59] int t6_i ; [L60] int t7_i ; [L61] int t8_i ; [L62] int t9_i ; [L63] int t10_i ; [L64] int t11_i ; [L65] int t12_i ; [L66] int t13_i ; [L67] int M_E = 2; [L68] int T1_E = 2; [L69] int T2_E = 2; [L70] int T3_E = 2; [L71] int T4_E = 2; [L72] int T5_E = 2; [L73] int T6_E = 2; [L74] int T7_E = 2; [L75] int T8_E = 2; [L76] int T9_E = 2; [L77] int T10_E = 2; [L78] int T11_E = 2; [L79] int T12_E = 2; [L80] int T13_E = 2; [L81] int E_1 = 2; [L82] int E_2 = 2; [L83] int E_3 = 2; [L84] int E_4 = 2; [L85] int E_5 = 2; [L86] int E_6 = 2; [L87] int E_7 = 2; [L88] int E_8 = 2; [L89] int E_9 = 2; [L90] int E_10 = 2; [L91] int E_11 = 2; [L92] int E_12 = 2; [L93] int E_13 = 2; [L1937] int __retres1 ; [L1941] CALL init_model() [L1840] m_i = 1 [L1841] t1_i = 1 [L1842] t2_i = 1 [L1843] t3_i = 1 [L1844] t4_i = 1 [L1845] t5_i = 1 [L1846] t6_i = 1 [L1847] t7_i = 1 [L1848] t8_i = 1 [L1849] t9_i = 1 [L1850] t10_i = 1 [L1851] t11_i = 1 [L1852] t12_i = 1 [L1853] t13_i = 1 [L1941] RET init_model() [L1942] CALL start_simulation() [L1878] int kernel_st ; [L1879] int tmp ; [L1880] int tmp___0 ; [L1884] kernel_st = 0 VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1885] FCALL update_channels() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1886] CALL init_threads() [L881] COND TRUE m_i == 1 [L882] m_st = 0 [L886] COND TRUE t1_i == 1 [L887] t1_st = 0 [L891] COND TRUE t2_i == 1 [L892] t2_st = 0 [L896] COND TRUE t3_i == 1 [L897] t3_st = 0 [L901] COND TRUE t4_i == 1 [L902] t4_st = 0 [L906] COND TRUE t5_i == 1 [L907] t5_st = 0 [L911] COND TRUE t6_i == 1 [L912] t6_st = 0 [L916] COND TRUE t7_i == 1 [L917] t7_st = 0 [L921] COND TRUE t8_i == 1 [L922] t8_st = 0 [L926] COND TRUE t9_i == 1 [L927] t9_st = 0 [L931] COND TRUE t10_i == 1 [L932] t10_st = 0 [L936] COND TRUE t11_i == 1 [L937] t11_st = 0 [L941] COND TRUE t12_i == 1 [L942] t12_st = 0 [L946] COND TRUE t13_i == 1 [L947] t13_st = 0 [L1886] RET init_threads() [L1887] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_10)=2, \old(E_11)=2, \old(E_12)=2, \old(E_13)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(E_5)=2, \old(E_6)=2, \old(E_7)=2, \old(E_8)=2, \old(E_9)=2, \old(M_E)=2, \old(T10_E)=2, \old(T11_E)=2, \old(T12_E)=2, \old(T13_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, \old(T4_E)=2, \old(T5_E)=2, \old(T6_E)=2, \old(T7_E)=2, \old(T8_E)=2, \old(T9_E)=2, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1258] COND FALSE !(M_E == 0) [L1263] COND FALSE !(T1_E == 0) [L1268] COND FALSE !(T2_E == 0) [L1273] COND FALSE !(T3_E == 0) [L1278] COND FALSE !(T4_E == 0) [L1283] COND FALSE !(T5_E == 0) [L1288] COND FALSE !(T6_E == 0) [L1293] COND FALSE !(T7_E == 0) [L1298] COND FALSE !(T8_E == 0) [L1303] COND FALSE !(T9_E == 0) [L1308] COND FALSE !(T10_E == 0) [L1313] COND FALSE !(T11_E == 0) [L1318] COND FALSE !(T12_E == 0) [L1323] COND FALSE !(T13_E == 0) [L1328] COND FALSE !(E_1 == 0) [L1333] COND FALSE !(E_2 == 0) [L1338] COND FALSE !(E_3 == 0) [L1343] COND FALSE !(E_4 == 0) [L1348] COND FALSE !(E_5 == 0) [L1353] COND FALSE !(E_6 == 0) [L1358] COND FALSE !(E_7 == 0) [L1363] COND FALSE !(E_8 == 0) [L1368] COND FALSE !(E_9 == 0) [L1373] COND FALSE !(E_10 == 0) [L1378] COND FALSE !(E_11 == 0) [L1383] COND FALSE !(E_12 == 0) [L1388] COND FALSE !(E_13 == 0) [L1887] RET fire_delta_events() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1888] CALL activate_threads() VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1541] int tmp ; [L1542] int tmp___0 ; [L1543] int tmp___1 ; [L1544] int tmp___2 ; [L1545] int tmp___3 ; [L1546] int tmp___4 ; [L1547] int tmp___5 ; [L1548] int tmp___6 ; [L1549] int tmp___7 ; [L1550] int tmp___8 ; [L1551] int tmp___9 ; [L1552] int tmp___10 ; [L1553] int tmp___11 ; [L1554] int tmp___12 ; [L1558] CALL, EXPR is_master_triggered() [L604] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L607] COND FALSE !(m_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L617] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L619] return (__retres1); [L1558] RET, EXPR is_master_triggered() [L1558] tmp = is_master_triggered() [L1560] COND FALSE !(\read(tmp)) [L1566] CALL, EXPR is_transmit1_triggered() [L623] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L626] COND FALSE !(t1_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L636] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L638] return (__retres1); [L1566] RET, EXPR is_transmit1_triggered() [L1566] tmp___0 = is_transmit1_triggered() [L1568] COND FALSE !(\read(tmp___0)) [L1574] CALL, EXPR is_transmit2_triggered() [L642] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L645] COND FALSE !(t2_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L655] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L657] return (__retres1); [L1574] RET, EXPR is_transmit2_triggered() [L1574] tmp___1 = is_transmit2_triggered() [L1576] COND FALSE !(\read(tmp___1)) [L1582] CALL, EXPR is_transmit3_triggered() [L661] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L664] COND FALSE !(t3_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L674] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L676] return (__retres1); [L1582] RET, EXPR is_transmit3_triggered() [L1582] tmp___2 = is_transmit3_triggered() [L1584] COND FALSE !(\read(tmp___2)) [L1590] CALL, EXPR is_transmit4_triggered() [L680] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L683] COND FALSE !(t4_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L693] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L695] return (__retres1); [L1590] RET, EXPR is_transmit4_triggered() [L1590] tmp___3 = is_transmit4_triggered() [L1592] COND FALSE !(\read(tmp___3)) [L1598] CALL, EXPR is_transmit5_triggered() [L699] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L702] COND FALSE !(t5_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L712] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L714] return (__retres1); [L1598] RET, EXPR is_transmit5_triggered() [L1598] tmp___4 = is_transmit5_triggered() [L1600] COND FALSE !(\read(tmp___4)) [L1606] CALL, EXPR is_transmit6_triggered() [L718] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L721] COND FALSE !(t6_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L731] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L733] return (__retres1); [L1606] RET, EXPR is_transmit6_triggered() [L1606] tmp___5 = is_transmit6_triggered() [L1608] COND FALSE !(\read(tmp___5)) [L1614] CALL, EXPR is_transmit7_triggered() [L737] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L740] COND FALSE !(t7_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L750] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L752] return (__retres1); [L1614] RET, EXPR is_transmit7_triggered() [L1614] tmp___6 = is_transmit7_triggered() [L1616] COND FALSE !(\read(tmp___6)) [L1622] CALL, EXPR is_transmit8_triggered() [L756] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L759] COND FALSE !(t8_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L769] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L771] return (__retres1); [L1622] RET, EXPR is_transmit8_triggered() [L1622] tmp___7 = is_transmit8_triggered() [L1624] COND FALSE !(\read(tmp___7)) [L1630] CALL, EXPR is_transmit9_triggered() [L775] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L778] COND FALSE !(t9_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L788] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L790] return (__retres1); [L1630] RET, EXPR is_transmit9_triggered() [L1630] tmp___8 = is_transmit9_triggered() [L1632] COND FALSE !(\read(tmp___8)) [L1638] CALL, EXPR is_transmit10_triggered() [L794] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L797] COND FALSE !(t10_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L807] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L809] return (__retres1); [L1638] RET, EXPR is_transmit10_triggered() [L1638] tmp___9 = is_transmit10_triggered() [L1640] COND FALSE !(\read(tmp___9)) [L1646] CALL, EXPR is_transmit11_triggered() [L813] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L816] COND FALSE !(t11_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L826] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L828] return (__retres1); [L1646] RET, EXPR is_transmit11_triggered() [L1646] tmp___10 = is_transmit11_triggered() [L1648] COND FALSE !(\read(tmp___10)) [L1654] CALL, EXPR is_transmit12_triggered() [L832] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L835] COND FALSE !(t12_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L845] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L847] return (__retres1); [L1654] RET, EXPR is_transmit12_triggered() [L1654] tmp___11 = is_transmit12_triggered() [L1656] COND FALSE !(\read(tmp___11)) [L1662] CALL, EXPR is_transmit13_triggered() [L851] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L854] COND FALSE !(t13_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L864] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L866] return (__retres1); [L1662] RET, EXPR is_transmit13_triggered() [L1662] tmp___12 = is_transmit13_triggered() [L1664] COND FALSE !(\read(tmp___12)) [L1888] RET activate_threads() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1889] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_10)=2, \old(E_11)=2, \old(E_12)=2, \old(E_13)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(E_5)=2, \old(E_6)=2, \old(E_7)=2, \old(E_8)=2, \old(E_9)=2, \old(M_E)=2, \old(T10_E)=2, \old(T11_E)=2, \old(T12_E)=2, \old(T13_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, \old(T4_E)=2, \old(T5_E)=2, \old(T6_E)=2, \old(T7_E)=2, \old(T8_E)=2, \old(T9_E)=2, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1401] COND FALSE !(M_E == 1) [L1406] COND FALSE !(T1_E == 1) [L1411] COND FALSE !(T2_E == 1) [L1416] COND FALSE !(T3_E == 1) [L1421] COND FALSE !(T4_E == 1) [L1426] COND FALSE !(T5_E == 1) [L1431] COND FALSE !(T6_E == 1) [L1436] COND FALSE !(T7_E == 1) [L1441] COND FALSE !(T8_E == 1) [L1446] COND FALSE !(T9_E == 1) [L1451] COND FALSE !(T10_E == 1) [L1456] COND FALSE !(T11_E == 1) [L1461] COND FALSE !(T12_E == 1) [L1466] COND FALSE !(T13_E == 1) [L1471] COND FALSE !(E_1 == 1) [L1476] COND FALSE !(E_2 == 1) [L1481] COND FALSE !(E_3 == 1) [L1486] COND FALSE !(E_4 == 1) [L1491] COND FALSE !(E_5 == 1) [L1496] COND FALSE !(E_6 == 1) [L1501] COND FALSE !(E_7 == 1) [L1506] COND FALSE !(E_8 == 1) [L1511] COND FALSE !(E_9 == 1) [L1516] COND FALSE !(E_10 == 1) [L1521] COND FALSE !(E_11 == 1) [L1526] COND FALSE !(E_12 == 1) [L1531] COND FALSE !(E_13 == 1) [L1889] RET reset_delta_events() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1892] COND TRUE 1 [L1895] kernel_st = 1 [L1896] CALL eval() [L1037] int tmp ; VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1041] COND TRUE 1 VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1044] CALL, EXPR exists_runnable_thread() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L956] int __retres1 ; [L959] COND TRUE m_st == 0 [L960] __retres1 = 1 [L1032] return (__retres1); [L1044] RET, EXPR exists_runnable_thread() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1044] tmp = exists_runnable_thread() [L1046] COND TRUE \read(tmp) VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0, tmp=1] [L1051] COND TRUE m_st == 0 [L1052] int tmp_ndt_1; [L1053] tmp_ndt_1 = __VERIFIER_nondet_int() [L1054] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0, tmp=1, tmp_ndt_1=0] [L1065] COND TRUE t1_st == 0 [L1066] int tmp_ndt_2; [L1067] tmp_ndt_2 = __VERIFIER_nondet_int() [L1068] COND FALSE !(\read(tmp_ndt_2)) [L1074] CALL error() [L21] reach_error() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 193 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 28.7s, OverallIterations: 10, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 15.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 7726 SdHoareTripleChecker+Valid, 4.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 7663 mSDsluCounter, 8835 SdHoareTripleChecker+Invalid, 3.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5892 mSDsCounter, 1030 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3393 IncrementalHoareTripleChecker+Invalid, 4423 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1030 mSolverCounterUnsat, 4057 mSDtfsCounter, 3393 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 67 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=81344occurred in iteration=9, InterpolantAutomatonStates: 44, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 11.2s AutomataMinimizationTime, 9 MinimizatonAttempts, 30589 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 671 NumberOfCodeBlocks, 671 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 594 ConstructedInterpolants, 0 QuantifiedInterpolants, 1468 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-11-19 15:45:54,834 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b814e6d7-0166-41a3-bba3-8985a0e47a32/bin/utaipan-UbGMyvGFUs/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE