./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread/fib_unsafe-6.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 53f42b1a Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread/fib_unsafe-6.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4c475d56613186560380fd7710c1a393bef46e366024d2f60e26aa83cc625627 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-53f42b1 [2021-11-21 01:57:52,072 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-21 01:57:52,076 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-21 01:57:52,140 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-21 01:57:52,141 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-21 01:57:52,146 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-21 01:57:52,148 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-21 01:57:52,153 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-21 01:57:52,156 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-21 01:57:52,162 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-21 01:57:52,164 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-21 01:57:52,166 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-21 01:57:52,167 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-21 01:57:52,170 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-21 01:57:52,172 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-21 01:57:52,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-21 01:57:52,179 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-21 01:57:52,181 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-21 01:57:52,183 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-21 01:57:52,192 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-21 01:57:52,194 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-21 01:57:52,196 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-21 01:57:52,199 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-21 01:57:52,201 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-21 01:57:52,211 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-21 01:57:52,211 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-21 01:57:52,212 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-21 01:57:52,214 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-21 01:57:52,215 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-21 01:57:52,217 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-21 01:57:52,218 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-21 01:57:52,219 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-21 01:57:52,222 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-21 01:57:52,224 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-21 01:57:52,226 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-21 01:57:52,226 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-21 01:57:52,227 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-21 01:57:52,228 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-21 01:57:52,228 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-21 01:57:52,229 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-21 01:57:52,230 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-21 01:57:52,231 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-21 01:57:52,283 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-21 01:57:52,283 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-21 01:57:52,284 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-21 01:57:52,285 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-21 01:57:52,293 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-21 01:57:52,293 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-11-21 01:57:52,294 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-21 01:57:52,294 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-21 01:57:52,294 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-21 01:57:52,295 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-21 01:57:52,296 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-21 01:57:52,296 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-21 01:57:52,297 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-21 01:57:52,297 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-21 01:57:52,297 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-21 01:57:52,298 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-21 01:57:52,298 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-21 01:57:52,298 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2021-11-21 01:57:52,299 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-21 01:57:52,299 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-21 01:57:52,300 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-21 01:57:52,300 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-21 01:57:52,300 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-21 01:57:52,301 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-21 01:57:52,301 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-21 01:57:52,301 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-21 01:57:52,303 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-21 01:57:52,304 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-21 01:57:52,304 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-21 01:57:52,304 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-21 01:57:52,305 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-21 01:57:52,305 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-21 01:57:52,306 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-21 01:57:52,306 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-21 01:57:52,306 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-21 01:57:52,307 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-21 01:57:52,307 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-21 01:57:52,307 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-21 01:57:52,307 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-21 01:57:52,308 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-21 01:57:52,308 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-21 01:57:52,308 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4c475d56613186560380fd7710c1a393bef46e366024d2f60e26aa83cc625627 [2021-11-21 01:57:52,611 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-21 01:57:52,639 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-21 01:57:52,643 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-21 01:57:52,644 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-21 01:57:52,645 INFO L275 PluginConnector]: CDTParser initialized [2021-11-21 01:57:52,648 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/../../sv-benchmarks/c/pthread/fib_unsafe-6.i [2021-11-21 01:57:52,753 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/data/7e93266b0/847d54acbc984a33a4ee2d4bc7eea443/FLAG8ac54983d [2021-11-21 01:57:53,403 INFO L306 CDTParser]: Found 1 translation units. [2021-11-21 01:57:53,410 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/sv-benchmarks/c/pthread/fib_unsafe-6.i [2021-11-21 01:57:53,433 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/data/7e93266b0/847d54acbc984a33a4ee2d4bc7eea443/FLAG8ac54983d [2021-11-21 01:57:53,648 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/data/7e93266b0/847d54acbc984a33a4ee2d4bc7eea443 [2021-11-21 01:57:53,653 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-21 01:57:53,655 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-21 01:57:53,660 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-21 01:57:53,661 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-21 01:57:53,665 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-21 01:57:53,666 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 01:57:53" (1/1) ... [2021-11-21 01:57:53,671 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50c24918 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:53, skipping insertion in model container [2021-11-21 01:57:53,672 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 01:57:53" (1/1) ... [2021-11-21 01:57:53,682 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-21 01:57:53,736 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-21 01:57:54,135 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/sv-benchmarks/c/pthread/fib_unsafe-6.i[30811,30824] [2021-11-21 01:57:54,140 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-21 01:57:54,151 INFO L203 MainTranslator]: Completed pre-run [2021-11-21 01:57:54,231 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/sv-benchmarks/c/pthread/fib_unsafe-6.i[30811,30824] [2021-11-21 01:57:54,232 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-21 01:57:54,272 INFO L208 MainTranslator]: Completed translation [2021-11-21 01:57:54,273 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54 WrapperNode [2021-11-21 01:57:54,273 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-21 01:57:54,274 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-21 01:57:54,275 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-21 01:57:54,275 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-21 01:57:54,284 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,332 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,365 INFO L137 Inliner]: procedures = 164, calls = 26, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 71 [2021-11-21 01:57:54,365 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-21 01:57:54,367 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-21 01:57:54,367 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-21 01:57:54,367 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-21 01:57:54,376 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,376 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,385 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,385 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,392 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,396 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,398 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,402 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-21 01:57:54,403 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-21 01:57:54,403 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-21 01:57:54,403 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-21 01:57:54,404 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (1/1) ... [2021-11-21 01:57:54,413 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-21 01:57:54,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 01:57:54,445 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-21 01:57:54,463 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-21 01:57:54,489 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2021-11-21 01:57:54,490 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2021-11-21 01:57:54,490 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2021-11-21 01:57:54,490 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2021-11-21 01:57:54,490 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-21 01:57:54,491 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-11-21 01:57:54,491 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-21 01:57:54,491 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-21 01:57:54,491 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-21 01:57:54,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-21 01:57:54,492 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-11-21 01:57:54,492 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-21 01:57:54,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-21 01:57:54,493 WARN L209 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-11-21 01:57:54,610 INFO L236 CfgBuilder]: Building ICFG [2021-11-21 01:57:54,612 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-21 01:57:54,820 INFO L277 CfgBuilder]: Performing block encoding [2021-11-21 01:57:54,829 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-21 01:57:54,843 INFO L301 CfgBuilder]: Removed 3 assume(true) statements. [2021-11-21 01:57:54,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 01:57:54 BoogieIcfgContainer [2021-11-21 01:57:54,846 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-21 01:57:54,849 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-21 01:57:54,849 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-21 01:57:54,866 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-21 01:57:54,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.11 01:57:53" (1/3) ... [2021-11-21 01:57:54,867 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6868bb6d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.11 01:57:54, skipping insertion in model container [2021-11-21 01:57:54,867 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 01:57:54" (2/3) ... [2021-11-21 01:57:54,868 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6868bb6d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.11 01:57:54, skipping insertion in model container [2021-11-21 01:57:54,868 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 01:57:54" (3/3) ... [2021-11-21 01:57:54,870 INFO L111 eAbstractionObserver]: Analyzing ICFG fib_unsafe-6.i [2021-11-21 01:57:54,876 WARN L149 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-11-21 01:57:54,877 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-21 01:57:54,877 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-21 01:57:54,877 INFO L513 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-11-21 01:57:54,916 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,917 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,917 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,917 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,918 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,918 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,918 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,918 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,919 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,925 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,925 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,926 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,926 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,927 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,927 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,927 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,928 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,928 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,929 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,929 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,929 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,929 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,930 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,930 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,930 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,930 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,931 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,932 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,932 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,932 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,933 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,933 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,933 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,934 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,934 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,934 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,938 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,939 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,939 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,939 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,940 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,943 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,944 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,944 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,945 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,945 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-21 01:57:54,946 INFO L148 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-11-21 01:57:55,007 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-21 01:57:55,015 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-21 01:57:55,016 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-11-21 01:57:55,041 INFO L118 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2021-11-21 01:57:55,076 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 96 places, 96 transitions, 202 flow [2021-11-21 01:57:55,080 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 96 places, 96 transitions, 202 flow [2021-11-21 01:57:55,083 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 96 places, 96 transitions, 202 flow [2021-11-21 01:57:55,155 INFO L129 PetriNetUnfolder]: 7/94 cut-off events. [2021-11-21 01:57:55,156 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2021-11-21 01:57:55,165 INFO L84 FinitePrefix]: Finished finitePrefix Result has 101 conditions, 94 events. 7/94 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 73 event pairs, 0 based on Foata normal form. 0/86 useless extension candidates. Maximal degree in co-relation 64. Up to 2 conditions per place. [2021-11-21 01:57:55,170 INFO L116 LiptonReduction]: Number of co-enabled transitions 1870 [2021-11-21 01:57:58,725 INFO L131 LiptonReduction]: Checked pairs total: 1462 [2021-11-21 01:57:58,726 INFO L133 LiptonReduction]: Total number of compositions: 92 [2021-11-21 01:57:58,739 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 20 places, 16 transitions, 42 flow [2021-11-21 01:57:58,757 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:58,759 INFO L276 IsEmpty]: Start isEmpty. Operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:58,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-11-21 01:57:58,765 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 01:57:58,766 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-11-21 01:57:58,766 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-21 01:57:58,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 01:57:58,772 INFO L85 PathProgramCache]: Analyzing trace with hash -2083717598, now seen corresponding path program 1 times [2021-11-21 01:57:58,782 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 01:57:58,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220951929] [2021-11-21 01:57:58,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:57:58,784 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 01:57:58,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:57:59,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:57:59,017 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 01:57:59,018 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220951929] [2021-11-21 01:57:59,019 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1220951929] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-21 01:57:59,019 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-21 01:57:59,020 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-21 01:57:59,022 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556651431] [2021-11-21 01:57:59,024 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-21 01:57:59,029 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-21 01:57:59,029 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 01:57:59,058 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-21 01:57:59,058 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-21 01:57:59,061 INFO L87 Difference]: Start difference. First operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 01:57:59,110 INFO L93 Difference]: Finished difference Result 44 states and 122 transitions. [2021-11-21 01:57:59,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-21 01:57:59,113 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-11-21 01:57:59,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 01:57:59,132 INFO L225 Difference]: With dead ends: 44 [2021-11-21 01:57:59,132 INFO L226 Difference]: Without dead ends: 44 [2021-11-21 01:57:59,133 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-21 01:57:59,138 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 9 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-21 01:57:59,140 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 0 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-21 01:57:59,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2021-11-21 01:57:59,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2021-11-21 01:57:59,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 2.8372093023255816) internal successors, (122), 43 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 122 transitions. [2021-11-21 01:57:59,181 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 122 transitions. Word has length 6 [2021-11-21 01:57:59,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 01:57:59,182 INFO L470 AbstractCegarLoop]: Abstraction has 44 states and 122 transitions. [2021-11-21 01:57:59,182 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,183 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 122 transitions. [2021-11-21 01:57:59,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2021-11-21 01:57:59,184 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 01:57:59,184 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-21 01:57:59,184 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-21 01:57:59,185 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-21 01:57:59,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 01:57:59,186 INFO L85 PathProgramCache]: Analyzing trace with hash -170735922, now seen corresponding path program 1 times [2021-11-21 01:57:59,186 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 01:57:59,186 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098546799] [2021-11-21 01:57:59,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:57:59,187 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 01:57:59,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:57:59,266 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:57:59,267 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 01:57:59,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1098546799] [2021-11-21 01:57:59,267 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1098546799] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 01:57:59,268 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [379750723] [2021-11-21 01:57:59,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:57:59,268 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:57:59,268 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 01:57:59,270 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 01:57:59,289 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-21 01:57:59,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:57:59,364 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-21 01:57:59,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 01:57:59,428 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:57:59,428 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 01:57:59,475 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:57:59,476 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [379750723] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 01:57:59,476 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [396788625] [2021-11-21 01:57:59,491 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-21 01:57:59,493 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 01:57:59,493 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2021-11-21 01:57:59,494 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210503172] [2021-11-21 01:57:59,495 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 01:57:59,495 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-11-21 01:57:59,495 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 01:57:59,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-11-21 01:57:59,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-21 01:57:59,497 INFO L87 Difference]: Start difference. First operand 44 states and 122 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 01:57:59,621 INFO L93 Difference]: Finished difference Result 71 states and 203 transitions. [2021-11-21 01:57:59,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-11-21 01:57:59,622 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2021-11-21 01:57:59,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 01:57:59,624 INFO L225 Difference]: With dead ends: 71 [2021-11-21 01:57:59,624 INFO L226 Difference]: Without dead ends: 71 [2021-11-21 01:57:59,624 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-21 01:57:59,626 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 42 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-21 01:57:59,627 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 0 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 44 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-21 01:57:59,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2021-11-21 01:57:59,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2021-11-21 01:57:59,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 70 states have (on average 2.9) internal successors, (203), 70 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 203 transitions. [2021-11-21 01:57:59,641 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 203 transitions. Word has length 7 [2021-11-21 01:57:59,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 01:57:59,641 INFO L470 AbstractCegarLoop]: Abstraction has 71 states and 203 transitions. [2021-11-21 01:57:59,642 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:57:59,642 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 203 transitions. [2021-11-21 01:57:59,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2021-11-21 01:57:59,643 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 01:57:59,643 INFO L514 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2021-11-21 01:57:59,683 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-11-21 01:57:59,844 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2021-11-21 01:57:59,844 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-21 01:57:59,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 01:57:59,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1152399070, now seen corresponding path program 2 times [2021-11-21 01:57:59,845 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 01:57:59,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313406911] [2021-11-21 01:57:59,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:57:59,846 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 01:57:59,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:57:59,956 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:57:59,957 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 01:57:59,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313406911] [2021-11-21 01:57:59,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [313406911] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 01:57:59,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1503248426] [2021-11-21 01:57:59,957 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-21 01:57:59,958 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:57:59,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 01:57:59,965 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 01:57:59,966 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-21 01:58:00,097 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-11-21 01:58:00,097 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-21 01:58:00,099 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 6 conjunts are in the unsatisfiable core [2021-11-21 01:58:00,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 01:58:00,176 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:00,176 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 01:58:00,263 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:00,264 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1503248426] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 01:58:00,264 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [2134331243] [2021-11-21 01:58:00,264 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-21 01:58:00,265 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 01:58:00,265 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2021-11-21 01:58:00,265 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024641487] [2021-11-21 01:58:00,267 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 01:58:00,273 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-11-21 01:58:00,274 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 01:58:00,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-11-21 01:58:00,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-21 01:58:00,276 INFO L87 Difference]: Start difference. First operand 71 states and 203 transitions. Second operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:00,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 01:58:00,464 INFO L93 Difference]: Finished difference Result 125 states and 365 transitions. [2021-11-21 01:58:00,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-21 01:58:00,467 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2021-11-21 01:58:00,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 01:58:00,478 INFO L225 Difference]: With dead ends: 125 [2021-11-21 01:58:00,479 INFO L226 Difference]: Without dead ends: 125 [2021-11-21 01:58:00,480 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-21 01:58:00,486 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 123 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-21 01:58:00,488 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [123 Valid, 0 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-21 01:58:00,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2021-11-21 01:58:00,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2021-11-21 01:58:00,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 124 states have (on average 2.943548387096774) internal successors, (365), 124 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:00,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 365 transitions. [2021-11-21 01:58:00,520 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 365 transitions. Word has length 10 [2021-11-21 01:58:00,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 01:58:00,520 INFO L470 AbstractCegarLoop]: Abstraction has 125 states and 365 transitions. [2021-11-21 01:58:00,521 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:00,521 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 365 transitions. [2021-11-21 01:58:00,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2021-11-21 01:58:00,524 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 01:58:00,525 INFO L514 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2021-11-21 01:58:00,567 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-11-21 01:58:00,739 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:58:00,740 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-21 01:58:00,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 01:58:00,740 INFO L85 PathProgramCache]: Analyzing trace with hash -981423710, now seen corresponding path program 3 times [2021-11-21 01:58:00,741 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 01:58:00,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163741920] [2021-11-21 01:58:00,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:58:00,741 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 01:58:00,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:58:00,929 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:00,930 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 01:58:00,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163741920] [2021-11-21 01:58:00,930 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [163741920] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 01:58:00,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [752571235] [2021-11-21 01:58:00,930 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-21 01:58:00,931 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:58:00,931 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 01:58:00,936 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 01:58:00,955 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-21 01:58:01,020 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-21 01:58:01,020 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-21 01:58:01,022 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 12 conjunts are in the unsatisfiable core [2021-11-21 01:58:01,025 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 01:58:01,115 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:01,115 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 01:58:01,232 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:01,232 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [752571235] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 01:58:01,233 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1330359744] [2021-11-21 01:58:01,236 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-21 01:58:01,236 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 01:58:01,236 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 16 [2021-11-21 01:58:01,238 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080457904] [2021-11-21 01:58:01,238 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 01:58:01,239 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-11-21 01:58:01,239 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 01:58:01,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-11-21 01:58:01,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2021-11-21 01:58:01,240 INFO L87 Difference]: Start difference. First operand 125 states and 365 transitions. Second operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:01,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 01:58:01,433 INFO L93 Difference]: Finished difference Result 161 states and 473 transitions. [2021-11-21 01:58:01,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-21 01:58:01,433 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2021-11-21 01:58:01,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 01:58:01,438 INFO L225 Difference]: With dead ends: 161 [2021-11-21 01:58:01,438 INFO L226 Difference]: Without dead ends: 161 [2021-11-21 01:58:01,439 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2021-11-21 01:58:01,445 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 189 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 189 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-21 01:58:01,447 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [189 Valid, 0 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-21 01:58:01,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2021-11-21 01:58:01,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2021-11-21 01:58:01,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 160 states have (on average 2.95625) internal successors, (473), 160 states have internal predecessors, (473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:01,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 473 transitions. [2021-11-21 01:58:01,491 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 473 transitions. Word has length 16 [2021-11-21 01:58:01,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 01:58:01,491 INFO L470 AbstractCegarLoop]: Abstraction has 161 states and 473 transitions. [2021-11-21 01:58:01,491 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:58:01,491 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 473 transitions. [2021-11-21 01:58:01,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2021-11-21 01:58:01,493 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 01:58:01,494 INFO L514 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1] [2021-11-21 01:58:01,533 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-11-21 01:58:01,719 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:58:01,719 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-21 01:58:01,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 01:58:01,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1547809954, now seen corresponding path program 4 times [2021-11-21 01:58:01,721 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 01:58:01,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2044465117] [2021-11-21 01:58:01,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 01:58:01,721 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 01:58:01,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:58:02,374 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:02,375 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 01:58:02,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2044465117] [2021-11-21 01:58:02,375 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2044465117] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 01:58:02,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [687993878] [2021-11-21 01:58:02,375 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-21 01:58:02,375 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 01:58:02,375 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 01:58:02,380 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 01:58:02,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c17f47f4-c5d6-4bbb-a39e-179ea741e5a8/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-21 01:58:02,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 01:58:02,474 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 46 conjunts are in the unsatisfiable core [2021-11-21 01:58:02,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 01:58:03,310 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 78 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:03,311 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 01:58:59,378 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 01:58:59,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [687993878] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 01:58:59,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [447606396] [2021-11-21 01:58:59,379 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-21 01:58:59,380 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 01:58:59,380 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 45 [2021-11-21 01:58:59,381 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [69798849] [2021-11-21 01:58:59,381 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 01:58:59,381 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2021-11-21 01:58:59,381 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 01:58:59,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-11-21 01:58:59,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=375, Invalid=1774, Unknown=13, NotChecked=0, Total=2162 [2021-11-21 01:58:59,384 INFO L87 Difference]: Start difference. First operand 161 states and 473 transitions. Second operand has 47 states, 46 states have (on average 1.3043478260869565) internal successors, (60), 46 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 01:59:59,692 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse4 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse1 (+ c_~i~0 376)) (.cse7 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse8 (+ .cse12 c_~prev~0)) (.cse3 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~i~0 (- 1))) (.cse6 (+ .cse12 c_~prev~0 1))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse3 (- 1) c_~cur~0) (- 2)) .cse4) (< (div (+ (- 1) .cse5 c_~cur~0) (- 2)) .cse4) (<= 377 .cse2) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6) (<= 377 .cse7) (<= .cse1 .cse7) (< c_~i~0 .cse8) (< c_~i~0 .cse0) (<= (div (+ .cse5 c_~prev~0 (- 5)) (- 2)) .cse9) (< c_~j~0 .cse8) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse5 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse11 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse11 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse11 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) is different from false [2021-11-21 02:00:19,792 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse10 c_~prev~0 1))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (<= 377 .cse2) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~i~0 .cse8) (< c_~i~0 .cse0) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse9) (<= .cse1 .cse3) (< c_~j~0 .cse8) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:00:36,847 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse1 (+ c_~prev~0 c_~cur~0 1)) (.cse4 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (* c_~j~0 (- 1))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse2 (* c_~i~0 (- 1))) (.cse3 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse0 (- 1) c_~cur~0) (- 2)) .cse1) (< (div (+ (- 1) .cse2 c_~cur~0) (- 2)) .cse1) (<= (div (+ .cse0 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse3) (<= 377 .cse4) (<= (+ c_~i~0 376) .cse4) (<= (div (+ .cse2 c_~prev~0 (- 5)) (- 2)) .cse5) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50))) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) .cse6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ .cse7 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) (<= (div (+ .cse0 c_~prev~0 (- 5)) (- 2)) .cse5) (<= (div (+ .cse2 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse3) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse9 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse9 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse9 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) is different from false [2021-11-21 02:00:39,147 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse3 (+ c_~prev~0 c_~cur~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~i~0 376)) (.cse6 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse7 (+ .cse11 c_~prev~0)) (.cse2 (* c_~j~0 (- 1))) (.cse8 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse5 (+ .cse11 c_~prev~0 1))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse2 (- 1) c_~cur~0) (- 2)) .cse3) (< (div (+ (- 1) .cse4 c_~cur~0) (- 2)) .cse3) (<= 377 .cse1) (<= (div (+ .cse2 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (<= 377 .cse6) (<= .cse0 .cse6) (< c_~i~0 .cse7) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse8) (< c_~j~0 .cse7) (<= (div (+ .cse2 c_~prev~0 (- 5)) (- 2)) .cse8) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse9 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse9 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse9 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) is different from false [2021-11-21 02:01:17,241 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse8 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse9 (+ .cse11 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse10 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse11 c_~prev~0 1))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (< c_~i~0 c_~prev~0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (< c_~j~0 c_~prev~0) (<= 377 .cse2) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (<= 377 .cse8) (<= .cse1 .cse8) (< c_~i~0 .cse9) (< c_~i~0 .cse0) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse10) (<= .cse1 .cse3) (< c_~j~0 .cse9) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse10) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:01:32,898 WARN L227 SmtUtils]: Spent 10.47s on a formula simplification. DAG size of input: 141 DAG size of output: 21 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 02:02:47,321 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse2 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse5 (+ .cse9 c_~prev~0)) (.cse1 (* c_~j~0 (- 1))) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse3 (* c_~i~0 (- 1))) (.cse4 (+ .cse9 c_~prev~0 1))) (and (<= (+ c_~i~0 376) .cse0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse1 (- 1) c_~cur~0) (- 2)) .cse2) (< (div (+ (- 1) .cse3 c_~cur~0) (- 2)) .cse2) (<= 377 .cse0) (<= (div (+ .cse1 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4) (< c_~i~0 .cse5) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse6) (< c_~j~0 .cse5) (<= (div (+ .cse1 c_~prev~0 (- 5)) (- 2)) .cse6) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) is different from false [2021-11-21 02:02:49,514 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse10 c_~prev~0 1))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (<= 377 .cse2) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~i~0 .cse8) (< c_~i~0 .cse0) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse9) (<= .cse1 .cse3) (< c_~j~0 .cse8) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7)))) is different from false [2021-11-21 02:03:23,021 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse6 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse10 (+ .cse12 c_~prev~0)) (.cse5 (* c_~j~0 (- 1))) (.cse11 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse7 (* c_~i~0 (- 1))) (.cse8 (+ .cse12 c_~prev~0 1)) (.cse4 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse1 .cse4) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse5 (- 1) c_~cur~0) (- 2)) .cse6) (< (div (+ (- 1) .cse7 c_~cur~0) (- 2)) .cse6) (<= 377 .cse2) (<= (div (+ .cse5 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse8) (<= 377 .cse9) (<= .cse1 .cse9) (< c_~i~0 .cse10) (< c_~i~0 .cse0) (<= (div (+ .cse7 c_~prev~0 (- 5)) (- 2)) .cse11) (<= .cse1 .cse3) (< c_~j~0 .cse10) (<= (div (+ .cse5 c_~prev~0 (- 5)) (- 2)) .cse11) (<= (div (+ .cse7 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse8) (<= 377 .cse4) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:03:46,714 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse2 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (* c_~j~0 (- 1))) (.cse4 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse3 (* c_~i~0 (- 1))) (.cse1 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (<= (div (+ .cse0 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse1) (<= 377 .cse2) (<= (+ c_~i~0 376) .cse2) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse4) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse5 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse5 (* 4 aux_div_v_~cur~0_67_50))) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) .cse5 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ .cse6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) (<= (div (+ .cse0 c_~prev~0 (- 5)) (- 2)) .cse4) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse1) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) is different from false [2021-11-21 02:03:48,934 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse3 (+ c_~prev~0 c_~cur~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~i~0 376)) (.cse6 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse2 (* c_~j~0 (- 1))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse5 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse2 (- 1) c_~cur~0) (- 2)) .cse3) (< (div (+ (- 1) .cse4 c_~cur~0) (- 2)) .cse3) (<= 377 .cse1) (<= (div (+ .cse2 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (<= 377 .cse6) (<= .cse0 .cse6) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse7) (<= (div (+ .cse2 c_~prev~0 (- 5)) (- 2)) .cse7) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse9 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse9 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse9 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) is different from false [2021-11-21 02:04:16,336 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse2 (+ c_~i~0 376)) (.cse1 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse10 c_~prev~0 1)) (.cse3 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= 377 .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse2 .cse3) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~i~0 .cse8) (< c_~i~0 .cse0) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse9) (<= .cse2 .cse1) (< c_~j~0 .cse8) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (<= 377 .cse3) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:04:18,711 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse7 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse10 (+ .cse12 c_~prev~0)) (.cse6 (* c_~j~0 (- 1))) (.cse11 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse8 (* c_~i~0 (- 1))) (.cse9 (+ .cse12 c_~prev~0 1)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse1 .cse4) (<= .cse1 .cse5) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (< c_~i~0 c_~prev~0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (<= 377 .cse4) (< (div (+ .cse6 (- 1) c_~cur~0) (- 2)) .cse7) (< (div (+ (- 1) .cse8 c_~cur~0) (- 2)) .cse7) (< c_~j~0 c_~prev~0) (<= 377 .cse2) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (< c_~i~0 .cse10) (< c_~i~0 .cse0) (<= (div (+ .cse8 c_~prev~0 (- 5)) (- 2)) .cse11) (<= .cse1 .cse3) (< c_~j~0 .cse10) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse11) (<= (div (+ .cse8 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (<= 377 .cse5) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:05:47,559 WARN L227 SmtUtils]: Spent 6.00s on a formula simplification. DAG size of input: 153 DAG size of output: 33 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 02:05:51,457 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse2 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse1 (* c_~j~0 (- 1))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse3 (* c_~i~0 (- 1))) (.cse4 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (<= (+ c_~i~0 376) .cse0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse1 (- 1) c_~cur~0) (- 2)) .cse2) (< (div (+ (- 1) .cse3 c_~cur~0) (- 2)) .cse2) (<= 377 .cse0) (<= (div (+ .cse1 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse5) (<= (div (+ .cse1 c_~prev~0 (- 5)) (- 2)) .cse5) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) .cse6 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 7 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 7 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) 4 (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) is different from false [2021-11-21 02:05:53,851 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse4 (+ c_~prev~0 c_~cur~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse7 (+ .cse9 c_~prev~0)) (.cse3 (* c_~j~0 (- 1))) (.cse8 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~i~0 (- 1))) (.cse6 (+ .cse9 c_~prev~0 1))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse3 (- 1) c_~cur~0) (- 2)) .cse4) (< (div (+ (- 1) .cse5 c_~cur~0) (- 2)) .cse4) (<= 377 .cse1) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6) (< c_~i~0 .cse7) (<= (div (+ .cse5 c_~prev~0 (- 5)) (- 2)) .cse8) (<= .cse0 .cse2) (< c_~j~0 .cse7) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse8) (<= (div (+ .cse5 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6)))) is different from false [2021-11-21 02:06:13,607 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse6 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse10 (+ .cse12 c_~prev~0)) (.cse5 (* c_~j~0 (- 1))) (.cse11 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse7 (* c_~i~0 (- 1))) (.cse8 (+ .cse12 c_~prev~0 1)) (.cse4 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse1 .cse4) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse5 (- 1) c_~cur~0) (- 2)) .cse6) (< (div (+ (- 1) .cse7 c_~cur~0) (- 2)) .cse6) (<= 377 .cse2) (<= (div (+ .cse5 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse8) (<= 377 .cse9) (<= .cse1 .cse9) (< c_~i~0 .cse10) (< c_~i~0 .cse0) (<= (div (+ .cse7 c_~prev~0 (- 5)) (- 2)) .cse11) (<= .cse1 .cse3) (< c_~j~0 .cse10) (<= (div (+ .cse5 c_~prev~0 (- 5)) (- 2)) .cse11) (<= (div (+ .cse7 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse8) (<= 377 .cse4)))) is different from false [2021-11-21 02:06:16,406 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse7 (* 2 c_~cur~0))) (let ((.cse2 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse5 (+ .cse7 c_~prev~0)) (.cse1 (* c_~j~0 (- 1))) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse3 (* c_~i~0 (- 1))) (.cse4 (+ .cse7 c_~prev~0 1))) (and (<= 377 .cse0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse1 (- 1) c_~cur~0) (- 2)) .cse2) (< (div (+ (- 1) .cse3 c_~cur~0) (- 2)) .cse2) (<= (div (+ .cse1 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4) (< c_~i~0 .cse5) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse6) (<= (+ c_~i~0 376) .cse0) (< c_~j~0 .cse5) (<= (div (+ .cse1 c_~prev~0 (- 5)) (- 2)) .cse6) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse4)))) is different from false [2021-11-21 02:06:18,918 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse2 (+ c_~i~0 376)) (.cse1 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse10 c_~prev~0 1)) (.cse3 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= 377 .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse2 .cse3) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~i~0 .cse8) (< c_~i~0 .cse0) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse9) (<= .cse2 .cse1) (< c_~j~0 .cse8) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (<= 377 .cse3)))) is different from false [2021-11-21 02:06:21,615 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse7 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse10 (+ .cse12 c_~prev~0)) (.cse6 (* c_~j~0 (- 1))) (.cse11 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse8 (* c_~i~0 (- 1))) (.cse9 (+ .cse12 c_~prev~0 1)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse1 .cse4) (<= .cse1 .cse5) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (<= 377 .cse4) (< (div (+ .cse6 (- 1) c_~cur~0) (- 2)) .cse7) (< (div (+ (- 1) .cse8 c_~cur~0) (- 2)) .cse7) (<= 377 .cse2) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (< c_~i~0 .cse10) (< c_~i~0 .cse0) (<= (div (+ .cse8 c_~prev~0 (- 5)) (- 2)) .cse11) (<= .cse1 .cse3) (< c_~j~0 .cse10) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse11) (<= (div (+ .cse8 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (<= 377 .cse5) (< c_~j~0 c_~cur~0)))) is different from false [2021-11-21 02:08:13,947 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse4 (+ c_~prev~0 c_~cur~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse7 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse3 (* c_~j~0 (- 1))) (.cse8 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~i~0 (- 1))) (.cse6 (+ (* 2 c_~cur~0) c_~prev~0 1))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse3 (- 1) c_~cur~0) (- 2)) .cse4) (< (div (+ (- 1) .cse5 c_~cur~0) (- 2)) .cse4) (<= 377 .cse1) (<= (div (+ .cse3 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6) (<= 377 .cse7) (<= .cse0 .cse7) (<= (div (+ .cse5 c_~prev~0 (- 5)) (- 2)) .cse8) (<= .cse0 .cse2) (<= (div (+ .cse3 c_~prev~0 (- 5)) (- 2)) .cse8) (<= (div (+ .cse5 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse6))) is different from false [2021-11-21 02:08:16,259 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse8 (* 2 c_~cur~0))) (let ((.cse3 (+ c_~prev~0 c_~cur~0 1)) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse6 (+ .cse8 c_~prev~0)) (.cse2 (* c_~j~0 (- 1))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse5 (+ .cse8 c_~prev~0 1)) (.cse1 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (+ c_~i~0 376) .cse1) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse2 (- 1) c_~cur~0) (- 2)) .cse3) (< (div (+ (- 1) .cse4 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse2 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (< c_~i~0 .cse6) (< c_~i~0 .cse0) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse7) (< c_~j~0 .cse6) (<= (div (+ .cse2 c_~prev~0 (- 5)) (- 2)) .cse7) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse5) (<= 377 .cse1)))) is different from false [2021-11-21 02:08:44,575 WARN L227 SmtUtils]: Spent 14.11s on a formula simplification. DAG size of input: 122 DAG size of output: 22 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 02:08:47,494 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ c_~prev~0 c_~cur~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse4 (* c_~j~0 (- 1))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse7 (+ .cse10 c_~prev~0 1)) (.cse3 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse0 .cse3) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (forall ((v_~cur~0_67 Int)) (or (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49))) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) (* 8 aux_div_v_~cur~0_64_50) 8 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))))) (< (div (+ .cse4 (- 1) c_~cur~0) (- 2)) .cse5) (< (div (+ (- 1) .cse6 c_~cur~0) (- 2)) .cse5) (<= 377 .cse1) (<= (div (+ .cse4 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (< c_~i~0 .cse8) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse9) (<= .cse0 .cse2) (< c_~j~0 .cse8) (<= (div (+ .cse4 c_~prev~0 (- 5)) (- 2)) .cse9) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse7) (<= 377 .cse3)))) is different from false [2021-11-21 02:10:17,836 WARN L227 SmtUtils]: Spent 5.09s on a formula simplification. DAG size of input: 126 DAG size of output: 25 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 02:11:08,797 WARN L227 SmtUtils]: Spent 7.69s on a formula simplification. DAG size of input: 149 DAG size of output: 33 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 02:11:11,153 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse13 (* 2 c_~cur~0))) (let ((.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse7 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse10 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse11 (+ .cse13 c_~prev~0)) (.cse6 (* c_~j~0 (- 1))) (.cse12 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse8 (* c_~i~0 (- 1))) (.cse9 (+ .cse13 c_~prev~0 1)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~cur~0_64_50) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= .cse1 .cse4) (<= .cse1 .cse5) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 8 aux_div_v_~cur~0_64_50) 8 (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (<= 377 .cse4) (< (div (+ .cse6 (- 1) c_~cur~0) (- 2)) .cse7) (< (div (+ (- 1) .cse8 c_~cur~0) (- 2)) .cse7) (<= 377 .cse2) (<= (div (+ .cse6 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (<= 377 .cse10) (<= .cse1 .cse10) (< c_~i~0 .cse11) (< c_~i~0 .cse0) (<= (div (+ .cse8 c_~prev~0 (- 5)) (- 2)) .cse12) (<= .cse1 .cse3) (< c_~j~0 .cse11) (<= (div (+ .cse6 c_~prev~0 (- 5)) (- 2)) .cse12) (<= (div (+ .cse8 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse9) (<= 377 .cse5)))) is different from false [2021-11-21 02:11:51,948 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse13 (* 2 c_~cur~0))) (let ((.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse8 (+ c_~prev~0 c_~cur~0 1)) (.cse2 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse1 (+ c_~i~0 376)) (.cse3 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse11 (+ .cse13 c_~prev~0)) (.cse6 (+ (* 21 c_~prev~0) (* 34 c_~cur~0))) (.cse7 (* c_~j~0 (- 1))) (.cse12 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse9 (* c_~i~0 (- 1))) (.cse10 (+ .cse13 c_~prev~0 1)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (< c_~j~0 .cse0) (<= .cse1 .cse2) (<= 377 .cse3) (<= .cse1 .cse4) (<= .cse1 .cse5) (< c_~i~0 c_~cur~0) (forall ((v_~cur~0_64 Int)) (or (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49)))) (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ 5 c_~i~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) 12 (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) 12 (* 2 aux_mod_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ 5 c_~j~0 aux_mod_v_~prev~0_77_49) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))))) (<= .cse1 .cse6) (<= 377 .cse4) (< (div (+ .cse7 (- 1) c_~cur~0) (- 2)) .cse8) (< (div (+ (- 1) .cse9 c_~cur~0) (- 2)) .cse8) (<= 377 .cse2) (<= (div (+ .cse7 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse10) (< c_~i~0 .cse11) (< c_~i~0 .cse0) (<= (div (+ .cse9 c_~prev~0 (- 5)) (- 2)) .cse12) (<= .cse1 .cse3) (< c_~j~0 .cse11) (<= 377 .cse6) (<= (div (+ .cse7 c_~prev~0 (- 5)) (- 2)) .cse12) (<= (div (+ .cse9 c_~prev~0 c_~cur~0 (- 3)) (- 2)) .cse10) (<= 377 .cse5) (< c_~j~0 c_~cur~0)))) is different from false