./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/loops-crafted-1/nested5-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 53f42b1a Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/config/TaipanReach.xml -i ../../sv-benchmarks/c/loops-crafted-1/nested5-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5ad780effdbe313ff13ad5bc7233d50356fbf06f53a57c18cd85a4aa46126eb2 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-53f42b1 [2021-11-21 00:51:36,025 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-21 00:51:36,027 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-21 00:51:36,058 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-21 00:51:36,059 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-21 00:51:36,060 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-21 00:51:36,062 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-21 00:51:36,064 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-21 00:51:36,066 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-21 00:51:36,068 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-21 00:51:36,069 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-21 00:51:36,070 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-21 00:51:36,071 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-21 00:51:36,072 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-21 00:51:36,074 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-21 00:51:36,075 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-21 00:51:36,076 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-21 00:51:36,078 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-21 00:51:36,080 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-21 00:51:36,083 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-21 00:51:36,085 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-21 00:51:36,087 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-21 00:51:36,088 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-21 00:51:36,089 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-21 00:51:36,093 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-21 00:51:36,094 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-21 00:51:36,094 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-21 00:51:36,095 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-21 00:51:36,096 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-21 00:51:36,097 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-21 00:51:36,098 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-21 00:51:36,099 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-21 00:51:36,100 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-21 00:51:36,101 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-21 00:51:36,102 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-21 00:51:36,103 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-21 00:51:36,104 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-21 00:51:36,104 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-21 00:51:36,105 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-21 00:51:36,106 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-21 00:51:36,107 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-21 00:51:36,108 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-21 00:51:36,133 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-21 00:51:36,133 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-21 00:51:36,134 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-21 00:51:36,134 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-21 00:51:36,135 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-21 00:51:36,135 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-11-21 00:51:36,136 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-21 00:51:36,136 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-21 00:51:36,137 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-21 00:51:36,137 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-21 00:51:36,137 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-21 00:51:36,138 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-21 00:51:36,138 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-21 00:51:36,138 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-21 00:51:36,138 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-21 00:51:36,139 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-21 00:51:36,139 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-21 00:51:36,139 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2021-11-21 00:51:36,140 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-21 00:51:36,140 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-21 00:51:36,141 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-21 00:51:36,141 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-21 00:51:36,141 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-21 00:51:36,141 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-21 00:51:36,141 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-21 00:51:36,142 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-21 00:51:36,142 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-21 00:51:36,142 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-21 00:51:36,142 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-21 00:51:36,143 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-21 00:51:36,143 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-21 00:51:36,143 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-21 00:51:36,143 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-21 00:51:36,144 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-21 00:51:36,144 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-21 00:51:36,144 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-21 00:51:36,144 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-21 00:51:36,145 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-21 00:51:36,145 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-21 00:51:36,145 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-21 00:51:36,145 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-21 00:51:36,145 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5ad780effdbe313ff13ad5bc7233d50356fbf06f53a57c18cd85a4aa46126eb2 [2021-11-21 00:51:36,424 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-21 00:51:36,449 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-21 00:51:36,452 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-21 00:51:36,453 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-21 00:51:36,454 INFO L275 PluginConnector]: CDTParser initialized [2021-11-21 00:51:36,455 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/../../sv-benchmarks/c/loops-crafted-1/nested5-2.c [2021-11-21 00:51:36,517 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/data/ec517fd03/0385c73616984e68b54d9a6a3ca96f6d/FLAG205b072a6 [2021-11-21 00:51:36,930 INFO L306 CDTParser]: Found 1 translation units. [2021-11-21 00:51:36,931 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/sv-benchmarks/c/loops-crafted-1/nested5-2.c [2021-11-21 00:51:36,936 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/data/ec517fd03/0385c73616984e68b54d9a6a3ca96f6d/FLAG205b072a6 [2021-11-21 00:51:37,340 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/data/ec517fd03/0385c73616984e68b54d9a6a3ca96f6d [2021-11-21 00:51:37,342 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-21 00:51:37,343 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-21 00:51:37,344 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-21 00:51:37,344 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-21 00:51:37,360 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-21 00:51:37,361 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,362 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a566263 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37, skipping insertion in model container [2021-11-21 00:51:37,362 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,368 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-21 00:51:37,380 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-21 00:51:37,539 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/sv-benchmarks/c/loops-crafted-1/nested5-2.c[321,334] [2021-11-21 00:51:37,557 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-21 00:51:37,565 INFO L203 MainTranslator]: Completed pre-run [2021-11-21 00:51:37,577 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/sv-benchmarks/c/loops-crafted-1/nested5-2.c[321,334] [2021-11-21 00:51:37,582 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-21 00:51:37,595 INFO L208 MainTranslator]: Completed translation [2021-11-21 00:51:37,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37 WrapperNode [2021-11-21 00:51:37,596 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-21 00:51:37,597 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-21 00:51:37,597 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-21 00:51:37,597 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-21 00:51:37,605 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,611 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,629 INFO L137 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 64 [2021-11-21 00:51:37,630 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-21 00:51:37,631 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-21 00:51:37,631 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-21 00:51:37,631 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-21 00:51:37,639 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,641 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,651 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,652 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,661 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,670 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,674 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,675 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-21 00:51:37,677 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-21 00:51:37,677 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-21 00:51:37,677 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-21 00:51:37,678 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (1/1) ... [2021-11-21 00:51:37,686 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-21 00:51:37,699 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:51:37,715 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-21 00:51:37,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-21 00:51:37,772 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-21 00:51:37,772 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-21 00:51:37,772 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-21 00:51:37,772 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-21 00:51:37,841 INFO L236 CfgBuilder]: Building ICFG [2021-11-21 00:51:37,843 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-21 00:51:38,026 INFO L277 CfgBuilder]: Performing block encoding [2021-11-21 00:51:38,082 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-21 00:51:38,087 INFO L301 CfgBuilder]: Removed 5 assume(true) statements. [2021-11-21 00:51:38,089 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 12:51:38 BoogieIcfgContainer [2021-11-21 00:51:38,090 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-21 00:51:38,092 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-21 00:51:38,094 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-21 00:51:38,097 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-21 00:51:38,097 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.11 12:51:37" (1/3) ... [2021-11-21 00:51:38,099 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ae0f83a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.11 12:51:38, skipping insertion in model container [2021-11-21 00:51:38,099 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 12:51:37" (2/3) ... [2021-11-21 00:51:38,100 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6ae0f83a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.11 12:51:38, skipping insertion in model container [2021-11-21 00:51:38,100 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 12:51:38" (3/3) ... [2021-11-21 00:51:38,102 INFO L111 eAbstractionObserver]: Analyzing ICFG nested5-2.c [2021-11-21 00:51:38,110 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-21 00:51:38,110 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-21 00:51:38,171 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-21 00:51:38,181 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-21 00:51:38,181 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-11-21 00:51:38,207 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:38,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2021-11-21 00:51:38,215 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:51:38,216 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:51:38,217 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:51:38,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:51:38,223 INFO L85 PathProgramCache]: Analyzing trace with hash -614732004, now seen corresponding path program 1 times [2021-11-21 00:51:38,236 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:51:38,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492114227] [2021-11-21 00:51:38,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:38,238 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:51:38,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:38,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:38,448 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:51:38,448 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492114227] [2021-11-21 00:51:38,449 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492114227] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-21 00:51:38,450 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-21 00:51:38,450 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-21 00:51:38,452 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362650562] [2021-11-21 00:51:38,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-21 00:51:38,456 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-21 00:51:38,457 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:51:38,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-21 00:51:38,483 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-21 00:51:38,485 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:38,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 00:51:38,529 INFO L93 Difference]: Finished difference Result 27 states and 41 transitions. [2021-11-21 00:51:38,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-21 00:51:38,532 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2021-11-21 00:51:38,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 00:51:38,540 INFO L225 Difference]: With dead ends: 27 [2021-11-21 00:51:38,540 INFO L226 Difference]: Without dead ends: 15 [2021-11-21 00:51:38,543 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-21 00:51:38,547 INFO L933 BasicCegarLoop]: 7 mSDtfsCounter, 7 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-21 00:51:38,548 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 13 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-21 00:51:38,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2021-11-21 00:51:38,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 11. [2021-11-21 00:51:38,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:38,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2021-11-21 00:51:38,579 INFO L78 Accepts]: Start accepts. Automaton has 11 states and 15 transitions. Word has length 8 [2021-11-21 00:51:38,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 00:51:38,579 INFO L470 AbstractCegarLoop]: Abstraction has 11 states and 15 transitions. [2021-11-21 00:51:38,580 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:38,580 INFO L276 IsEmpty]: Start isEmpty. Operand 11 states and 15 transitions. [2021-11-21 00:51:38,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2021-11-21 00:51:38,581 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:51:38,581 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:51:38,581 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-21 00:51:38,582 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:51:38,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:51:38,582 INFO L85 PathProgramCache]: Analyzing trace with hash -1877140079, now seen corresponding path program 1 times [2021-11-21 00:51:38,583 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:51:38,583 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768301401] [2021-11-21 00:51:38,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:38,583 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:51:38,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:38,738 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:38,739 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:51:38,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768301401] [2021-11-21 00:51:38,739 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [768301401] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 00:51:38,740 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1287272861] [2021-11-21 00:51:38,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:38,743 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:38,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:51:38,745 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 00:51:38,773 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-21 00:51:38,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:38,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-21 00:51:38,846 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 00:51:38,890 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:38,891 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 00:51:38,931 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:38,931 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1287272861] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 00:51:38,931 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [682470026] [2021-11-21 00:51:38,955 INFO L159 IcfgInterpreter]: Started Sifa with 9 locations of interest [2021-11-21 00:51:38,955 INFO L166 IcfgInterpreter]: Building call graph [2021-11-21 00:51:38,961 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2021-11-21 00:51:38,968 INFO L176 IcfgInterpreter]: Starting interpretation [2021-11-21 00:51:38,968 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2021-11-21 00:51:39,958 INFO L180 IcfgInterpreter]: Interpretation finished [2021-11-21 00:51:40,120 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2021-11-21 00:51:40,120 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 00:51:40,120 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2021-11-21 00:51:40,121 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165796739] [2021-11-21 00:51:40,121 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 00:51:40,122 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-11-21 00:51:40,122 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:51:40,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-11-21 00:51:40,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2021-11-21 00:51:40,123 INFO L87 Difference]: Start difference. First operand 11 states and 15 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:40,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 00:51:40,194 INFO L93 Difference]: Finished difference Result 28 states and 42 transitions. [2021-11-21 00:51:40,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-11-21 00:51:40,198 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2021-11-21 00:51:40,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 00:51:40,199 INFO L225 Difference]: With dead ends: 28 [2021-11-21 00:51:40,200 INFO L226 Difference]: Without dead ends: 18 [2021-11-21 00:51:40,201 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2021-11-21 00:51:40,203 INFO L933 BasicCegarLoop]: 7 mSDtfsCounter, 18 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-21 00:51:40,203 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 25 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-21 00:51:40,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2021-11-21 00:51:40,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 14. [2021-11-21 00:51:40,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:40,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 18 transitions. [2021-11-21 00:51:40,208 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 18 transitions. Word has length 9 [2021-11-21 00:51:40,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 00:51:40,209 INFO L470 AbstractCegarLoop]: Abstraction has 14 states and 18 transitions. [2021-11-21 00:51:40,209 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:40,209 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 18 transitions. [2021-11-21 00:51:40,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2021-11-21 00:51:40,210 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:51:40,210 INFO L514 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:51:40,237 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-11-21 00:51:40,426 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2021-11-21 00:51:40,427 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:51:40,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:51:40,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1720818596, now seen corresponding path program 2 times [2021-11-21 00:51:40,430 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:51:40,430 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253095601] [2021-11-21 00:51:40,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:40,431 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:51:40,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:40,565 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:40,565 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:51:40,570 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253095601] [2021-11-21 00:51:40,571 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253095601] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 00:51:40,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [27791588] [2021-11-21 00:51:40,571 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-21 00:51:40,573 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:40,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:51:40,574 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 00:51:40,589 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-21 00:51:40,622 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-11-21 00:51:40,622 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-21 00:51:40,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 11 conjunts are in the unsatisfiable core [2021-11-21 00:51:40,624 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 00:51:40,706 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:40,706 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 00:51:40,828 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:40,828 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [27791588] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 00:51:40,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1791932661] [2021-11-21 00:51:40,834 INFO L159 IcfgInterpreter]: Started Sifa with 9 locations of interest [2021-11-21 00:51:40,841 INFO L166 IcfgInterpreter]: Building call graph [2021-11-21 00:51:40,842 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2021-11-21 00:51:40,842 INFO L176 IcfgInterpreter]: Starting interpretation [2021-11-21 00:51:40,843 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2021-11-21 00:51:41,576 INFO L180 IcfgInterpreter]: Interpretation finished [2021-11-21 00:51:41,764 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2021-11-21 00:51:41,764 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 00:51:41,764 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2021-11-21 00:51:41,765 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867688050] [2021-11-21 00:51:41,765 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 00:51:41,765 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-11-21 00:51:41,766 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:51:41,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-11-21 00:51:41,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=195, Unknown=0, NotChecked=0, Total=272 [2021-11-21 00:51:41,767 INFO L87 Difference]: Start difference. First operand 14 states and 18 transitions. Second operand has 13 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:42,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 00:51:42,245 INFO L93 Difference]: Finished difference Result 37 states and 54 transitions. [2021-11-21 00:51:42,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-21 00:51:42,246 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2021-11-21 00:51:42,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 00:51:42,246 INFO L225 Difference]: With dead ends: 37 [2021-11-21 00:51:42,246 INFO L226 Difference]: Without dead ends: 24 [2021-11-21 00:51:42,247 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=133, Invalid=287, Unknown=0, NotChecked=0, Total=420 [2021-11-21 00:51:42,248 INFO L933 BasicCegarLoop]: 7 mSDtfsCounter, 12 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-21 00:51:42,249 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 49 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-21 00:51:42,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2021-11-21 00:51:42,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 20. [2021-11-21 00:51:42,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:42,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2021-11-21 00:51:42,254 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 12 [2021-11-21 00:51:42,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 00:51:42,255 INFO L470 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2021-11-21 00:51:42,255 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:42,255 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2021-11-21 00:51:42,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2021-11-21 00:51:42,256 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:51:42,256 INFO L514 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:51:42,295 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-11-21 00:51:42,477 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:42,478 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:51:42,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:51:42,478 INFO L85 PathProgramCache]: Analyzing trace with hash -771659716, now seen corresponding path program 3 times [2021-11-21 00:51:42,479 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:51:42,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418907175] [2021-11-21 00:51:42,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:42,479 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:51:42,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:42,704 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:42,705 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:51:42,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [418907175] [2021-11-21 00:51:42,705 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [418907175] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 00:51:42,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462112507] [2021-11-21 00:51:42,705 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-21 00:51:42,705 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:42,706 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:51:42,710 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 00:51:42,729 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-21 00:51:42,763 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-21 00:51:42,764 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-21 00:51:42,765 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 23 conjunts are in the unsatisfiable core [2021-11-21 00:51:42,766 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 00:51:42,881 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:42,881 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 00:51:43,217 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:43,218 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462112507] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 00:51:43,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [239855150] [2021-11-21 00:51:43,220 INFO L159 IcfgInterpreter]: Started Sifa with 9 locations of interest [2021-11-21 00:51:43,220 INFO L166 IcfgInterpreter]: Building call graph [2021-11-21 00:51:43,220 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2021-11-21 00:51:43,220 INFO L176 IcfgInterpreter]: Starting interpretation [2021-11-21 00:51:43,220 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2021-11-21 00:51:43,885 INFO L180 IcfgInterpreter]: Interpretation finished [2021-11-21 00:51:44,121 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2021-11-21 00:51:44,121 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 00:51:44,121 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2021-11-21 00:51:44,121 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987106679] [2021-11-21 00:51:44,121 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 00:51:44,122 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2021-11-21 00:51:44,122 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:51:44,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-11-21 00:51:44,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=597, Unknown=0, NotChecked=0, Total=812 [2021-11-21 00:51:44,123 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 25 states, 25 states have (on average 1.28) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:50,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 00:51:50,207 INFO L93 Difference]: Finished difference Result 55 states and 78 transitions. [2021-11-21 00:51:50,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-11-21 00:51:50,207 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.28) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2021-11-21 00:51:50,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 00:51:50,208 INFO L225 Difference]: With dead ends: 55 [2021-11-21 00:51:50,209 INFO L226 Difference]: Without dead ends: 36 [2021-11-21 00:51:50,210 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=475, Invalid=1007, Unknown=0, NotChecked=0, Total=1482 [2021-11-21 00:51:50,211 INFO L933 BasicCegarLoop]: 7 mSDtfsCounter, 30 mSDsluCounter, 170 mSDsCounter, 0 mSdLazyCounter, 237 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 261 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 237 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2021-11-21 00:51:50,212 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 103 Invalid, 261 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 237 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2021-11-21 00:51:50,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2021-11-21 00:51:50,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 32. [2021-11-21 00:51:50,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 31 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:50,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 36 transitions. [2021-11-21 00:51:50,218 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 36 transitions. Word has length 18 [2021-11-21 00:51:50,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 00:51:50,219 INFO L470 AbstractCegarLoop]: Abstraction has 32 states and 36 transitions. [2021-11-21 00:51:50,219 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.28) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:51:50,219 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 36 transitions. [2021-11-21 00:51:50,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2021-11-21 00:51:50,220 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:51:50,221 INFO L514 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:51:50,245 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-11-21 00:51:50,425 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:50,426 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:51:50,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:51:50,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1011234812, now seen corresponding path program 4 times [2021-11-21 00:51:50,427 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:51:50,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669253280] [2021-11-21 00:51:50,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:51:50,427 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:51:50,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:50,921 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:50,921 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:51:50,921 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669253280] [2021-11-21 00:51:50,921 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669253280] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 00:51:50,921 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [844005546] [2021-11-21 00:51:50,922 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-21 00:51:50,922 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:51:50,922 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:51:50,922 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 00:51:50,923 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-21 00:51:50,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:51:50,962 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 47 conjunts are in the unsatisfiable core [2021-11-21 00:51:50,964 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 00:51:51,156 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:51,156 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 00:51:52,370 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:51:52,370 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [844005546] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 00:51:52,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [743468616] [2021-11-21 00:51:52,373 INFO L159 IcfgInterpreter]: Started Sifa with 9 locations of interest [2021-11-21 00:51:52,373 INFO L166 IcfgInterpreter]: Building call graph [2021-11-21 00:51:52,373 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2021-11-21 00:51:52,374 INFO L176 IcfgInterpreter]: Starting interpretation [2021-11-21 00:51:52,374 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2021-11-21 00:51:53,094 INFO L180 IcfgInterpreter]: Interpretation finished [2021-11-21 00:51:53,491 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2021-11-21 00:51:53,492 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 00:51:53,492 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2021-11-21 00:51:53,492 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857311804] [2021-11-21 00:51:53,492 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 00:51:53,493 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2021-11-21 00:51:53,493 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:51:53,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-11-21 00:51:53,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=707, Invalid=2049, Unknown=0, NotChecked=0, Total=2756 [2021-11-21 00:51:53,496 INFO L87 Difference]: Start difference. First operand 32 states and 36 transitions. Second operand has 49 states, 49 states have (on average 1.1428571428571428) internal successors, (56), 49 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:54:34,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-21 00:54:34,896 INFO L93 Difference]: Finished difference Result 91 states and 126 transitions. [2021-11-21 00:54:34,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-11-21 00:54:34,898 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 1.1428571428571428) internal successors, (56), 49 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2021-11-21 00:54:34,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-21 00:54:34,899 INFO L225 Difference]: With dead ends: 91 [2021-11-21 00:54:34,900 INFO L226 Difference]: Without dead ends: 60 [2021-11-21 00:54:34,904 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 520 ImplicationChecksByTransitivity, 162.7s TimeCoverageRelationStatistics Valid=1801, Invalid=3743, Unknown=6, NotChecked=0, Total=5550 [2021-11-21 00:54:34,905 INFO L933 BasicCegarLoop]: 7 mSDtfsCounter, 6 mSDsluCounter, 372 mSDsCounter, 0 mSdLazyCounter, 785 mSolverCounterSat, 67 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 217 SdHoareTripleChecker+Invalid, 852 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 67 IncrementalHoareTripleChecker+Valid, 785 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2021-11-21 00:54:34,906 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 217 Invalid, 852 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [67 Valid, 785 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2021-11-21 00:54:34,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2021-11-21 00:54:34,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 56. [2021-11-21 00:54:34,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 55 states have (on average 1.0909090909090908) internal successors, (60), 55 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:54:34,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2021-11-21 00:54:34,918 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 30 [2021-11-21 00:54:34,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-21 00:54:34,919 INFO L470 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2021-11-21 00:54:34,919 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 1.1428571428571428) internal successors, (56), 49 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:54:34,919 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2021-11-21 00:54:34,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-11-21 00:54:34,921 INFO L506 BasicCegarLoop]: Found error trace [2021-11-21 00:54:34,921 INFO L514 BasicCegarLoop]: trace histogram [46, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-21 00:54:34,974 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-11-21 00:54:35,137 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:54:35,138 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-21 00:54:35,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-21 00:54:35,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1171453820, now seen corresponding path program 5 times [2021-11-21 00:54:35,139 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-21 00:54:35,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133793497] [2021-11-21 00:54:35,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-21 00:54:35,139 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-21 00:54:35,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-21 00:54:36,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:54:36,709 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-21 00:54:36,709 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133793497] [2021-11-21 00:54:36,709 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133793497] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-21 00:54:36,709 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2074462291] [2021-11-21 00:54:36,709 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-21 00:54:36,709 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-21 00:54:36,710 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 [2021-11-21 00:54:36,710 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-21 00:54:36,713 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c35d8e17-3c31-4de0-953b-09fcc97d20d0/bin/utaipan-TEXQjIfE4P/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-11-21 00:54:37,853 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2021-11-21 00:54:37,854 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-21 00:54:37,860 WARN L261 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 98 conjunts are in the unsatisfiable core [2021-11-21 00:54:37,864 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-21 00:54:38,351 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:54:38,351 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-21 00:54:46,531 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-21 00:54:46,532 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2074462291] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-21 00:54:46,532 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1509770106] [2021-11-21 00:54:46,535 INFO L159 IcfgInterpreter]: Started Sifa with 9 locations of interest [2021-11-21 00:54:46,535 INFO L166 IcfgInterpreter]: Building call graph [2021-11-21 00:54:46,535 INFO L171 IcfgInterpreter]: Initial procedures are [ULTIMATE.start] [2021-11-21 00:54:46,535 INFO L176 IcfgInterpreter]: Starting interpretation [2021-11-21 00:54:46,536 INFO L197 IcfgInterpreter]: Interpreting procedure ULTIMATE.start with input of size 1 for LOIs [2021-11-21 00:54:47,231 INFO L180 IcfgInterpreter]: Interpretation finished [2021-11-21 00:54:48,000 WARN L312 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: ALGORITHM_FAILED [2021-11-21 00:54:48,000 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-21 00:54:48,002 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 50] total 98 [2021-11-21 00:54:48,002 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280581972] [2021-11-21 00:54:48,002 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-21 00:54:48,003 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2021-11-21 00:54:48,004 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-21 00:54:48,005 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2021-11-21 00:54:48,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2557, Invalid=7745, Unknown=0, NotChecked=0, Total=10302 [2021-11-21 00:54:48,028 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand has 98 states, 98 states have (on average 1.0714285714285714) internal successors, (105), 98 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-21 00:54:51,387 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse2 (= (mod .cse6 4) 0)) (.cse3 (= (mod .cse4 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 45) 4294967296) 268435455)) (or .cse1 (< (mod (+ 44 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 43) 4294967296) 268435455) .cse0) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse3 (< (mod (+ 42 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 41 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 46 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455))))) is different from false [2021-11-21 00:54:53,400 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 45) 4294967296) 268435455)) (or .cse1 (< (mod (+ 44 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 43) 4294967296) 268435455) .cse0) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse3 (< (mod (+ 42 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 41 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 00:58:35,161 WARN L227 SmtUtils]: Spent 2.22m on a formula simplification. DAG size of input: 236 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 00:58:37,255 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 43) 4294967296) 268435455) .cse0) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse3 (< (mod (+ 42 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 41 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 00:58:39,335 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse3 (< (mod (+ 42 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 41 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 00:58:41,446 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 41 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 00:58:43,593 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 40 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 00:58:45,700 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 39) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 38) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:01:34,705 WARN L227 SmtUtils]: Spent 1.46m on a formula simplification. DAG size of input: 206 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 01:01:36,820 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 37) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:01:38,922 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 36) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:01:40,989 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse0 (= (mod .cse5 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or .cse0 (< (mod (+ 35 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:01:43,091 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse0 (= (mod .cse5 4) 0)) (.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 34) 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:01:45,164 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse6 (+ |c_ULTIMATE.start_main_~v~0#1| 1)) (.cse4 (+ 2 |c_ULTIMATE.start_main_~v~0#1|)) (.cse5 (+ 3 |c_ULTIMATE.start_main_~v~0#1|))) (let ((.cse0 (= (mod .cse5 4) 0)) (.cse1 (= (mod |c_ULTIMATE.start_main_~v~0#1| 4) 0)) (.cse3 (= (mod .cse4 4) 0)) (.cse2 (= (mod .cse6 4) 0))) (and (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 11) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 20) 4294967296) 268435455)) (or (< (mod (+ 21 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2) (or .cse2 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 13) 4294967296) 268435455)) (or .cse0 (< (mod (+ 31 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 25) 4294967296) 268435455) .cse2) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 27) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 8) 4294967296) 268435455)) (or .cse3 (< (mod (+ 22 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse3 (< (mod (+ 6 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ 16 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 28) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 10) 4294967296) 268435455)) (or .cse3 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 26) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 17) 4294967296) 268435455) .cse2) (or (< (mod .cse4 4294967296) 268435455) .cse3) (or .cse0 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 15) 4294967296) 268435455)) (or .cse2 (< (mod (+ 9 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 4) 4294967296) 268435455)) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 33) 4294967296) 268435455) .cse2) (or (< (mod .cse5 4294967296) 268435455) .cse0) (or (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 18) 4294967296) 268435455) .cse3) (or .cse1 (< (mod (+ 32 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 23 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod .cse6 4294967296) 268435455) .cse2) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 24) 4294967296) 268435455)) (or .cse1 (< (mod (+ |c_ULTIMATE.start_main_~v~0#1| 12) 4294967296) 268435455)) (or .cse0 (< (mod (+ 7 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 30 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse3) (or .cse2 (< (mod (+ 29 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse0 (< (mod (+ 19 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or .cse1 (< (mod |c_ULTIMATE.start_main_~v~0#1| 4294967296) 268435455)) (or .cse3 (< (mod (+ 14 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455)) (or (< (mod (+ 5 |c_ULTIMATE.start_main_~v~0#1|) 4294967296) 268435455) .cse2)))) is different from false [2021-11-21 01:04:13,658 WARN L227 SmtUtils]: Spent 56.95s on a formula simplification. DAG size of input: 176 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-21 01:06:05,467 WARN L227 SmtUtils]: Spent 32.56s on a formula simplification. DAG size of input: 171 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)