./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread/fib_safe-6.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aef121e0 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread/fib_safe-6.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6959d4f0e51834399b1f177b2907c6f040a7f82b22df70a4ffbb4c40805c24f4 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-aef121e [2021-11-23 03:09:59,944 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-23 03:09:59,948 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-23 03:10:00,022 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-23 03:10:00,023 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-23 03:10:00,030 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-23 03:10:00,034 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-23 03:10:00,040 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-23 03:10:00,044 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-23 03:10:00,050 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-23 03:10:00,052 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-23 03:10:00,054 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-23 03:10:00,055 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-23 03:10:00,058 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-23 03:10:00,061 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-23 03:10:00,063 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-23 03:10:00,065 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-23 03:10:00,067 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-23 03:10:00,073 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-23 03:10:00,085 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-23 03:10:00,089 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-23 03:10:00,091 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-23 03:10:00,095 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-23 03:10:00,096 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-23 03:10:00,101 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-23 03:10:00,101 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-23 03:10:00,102 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-23 03:10:00,104 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-23 03:10:00,105 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-23 03:10:00,106 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-23 03:10:00,107 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-23 03:10:00,108 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-23 03:10:00,110 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-23 03:10:00,112 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-23 03:10:00,113 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-23 03:10:00,114 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-23 03:10:00,115 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-23 03:10:00,115 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-23 03:10:00,115 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-23 03:10:00,116 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-23 03:10:00,117 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-23 03:10:00,119 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-23 03:10:00,167 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-23 03:10:00,168 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-23 03:10:00,168 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-23 03:10:00,169 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-23 03:10:00,177 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-23 03:10:00,178 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-11-23 03:10:00,178 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-23 03:10:00,178 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-23 03:10:00,179 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-23 03:10:00,179 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-23 03:10:00,180 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-23 03:10:00,181 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-23 03:10:00,181 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-23 03:10:00,181 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-23 03:10:00,182 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-23 03:10:00,182 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-23 03:10:00,182 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-23 03:10:00,183 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2021-11-23 03:10:00,186 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-23 03:10:00,186 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-23 03:10:00,187 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-23 03:10:00,187 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-23 03:10:00,187 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-23 03:10:00,187 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-23 03:10:00,188 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-23 03:10:00,188 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-23 03:10:00,188 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-23 03:10:00,189 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-23 03:10:00,189 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-23 03:10:00,189 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-23 03:10:00,190 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-23 03:10:00,190 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-23 03:10:00,190 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 03:10:00,191 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-23 03:10:00,191 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-23 03:10:00,191 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-23 03:10:00,192 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-23 03:10:00,192 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-23 03:10:00,192 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-23 03:10:00,193 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-23 03:10:00,193 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-23 03:10:00,193 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6959d4f0e51834399b1f177b2907c6f040a7f82b22df70a4ffbb4c40805c24f4 [2021-11-23 03:10:00,542 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-23 03:10:00,569 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-23 03:10:00,572 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-23 03:10:00,573 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-23 03:10:00,574 INFO L275 PluginConnector]: CDTParser initialized [2021-11-23 03:10:00,576 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/../../sv-benchmarks/c/pthread/fib_safe-6.i [2021-11-23 03:10:00,668 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/data/b828017e5/1878512be16b4940a65dc833e3f44c7f/FLAG7d47a8772 [2021-11-23 03:10:01,260 INFO L306 CDTParser]: Found 1 translation units. [2021-11-23 03:10:01,261 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/sv-benchmarks/c/pthread/fib_safe-6.i [2021-11-23 03:10:01,286 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/data/b828017e5/1878512be16b4940a65dc833e3f44c7f/FLAG7d47a8772 [2021-11-23 03:10:01,522 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/data/b828017e5/1878512be16b4940a65dc833e3f44c7f [2021-11-23 03:10:01,526 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-23 03:10:01,528 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-23 03:10:01,534 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-23 03:10:01,535 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-23 03:10:01,539 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-23 03:10:01,540 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:10:01" (1/1) ... [2021-11-23 03:10:01,543 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f2f40e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:01, skipping insertion in model container [2021-11-23 03:10:01,544 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:10:01" (1/1) ... [2021-11-23 03:10:01,553 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-23 03:10:01,600 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-23 03:10:02,007 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/sv-benchmarks/c/pthread/fib_safe-6.i[30813,30826] [2021-11-23 03:10:02,011 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 03:10:02,021 INFO L203 MainTranslator]: Completed pre-run [2021-11-23 03:10:02,070 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/sv-benchmarks/c/pthread/fib_safe-6.i[30813,30826] [2021-11-23 03:10:02,072 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 03:10:02,124 INFO L208 MainTranslator]: Completed translation [2021-11-23 03:10:02,125 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02 WrapperNode [2021-11-23 03:10:02,125 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-23 03:10:02,132 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-23 03:10:02,132 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-23 03:10:02,132 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-23 03:10:02,141 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,184 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,216 INFO L137 Inliner]: procedures = 164, calls = 26, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 71 [2021-11-23 03:10:02,217 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-23 03:10:02,218 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-23 03:10:02,218 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-23 03:10:02,218 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-23 03:10:02,227 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,227 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,237 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,237 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,251 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,263 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,265 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,268 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-23 03:10:02,270 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-23 03:10:02,270 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-23 03:10:02,270 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-23 03:10:02,271 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (1/1) ... [2021-11-23 03:10:02,279 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 03:10:02,292 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 03:10:02,306 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-23 03:10:02,327 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-23 03:10:02,369 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2021-11-23 03:10:02,369 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2021-11-23 03:10:02,370 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2021-11-23 03:10:02,370 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2021-11-23 03:10:02,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-23 03:10:02,370 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2021-11-23 03:10:02,370 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-23 03:10:02,370 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-23 03:10:02,371 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-23 03:10:02,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-23 03:10:02,371 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2021-11-23 03:10:02,371 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-23 03:10:02,371 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-23 03:10:02,373 WARN L209 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2021-11-23 03:10:02,571 INFO L236 CfgBuilder]: Building ICFG [2021-11-23 03:10:02,573 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-23 03:10:02,806 INFO L277 CfgBuilder]: Performing block encoding [2021-11-23 03:10:02,815 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-23 03:10:02,825 INFO L301 CfgBuilder]: Removed 3 assume(true) statements. [2021-11-23 03:10:02,828 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:10:02 BoogieIcfgContainer [2021-11-23 03:10:02,829 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-23 03:10:02,831 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-23 03:10:02,831 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-23 03:10:02,835 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-23 03:10:02,836 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 03:10:01" (1/3) ... [2021-11-23 03:10:02,837 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ade44a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:10:02, skipping insertion in model container [2021-11-23 03:10:02,837 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:10:02" (2/3) ... [2021-11-23 03:10:02,838 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ade44a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 03:10:02, skipping insertion in model container [2021-11-23 03:10:02,838 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:10:02" (3/3) ... [2021-11-23 03:10:02,840 INFO L111 eAbstractionObserver]: Analyzing ICFG fib_safe-6.i [2021-11-23 03:10:02,851 WARN L149 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2021-11-23 03:10:02,851 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-23 03:10:02,852 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-23 03:10:02,852 INFO L513 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2021-11-23 03:10:02,914 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,915 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,915 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,915 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,918 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,918 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,918 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,918 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,920 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,920 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,921 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,921 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,921 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,922 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,922 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,923 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,923 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,923 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,924 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,924 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,925 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,925 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,925 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,926 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,926 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,926 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,926 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,927 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,927 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,927 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,928 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,928 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,928 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,929 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,929 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,929 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,940 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#t~post1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,940 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,940 WARN L322 ript$VariableManager]: TermVariabe t1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,941 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,942 WARN L322 ript$VariableManager]: TermVariabe |t1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,948 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,948 WARN L322 ript$VariableManager]: TermVariabe t2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,949 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,949 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,949 WARN L322 ript$VariableManager]: TermVariabe |t2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2021-11-23 03:10:02,951 INFO L148 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2021-11-23 03:10:03,010 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-23 03:10:03,022 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-23 03:10:03,023 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-11-23 03:10:03,045 INFO L118 etLargeBlockEncoding]: Petri net LBE is using semantic-based independence relation. [2021-11-23 03:10:03,067 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 96 places, 96 transitions, 202 flow [2021-11-23 03:10:03,074 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 96 places, 96 transitions, 202 flow [2021-11-23 03:10:03,075 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 96 places, 96 transitions, 202 flow [2021-11-23 03:10:03,154 INFO L129 PetriNetUnfolder]: 7/94 cut-off events. [2021-11-23 03:10:03,154 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2021-11-23 03:10:03,162 INFO L84 FinitePrefix]: Finished finitePrefix Result has 101 conditions, 94 events. 7/94 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 73 event pairs, 0 based on Foata normal form. 0/86 useless extension candidates. Maximal degree in co-relation 64. Up to 2 conditions per place. [2021-11-23 03:10:03,167 INFO L116 LiptonReduction]: Number of co-enabled transitions 1870 [2021-11-23 03:10:06,810 INFO L131 LiptonReduction]: Checked pairs total: 1462 [2021-11-23 03:10:06,810 INFO L133 LiptonReduction]: Total number of compositions: 92 [2021-11-23 03:10:06,821 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 20 places, 16 transitions, 42 flow [2021-11-23 03:10:06,837 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:06,839 INFO L276 IsEmpty]: Start isEmpty. Operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:06,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2021-11-23 03:10:06,847 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:10:06,848 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2021-11-23 03:10:06,848 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-23 03:10:06,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:10:06,855 INFO L85 PathProgramCache]: Analyzing trace with hash -2083717598, now seen corresponding path program 1 times [2021-11-23 03:10:06,867 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 03:10:06,868 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355731023] [2021-11-23 03:10:06,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:06,869 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:10:06,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:07,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:07,098 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 03:10:07,099 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355731023] [2021-11-23 03:10:07,100 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [355731023] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 03:10:07,101 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 03:10:07,102 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-23 03:10:07,104 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837932798] [2021-11-23 03:10:07,105 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 03:10:07,109 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-11-23 03:10:07,110 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 03:10:07,145 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-23 03:10:07,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:10:07,149 INFO L87 Difference]: Start difference. First operand has 35 states, 34 states have (on average 2.7941176470588234) internal successors, (95), 34 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:10:07,209 INFO L93 Difference]: Finished difference Result 44 states and 122 transitions. [2021-11-23 03:10:07,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-23 03:10:07,212 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2021-11-23 03:10:07,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:10:07,226 INFO L225 Difference]: With dead ends: 44 [2021-11-23 03:10:07,226 INFO L226 Difference]: Without dead ends: 44 [2021-11-23 03:10:07,232 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-23 03:10:07,238 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 9 mSDsluCounter, 6 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2021-11-23 03:10:07,240 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 0 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2021-11-23 03:10:07,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2021-11-23 03:10:07,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2021-11-23 03:10:07,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 2.8372093023255816) internal successors, (122), 43 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 122 transitions. [2021-11-23 03:10:07,292 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 122 transitions. Word has length 6 [2021-11-23 03:10:07,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:10:07,292 INFO L470 AbstractCegarLoop]: Abstraction has 44 states and 122 transitions. [2021-11-23 03:10:07,293 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,293 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 122 transitions. [2021-11-23 03:10:07,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2021-11-23 03:10:07,294 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:10:07,294 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-23 03:10:07,294 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-23 03:10:07,294 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-23 03:10:07,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:10:07,295 INFO L85 PathProgramCache]: Analyzing trace with hash -170735922, now seen corresponding path program 1 times [2021-11-23 03:10:07,295 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 03:10:07,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251388263] [2021-11-23 03:10:07,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:07,296 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:10:07,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:07,363 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:07,363 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 03:10:07,364 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251388263] [2021-11-23 03:10:07,364 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251388263] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-23 03:10:07,364 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1115019601] [2021-11-23 03:10:07,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:07,365 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:07,365 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 03:10:07,366 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-23 03:10:07,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-23 03:10:07,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:07,466 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-23 03:10:07,470 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-23 03:10:07,554 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:07,554 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-23 03:10:07,597 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:07,597 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1115019601] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-23 03:10:07,598 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [413896803] [2021-11-23 03:10:07,620 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-23 03:10:07,622 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-23 03:10:07,622 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2021-11-23 03:10:07,623 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864042143] [2021-11-23 03:10:07,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-23 03:10:07,624 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-11-23 03:10:07,624 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 03:10:07,625 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-11-23 03:10:07,625 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-23 03:10:07,625 INFO L87 Difference]: Start difference. First operand 44 states and 122 transitions. Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:10:07,713 INFO L93 Difference]: Finished difference Result 71 states and 203 transitions. [2021-11-23 03:10:07,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-11-23 03:10:07,714 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2021-11-23 03:10:07,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:10:07,716 INFO L225 Difference]: With dead ends: 71 [2021-11-23 03:10:07,731 INFO L226 Difference]: Without dead ends: 71 [2021-11-23 03:10:07,732 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-11-23 03:10:07,733 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 42 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:10:07,734 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 0 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 44 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:10:07,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2021-11-23 03:10:07,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2021-11-23 03:10:07,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 70 states have (on average 2.9) internal successors, (203), 70 states have internal predecessors, (203), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 203 transitions. [2021-11-23 03:10:07,747 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 203 transitions. Word has length 7 [2021-11-23 03:10:07,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:10:07,748 INFO L470 AbstractCegarLoop]: Abstraction has 71 states and 203 transitions. [2021-11-23 03:10:07,748 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:07,748 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 203 transitions. [2021-11-23 03:10:07,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2021-11-23 03:10:07,750 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:10:07,750 INFO L514 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2021-11-23 03:10:07,795 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-11-23 03:10:07,975 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:07,976 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-23 03:10:07,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:10:07,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1152399070, now seen corresponding path program 2 times [2021-11-23 03:10:07,977 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 03:10:07,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959796830] [2021-11-23 03:10:07,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:07,977 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:10:08,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:08,156 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:08,158 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 03:10:08,159 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959796830] [2021-11-23 03:10:08,159 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1959796830] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-23 03:10:08,160 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1950860686] [2021-11-23 03:10:08,160 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-23 03:10:08,160 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:08,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 03:10:08,162 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-23 03:10:08,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-23 03:10:08,314 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2021-11-23 03:10:08,315 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-23 03:10:08,316 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 6 conjunts are in the unsatisfiable core [2021-11-23 03:10:08,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-23 03:10:08,370 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:08,370 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-23 03:10:08,467 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:08,468 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1950860686] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-23 03:10:08,468 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [903411986] [2021-11-23 03:10:08,469 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-23 03:10:08,471 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-23 03:10:08,472 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2021-11-23 03:10:08,472 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857120664] [2021-11-23 03:10:08,472 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-23 03:10:08,475 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-11-23 03:10:08,482 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 03:10:08,483 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-11-23 03:10:08,484 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-23 03:10:08,485 INFO L87 Difference]: Start difference. First operand 71 states and 203 transitions. Second operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:08,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:10:08,660 INFO L93 Difference]: Finished difference Result 125 states and 365 transitions. [2021-11-23 03:10:08,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-23 03:10:08,663 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2021-11-23 03:10:08,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:10:08,674 INFO L225 Difference]: With dead ends: 125 [2021-11-23 03:10:08,674 INFO L226 Difference]: Without dead ends: 125 [2021-11-23 03:10:08,675 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-11-23 03:10:08,683 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 123 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:10:08,686 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [123 Valid, 0 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:10:08,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2021-11-23 03:10:08,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2021-11-23 03:10:08,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 124 states have (on average 2.943548387096774) internal successors, (365), 124 states have internal predecessors, (365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:08,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 365 transitions. [2021-11-23 03:10:08,726 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 365 transitions. Word has length 10 [2021-11-23 03:10:08,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:10:08,727 INFO L470 AbstractCegarLoop]: Abstraction has 125 states and 365 transitions. [2021-11-23 03:10:08,727 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 1.5) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:08,727 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 365 transitions. [2021-11-23 03:10:08,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2021-11-23 03:10:08,730 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:10:08,730 INFO L514 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2021-11-23 03:10:08,765 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-11-23 03:10:08,951 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:08,952 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-23 03:10:08,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:10:08,952 INFO L85 PathProgramCache]: Analyzing trace with hash -981423710, now seen corresponding path program 3 times [2021-11-23 03:10:08,952 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 03:10:08,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785460412] [2021-11-23 03:10:08,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:08,953 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:10:08,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:09,157 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:09,157 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 03:10:09,158 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785460412] [2021-11-23 03:10:09,158 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [785460412] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-23 03:10:09,158 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [203664525] [2021-11-23 03:10:09,158 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-23 03:10:09,158 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:09,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 03:10:09,160 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-23 03:10:09,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-23 03:10:09,256 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-23 03:10:09,257 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-23 03:10:09,258 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 12 conjunts are in the unsatisfiable core [2021-11-23 03:10:09,260 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-23 03:10:09,335 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:09,336 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-23 03:10:09,441 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:09,441 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [203664525] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-23 03:10:09,442 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1962046890] [2021-11-23 03:10:09,443 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-23 03:10:09,443 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-23 03:10:09,443 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 16 [2021-11-23 03:10:09,444 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329100082] [2021-11-23 03:10:09,445 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-23 03:10:09,447 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-11-23 03:10:09,447 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 03:10:09,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-11-23 03:10:09,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2021-11-23 03:10:09,448 INFO L87 Difference]: Start difference. First operand 125 states and 365 transitions. Second operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:09,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 03:10:09,616 INFO L93 Difference]: Finished difference Result 161 states and 473 transitions. [2021-11-23 03:10:09,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-23 03:10:09,617 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2021-11-23 03:10:09,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 03:10:09,620 INFO L225 Difference]: With dead ends: 161 [2021-11-23 03:10:09,620 INFO L226 Difference]: Without dead ends: 161 [2021-11-23 03:10:09,620 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2021-11-23 03:10:09,629 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 189 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 189 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2021-11-23 03:10:09,630 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [189 Valid, 0 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2021-11-23 03:10:09,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2021-11-23 03:10:09,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2021-11-23 03:10:09,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 160 states have (on average 2.95625) internal successors, (473), 160 states have internal predecessors, (473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:09,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 473 transitions. [2021-11-23 03:10:09,667 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 473 transitions. Word has length 16 [2021-11-23 03:10:09,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 03:10:09,668 INFO L470 AbstractCegarLoop]: Abstraction has 161 states and 473 transitions. [2021-11-23 03:10:09,668 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 1.4375) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:10:09,668 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 473 transitions. [2021-11-23 03:10:09,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2021-11-23 03:10:09,671 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 03:10:09,672 INFO L514 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1] [2021-11-23 03:10:09,705 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-11-23 03:10:09,889 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:09,890 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2021-11-23 03:10:09,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 03:10:09,891 INFO L85 PathProgramCache]: Analyzing trace with hash 1547809954, now seen corresponding path program 4 times [2021-11-23 03:10:09,891 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 03:10:09,891 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869778189] [2021-11-23 03:10:09,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 03:10:09,891 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 03:10:09,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:10,404 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:10,405 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 03:10:10,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869778189] [2021-11-23 03:10:10,405 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1869778189] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-23 03:10:10,405 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1545816155] [2021-11-23 03:10:10,405 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-23 03:10:10,405 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-23 03:10:10,406 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 03:10:10,407 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-23 03:10:10,431 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_eac0f5c6-5aa8-4506-8663-5bc212e69a68/bin/utaipan-EQgc7hIp5V/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-23 03:10:10,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 03:10:10,510 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 46 conjunts are in the unsatisfiable core [2021-11-23 03:10:10,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-23 03:10:11,392 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 78 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:10:11,392 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2021-11-23 03:11:17,140 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 03:11:17,140 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1545816155] provided 0 perfect and 2 imperfect interpolant sequences [2021-11-23 03:11:17,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSifa [1368882517] [2021-11-23 03:11:17,141 FATAL L? ?]: Ignoring exception! java.lang.UnsupportedOperationException: Cannot create path program transition for IcfgForkThreadOtherTransition at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:295) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.createPathProgramTransition(PathProgram.java:270) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.accept(ForEachOps.java:183) at java.base/java.util.stream.ReferencePipeline$2$1.accept(ReferencePipeline.java:177) at java.base/java.util.HashMap$KeySpliterator.forEachRemaining(HashMap.java:1603) at java.base/java.util.stream.AbstractPipeline.copyInto(AbstractPipeline.java:484) at java.base/java.util.stream.AbstractPipeline.wrapAndCopyInto(AbstractPipeline.java:474) at java.base/java.util.stream.ForEachOps$ForEachOp.evaluateSequential(ForEachOps.java:150) at java.base/java.util.stream.ForEachOps$ForEachOp$OfRef.evaluateSequential(ForEachOps.java:173) at java.base/java.util.stream.AbstractPipeline.evaluate(AbstractPipeline.java:234) at java.base/java.util.stream.ReferencePipeline.forEach(ReferencePipeline.java:497) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram$PathProgramConstructor.(PathProgram.java:235) at de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.cfg.PathProgram.constructPathProgram(PathProgram.java:112) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.SifaRunner.(SifaRunner.java:91) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSifa.construct(IpTcStrategyModuleSifa.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:268) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:140) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:88) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:76) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:413) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:393) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:303) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-23 03:11:17,141 INFO L186 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2021-11-23 03:11:17,141 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 45 [2021-11-23 03:11:17,142 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961157075] [2021-11-23 03:11:17,142 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2021-11-23 03:11:17,143 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2021-11-23 03:11:17,144 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 03:11:17,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-11-23 03:11:17,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=1764, Unknown=18, NotChecked=0, Total=2162 [2021-11-23 03:11:17,146 INFO L87 Difference]: Start difference. First operand 161 states and 473 transitions. Second operand has 47 states, 46 states have (on average 1.3043478260869565) internal successors, (60), 46 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-23 03:11:25,002 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse4 (+ .cse11 c_~prev~0 1)) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~j~0 (- 1))) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse7 (+ .cse11 c_~prev~0)) (.cse3 (* c_~i~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0))) (and (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse0) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse1 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 .cse1 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse1 (* 4 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse2 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 .cse2 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse2 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse3 c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 c_~prev~0 (- 4)) (- 2)) .cse6) (<= c_~j~0 .cse7) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (<= c_~i~0 .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse3 c_~prev~0 (- 4)) (- 2)) .cse6) (<= 377 .cse9) (<= (div (+ .cse5 c_~cur~0) (- 2)) .cse0) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= (+ c_~i~0 376) .cse9) (<= c_~i~0 .cse7) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse3 c_~cur~0) (- 2)) .cse0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:11:27,281 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse4 (+ .cse11 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~j~0 (- 1))) (.cse0 (+ c_~i~0 376)) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse7 (+ .cse11 c_~prev~0)) (.cse3 (* c_~i~0 (- 1))) (.cse2 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse2) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse3 c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 c_~prev~0 (- 4)) (- 2)) .cse6) (<= c_~j~0 .cse7) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse3 c_~prev~0 (- 4)) (- 2)) .cse6) (<= 377 .cse9) (<= (div (+ .cse5 c_~cur~0) (- 2)) .cse2) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse9) (<= c_~i~0 .cse7) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse3 c_~cur~0) (- 2)) .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:11:31,037 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ .cse10 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= 377 .cse9) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse9) (<= c_~i~0 .cse8) (<= .cse0 .cse2) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse3) (<= c_~j~0 c_~prev~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:11:33,595 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse3 (+ .cse9 c_~prev~0 1)) (.cse0 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse6 (+ .cse9 c_~prev~0)) (.cse2 (* c_~i~0 (- 1))) (.cse1 (+ c_~prev~0 c_~cur~0))) (and (<= (+ c_~i~0 376) .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse1) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (<= c_~j~0 .cse6) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse0) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse1) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse6) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:11:35,778 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse5 (+ .cse9 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse8 (+ .cse9 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse8) (<= .cse0 .cse2) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse3) (<= c_~j~0 c_~prev~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:12:52,086 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse6 (+ .cse10 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse8 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse7 (* c_~j~0 (- 1))) (.cse9 (+ .cse10 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse5 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0)) (.cse4 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= .cse0 .cse4) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse5 c_~prev~0 c_~cur~0) (- 2)) .cse6) (<= (div (+ .cse7 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse6) (<= (div (+ .cse7 c_~prev~0 (- 4)) (- 2)) .cse8) (<= c_~j~0 .cse9) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse5 c_~prev~0 (- 4)) (- 2)) .cse8) (<= (div (+ .cse7 c_~cur~0) (- 2)) .cse3) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse9) (<= .cse0 .cse2) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse5 c_~cur~0) (- 2)) .cse3) (<= c_~j~0 c_~prev~0) (<= 377 .cse4) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:12:54,321 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse3 (+ .cse11 c_~prev~0 1)) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse8 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse6 (+ .cse11 c_~prev~0)) (.cse2 (* c_~i~0 (- 1))) (.cse9 (+ c_~prev~0 c_~cur~0))) (and (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse0 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 .cse0 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse0 (* 4 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse1 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 .cse1 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse1 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (<= c_~j~0 .cse6) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= 377 .cse8) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse9) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= (+ c_~i~0 376) .cse8) (<= c_~i~0 .cse6) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse9) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:12:57,178 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse4 (+ .cse11 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~j~0 (- 1))) (.cse0 (+ c_~i~0 376)) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse7 (+ .cse11 c_~prev~0)) (.cse3 (* c_~i~0 (- 1))) (.cse2 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse3 c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 c_~prev~0 (- 4)) (- 2)) .cse6) (<= c_~j~0 .cse7) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (<= c_~i~0 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse3 c_~prev~0 (- 4)) (- 2)) .cse6) (<= 377 .cse9) (<= (div (+ .cse5 c_~cur~0) (- 2)) .cse2) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse9) (<= c_~i~0 .cse7) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse3 c_~cur~0) (- 2)) .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:12:59,422 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse7 (* 2 c_~cur~0))) (let ((.cse3 (+ .cse7 c_~prev~0 1)) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse6 (+ .cse7 c_~prev~0)) (.cse0 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse2 (* c_~i~0 (- 1))) (.cse1 (+ c_~prev~0 c_~cur~0))) (and (<= 377 .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse1) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (<= c_~j~0 .cse6) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse1) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse6) (<= (+ c_~i~0 376) .cse0) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse1) (<= c_~j~0 c_~prev~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:13:01,520 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse5 (+ .cse9 c_~prev~0 1)) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse8 (+ .cse9 c_~prev~0)) (.cse2 (+ c_~i~0 376)) (.cse0 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse1 (+ c_~prev~0 c_~cur~0)) (.cse3 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (<= 377 .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse1) (<= .cse2 .cse3) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse1) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse8) (<= .cse2 .cse0) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse1) (<= c_~j~0 c_~prev~0) (<= 377 .cse3) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:13:04,493 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse12 (* 2 c_~cur~0))) (let ((.cse7 (+ .cse12 c_~prev~0 1)) (.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse8 (* c_~j~0 (- 1))) (.cse11 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse10 (+ .cse12 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= .cse0 .cse4) (<= .cse0 .cse5) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse6 c_~prev~0 c_~cur~0) (- 2)) .cse7) (<= (div (+ .cse8 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse7) (<= (div (+ .cse8 c_~prev~0 (- 4)) (- 2)) .cse9) (<= c_~j~0 .cse10) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (<= 377 .cse4) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse9) (<= 377 .cse11) (<= (div (+ .cse8 c_~cur~0) (- 2)) .cse3) (<= .cse0 .cse11) (<= c_~i~0 .cse10) (<= .cse0 .cse2) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (<= c_~j~0 c_~prev~0) (<= 377 .cse5) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:13:07,091 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse5 (+ .cse10 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse9 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse8 (+ .cse10 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= 377 .cse9) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse9) (<= c_~i~0 .cse8) (<= .cse0 .cse2) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:14:24,966 WARN L227 SmtUtils]: Spent 7.34s on a formula simplification. DAG size of input: 130 DAG size of output: 21 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-23 03:14:27,144 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse3 (+ .cse9 c_~prev~0 1)) (.cse0 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse6 (+ .cse9 c_~prev~0)) (.cse2 (* c_~i~0 (- 1))) (.cse1 (+ c_~prev~0 c_~cur~0))) (and (<= (+ c_~i~0 376) .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (<= c_~j~0 .cse6) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (<= c_~i~0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse0) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse1) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse6) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse1) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:15:39,380 WARN L227 SmtUtils]: Spent 16.48s on a formula simplification. DAG size of input: 152 DAG size of output: 22 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-23 03:16:07,001 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse1 (+ c_~i~0 376)) (.cse5 (+ .cse9 c_~prev~0 1)) (.cse2 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse8 (+ .cse9 c_~prev~0)) (.cse4 (* c_~i~0 (- 1))) (.cse0 (+ c_~prev~0 c_~cur~0)) (.cse3 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse0) (<= .cse1 .cse2) (<= .cse1 .cse3) (<= c_~i~0 c_~cur~0) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (<= 377 .cse2) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse0) (<= c_~i~0 .cse8) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse0) (<= c_~j~0 c_~prev~0) (<= 377 .cse3) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:19:16,690 WARN L227 SmtUtils]: Spent 17.92s on a formula simplification. DAG size of input: 153 DAG size of output: 22 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2021-11-23 03:19:19,412 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse3 (+ (* 2 c_~cur~0) c_~prev~0 1)) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse7 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse2 (* c_~i~0 (- 1))) (.cse8 (+ c_~prev~0 c_~cur~0))) (and (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((v_~cur~0_70 Int)) (or (< v_~cur~0_70 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse0 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 .cse0 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse0 (* 4 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse1 (* 4 v_~cur~0_70))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~cur~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 v_~cur~0_70))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 .cse1 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~cur~0 v_~cur~0_70 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= 2 aux_mod_v_~cur~0_64_50) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49) .cse1 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse6 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= 377 .cse7) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse8) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= (+ c_~i~0 376) .cse7) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse9 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse9 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse9 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0)))))))))) is different from false [2021-11-23 03:19:21,601 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse11 (* 2 c_~cur~0))) (let ((.cse3 (+ .cse11 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse0 (+ c_~i~0 376)) (.cse8 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse6 (+ .cse11 c_~prev~0)) (.cse2 (* c_~i~0 (- 1))) (.cse9 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (<= c_~j~0 .cse6) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse7 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse7 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse7 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= 377 .cse8) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse9) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse8) (<= c_~i~0 .cse6) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse10 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse10 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse10 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse9) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:19:23,704 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse13 (* 2 c_~cur~0))) (let ((.cse7 (+ .cse13 c_~prev~0 1)) (.cse4 (+ (* 34 c_~prev~0) (* 55 c_~cur~0))) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse9 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse8 (* c_~j~0 (- 1))) (.cse12 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse10 (+ .cse13 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse11 (+ (* 21 c_~prev~0) (* 34 c_~cur~0))) (.cse6 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0)) (.cse5 (+ (* 89 c_~cur~0) (* 55 c_~prev~0)))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (<= .cse0 .cse4) (<= .cse0 .cse5) (<= c_~i~0 c_~cur~0) (<= (div (+ (- 2) .cse6 c_~prev~0 c_~cur~0) (- 2)) .cse7) (<= (div (+ .cse8 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse7) (<= (div (+ .cse8 c_~prev~0 (- 4)) (- 2)) .cse9) (<= c_~j~0 .cse10) (= c_~j~0 1) (<= c_~j~0 c_~cur~0) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (<= .cse0 .cse11) (<= 377 .cse4) (<= 377 .cse1) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse9) (<= 377 .cse12) (<= (div (+ .cse8 c_~cur~0) (- 2)) .cse3) (<= .cse0 .cse12) (<= c_~i~0 .cse10) (<= .cse0 .cse2) (<= 377 .cse11) (<= c_~i~0 c_~prev~0) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (<= c_~j~0 c_~prev~0) (<= 377 .cse5) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:21:16,330 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse3 (+ (* 2 c_~cur~0) c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse5 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse4 (* c_~j~0 (- 1))) (.cse0 (+ c_~i~0 376)) (.cse7 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse2 (* c_~i~0 (- 1))) (.cse8 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse2 c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse3) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse5) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse6 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse2 c_~prev~0 (- 4)) (- 2)) .cse5) (<= 377 .cse7) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse8) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse7) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse9 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse9 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse9 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse2 c_~cur~0) (- 2)) .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0)))))))))) is different from false [2021-11-23 03:21:18,584 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse10 (* 2 c_~cur~0))) (let ((.cse4 (+ .cse10 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse6 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse5 (* c_~j~0 (- 1))) (.cse8 (+ (* 233 c_~prev~0) (* 377 c_~cur~0))) (.cse7 (+ .cse10 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse3 (* c_~i~0 (- 1))) (.cse9 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse3 c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse4) (<= (div (+ .cse5 c_~prev~0 (- 4)) (- 2)) .cse6) (<= c_~j~0 .cse7) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse3 c_~prev~0 (- 4)) (- 2)) .cse6) (<= 377 .cse8) (<= (div (+ .cse5 c_~cur~0) (- 2)) .cse9) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= .cse0 .cse8) (<= c_~i~0 .cse7) (<= .cse0 .cse2) (<= (div (+ .cse3 c_~cur~0) (- 2)) .cse9) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:21:21,126 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse2 (+ .cse9 c_~prev~0 1)) (.cse0 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse4 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse3 (* c_~j~0 (- 1))) (.cse5 (+ .cse9 c_~prev~0)) (.cse1 (* c_~i~0 (- 1))) (.cse7 (+ c_~prev~0 c_~cur~0))) (and (<= (+ c_~i~0 376) .cse0) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse1 c_~prev~0 c_~cur~0) (- 2)) .cse2) (<= (div (+ .cse3 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse2) (<= (div (+ .cse3 c_~prev~0 (- 4)) (- 2)) .cse4) (<= c_~j~0 .cse5) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse6 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ 2 (* 8 aux_div_v_~cur~0_64_50) .cse6 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50) (* 2 c_~i~0))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0) (< (+ 6 c_~i~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse6 (* 4 aux_div_v_~cur~0_67_50)))))) (= c_~j~0 1) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse0) (<= (div (+ .cse1 c_~prev~0 (- 4)) (- 2)) .cse4) (<= (div (+ .cse3 c_~cur~0) (- 2)) .cse7) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse5) (forall ((aux_div_v_~cur~0_67_50 Int) (aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_67_50 Int)) (let ((.cse8 (* 4 c_~cur~0))) (or (< (+ aux_mod_v_~cur~0_67_50 aux_div_v_~cur~0_64_50) (+ c_~prev~0 (* 2 aux_div_v_~cur~0_67_50) (* 3 c_~cur~0))) (<= 2 aux_mod_v_~cur~0_67_50) (< aux_div_v_~cur~0_67_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (< aux_mod_v_~cur~0_67_50 0) (< (+ 6 c_~j~0 (* 2 aux_mod_v_~cur~0_67_50) aux_mod_v_~prev~0_77_49) (+ c_~prev~0 (* 2 aux_div_v_~prev~0_77_49) .cse8 (* 4 aux_div_v_~cur~0_67_50))) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_67_50) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 2 (* 8 aux_div_v_~cur~0_64_50) .cse8 (* 2 aux_mod_v_~prev~0_77_49) (* 8 aux_div_v_~cur~0_67_50))) (< aux_mod_v_~cur~0_64_50 0)))) (<= (div (+ .cse1 c_~cur~0) (- 2)) .cse7) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false [2021-11-23 03:21:23,449 WARN L838 $PredicateComparison]: unable to prove that (let ((.cse9 (* 2 c_~cur~0))) (let ((.cse5 (+ .cse9 c_~prev~0 1)) (.cse1 (+ (* 144 c_~prev~0) (* 233 c_~cur~0))) (.cse7 (+ (* 2 c_~prev~0) 2 (* 4 c_~cur~0))) (.cse6 (* c_~j~0 (- 1))) (.cse8 (+ .cse9 c_~prev~0)) (.cse0 (+ c_~i~0 376)) (.cse2 (+ (* 89 c_~prev~0) (* 144 c_~cur~0))) (.cse4 (* c_~i~0 (- 1))) (.cse3 (+ c_~prev~0 c_~cur~0))) (and (<= .cse0 .cse1) (<= 377 .cse2) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)))) (<= c_~j~0 .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (<= (div (+ (- 2) .cse4 c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 (- 2) c_~prev~0 c_~cur~0) (- 2)) .cse5) (<= (div (+ .cse6 c_~prev~0 (- 4)) (- 2)) .cse7) (<= c_~j~0 .cse8) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (= c_~j~0 1) (<= c_~i~0 .cse3) (forall ((aux_div_v_~prev~0_77_49 Int) (v_~cur~0_64 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (< v_~cur~0_64 (+ (* 2 c_~cur~0) c_~prev~0)) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ 6 (* 8 aux_div_v_~cur~0_64_50) (* 4 c_~cur~0) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~cur~0_64_50 0))) (<= 377 .cse1) (<= (div (+ .cse4 c_~prev~0 (- 4)) (- 2)) .cse7) (<= (div (+ .cse6 c_~cur~0) (- 2)) .cse3) (forall ((v_~cur~0_67 Int)) (or (and (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49) (* 2 c_~i~0))) (< aux_mod_v_~prev~0_77_49 0) (< aux_div_v_~cur~0_64_50 (+ c_~cur~0 v_~cur~0_67 1)) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0)))) (< v_~cur~0_67 (+ c_~prev~0 c_~cur~0)))) (<= c_~i~0 .cse8) (<= .cse0 .cse2) (<= (div (+ .cse4 c_~cur~0) (- 2)) .cse3) (forall ((aux_div_v_~cur~0_64_50 Int) (aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~cur~0_64_50 Int) (aux_mod_v_~prev~0_77_49 Int) (v_~cur~0_67 Int)) (or (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~prev~0 c_~cur~0 (* 2 v_~cur~0_67) (* 2 aux_div_v_~prev~0_77_49))) (<= (+ (* 5 aux_div_v_~prev~0_77_49) (* 4 aux_mod_v_~cur~0_64_50)) (+ (* 2 c_~j~0) (* 4 v_~cur~0_67) 6 (* 8 aux_div_v_~cur~0_64_50) (* 2 aux_mod_v_~prev~0_77_49))) (< v_~cur~0_67 (+ (* 2 c_~cur~0) c_~prev~0)) (< aux_div_v_~cur~0_64_50 (+ c_~prev~0 c_~cur~0 v_~cur~0_67 1)) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~cur~0_64_50) (<= 2 aux_mod_v_~prev~0_77_49) (< aux_mod_v_~cur~0_64_50 0))) (forall ((v_~cur~0_64 Int)) (or (< v_~cur~0_64 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< aux_mod_v_~prev~0_77_49 0) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 c_~j~0) (* 2 aux_mod_v_~prev~0_77_49) 10)) (< (+ c_~j~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (<= 2 aux_mod_v_~prev~0_77_49))) (forall ((aux_div_v_~prev~0_77_49 Int) (aux_mod_v_~prev~0_77_49 Int)) (or (< (+ c_~i~0 aux_mod_v_~prev~0_77_49 4) (+ c_~cur~0 (* 2 aux_div_v_~prev~0_77_49))) (< aux_mod_v_~prev~0_77_49 0) (<= 2 aux_mod_v_~prev~0_77_49) (<= (* 5 aux_div_v_~prev~0_77_49) (+ (* 4 v_~cur~0_64) (* 2 aux_mod_v_~prev~0_77_49) 10 (* 2 c_~i~0))))))))))) is different from false