./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.15.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aef121e0 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/config/TaipanReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.15.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 05397c7941b2acd95b1b6d02c6c64b476ab8b290a5b56301ff8db7ca1986067b --- Real Ultimate output --- This is Ultimate 0.2.1-dev-aef121e [2021-11-23 02:12:29,203 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-23 02:12:29,205 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-23 02:12:29,246 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-23 02:12:29,247 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-23 02:12:29,248 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-23 02:12:29,250 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-23 02:12:29,253 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-23 02:12:29,256 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-23 02:12:29,257 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-23 02:12:29,258 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-23 02:12:29,260 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-23 02:12:29,260 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-23 02:12:29,262 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-23 02:12:29,264 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-23 02:12:29,266 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-23 02:12:29,267 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-23 02:12:29,268 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-23 02:12:29,271 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-23 02:12:29,274 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-23 02:12:29,276 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-23 02:12:29,284 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-23 02:12:29,286 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-23 02:12:29,290 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-23 02:12:29,294 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-23 02:12:29,294 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-23 02:12:29,295 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-23 02:12:29,296 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-23 02:12:29,296 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-23 02:12:29,297 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-23 02:12:29,298 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-23 02:12:29,299 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-23 02:12:29,300 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-23 02:12:29,301 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-23 02:12:29,303 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-23 02:12:29,303 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-23 02:12:29,304 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-23 02:12:29,305 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-23 02:12:29,305 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-23 02:12:29,306 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-23 02:12:29,307 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-23 02:12:29,309 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/config/svcomp-Reach-32bit-Taipan_Default.epf [2021-11-23 02:12:29,340 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-23 02:12:29,341 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-23 02:12:29,341 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-23 02:12:29,342 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-23 02:12:29,343 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2021-11-23 02:12:29,343 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2021-11-23 02:12:29,343 INFO L138 SettingsManager]: * User list type=DISABLED [2021-11-23 02:12:29,344 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2021-11-23 02:12:29,344 INFO L138 SettingsManager]: * Explicit value domain=true [2021-11-23 02:12:29,344 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2021-11-23 02:12:29,345 INFO L138 SettingsManager]: * Octagon Domain=false [2021-11-23 02:12:29,345 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2021-11-23 02:12:29,345 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2021-11-23 02:12:29,345 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2021-11-23 02:12:29,345 INFO L138 SettingsManager]: * Interval Domain=false [2021-11-23 02:12:29,346 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2021-11-23 02:12:29,346 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2021-11-23 02:12:29,346 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2021-11-23 02:12:29,347 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-23 02:12:29,347 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-23 02:12:29,347 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-23 02:12:29,348 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-23 02:12:29,348 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-23 02:12:29,348 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-11-23 02:12:29,348 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-11-23 02:12:29,349 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-11-23 02:12:29,349 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-23 02:12:29,349 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-23 02:12:29,349 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-23 02:12:29,349 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-11-23 02:12:29,350 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-23 02:12:29,350 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-11-23 02:12:29,350 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 02:12:29,350 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-23 02:12:29,351 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-11-23 02:12:29,351 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-11-23 02:12:29,351 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2021-11-23 02:12:29,351 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-11-23 02:12:29,352 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-11-23 02:12:29,352 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-23 02:12:29,352 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2021-11-23 02:12:29,352 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 05397c7941b2acd95b1b6d02c6c64b476ab8b290a5b56301ff8db7ca1986067b [2021-11-23 02:12:29,626 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-23 02:12:29,652 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-23 02:12:29,655 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-23 02:12:29,656 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-23 02:12:29,657 INFO L275 PluginConnector]: CDTParser initialized [2021-11-23 02:12:29,659 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/../../sv-benchmarks/c/systemc/transmitter.15.cil.c [2021-11-23 02:12:29,740 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/data/ce569990c/cd6b9e0fa91e41c9b52c84f2f7638b45/FLAG6b5a4b65d [2021-11-23 02:12:30,205 INFO L306 CDTParser]: Found 1 translation units. [2021-11-23 02:12:30,206 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/sv-benchmarks/c/systemc/transmitter.15.cil.c [2021-11-23 02:12:30,222 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/data/ce569990c/cd6b9e0fa91e41c9b52c84f2f7638b45/FLAG6b5a4b65d [2021-11-23 02:12:30,546 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/data/ce569990c/cd6b9e0fa91e41c9b52c84f2f7638b45 [2021-11-23 02:12:30,548 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-23 02:12:30,550 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-23 02:12:30,552 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-23 02:12:30,552 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-23 02:12:30,556 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-23 02:12:30,556 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:12:30" (1/1) ... [2021-11-23 02:12:30,558 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c223f70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:30, skipping insertion in model container [2021-11-23 02:12:30,558 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:12:30" (1/1) ... [2021-11-23 02:12:30,566 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-23 02:12:30,623 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-23 02:12:30,818 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/sv-benchmarks/c/systemc/transmitter.15.cil.c[706,719] [2021-11-23 02:12:31,022 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 02:12:31,045 INFO L203 MainTranslator]: Completed pre-run [2021-11-23 02:12:31,057 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/sv-benchmarks/c/systemc/transmitter.15.cil.c[706,719] [2021-11-23 02:12:31,128 INFO L209 PostProcessor]: Analyzing one entry point: main [2021-11-23 02:12:31,150 INFO L208 MainTranslator]: Completed translation [2021-11-23 02:12:31,151 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31 WrapperNode [2021-11-23 02:12:31,151 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-23 02:12:31,152 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-23 02:12:31,153 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-23 02:12:31,153 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-23 02:12:31,161 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,177 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,244 INFO L137 Inliner]: procedures = 54, calls = 69, calls flagged for inlining = 38, calls inlined = 38, statements flattened = 891 [2021-11-23 02:12:31,244 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-23 02:12:31,245 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-23 02:12:31,245 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-23 02:12:31,245 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-23 02:12:31,253 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,254 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,259 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,260 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,277 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,296 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,311 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,318 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-23 02:12:31,320 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-23 02:12:31,320 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-23 02:12:31,320 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-23 02:12:31,321 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (1/1) ... [2021-11-23 02:12:31,330 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-11-23 02:12:31,341 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/z3 [2021-11-23 02:12:31,353 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-11-23 02:12:31,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-11-23 02:12:31,395 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2021-11-23 02:12:31,395 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2021-11-23 02:12:31,395 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2021-11-23 02:12:31,395 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2021-11-23 02:12:31,396 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2021-11-23 02:12:31,396 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2021-11-23 02:12:31,396 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2021-11-23 02:12:31,396 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2021-11-23 02:12:31,396 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2021-11-23 02:12:31,397 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2021-11-23 02:12:31,397 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2021-11-23 02:12:31,397 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2021-11-23 02:12:31,397 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2021-11-23 02:12:31,397 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-23 02:12:31,398 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-23 02:12:31,398 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-23 02:12:31,533 INFO L236 CfgBuilder]: Building ICFG [2021-11-23 02:12:31,535 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2021-11-23 02:12:32,385 INFO L277 CfgBuilder]: Performing block encoding [2021-11-23 02:12:32,895 INFO L296 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-23 02:12:32,895 INFO L301 CfgBuilder]: Removed 17 assume(true) statements. [2021-11-23 02:12:32,899 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:12:32 BoogieIcfgContainer [2021-11-23 02:12:32,899 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-23 02:12:32,902 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-11-23 02:12:32,902 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-11-23 02:12:32,906 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-11-23 02:12:32,906 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 02:12:30" (1/3) ... [2021-11-23 02:12:32,908 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3175fab9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:12:32, skipping insertion in model container [2021-11-23 02:12:32,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:12:31" (2/3) ... [2021-11-23 02:12:32,909 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3175fab9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:12:32, skipping insertion in model container [2021-11-23 02:12:32,909 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:12:32" (3/3) ... [2021-11-23 02:12:32,911 INFO L111 eAbstractionObserver]: Analyzing ICFG transmitter.15.cil.c [2021-11-23 02:12:32,920 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-11-23 02:12:32,921 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2021-11-23 02:12:32,994 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-11-23 02:12:33,005 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-11-23 02:12:33,006 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2021-11-23 02:12:33,047 INFO L276 IsEmpty]: Start isEmpty. Operand has 193 states, 159 states have (on average 1.5534591194968554) internal successors, (247), 161 states have internal predecessors, (247), 26 states have call successors, (26), 6 states have call predecessors, (26), 6 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) [2021-11-23 02:12:33,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:33,058 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:33,059 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:33,059 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:33,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:33,065 INFO L85 PathProgramCache]: Analyzing trace with hash 1444001915, now seen corresponding path program 1 times [2021-11-23 02:12:33,075 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:33,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1779834444] [2021-11-23 02:12:33,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:33,077 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:33,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:33,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:33,613 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:33,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1779834444] [2021-11-23 02:12:33,614 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1779834444] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:33,614 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:33,614 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 02:12:33,618 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334030466] [2021-11-23 02:12:33,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:33,624 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 02:12:33,625 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:33,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 02:12:33,657 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:33,661 INFO L87 Difference]: Start difference. First operand has 193 states, 159 states have (on average 1.5534591194968554) internal successors, (247), 161 states have internal predecessors, (247), 26 states have call successors, (26), 6 states have call predecessors, (26), 6 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:34,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:34,247 INFO L93 Difference]: Finished difference Result 562 states and 901 transitions. [2021-11-23 02:12:34,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 02:12:34,250 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:34,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:34,277 INFO L225 Difference]: With dead ends: 562 [2021-11-23 02:12:34,277 INFO L226 Difference]: Without dead ends: 370 [2021-11-23 02:12:34,285 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:34,288 INFO L933 BasicCegarLoop]: 460 mSDtfsCounter, 516 mSDsluCounter, 462 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 516 SdHoareTripleChecker+Valid, 826 SdHoareTripleChecker+Invalid, 316 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:34,290 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [516 Valid, 826 Invalid, 316 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-11-23 02:12:34,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2021-11-23 02:12:34,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 367. [2021-11-23 02:12:34,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 367 states, 307 states have (on average 1.511400651465798) internal successors, (464), 308 states have internal predecessors, (464), 47 states have call successors, (47), 12 states have call predecessors, (47), 12 states have return successors, (47), 47 states have call predecessors, (47), 47 states have call successors, (47) [2021-11-23 02:12:34,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367 states to 367 states and 558 transitions. [2021-11-23 02:12:34,397 INFO L78 Accepts]: Start accepts. Automaton has 367 states and 558 transitions. Word has length 67 [2021-11-23 02:12:34,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:34,398 INFO L470 AbstractCegarLoop]: Abstraction has 367 states and 558 transitions. [2021-11-23 02:12:34,398 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:34,398 INFO L276 IsEmpty]: Start isEmpty. Operand 367 states and 558 transitions. [2021-11-23 02:12:34,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:34,402 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:34,402 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:34,403 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-11-23 02:12:34,403 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:34,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:34,404 INFO L85 PathProgramCache]: Analyzing trace with hash 1684269244, now seen corresponding path program 1 times [2021-11-23 02:12:34,404 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:34,405 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804262719] [2021-11-23 02:12:34,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:34,405 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:34,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:34,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:34,622 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:34,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804262719] [2021-11-23 02:12:34,624 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804262719] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:34,624 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:34,624 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-23 02:12:34,625 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988992223] [2021-11-23 02:12:34,625 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:34,628 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-23 02:12:34,629 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:34,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-23 02:12:34,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-23 02:12:34,631 INFO L87 Difference]: Start difference. First operand 367 states and 558 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:35,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:35,461 INFO L93 Difference]: Finished difference Result 1259 states and 1939 transitions. [2021-11-23 02:12:35,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 02:12:35,465 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:35,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:35,477 INFO L225 Difference]: With dead ends: 1259 [2021-11-23 02:12:35,477 INFO L226 Difference]: Without dead ends: 870 [2021-11-23 02:12:35,484 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-23 02:12:35,487 INFO L933 BasicCegarLoop]: 493 mSDtfsCounter, 1096 mSDsluCounter, 1012 mSDsCounter, 0 mSdLazyCounter, 499 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1320 SdHoareTripleChecker+Invalid, 709 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:35,488 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1320 Invalid, 709 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 499 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-23 02:12:35,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 870 states. [2021-11-23 02:12:35,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 870 to 858. [2021-11-23 02:12:35,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 858 states, 737 states have (on average 1.5006784260515604) internal successors, (1106), 726 states have internal predecessors, (1106), 92 states have call successors, (92), 26 states have call predecessors, (92), 28 states have return successors, (106), 106 states have call predecessors, (106), 92 states have call successors, (106) [2021-11-23 02:12:35,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 858 states to 858 states and 1304 transitions. [2021-11-23 02:12:35,604 INFO L78 Accepts]: Start accepts. Automaton has 858 states and 1304 transitions. Word has length 67 [2021-11-23 02:12:35,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:35,605 INFO L470 AbstractCegarLoop]: Abstraction has 858 states and 1304 transitions. [2021-11-23 02:12:35,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:35,605 INFO L276 IsEmpty]: Start isEmpty. Operand 858 states and 1304 transitions. [2021-11-23 02:12:35,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:35,607 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:35,607 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:35,608 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-11-23 02:12:35,608 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:35,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:35,609 INFO L85 PathProgramCache]: Analyzing trace with hash -416571971, now seen corresponding path program 1 times [2021-11-23 02:12:35,609 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:35,609 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058004645] [2021-11-23 02:12:35,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:35,609 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:35,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:35,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:35,739 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:35,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058004645] [2021-11-23 02:12:35,739 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2058004645] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:35,740 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:35,740 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-23 02:12:35,741 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [101018722] [2021-11-23 02:12:35,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:35,741 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-23 02:12:35,742 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:35,742 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-23 02:12:35,743 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-23 02:12:35,743 INFO L87 Difference]: Start difference. First operand 858 states and 1304 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:36,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:36,469 INFO L93 Difference]: Finished difference Result 3017 states and 4652 transitions. [2021-11-23 02:12:36,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 02:12:36,470 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:36,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:36,487 INFO L225 Difference]: With dead ends: 3017 [2021-11-23 02:12:36,487 INFO L226 Difference]: Without dead ends: 2113 [2021-11-23 02:12:36,493 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-23 02:12:36,495 INFO L933 BasicCegarLoop]: 493 mSDtfsCounter, 1096 mSDsluCounter, 983 mSDsCounter, 0 mSdLazyCounter, 495 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1295 SdHoareTripleChecker+Invalid, 705 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 495 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:36,496 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1295 Invalid, 705 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 495 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2021-11-23 02:12:36,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2113 states. [2021-11-23 02:12:36,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2113 to 1645. [2021-11-23 02:12:36,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1645 states, 1416 states have (on average 1.502824858757062) internal successors, (2128), 1406 states have internal predecessors, (2128), 172 states have call successors, (172), 50 states have call predecessors, (172), 56 states have return successors, (213), 189 states have call predecessors, (213), 172 states have call successors, (213) [2021-11-23 02:12:36,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1645 states to 1645 states and 2513 transitions. [2021-11-23 02:12:36,615 INFO L78 Accepts]: Start accepts. Automaton has 1645 states and 2513 transitions. Word has length 67 [2021-11-23 02:12:36,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:36,616 INFO L470 AbstractCegarLoop]: Abstraction has 1645 states and 2513 transitions. [2021-11-23 02:12:36,616 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:36,616 INFO L276 IsEmpty]: Start isEmpty. Operand 1645 states and 2513 transitions. [2021-11-23 02:12:36,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:36,618 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:36,618 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:36,619 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-11-23 02:12:36,619 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:36,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:36,620 INFO L85 PathProgramCache]: Analyzing trace with hash 1016262748, now seen corresponding path program 1 times [2021-11-23 02:12:36,620 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:36,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530610025] [2021-11-23 02:12:36,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:36,621 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:36,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:36,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:36,724 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:36,726 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530610025] [2021-11-23 02:12:36,726 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [530610025] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:36,726 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:36,727 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 02:12:36,727 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344943898] [2021-11-23 02:12:36,727 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:36,729 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 02:12:36,729 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:36,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 02:12:36,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:36,730 INFO L87 Difference]: Start difference. First operand 1645 states and 2513 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:37,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:37,212 INFO L93 Difference]: Finished difference Result 4896 states and 7618 transitions. [2021-11-23 02:12:37,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 02:12:37,213 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:37,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:37,239 INFO L225 Difference]: With dead ends: 4896 [2021-11-23 02:12:37,239 INFO L226 Difference]: Without dead ends: 3256 [2021-11-23 02:12:37,248 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:37,250 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 531 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 531 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:37,250 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [531 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2021-11-23 02:12:37,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3256 states. [2021-11-23 02:12:37,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3256 to 3244. [2021-11-23 02:12:37,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3244 states, 2799 states have (on average 1.4948195784208647) internal successors, (4184), 2779 states have internal predecessors, (4184), 332 states have call successors, (332), 100 states have call predecessors, (332), 112 states have return successors, (411), 365 states have call predecessors, (411), 332 states have call successors, (411) [2021-11-23 02:12:37,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3244 states to 3244 states and 4927 transitions. [2021-11-23 02:12:37,511 INFO L78 Accepts]: Start accepts. Automaton has 3244 states and 4927 transitions. Word has length 67 [2021-11-23 02:12:37,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:37,512 INFO L470 AbstractCegarLoop]: Abstraction has 3244 states and 4927 transitions. [2021-11-23 02:12:37,512 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:37,512 INFO L276 IsEmpty]: Start isEmpty. Operand 3244 states and 4927 transitions. [2021-11-23 02:12:37,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:37,514 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:37,514 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:37,514 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-11-23 02:12:37,515 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:37,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:37,515 INFO L85 PathProgramCache]: Analyzing trace with hash -1139251653, now seen corresponding path program 1 times [2021-11-23 02:12:37,515 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:37,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043423319] [2021-11-23 02:12:37,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:37,516 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:37,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:37,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:37,583 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:37,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043423319] [2021-11-23 02:12:37,584 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043423319] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:37,584 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:37,584 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 02:12:37,585 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827518634] [2021-11-23 02:12:37,585 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:37,585 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 02:12:37,586 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:37,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 02:12:37,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:37,587 INFO L87 Difference]: Start difference. First operand 3244 states and 4927 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:38,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:38,262 INFO L93 Difference]: Finished difference Result 9665 states and 14945 transitions. [2021-11-23 02:12:38,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 02:12:38,263 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:38,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:38,313 INFO L225 Difference]: With dead ends: 9665 [2021-11-23 02:12:38,313 INFO L226 Difference]: Without dead ends: 6426 [2021-11-23 02:12:38,365 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:38,367 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 537 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 537 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:38,368 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [537 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-11-23 02:12:38,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6426 states. [2021-11-23 02:12:38,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6426 to 6404. [2021-11-23 02:12:38,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6404 states, 5535 states have (on average 1.4863595302619692) internal successors, (8227), 5496 states have internal predecessors, (8227), 644 states have call successors, (644), 200 states have call predecessors, (644), 224 states have return successors, (796), 708 states have call predecessors, (796), 644 states have call successors, (796) [2021-11-23 02:12:38,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6404 states to 6404 states and 9667 transitions. [2021-11-23 02:12:38,804 INFO L78 Accepts]: Start accepts. Automaton has 6404 states and 9667 transitions. Word has length 67 [2021-11-23 02:12:38,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:38,805 INFO L470 AbstractCegarLoop]: Abstraction has 6404 states and 9667 transitions. [2021-11-23 02:12:38,805 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:38,805 INFO L276 IsEmpty]: Start isEmpty. Operand 6404 states and 9667 transitions. [2021-11-23 02:12:38,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:38,808 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:38,808 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:38,808 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-11-23 02:12:38,809 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:38,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:38,809 INFO L85 PathProgramCache]: Analyzing trace with hash 1390899034, now seen corresponding path program 1 times [2021-11-23 02:12:38,810 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:38,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34688891] [2021-11-23 02:12:38,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:38,810 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:38,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:38,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:38,920 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:38,920 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34688891] [2021-11-23 02:12:38,920 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34688891] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:38,920 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:38,921 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-23 02:12:38,921 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207895482] [2021-11-23 02:12:38,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:38,921 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-23 02:12:38,922 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:38,922 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-23 02:12:38,922 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-23 02:12:38,922 INFO L87 Difference]: Start difference. First operand 6404 states and 9667 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:40,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:40,280 INFO L93 Difference]: Finished difference Result 21857 states and 33614 transitions. [2021-11-23 02:12:40,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 02:12:40,281 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:40,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:40,431 INFO L225 Difference]: With dead ends: 21857 [2021-11-23 02:12:40,431 INFO L226 Difference]: Without dead ends: 15082 [2021-11-23 02:12:40,528 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-23 02:12:40,531 INFO L933 BasicCegarLoop]: 487 mSDtfsCounter, 1096 mSDsluCounter, 739 mSDsCounter, 0 mSdLazyCounter, 444 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 444 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:40,532 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1089 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 444 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2021-11-23 02:12:40,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15082 states. [2021-11-23 02:12:41,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15082 to 12392. [2021-11-23 02:12:41,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12392 states, 10707 states have (on average 1.4852899971980946) internal successors, (15903), 10684 states have internal predecessors, (15903), 1236 states have call successors, (1236), 392 states have call predecessors, (1236), 448 states have return successors, (1580), 1316 states have call predecessors, (1580), 1236 states have call successors, (1580) [2021-11-23 02:12:41,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12392 states to 12392 states and 18719 transitions. [2021-11-23 02:12:41,456 INFO L78 Accepts]: Start accepts. Automaton has 12392 states and 18719 transitions. Word has length 67 [2021-11-23 02:12:41,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:41,459 INFO L470 AbstractCegarLoop]: Abstraction has 12392 states and 18719 transitions. [2021-11-23 02:12:41,460 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:41,461 INFO L276 IsEmpty]: Start isEmpty. Operand 12392 states and 18719 transitions. [2021-11-23 02:12:41,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:41,462 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:41,462 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:41,462 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-11-23 02:12:41,463 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:41,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:41,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1333754809, now seen corresponding path program 1 times [2021-11-23 02:12:41,464 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:41,464 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132735377] [2021-11-23 02:12:41,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:41,465 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:41,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:41,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:41,588 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:41,588 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132735377] [2021-11-23 02:12:41,589 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132735377] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:41,589 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:41,589 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-23 02:12:41,589 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209891484] [2021-11-23 02:12:41,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:41,590 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-11-23 02:12:41,591 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:41,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-23 02:12:41,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-23 02:12:41,592 INFO L87 Difference]: Start difference. First operand 12392 states and 18719 transitions. Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:43,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:43,546 INFO L93 Difference]: Finished difference Result 41661 states and 64226 transitions. [2021-11-23 02:12:43,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-23 02:12:43,547 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:43,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:43,751 INFO L225 Difference]: With dead ends: 41661 [2021-11-23 02:12:43,751 INFO L226 Difference]: Without dead ends: 28546 [2021-11-23 02:12:43,827 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-23 02:12:43,831 INFO L933 BasicCegarLoop]: 487 mSDtfsCounter, 1096 mSDsluCounter, 739 mSDsCounter, 0 mSdLazyCounter, 444 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1110 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 444 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:43,831 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1110 Valid, 1089 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 444 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-23 02:12:43,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28546 states. [2021-11-23 02:12:45,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28546 to 24208. [2021-11-23 02:12:45,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24208 states, 20923 states have (on average 1.4831047172967549) internal successors, (31031), 20932 states have internal predecessors, (31031), 2388 states have call successors, (2388), 776 states have call predecessors, (2388), 896 states have return successors, (3100), 2500 states have call predecessors, (3100), 2388 states have call successors, (3100) [2021-11-23 02:12:45,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24208 states to 24208 states and 36519 transitions. [2021-11-23 02:12:45,603 INFO L78 Accepts]: Start accepts. Automaton has 24208 states and 36519 transitions. Word has length 67 [2021-11-23 02:12:45,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:45,605 INFO L470 AbstractCegarLoop]: Abstraction has 24208 states and 36519 transitions. [2021-11-23 02:12:45,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:45,606 INFO L276 IsEmpty]: Start isEmpty. Operand 24208 states and 36519 transitions. [2021-11-23 02:12:45,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:45,607 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:45,607 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:45,607 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-11-23 02:12:45,608 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:45,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:45,609 INFO L85 PathProgramCache]: Analyzing trace with hash -256640168, now seen corresponding path program 1 times [2021-11-23 02:12:45,610 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:45,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857734081] [2021-11-23 02:12:45,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:45,610 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:45,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:45,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:45,706 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:45,707 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857734081] [2021-11-23 02:12:45,707 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857734081] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:45,707 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:45,707 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-23 02:12:45,708 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204824627] [2021-11-23 02:12:45,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:45,709 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-11-23 02:12:45,710 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:45,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-23 02:12:45,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:45,711 INFO L87 Difference]: Start difference. First operand 24208 states and 36519 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:48,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:48,007 INFO L93 Difference]: Finished difference Result 72165 states and 110840 transitions. [2021-11-23 02:12:48,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-23 02:12:48,008 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:48,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:48,327 INFO L225 Difference]: With dead ends: 72165 [2021-11-23 02:12:48,328 INFO L226 Difference]: Without dead ends: 47962 [2021-11-23 02:12:48,432 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-23 02:12:48,436 INFO L933 BasicCegarLoop]: 459 mSDtfsCounter, 552 mSDsluCounter, 458 mSDsCounter, 0 mSdLazyCounter, 304 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 552 SdHoareTripleChecker+Valid, 824 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 304 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:48,436 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [552 Valid, 824 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 304 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2021-11-23 02:12:48,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47962 states. [2021-11-23 02:12:50,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47962 to 47824. [2021-11-23 02:12:50,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47824 states, 41387 states have (on average 1.4730954164351124) internal successors, (60967), 41408 states have internal predecessors, (60967), 4644 states have call successors, (4644), 1552 states have call predecessors, (4644), 1792 states have return successors, (6008), 4864 states have call predecessors, (6008), 4644 states have call successors, (6008) [2021-11-23 02:12:51,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47824 states to 47824 states and 71619 transitions. [2021-11-23 02:12:51,190 INFO L78 Accepts]: Start accepts. Automaton has 47824 states and 71619 transitions. Word has length 67 [2021-11-23 02:12:51,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:12:51,191 INFO L470 AbstractCegarLoop]: Abstraction has 47824 states and 71619 transitions. [2021-11-23 02:12:51,191 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 2 states have call successors, (5), 1 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:51,191 INFO L276 IsEmpty]: Start isEmpty. Operand 47824 states and 71619 transitions. [2021-11-23 02:12:51,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-11-23 02:12:51,192 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:12:51,192 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:12:51,193 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-11-23 02:12:51,193 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:12:51,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:12:51,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1230129127, now seen corresponding path program 1 times [2021-11-23 02:12:51,194 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:12:51,194 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78803684] [2021-11-23 02:12:51,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:12:51,195 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:12:51,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-23 02:12:51,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-23 02:12:51,324 INFO L139 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2021-11-23 02:12:51,325 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78803684] [2021-11-23 02:12:51,325 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [78803684] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-23 02:12:51,325 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-23 02:12:51,325 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-11-23 02:12:51,325 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982277661] [2021-11-23 02:12:51,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-23 02:12:51,326 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-11-23 02:12:51,326 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2021-11-23 02:12:51,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-11-23 02:12:51,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-11-23 02:12:51,327 INFO L87 Difference]: Start difference. First operand 47824 states and 71619 transitions. Second operand has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:12:56,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-23 02:12:56,129 INFO L93 Difference]: Finished difference Result 152068 states and 227817 transitions. [2021-11-23 02:12:56,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-11-23 02:12:56,129 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 67 [2021-11-23 02:12:56,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-11-23 02:12:57,297 INFO L225 Difference]: With dead ends: 152068 [2021-11-23 02:12:57,297 INFO L226 Difference]: Without dead ends: 104250 [2021-11-23 02:12:57,439 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2021-11-23 02:12:57,442 INFO L933 BasicCegarLoop]: 260 mSDtfsCounter, 1143 mSDsluCounter, 583 mSDsCounter, 0 mSdLazyCounter, 297 mSolverCounterSat, 161 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1150 SdHoareTripleChecker+Valid, 744 SdHoareTripleChecker+Invalid, 458 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 161 IncrementalHoareTripleChecker+Valid, 297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2021-11-23 02:12:57,442 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1150 Valid, 744 Invalid, 458 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [161 Valid, 297 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2021-11-23 02:12:57,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104250 states. [2021-11-23 02:13:01,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104250 to 81344. [2021-11-23 02:13:01,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81344 states, 71227 states have (on average 1.4598256279219959) internal successors, (103979), 71268 states have internal predecessors, (103979), 7044 states have call successors, (7044), 2592 states have call predecessors, (7044), 3072 states have return successors, (9772), 7484 states have call predecessors, (9772), 7044 states have call successors, (9772) [2021-11-23 02:13:02,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81344 states to 81344 states and 120795 transitions. [2021-11-23 02:13:02,157 INFO L78 Accepts]: Start accepts. Automaton has 81344 states and 120795 transitions. Word has length 67 [2021-11-23 02:13:02,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-11-23 02:13:02,158 INFO L470 AbstractCegarLoop]: Abstraction has 81344 states and 120795 transitions. [2021-11-23 02:13:02,158 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.5) internal successors, (57), 6 states have internal predecessors, (57), 2 states have call successors, (5), 2 states have call predecessors, (5), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2021-11-23 02:13:02,159 INFO L276 IsEmpty]: Start isEmpty. Operand 81344 states and 120795 transitions. [2021-11-23 02:13:02,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2021-11-23 02:13:02,159 INFO L506 BasicCegarLoop]: Found error trace [2021-11-23 02:13:02,160 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:13:02,160 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-11-23 02:13:02,160 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2021-11-23 02:13:02,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-23 02:13:02,161 INFO L85 PathProgramCache]: Analyzing trace with hash 473361867, now seen corresponding path program 1 times [2021-11-23 02:13:02,161 INFO L121 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2021-11-23 02:13:02,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590471765] [2021-11-23 02:13:02,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-23 02:13:02,161 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-23 02:13:02,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-23 02:13:02,203 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-23 02:13:02,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-23 02:13:02,372 INFO L133 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2021-11-23 02:13:02,372 INFO L628 BasicCegarLoop]: Counterexample is feasible [2021-11-23 02:13:02,373 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2021-11-23 02:13:02,375 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-11-23 02:13:02,381 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-23 02:13:02,385 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-11-23 02:13:02,609 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 02:13:02 BoogieIcfgContainer [2021-11-23 02:13:02,610 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-11-23 02:13:02,611 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-11-23 02:13:02,611 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-11-23 02:13:02,611 INFO L275 PluginConnector]: Witness Printer initialized [2021-11-23 02:13:02,612 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:12:32" (3/4) ... [2021-11-23 02:13:02,614 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-11-23 02:13:02,821 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/witness.graphml [2021-11-23 02:13:02,821 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-11-23 02:13:02,822 INFO L158 Benchmark]: Toolchain (without parser) took 32271.67ms. Allocated memory was 94.4MB in the beginning and 9.5GB in the end (delta: 9.4GB). Free memory was 56.2MB in the beginning and 8.6GB in the end (delta: -8.6GB). Peak memory consumption was 884.7MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,822 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 94.4MB. Free memory is still 73.5MB. There was no memory consumed. Max. memory is 16.1GB. [2021-11-23 02:13:02,822 INFO L158 Benchmark]: CACSL2BoogieTranslator took 599.99ms. Allocated memory is still 94.4MB. Free memory was 56.0MB in the beginning and 59.5MB in the end (delta: -3.5MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,823 INFO L158 Benchmark]: Boogie Procedure Inliner took 91.67ms. Allocated memory is still 94.4MB. Free memory was 59.5MB in the beginning and 55.2MB in the end (delta: 4.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,823 INFO L158 Benchmark]: Boogie Preprocessor took 73.89ms. Allocated memory is still 94.4MB. Free memory was 55.2MB in the beginning and 51.5MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,824 INFO L158 Benchmark]: RCFGBuilder took 1579.79ms. Allocated memory was 94.4MB in the beginning and 113.2MB in the end (delta: 18.9MB). Free memory was 51.5MB in the beginning and 63.7MB in the end (delta: -12.2MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,825 INFO L158 Benchmark]: TraceAbstraction took 29707.62ms. Allocated memory was 113.2MB in the beginning and 9.5GB in the end (delta: 9.4GB). Free memory was 63.0MB in the beginning and 8.6GB in the end (delta: -8.6GB). Peak memory consumption was 843.5MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,826 INFO L158 Benchmark]: Witness Printer took 210.52ms. Allocated memory is still 9.5GB. Free memory was 8.6GB in the beginning and 8.6GB in the end (delta: 28.3MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. [2021-11-23 02:13:02,828 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 94.4MB. Free memory is still 73.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 599.99ms. Allocated memory is still 94.4MB. Free memory was 56.0MB in the beginning and 59.5MB in the end (delta: -3.5MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 91.67ms. Allocated memory is still 94.4MB. Free memory was 59.5MB in the beginning and 55.2MB in the end (delta: 4.3MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 73.89ms. Allocated memory is still 94.4MB. Free memory was 55.2MB in the beginning and 51.5MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1579.79ms. Allocated memory was 94.4MB in the beginning and 113.2MB in the end (delta: 18.9MB). Free memory was 51.5MB in the beginning and 63.7MB in the end (delta: -12.2MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. * TraceAbstraction took 29707.62ms. Allocated memory was 113.2MB in the beginning and 9.5GB in the end (delta: 9.4GB). Free memory was 63.0MB in the beginning and 8.6GB in the end (delta: -8.6GB). Peak memory consumption was 843.5MB. Max. memory is 16.1GB. * Witness Printer took 210.52ms. Allocated memory is still 9.5GB. Free memory was 8.6GB in the beginning and 8.6GB in the end (delta: 28.3MB). Peak memory consumption was 29.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L25] int m_pc = 0; [L26] int t1_pc = 0; [L27] int t2_pc = 0; [L28] int t3_pc = 0; [L29] int t4_pc = 0; [L30] int t5_pc = 0; [L31] int t6_pc = 0; [L32] int t7_pc = 0; [L33] int t8_pc = 0; [L34] int t9_pc = 0; [L35] int t10_pc = 0; [L36] int t11_pc = 0; [L37] int t12_pc = 0; [L38] int t13_pc = 0; [L39] int m_st ; [L40] int t1_st ; [L41] int t2_st ; [L42] int t3_st ; [L43] int t4_st ; [L44] int t5_st ; [L45] int t6_st ; [L46] int t7_st ; [L47] int t8_st ; [L48] int t9_st ; [L49] int t10_st ; [L50] int t11_st ; [L51] int t12_st ; [L52] int t13_st ; [L53] int m_i ; [L54] int t1_i ; [L55] int t2_i ; [L56] int t3_i ; [L57] int t4_i ; [L58] int t5_i ; [L59] int t6_i ; [L60] int t7_i ; [L61] int t8_i ; [L62] int t9_i ; [L63] int t10_i ; [L64] int t11_i ; [L65] int t12_i ; [L66] int t13_i ; [L67] int M_E = 2; [L68] int T1_E = 2; [L69] int T2_E = 2; [L70] int T3_E = 2; [L71] int T4_E = 2; [L72] int T5_E = 2; [L73] int T6_E = 2; [L74] int T7_E = 2; [L75] int T8_E = 2; [L76] int T9_E = 2; [L77] int T10_E = 2; [L78] int T11_E = 2; [L79] int T12_E = 2; [L80] int T13_E = 2; [L81] int E_1 = 2; [L82] int E_2 = 2; [L83] int E_3 = 2; [L84] int E_4 = 2; [L85] int E_5 = 2; [L86] int E_6 = 2; [L87] int E_7 = 2; [L88] int E_8 = 2; [L89] int E_9 = 2; [L90] int E_10 = 2; [L91] int E_11 = 2; [L92] int E_12 = 2; [L93] int E_13 = 2; [L1937] int __retres1 ; [L1941] CALL init_model() [L1840] m_i = 1 [L1841] t1_i = 1 [L1842] t2_i = 1 [L1843] t3_i = 1 [L1844] t4_i = 1 [L1845] t5_i = 1 [L1846] t6_i = 1 [L1847] t7_i = 1 [L1848] t8_i = 1 [L1849] t9_i = 1 [L1850] t10_i = 1 [L1851] t11_i = 1 [L1852] t12_i = 1 [L1853] t13_i = 1 [L1941] RET init_model() [L1942] CALL start_simulation() [L1878] int kernel_st ; [L1879] int tmp ; [L1880] int tmp___0 ; [L1884] kernel_st = 0 VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1885] FCALL update_channels() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1886] CALL init_threads() [L881] COND TRUE m_i == 1 [L882] m_st = 0 [L886] COND TRUE t1_i == 1 [L887] t1_st = 0 [L891] COND TRUE t2_i == 1 [L892] t2_st = 0 [L896] COND TRUE t3_i == 1 [L897] t3_st = 0 [L901] COND TRUE t4_i == 1 [L902] t4_st = 0 [L906] COND TRUE t5_i == 1 [L907] t5_st = 0 [L911] COND TRUE t6_i == 1 [L912] t6_st = 0 [L916] COND TRUE t7_i == 1 [L917] t7_st = 0 [L921] COND TRUE t8_i == 1 [L922] t8_st = 0 [L926] COND TRUE t9_i == 1 [L927] t9_st = 0 [L931] COND TRUE t10_i == 1 [L932] t10_st = 0 [L936] COND TRUE t11_i == 1 [L937] t11_st = 0 [L941] COND TRUE t12_i == 1 [L942] t12_st = 0 [L946] COND TRUE t13_i == 1 [L947] t13_st = 0 [L1886] RET init_threads() [L1887] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_10)=2, \old(E_11)=2, \old(E_12)=2, \old(E_13)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(E_5)=2, \old(E_6)=2, \old(E_7)=2, \old(E_8)=2, \old(E_9)=2, \old(M_E)=2, \old(T10_E)=2, \old(T11_E)=2, \old(T12_E)=2, \old(T13_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, \old(T4_E)=2, \old(T5_E)=2, \old(T6_E)=2, \old(T7_E)=2, \old(T8_E)=2, \old(T9_E)=2, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1258] COND FALSE !(M_E == 0) [L1263] COND FALSE !(T1_E == 0) [L1268] COND FALSE !(T2_E == 0) [L1273] COND FALSE !(T3_E == 0) [L1278] COND FALSE !(T4_E == 0) [L1283] COND FALSE !(T5_E == 0) [L1288] COND FALSE !(T6_E == 0) [L1293] COND FALSE !(T7_E == 0) [L1298] COND FALSE !(T8_E == 0) [L1303] COND FALSE !(T9_E == 0) [L1308] COND FALSE !(T10_E == 0) [L1313] COND FALSE !(T11_E == 0) [L1318] COND FALSE !(T12_E == 0) [L1323] COND FALSE !(T13_E == 0) [L1328] COND FALSE !(E_1 == 0) [L1333] COND FALSE !(E_2 == 0) [L1338] COND FALSE !(E_3 == 0) [L1343] COND FALSE !(E_4 == 0) [L1348] COND FALSE !(E_5 == 0) [L1353] COND FALSE !(E_6 == 0) [L1358] COND FALSE !(E_7 == 0) [L1363] COND FALSE !(E_8 == 0) [L1368] COND FALSE !(E_9 == 0) [L1373] COND FALSE !(E_10 == 0) [L1378] COND FALSE !(E_11 == 0) [L1383] COND FALSE !(E_12 == 0) [L1388] COND FALSE !(E_13 == 0) [L1887] RET fire_delta_events() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1888] CALL activate_threads() VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1541] int tmp ; [L1542] int tmp___0 ; [L1543] int tmp___1 ; [L1544] int tmp___2 ; [L1545] int tmp___3 ; [L1546] int tmp___4 ; [L1547] int tmp___5 ; [L1548] int tmp___6 ; [L1549] int tmp___7 ; [L1550] int tmp___8 ; [L1551] int tmp___9 ; [L1552] int tmp___10 ; [L1553] int tmp___11 ; [L1554] int tmp___12 ; [L1558] CALL, EXPR is_master_triggered() [L604] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L607] COND FALSE !(m_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L617] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L619] return (__retres1); [L1558] RET, EXPR is_master_triggered() [L1558] tmp = is_master_triggered() [L1560] COND FALSE !(\read(tmp)) [L1566] CALL, EXPR is_transmit1_triggered() [L623] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L626] COND FALSE !(t1_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L636] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L638] return (__retres1); [L1566] RET, EXPR is_transmit1_triggered() [L1566] tmp___0 = is_transmit1_triggered() [L1568] COND FALSE !(\read(tmp___0)) [L1574] CALL, EXPR is_transmit2_triggered() [L642] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L645] COND FALSE !(t2_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L655] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L657] return (__retres1); [L1574] RET, EXPR is_transmit2_triggered() [L1574] tmp___1 = is_transmit2_triggered() [L1576] COND FALSE !(\read(tmp___1)) [L1582] CALL, EXPR is_transmit3_triggered() [L661] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L664] COND FALSE !(t3_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L674] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L676] return (__retres1); [L1582] RET, EXPR is_transmit3_triggered() [L1582] tmp___2 = is_transmit3_triggered() [L1584] COND FALSE !(\read(tmp___2)) [L1590] CALL, EXPR is_transmit4_triggered() [L680] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L683] COND FALSE !(t4_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L693] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L695] return (__retres1); [L1590] RET, EXPR is_transmit4_triggered() [L1590] tmp___3 = is_transmit4_triggered() [L1592] COND FALSE !(\read(tmp___3)) [L1598] CALL, EXPR is_transmit5_triggered() [L699] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L702] COND FALSE !(t5_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L712] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L714] return (__retres1); [L1598] RET, EXPR is_transmit5_triggered() [L1598] tmp___4 = is_transmit5_triggered() [L1600] COND FALSE !(\read(tmp___4)) [L1606] CALL, EXPR is_transmit6_triggered() [L718] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L721] COND FALSE !(t6_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L731] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L733] return (__retres1); [L1606] RET, EXPR is_transmit6_triggered() [L1606] tmp___5 = is_transmit6_triggered() [L1608] COND FALSE !(\read(tmp___5)) [L1614] CALL, EXPR is_transmit7_triggered() [L737] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L740] COND FALSE !(t7_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L750] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L752] return (__retres1); [L1614] RET, EXPR is_transmit7_triggered() [L1614] tmp___6 = is_transmit7_triggered() [L1616] COND FALSE !(\read(tmp___6)) [L1622] CALL, EXPR is_transmit8_triggered() [L756] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L759] COND FALSE !(t8_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L769] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L771] return (__retres1); [L1622] RET, EXPR is_transmit8_triggered() [L1622] tmp___7 = is_transmit8_triggered() [L1624] COND FALSE !(\read(tmp___7)) [L1630] CALL, EXPR is_transmit9_triggered() [L775] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L778] COND FALSE !(t9_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L788] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L790] return (__retres1); [L1630] RET, EXPR is_transmit9_triggered() [L1630] tmp___8 = is_transmit9_triggered() [L1632] COND FALSE !(\read(tmp___8)) [L1638] CALL, EXPR is_transmit10_triggered() [L794] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L797] COND FALSE !(t10_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L807] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L809] return (__retres1); [L1638] RET, EXPR is_transmit10_triggered() [L1638] tmp___9 = is_transmit10_triggered() [L1640] COND FALSE !(\read(tmp___9)) [L1646] CALL, EXPR is_transmit11_triggered() [L813] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L816] COND FALSE !(t11_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L826] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L828] return (__retres1); [L1646] RET, EXPR is_transmit11_triggered() [L1646] tmp___10 = is_transmit11_triggered() [L1648] COND FALSE !(\read(tmp___10)) [L1654] CALL, EXPR is_transmit12_triggered() [L832] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L835] COND FALSE !(t12_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L845] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L847] return (__retres1); [L1654] RET, EXPR is_transmit12_triggered() [L1654] tmp___11 = is_transmit12_triggered() [L1656] COND FALSE !(\read(tmp___11)) [L1662] CALL, EXPR is_transmit13_triggered() [L851] int __retres1 ; VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L854] COND FALSE !(t13_pc == 1) VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L864] __retres1 = 0 VAL [\old(m_st)=0, \old(t10_st)=0, \old(t11_st)=0, \old(t12_st)=0, \old(t13_st)=0, \old(t1_st)=0, \old(t2_st)=0, \old(t3_st)=0, \old(t4_st)=0, \old(t5_st)=0, \old(t6_st)=0, \old(t7_st)=0, \old(t8_st)=0, \old(t9_st)=0, __retres1=0, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L866] return (__retres1); [L1662] RET, EXPR is_transmit13_triggered() [L1662] tmp___12 = is_transmit13_triggered() [L1664] COND FALSE !(\read(tmp___12)) [L1888] RET activate_threads() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1889] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_10)=2, \old(E_11)=2, \old(E_12)=2, \old(E_13)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(E_5)=2, \old(E_6)=2, \old(E_7)=2, \old(E_8)=2, \old(E_9)=2, \old(M_E)=2, \old(T10_E)=2, \old(T11_E)=2, \old(T12_E)=2, \old(T13_E)=2, \old(T1_E)=2, \old(T2_E)=2, \old(T3_E)=2, \old(T4_E)=2, \old(T5_E)=2, \old(T6_E)=2, \old(T7_E)=2, \old(T8_E)=2, \old(T9_E)=2, E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1401] COND FALSE !(M_E == 1) [L1406] COND FALSE !(T1_E == 1) [L1411] COND FALSE !(T2_E == 1) [L1416] COND FALSE !(T3_E == 1) [L1421] COND FALSE !(T4_E == 1) [L1426] COND FALSE !(T5_E == 1) [L1431] COND FALSE !(T6_E == 1) [L1436] COND FALSE !(T7_E == 1) [L1441] COND FALSE !(T8_E == 1) [L1446] COND FALSE !(T9_E == 1) [L1451] COND FALSE !(T10_E == 1) [L1456] COND FALSE !(T11_E == 1) [L1461] COND FALSE !(T12_E == 1) [L1466] COND FALSE !(T13_E == 1) [L1471] COND FALSE !(E_1 == 1) [L1476] COND FALSE !(E_2 == 1) [L1481] COND FALSE !(E_3 == 1) [L1486] COND FALSE !(E_4 == 1) [L1491] COND FALSE !(E_5 == 1) [L1496] COND FALSE !(E_6 == 1) [L1501] COND FALSE !(E_7 == 1) [L1506] COND FALSE !(E_8 == 1) [L1511] COND FALSE !(E_9 == 1) [L1516] COND FALSE !(E_10 == 1) [L1521] COND FALSE !(E_11 == 1) [L1526] COND FALSE !(E_12 == 1) [L1531] COND FALSE !(E_13 == 1) [L1889] RET reset_delta_events() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1892] COND TRUE 1 [L1895] kernel_st = 1 [L1896] CALL eval() [L1037] int tmp ; VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1041] COND TRUE 1 VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1044] CALL, EXPR exists_runnable_thread() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L956] int __retres1 ; [L959] COND TRUE m_st == 0 [L960] __retres1 = 1 [L1032] return (__retres1); [L1044] RET, EXPR exists_runnable_thread() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] [L1044] tmp = exists_runnable_thread() [L1046] COND TRUE \read(tmp) VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0, tmp=1] [L1051] COND TRUE m_st == 0 [L1052] int tmp_ndt_1; [L1053] tmp_ndt_1 = __VERIFIER_nondet_int() [L1054] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0, tmp=1, tmp_ndt_1=0] [L1065] COND TRUE t1_st == 0 [L1066] int tmp_ndt_2; [L1067] tmp_ndt_2 = __VERIFIER_nondet_int() [L1068] COND FALSE !(\read(tmp_ndt_2)) [L1074] CALL error() [L21] reach_error() VAL [E_1=2, E_10=2, E_11=2, E_12=2, E_13=2, E_2=2, E_3=2, E_4=2, E_5=2, E_6=2, E_7=2, E_8=2, E_9=2, M_E=2, m_i=1, m_pc=0, m_st=0, T10_E=2, t10_i=1, t10_pc=0, t10_st=0, T11_E=2, t11_i=1, t11_pc=0, t11_st=0, T12_E=2, t12_i=1, t12_pc=0, t12_st=0, T13_E=2, t13_i=1, t13_pc=0, t13_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, T6_E=2, t6_i=1, t6_pc=0, t6_st=0, T7_E=2, t7_i=1, t7_pc=0, t7_st=0, T8_E=2, t8_i=1, t8_pc=0, t8_st=0, T9_E=2, t9_i=1, t9_pc=0, t9_st=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 193 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 29.4s, OverallIterations: 10, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 16.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 7726 SdHoareTripleChecker+Valid, 4.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 7663 mSDsluCounter, 8835 SdHoareTripleChecker+Invalid, 3.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5892 mSDsCounter, 1030 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3393 IncrementalHoareTripleChecker+Invalid, 4423 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1030 mSolverCounterUnsat, 4057 mSDtfsCounter, 3393 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 67 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=81344occurred in iteration=9, InterpolantAutomatonStates: 44, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 11.2s AutomataMinimizationTime, 9 MinimizatonAttempts, 30589 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 671 NumberOfCodeBlocks, 671 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 594 ConstructedInterpolants, 0 QuantifiedInterpolants, 1468 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-11-23 02:13:02,899 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5ab55e4b-754e-4234-994a-099931060983/bin/utaipan-EQgc7hIp5V/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE