./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i --full-output --architecture 32bit
--------------------------------------------------------------------------------
Checking for termination
Using default analysis
Version 63182f13
Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f1ddce0da39afb2e81d3f6974a6168ade2d49435b1ce063903c0017c6d40b05
--- Real Ultimate output ---
This is Ultimate 0.2.1-dev-63182f1
[2021-11-13 18:10:10,782 INFO L177 SettingsManager]: Resetting all preferences to default values...
[2021-11-13 18:10:10,808 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values
[2021-11-13 18:10:10,890 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2021-11-13 18:10:10,891 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2021-11-13 18:10:10,897 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2021-11-13 18:10:10,900 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2021-11-13 18:10:10,906 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values
[2021-11-13 18:10:10,910 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2021-11-13 18:10:10,920 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2021-11-13 18:10:10,922 INFO L181 SettingsManager]: Resetting Sifa preferences to default values
[2021-11-13 18:10:10,924 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2021-11-13 18:10:10,925 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values
[2021-11-13 18:10:10,929 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values
[2021-11-13 18:10:10,932 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2021-11-13 18:10:10,942 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values
[2021-11-13 18:10:10,945 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2021-11-13 18:10:10,947 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2021-11-13 18:10:10,951 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2021-11-13 18:10:10,960 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values
[2021-11-13 18:10:10,963 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2021-11-13 18:10:10,965 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2021-11-13 18:10:10,970 INFO L181 SettingsManager]: Resetting Referee preferences to default values
[2021-11-13 18:10:10,971 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2021-11-13 18:10:10,982 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2021-11-13 18:10:10,982 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2021-11-13 18:10:10,983 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values
[2021-11-13 18:10:10,986 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values
[2021-11-13 18:10:10,986 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2021-11-13 18:10:10,989 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring...
[2021-11-13 18:10:10,989 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values
[2021-11-13 18:10:10,990 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values
[2021-11-13 18:10:10,992 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values
[2021-11-13 18:10:10,993 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values
[2021-11-13 18:10:10,995 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2021-11-13 18:10:10,995 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values
[2021-11-13 18:10:10,996 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2021-11-13 18:10:10,996 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring...
[2021-11-13 18:10:10,996 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values
[2021-11-13 18:10:10,997 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values
[2021-11-13 18:10:10,998 INFO L188 SettingsManager]: Finished resetting all preferences to default values...
[2021-11-13 18:10:11,002 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf
[2021-11-13 18:10:11,078 INFO L113 SettingsManager]: Loading preferences was successful
[2021-11-13 18:10:11,078 INFO L115 SettingsManager]: Preferences different from defaults after loading the file:
[2021-11-13 18:10:11,079 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2021-11-13 18:10:11,079 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2021-11-13 18:10:11,082 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2021-11-13 18:10:11,082 INFO L138 SettingsManager]: * Create parallel compositions if possible=false
[2021-11-13 18:10:11,082 INFO L138 SettingsManager]: * Use SBE=true
[2021-11-13 18:10:11,083 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2021-11-13 18:10:11,083 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3
[2021-11-13 18:10:11,083 INFO L138 SettingsManager]: * Use old map elimination=false
[2021-11-13 18:10:11,085 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false
[2021-11-13 18:10:11,085 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true
[2021-11-13 18:10:11,085 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES
[2021-11-13 18:10:11,086 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2021-11-13 18:10:11,086 INFO L138 SettingsManager]: * sizeof long=4
[2021-11-13 18:10:11,086 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2021-11-13 18:10:11,087 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true
[2021-11-13 18:10:11,087 INFO L138 SettingsManager]: * sizeof POINTER=4
[2021-11-13 18:10:11,087 INFO L138 SettingsManager]: * Check division by zero=IGNORE
[2021-11-13 18:10:11,088 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME
[2021-11-13 18:10:11,088 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME
[2021-11-13 18:10:11,088 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME
[2021-11-13 18:10:11,089 INFO L138 SettingsManager]: * sizeof long double=12
[2021-11-13 18:10:11,089 INFO L138 SettingsManager]: * Check if freed pointer was valid=false
[2021-11-13 18:10:11,089 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false
[2021-11-13 18:10:11,089 INFO L138 SettingsManager]: * Use constant arrays=true
[2021-11-13 18:10:11,090 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME
[2021-11-13 18:10:11,090 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2021-11-13 18:10:11,090 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements
[2021-11-13 18:10:11,091 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2021-11-13 18:10:11,091 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL
[2021-11-13 18:10:11,092 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE
[2021-11-13 18:10:11,094 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2021-11-13 18:10:11,094 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f1ddce0da39afb2e81d3f6974a6168ade2d49435b1ce063903c0017c6d40b05
[2021-11-13 18:10:11,409 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2021-11-13 18:10:11,447 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2021-11-13 18:10:11,453 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2021-11-13 18:10:11,454 INFO L271 PluginConnector]: Initializing CDTParser...
[2021-11-13 18:10:11,455 INFO L275 PluginConnector]: CDTParser initialized
[2021-11-13 18:10:11,457 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i
[2021-11-13 18:10:11,534 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/data/2813b3cac/6ec2cfaff0e4486fad83f9f570dd08b4/FLAGb7a31d262
[2021-11-13 18:10:12,419 INFO L306 CDTParser]: Found 1 translation units.
[2021-11-13 18:10:12,421 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i
[2021-11-13 18:10:12,462 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/data/2813b3cac/6ec2cfaff0e4486fad83f9f570dd08b4/FLAGb7a31d262
[2021-11-13 18:10:12,496 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/data/2813b3cac/6ec2cfaff0e4486fad83f9f570dd08b4
[2021-11-13 18:10:12,499 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2021-11-13 18:10:12,505 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements.
[2021-11-13 18:10:12,507 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2021-11-13 18:10:12,508 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2021-11-13 18:10:12,512 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized
[2021-11-13 18:10:12,514 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:10:12" (1/1) ...
[2021-11-13 18:10:12,515 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a689939 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:12, skipping insertion in model container
[2021-11-13 18:10:12,516 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:10:12" (1/1) ...
[2021-11-13 18:10:12,525 INFO L145 MainTranslator]: Starting translation in SV-COMP mode
[2021-11-13 18:10:12,630 INFO L178 MainTranslator]: Built tables and reachable declarations
[2021-11-13 18:10:13,403 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i[33022,33035]
[2021-11-13 18:10:13,750 INFO L206 PostProcessor]: Analyzing one entry point: main
[2021-11-13 18:10:13,768 INFO L203 MainTranslator]: Completed pre-run
[2021-11-13 18:10:13,839 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-2.i[33022,33035]
[2021-11-13 18:10:14,179 INFO L206 PostProcessor]: Analyzing one entry point: main
[2021-11-13 18:10:14,240 INFO L208 MainTranslator]: Completed translation
[2021-11-13 18:10:14,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14 WrapperNode
[2021-11-13 18:10:14,241 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2021-11-13 18:10:14,242 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2021-11-13 18:10:14,243 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner...
[2021-11-13 18:10:14,243 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized
[2021-11-13 18:10:14,256 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,329 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,498 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2021-11-13 18:10:14,500 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2021-11-13 18:10:14,500 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2021-11-13 18:10:14,500 INFO L275 PluginConnector]: Boogie Preprocessor initialized
[2021-11-13 18:10:14,520 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,559 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,559 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,695 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,743 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,752 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,771 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2021-11-13 18:10:14,773 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2021-11-13 18:10:14,773 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2021-11-13 18:10:14,773 INFO L275 PluginConnector]: RCFGBuilder initialized
[2021-11-13 18:10:14,775 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (1/1) ...
[2021-11-13 18:10:14,787 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2021-11-13 18:10:14,800 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3
[2021-11-13 18:10:14,816 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2021-11-13 18:10:14,833 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2021-11-13 18:10:14,871 INFO L130 BoogieDeclarations]: Found specification of procedure read~int
[2021-11-13 18:10:14,871 INFO L130 BoogieDeclarations]: Found specification of procedure write~int
[2021-11-13 18:10:14,871 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset
[2021-11-13 18:10:14,871 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset
[2021-11-13 18:10:14,872 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap
[2021-11-13 18:10:14,872 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2021-11-13 18:10:14,872 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2021-11-13 18:10:14,872 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp
[2021-11-13 18:10:14,872 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2021-11-13 18:10:14,873 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2021-11-13 18:10:14,873 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int
[2021-11-13 18:10:14,873 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2021-11-13 18:10:14,873 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2021-11-13 18:10:15,318 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2021-11-13 18:10:18,073 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2021-11-13 18:10:18,073 INFO L299 CfgBuilder]: Removed 160 assume(true) statements.
[2021-11-13 18:10:18,077 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:10:18 BoogieIcfgContainer
[2021-11-13 18:10:18,078 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2021-11-13 18:10:18,079 INFO L113 PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2021-11-13 18:10:18,079 INFO L271 PluginConnector]: Initializing BuchiAutomizer...
[2021-11-13 18:10:18,084 INFO L275 PluginConnector]: BuchiAutomizer initialized
[2021-11-13 18:10:18,085 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2021-11-13 18:10:18,086 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 06:10:12" (1/3) ...
[2021-11-13 18:10:18,088 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5b1fab1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:10:18, skipping insertion in model container
[2021-11-13 18:10:18,088 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2021-11-13 18:10:18,088 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:14" (2/3) ...
[2021-11-13 18:10:18,089 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5b1fab1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:10:18, skipping insertion in model container
[2021-11-13 18:10:18,089 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2021-11-13 18:10:18,089 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:10:18" (3/3) ...
[2021-11-13 18:10:18,091 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test10-2.i
[2021-11-13 18:10:18,153 INFO L359 BuchiCegarLoop]: Interprodecural is true
[2021-11-13 18:10:18,153 INFO L360 BuchiCegarLoop]: Hoare is false
[2021-11-13 18:10:18,154 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2021-11-13 18:10:18,154 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2021-11-13 18:10:18,154 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2021-11-13 18:10:18,154 INFO L364 BuchiCegarLoop]: Difference is false
[2021-11-13 18:10:18,154 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2021-11-13 18:10:18,155 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop========
[2021-11-13 18:10:18,193 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2021-11-13 18:10:18,294 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 415
[2021-11-13 18:10:18,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2021-11-13 18:10:18,295 INFO L119 BuchiIsEmpty]: Starting construction of run
[2021-11-13 18:10:18,310 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1]
[2021-11-13 18:10:18,310 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1]
[2021-11-13 18:10:18,311 INFO L425 BuchiCegarLoop]: ======== Iteration 1============
[2021-11-13 18:10:18,315 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2021-11-13 18:10:18,353 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 415
[2021-11-13 18:10:18,353 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2021-11-13 18:10:18,353 INFO L119 BuchiIsEmpty]: Starting construction of run
[2021-11-13 18:10:18,356 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1]
[2021-11-13 18:10:18,356 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1]
[2021-11-13 18:10:18,365 INFO L791 eck$LassoCheckResult]: Stem: 476#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(22);~count_int_int~0 := 0; 411#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem23#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc39#1.base, main_#t~malloc39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~memset~res42#1.base, main_#t~memset~res42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~post66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~post72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem77#1, main_#t~mem76#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~short80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~malloc83#1.base, main_#t~malloc83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~memset~res88#1.base, main_#t~memset~res88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem93#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem97#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~ite98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~pre112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~post117#1, main_#t~mem121#1, main_#t~mem119#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem120#1, main_#t~mem122#1, main_#t~post123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~post100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~ite143#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~switch159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~memset~res174#1.base, main_#t~memset~res174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~malloc180#1.base, main_#t~malloc180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~memset~res187#1.base, main_#t~memset~res187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~post198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~post204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem209#1, main_#t~mem208#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~short212#1, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~malloc215#1.base, main_#t~malloc215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~memset~res220#1.base, main_#t~memset~res220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem225#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem229#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~ite230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem241#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~pre244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~post249#1, main_#t~mem253#1, main_#t~mem251#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem252#1, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~post232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem272#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~ite275#1, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~mem284#1, main_#t~mem283#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem288#1, main_#t~mem287#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~switch291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_#t~mem301#1, main_#t~mem302#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~ret317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~mem332#1, main_#t~mem331#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~switch335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1, main_#t~mem357#1, main_#t~mem358#1, main_#t~short359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~ret361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem366#1, main_#t~mem368#1, main_#t~mem367#1, main_#t~mem369#1, main_#t~mem370#1, main_#t~mem372#1, main_#t~mem371#1, main_#t~mem373#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem375#1, main_#t~mem377#1, main_#t~mem378#1, main_#t~switch379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem390#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~short403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~ret405#1, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1.base, main_#t~mem407#1.offset, main_#t~mem408#1.base, main_#t~mem408#1.offset, main_#t~mem409#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem410#1, main_#t~mem412#1, main_#t~mem411#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~mem416#1, main_#t~mem415#1, main_#t~mem417#1, main_#t~mem418#1, main_#t~mem420#1, main_#t~mem419#1, main_#t~mem421#1, main_#t~mem422#1, main_#t~switch423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_#t~mem433#1, main_#t~mem434#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1.base, main_#t~mem443#1.offset, main_#t~mem444#1, main_#t~mem445#1, main_#t~mem446#1, main_#t~short447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~ret449#1, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1.base, main_#t~mem451#1.offset, main_#t~mem452#1.base, main_#t~mem452#1.offset, main_#t~mem453#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem454#1, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_#t~mem459#1.base, main_#t~mem459#1.offset, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~short461#1, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1.base, main_#t~mem468#1.offset, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1.base, main_#t~mem472#1.offset, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1.base, main_#t~mem478#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~mem481#1.base, main_#t~mem481#1.offset, main_#t~mem484#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1, main_#t~post488#1, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_#t~post499#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite458#1.base, main_#t~ite458#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 259#L733-4true
[2021-11-13 18:10:18,366 INFO L793 eck$LassoCheckResult]: Loop: 259#L733-4true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3#L733-1true assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 482#L735true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 105#L735-2true call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1;call main_#t~mem14#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 417#L740true assume !(main_#t~mem14#1 < 10);havoc main_#t~mem14#1; 62#L743-123true assume !true; 64#L733-3true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 259#L733-4true
[2021-11-13 18:10:18,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:18,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times
[2021-11-13 18:10:18,390 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:18,392 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679877174]
[2021-11-13 18:10:18,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:18,394 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:18,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:18,562 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2021-11-13 18:10:18,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:18,652 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2021-11-13 18:10:18,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:18,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1529483753, now seen corresponding path program 1 times
[2021-11-13 18:10:18,656 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:18,657 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264208094]
[2021-11-13 18:10:18,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:18,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:18,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2021-11-13 18:10:18,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2021-11-13 18:10:18,760 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2021-11-13 18:10:18,760 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264208094]
[2021-11-13 18:10:18,761 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [264208094] provided 1 perfect and 0 imperfect interpolant sequences
[2021-11-13 18:10:18,762 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2021-11-13 18:10:18,762 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2021-11-13 18:10:18,763 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078936144]
[2021-11-13 18:10:18,764 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2021-11-13 18:10:18,769 INFO L808 eck$LassoCheckResult]: loop already infeasible
[2021-11-13 18:10:18,770 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2021-11-13 18:10:18,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2021-11-13 18:10:18,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2021-11-13 18:10:18,832 INFO L87 Difference]: Start difference. First operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2021-11-13 18:10:18,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2021-11-13 18:10:18,913 INFO L93 Difference]: Finished difference Result 488 states and 646 transitions.
[2021-11-13 18:10:18,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states.
[2021-11-13 18:10:18,926 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 488 states and 646 transitions.
[2021-11-13 18:10:18,940 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 247
[2021-11-13 18:10:18,962 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 488 states to 484 states and 642 transitions.
[2021-11-13 18:10:18,963 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 484
[2021-11-13 18:10:18,965 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 484
[2021-11-13 18:10:18,966 INFO L73 IsDeterministic]: Start isDeterministic. Operand 484 states and 642 transitions.
[2021-11-13 18:10:18,972 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2021-11-13 18:10:18,972 INFO L681 BuchiCegarLoop]: Abstraction has 484 states and 642 transitions.
[2021-11-13 18:10:18,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states and 642 transitions.
[2021-11-13 18:10:19,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 484.
[2021-11-13 18:10:19,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 484 states, 477 states have (on average 1.320754716981132) internal successors, (630), 476 states have internal predecessors, (630), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2021-11-13 18:10:19,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 642 transitions.
[2021-11-13 18:10:19,050 INFO L704 BuchiCegarLoop]: Abstraction has 484 states and 642 transitions.
[2021-11-13 18:10:19,050 INFO L587 BuchiCegarLoop]: Abstraction has 484 states and 642 transitions.
[2021-11-13 18:10:19,051 INFO L425 BuchiCegarLoop]: ======== Iteration 2============
[2021-11-13 18:10:19,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 484 states and 642 transitions.
[2021-11-13 18:10:19,055 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 247
[2021-11-13 18:10:19,056 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2021-11-13 18:10:19,056 INFO L119 BuchiIsEmpty]: Starting construction of run
[2021-11-13 18:10:19,057 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1]
[2021-11-13 18:10:19,058 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2021-11-13 18:10:19,058 INFO L791 eck$LassoCheckResult]: Stem: 1467#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(22);~count_int_int~0 := 0; 1456#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem23#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc39#1.base, main_#t~malloc39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~memset~res42#1.base, main_#t~memset~res42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~post66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~post72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem77#1, main_#t~mem76#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~short80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~malloc83#1.base, main_#t~malloc83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~memset~res88#1.base, main_#t~memset~res88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem93#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem97#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~ite98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~pre112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~post117#1, main_#t~mem121#1, main_#t~mem119#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem120#1, main_#t~mem122#1, main_#t~post123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~post100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~ite143#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~switch159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~memset~res174#1.base, main_#t~memset~res174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~malloc180#1.base, main_#t~malloc180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~memset~res187#1.base, main_#t~memset~res187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~post198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~post204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem209#1, main_#t~mem208#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~short212#1, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~malloc215#1.base, main_#t~malloc215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~memset~res220#1.base, main_#t~memset~res220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem225#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem229#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~ite230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem241#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~pre244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~post249#1, main_#t~mem253#1, main_#t~mem251#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem252#1, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~post232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem272#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~ite275#1, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~mem284#1, main_#t~mem283#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem288#1, main_#t~mem287#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~switch291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_#t~mem301#1, main_#t~mem302#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~ret317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~mem332#1, main_#t~mem331#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~switch335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1, main_#t~mem357#1, main_#t~mem358#1, main_#t~short359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~ret361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem366#1, main_#t~mem368#1, main_#t~mem367#1, main_#t~mem369#1, main_#t~mem370#1, main_#t~mem372#1, main_#t~mem371#1, main_#t~mem373#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem375#1, main_#t~mem377#1, main_#t~mem378#1, main_#t~switch379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem390#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~short403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~ret405#1, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1.base, main_#t~mem407#1.offset, main_#t~mem408#1.base, main_#t~mem408#1.offset, main_#t~mem409#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem410#1, main_#t~mem412#1, main_#t~mem411#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~mem416#1, main_#t~mem415#1, main_#t~mem417#1, main_#t~mem418#1, main_#t~mem420#1, main_#t~mem419#1, main_#t~mem421#1, main_#t~mem422#1, main_#t~switch423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_#t~mem433#1, main_#t~mem434#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1.base, main_#t~mem443#1.offset, main_#t~mem444#1, main_#t~mem445#1, main_#t~mem446#1, main_#t~short447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~ret449#1, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1.base, main_#t~mem451#1.offset, main_#t~mem452#1.base, main_#t~mem452#1.offset, main_#t~mem453#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem454#1, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_#t~mem459#1.base, main_#t~mem459#1.offset, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~short461#1, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1.base, main_#t~mem468#1.offset, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1.base, main_#t~mem472#1.offset, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1.base, main_#t~mem478#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~mem481#1.base, main_#t~mem481#1.offset, main_#t~mem484#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1, main_#t~post488#1, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_#t~post499#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite458#1.base, main_#t~ite458#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1116#L733-4
[2021-11-13 18:10:19,061 INFO L793 eck$LassoCheckResult]: Loop: 1116#L733-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 984#L733-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 986#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1189#L735-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1;call main_#t~mem14#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1190#L740 assume !(main_#t~mem14#1 < 10);havoc main_#t~mem14#1; 1112#L743-123 havoc main_~_ha_hashv~1#1; 1113#L743-48 goto; 1034#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 1035#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1126#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch159#1 := 11 == main_~_hj_k~1#1; 1127#L743-9 assume main_#t~switch159#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1439#L743-11 main_#t~switch159#1 := main_#t~switch159#1 || 10 == main_~_hj_k~1#1; 1252#L743-12 assume !main_#t~switch159#1; 1253#L743-14 main_#t~switch159#1 := main_#t~switch159#1 || 9 == main_~_hj_k~1#1; 1302#L743-15 assume main_#t~switch159#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 1347#L743-17 main_#t~switch159#1 := main_#t~switch159#1 || 8 == main_~_hj_k~1#1; 1348#L743-18 assume main_#t~switch159#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 1309#L743-20 main_#t~switch159#1 := main_#t~switch159#1 || 7 == main_~_hj_k~1#1; 1310#L743-21 assume main_#t~switch159#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem164#1 % 256);havoc main_#t~mem164#1; 1258#L743-23 main_#t~switch159#1 := main_#t~switch159#1 || 6 == main_~_hj_k~1#1; 1259#L743-24 assume main_#t~switch159#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 1386#L743-26 main_#t~switch159#1 := main_#t~switch159#1 || 5 == main_~_hj_k~1#1; 1254#L743-27 assume main_#t~switch159#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem166#1 % 256;havoc main_#t~mem166#1; 1255#L743-29 main_#t~switch159#1 := main_#t~switch159#1 || 4 == main_~_hj_k~1#1; 1014#L743-30 assume main_#t~switch159#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 1015#L743-32 main_#t~switch159#1 := main_#t~switch159#1 || 3 == main_~_hj_k~1#1; 1210#L743-33 assume !main_#t~switch159#1; 1423#L743-35 main_#t~switch159#1 := main_#t~switch159#1 || 2 == main_~_hj_k~1#1; 1330#L743-36 assume main_#t~switch159#1;call main_#t~mem169#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem169#1 % 256);havoc main_#t~mem169#1; 1331#L743-38 main_#t~switch159#1 := main_#t~switch159#1 || 1 == main_~_hj_k~1#1; 1242#L743-39 assume main_#t~switch159#1;call main_#t~mem170#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem170#1 % 256;havoc main_#t~mem170#1; 1243#L743-41 havoc main_#t~switch159#1; 1365#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768); 1366#L743-43 goto; 1391#L743-45 goto; 1083#L743-47 goto; 1074#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1075#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset; 1313#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_#t~mem189#1.base, 16 + main_#t~mem189#1.offset, 4);call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 20 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_#t~mem190#1.base, main_#t~mem190#1.offset - main_#t~mem192#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem194#1.base, 8 + main_#t~mem194#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1.base, main_#t~mem195#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem195#1.base, 16 + main_#t~mem195#1.offset, 4);havoc main_#t~mem195#1.base, main_#t~mem195#1.offset; 1314#L743-65 goto; 1108#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem197#1 := read~int(main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);main_#t~post198#1 := main_#t~mem197#1;call write~int(1 + main_#t~post198#1, main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;havoc main_#t~mem197#1;havoc main_#t~post198#1; 1109#L743-70 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1 := read~int(main_#t~mem199#1.base, 4 + main_#t~mem199#1.offset, 4);main_~_ha_bkt~1#1 := ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem200#1 - 1);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1; 1070#L743-69 goto; 1071#L743-117 call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem202#1.base, main_#t~mem202#1.offset := read~$Pointer$(main_#t~mem201#1.base, main_#t~mem201#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem202#1.base, main_#t~mem202#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;call main_#t~mem203#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post204#1 := main_#t~mem203#1;call write~int(1 + main_#t~post204#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem203#1;havoc main_#t~post204#1;call main_#t~mem205#1.base, main_#t~mem205#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem205#1.base, main_#t~mem205#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem206#1.base, main_#t~mem206#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1237#L743-72 assume !(main_#t~mem206#1.base != 0 || main_#t~mem206#1.offset != 0);havoc main_#t~mem206#1.base, main_#t~mem206#1.offset; 1221#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem209#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem208#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short212#1 := main_#t~mem209#1 % 4294967296 >= 10 * (1 + main_#t~mem208#1) % 4294967296; 1139#L743-75 assume main_#t~short212#1;call main_#t~mem210#1.base, main_#t~mem210#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem211#1 := read~int(main_#t~mem210#1.base, 36 + main_#t~mem210#1.offset, 4);main_#t~short212#1 := 0 == main_#t~mem211#1 % 4294967296; 1140#L743-77 assume !main_#t~short212#1;havoc main_#t~mem209#1;havoc main_#t~mem208#1;havoc main_#t~mem210#1.base, main_#t~mem210#1.offset;havoc main_#t~mem211#1;havoc main_#t~short212#1; 1134#L743-116 goto; 1135#L743-118 goto; 1250#L743-120 goto; 1438#L743-122 goto; 1115#L733-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 1116#L733-4
[2021-11-13 18:10:19,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:19,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times
[2021-11-13 18:10:19,062 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:19,063 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776405348]
[2021-11-13 18:10:19,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:19,063 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:19,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:19,138 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2021-11-13 18:10:19,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:19,196 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2021-11-13 18:10:19,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:19,197 INFO L85 PathProgramCache]: Analyzing trace with hash 2000398624, now seen corresponding path program 1 times
[2021-11-13 18:10:19,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:19,198 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015284576]
[2021-11-13 18:10:19,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:19,198 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:19,218 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2021-11-13 18:10:19,219 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1247002009]
[2021-11-13 18:10:19,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:19,219 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2021-11-13 18:10:19,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3
[2021-11-13 18:10:19,222 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2021-11-13 18:10:19,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2021-11-13 18:10:19,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2021-11-13 18:10:19,533 INFO L263 TraceCheckSpWp]: Trace formula consists of 297 conjuncts, 3 conjunts are in the unsatisfiable core
[2021-11-13 18:10:19,539 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2021-11-13 18:10:19,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2021-11-13 18:10:19,736 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2021-11-13 18:10:19,737 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2021-11-13 18:10:19,737 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015284576]
[2021-11-13 18:10:19,738 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown
[2021-11-13 18:10:19,738 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1247002009]
[2021-11-13 18:10:19,740 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1247002009] provided 1 perfect and 0 imperfect interpolant sequences
[2021-11-13 18:10:19,741 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2021-11-13 18:10:19,741 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2021-11-13 18:10:19,741 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297142668]
[2021-11-13 18:10:19,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2021-11-13 18:10:19,742 INFO L808 eck$LassoCheckResult]: loop already infeasible
[2021-11-13 18:10:19,742 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2021-11-13 18:10:19,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2021-11-13 18:10:19,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2021-11-13 18:10:19,745 INFO L87 Difference]: Start difference. First operand 484 states and 642 transitions. cyclomatic complexity: 169 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2021-11-13 18:10:19,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2021-11-13 18:10:19,889 INFO L93 Difference]: Finished difference Result 505 states and 663 transitions.
[2021-11-13 18:10:19,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2021-11-13 18:10:19,891 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 663 transitions.
[2021-11-13 18:10:19,898 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 268
[2021-11-13 18:10:19,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 505 states and 663 transitions.
[2021-11-13 18:10:19,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 505
[2021-11-13 18:10:19,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 505
[2021-11-13 18:10:19,907 INFO L73 IsDeterministic]: Start isDeterministic. Operand 505 states and 663 transitions.
[2021-11-13 18:10:19,910 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2021-11-13 18:10:19,910 INFO L681 BuchiCegarLoop]: Abstraction has 505 states and 663 transitions.
[2021-11-13 18:10:19,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states and 663 transitions.
[2021-11-13 18:10:19,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 504.
[2021-11-13 18:10:19,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 504 states, 497 states have (on average 1.3078470824949697) internal successors, (650), 496 states have internal predecessors, (650), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2021-11-13 18:10:19,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 662 transitions.
[2021-11-13 18:10:19,937 INFO L704 BuchiCegarLoop]: Abstraction has 504 states and 662 transitions.
[2021-11-13 18:10:19,937 INFO L587 BuchiCegarLoop]: Abstraction has 504 states and 662 transitions.
[2021-11-13 18:10:19,938 INFO L425 BuchiCegarLoop]: ======== Iteration 3============
[2021-11-13 18:10:19,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 504 states and 662 transitions.
[2021-11-13 18:10:19,942 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 267
[2021-11-13 18:10:19,942 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2021-11-13 18:10:19,943 INFO L119 BuchiIsEmpty]: Starting construction of run
[2021-11-13 18:10:19,944 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1]
[2021-11-13 18:10:19,944 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2021-11-13 18:10:19,945 INFO L791 eck$LassoCheckResult]: Stem: 2619#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(22);~count_int_int~0 := 0; 2608#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem23#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc39#1.base, main_#t~malloc39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~memset~res42#1.base, main_#t~memset~res42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~post66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~post72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem77#1, main_#t~mem76#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~short80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~malloc83#1.base, main_#t~malloc83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~memset~res88#1.base, main_#t~memset~res88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem93#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem97#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~ite98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~pre112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~post117#1, main_#t~mem121#1, main_#t~mem119#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem120#1, main_#t~mem122#1, main_#t~post123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~post100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~ite143#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~switch159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~memset~res174#1.base, main_#t~memset~res174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~malloc180#1.base, main_#t~malloc180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~memset~res187#1.base, main_#t~memset~res187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~post198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~post204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem209#1, main_#t~mem208#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~short212#1, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~malloc215#1.base, main_#t~malloc215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~memset~res220#1.base, main_#t~memset~res220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem225#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem229#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~ite230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem241#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~pre244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~post249#1, main_#t~mem253#1, main_#t~mem251#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem252#1, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~post232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem272#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~ite275#1, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~mem284#1, main_#t~mem283#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem288#1, main_#t~mem287#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~switch291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_#t~mem301#1, main_#t~mem302#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~ret317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~mem332#1, main_#t~mem331#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~switch335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1, main_#t~mem357#1, main_#t~mem358#1, main_#t~short359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~ret361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem366#1, main_#t~mem368#1, main_#t~mem367#1, main_#t~mem369#1, main_#t~mem370#1, main_#t~mem372#1, main_#t~mem371#1, main_#t~mem373#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem375#1, main_#t~mem377#1, main_#t~mem378#1, main_#t~switch379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem390#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~short403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~ret405#1, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1.base, main_#t~mem407#1.offset, main_#t~mem408#1.base, main_#t~mem408#1.offset, main_#t~mem409#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem410#1, main_#t~mem412#1, main_#t~mem411#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~mem416#1, main_#t~mem415#1, main_#t~mem417#1, main_#t~mem418#1, main_#t~mem420#1, main_#t~mem419#1, main_#t~mem421#1, main_#t~mem422#1, main_#t~switch423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_#t~mem433#1, main_#t~mem434#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1.base, main_#t~mem443#1.offset, main_#t~mem444#1, main_#t~mem445#1, main_#t~mem446#1, main_#t~short447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~ret449#1, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1.base, main_#t~mem451#1.offset, main_#t~mem452#1.base, main_#t~mem452#1.offset, main_#t~mem453#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem454#1, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_#t~mem459#1.base, main_#t~mem459#1.offset, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~short461#1, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1.base, main_#t~mem468#1.offset, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1.base, main_#t~mem472#1.offset, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1.base, main_#t~mem478#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~mem481#1.base, main_#t~mem481#1.offset, main_#t~mem484#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1, main_#t~post488#1, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_#t~post499#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite458#1.base, main_#t~ite458#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2267#L733-4
[2021-11-13 18:10:19,946 INFO L793 eck$LassoCheckResult]: Loop: 2267#L733-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2135#L733-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 2137#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2340#L735-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1;call main_#t~mem14#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2341#L740 assume !(main_#t~mem14#1 < 10);havoc main_#t~mem14#1; 2263#L743-123 havoc main_~_ha_hashv~1#1; 2264#L743-48 goto; 2187#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2188#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2277#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch159#1 := 11 == main_~_hj_k~1#1; 2278#L743-9 assume main_#t~switch159#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 2590#L743-11 main_#t~switch159#1 := main_#t~switch159#1 || 10 == main_~_hj_k~1#1; 2403#L743-12 assume main_#t~switch159#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 2404#L743-14 main_#t~switch159#1 := main_#t~switch159#1 || 9 == main_~_hj_k~1#1; 2453#L743-15 assume main_#t~switch159#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 2498#L743-17 main_#t~switch159#1 := main_#t~switch159#1 || 8 == main_~_hj_k~1#1; 2499#L743-18 assume main_#t~switch159#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 2460#L743-20 main_#t~switch159#1 := main_#t~switch159#1 || 7 == main_~_hj_k~1#1; 2461#L743-21 assume main_#t~switch159#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem164#1 % 256);havoc main_#t~mem164#1; 2409#L743-23 main_#t~switch159#1 := main_#t~switch159#1 || 6 == main_~_hj_k~1#1; 2410#L743-24 assume main_#t~switch159#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 2537#L743-26 main_#t~switch159#1 := main_#t~switch159#1 || 5 == main_~_hj_k~1#1; 2405#L743-27 assume main_#t~switch159#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem166#1 % 256;havoc main_#t~mem166#1; 2406#L743-29 main_#t~switch159#1 := main_#t~switch159#1 || 4 == main_~_hj_k~1#1; 2168#L743-30 assume main_#t~switch159#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 2169#L743-32 main_#t~switch159#1 := main_#t~switch159#1 || 3 == main_~_hj_k~1#1; 2362#L743-33 assume main_#t~switch159#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem168#1 % 256);havoc main_#t~mem168#1; 2575#L743-35 main_#t~switch159#1 := main_#t~switch159#1 || 2 == main_~_hj_k~1#1; 2481#L743-36 assume main_#t~switch159#1;call main_#t~mem169#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem169#1 % 256);havoc main_#t~mem169#1; 2482#L743-38 main_#t~switch159#1 := main_#t~switch159#1 || 1 == main_~_hj_k~1#1; 2395#L743-39 assume main_#t~switch159#1;call main_#t~mem170#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem170#1 % 256;havoc main_#t~mem170#1; 2396#L743-41 havoc main_#t~switch159#1; 2518#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768); 2519#L743-43 goto; 2542#L743-45 goto; 2234#L743-47 goto; 2225#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2226#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset; 2464#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_#t~mem189#1.base, 16 + main_#t~mem189#1.offset, 4);call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 20 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_#t~mem190#1.base, main_#t~mem190#1.offset - main_#t~mem192#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem194#1.base, 8 + main_#t~mem194#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1.base, main_#t~mem195#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem195#1.base, 16 + main_#t~mem195#1.offset, 4);havoc main_#t~mem195#1.base, main_#t~mem195#1.offset; 2465#L743-65 goto; 2259#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem197#1 := read~int(main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);main_#t~post198#1 := main_#t~mem197#1;call write~int(1 + main_#t~post198#1, main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;havoc main_#t~mem197#1;havoc main_#t~post198#1; 2260#L743-70 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1 := read~int(main_#t~mem199#1.base, 4 + main_#t~mem199#1.offset, 4);main_~_ha_bkt~1#1 := ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem200#1 - 1);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1; 2221#L743-69 goto; 2222#L743-117 call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem202#1.base, main_#t~mem202#1.offset := read~$Pointer$(main_#t~mem201#1.base, main_#t~mem201#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem202#1.base, main_#t~mem202#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;call main_#t~mem203#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post204#1 := main_#t~mem203#1;call write~int(1 + main_#t~post204#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem203#1;havoc main_#t~post204#1;call main_#t~mem205#1.base, main_#t~mem205#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem205#1.base, main_#t~mem205#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem206#1.base, main_#t~mem206#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 2388#L743-72 assume !(main_#t~mem206#1.base != 0 || main_#t~mem206#1.offset != 0);havoc main_#t~mem206#1.base, main_#t~mem206#1.offset; 2372#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem209#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem208#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short212#1 := main_#t~mem209#1 % 4294967296 >= 10 * (1 + main_#t~mem208#1) % 4294967296; 2290#L743-75 assume main_#t~short212#1;call main_#t~mem210#1.base, main_#t~mem210#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem211#1 := read~int(main_#t~mem210#1.base, 36 + main_#t~mem210#1.offset, 4);main_#t~short212#1 := 0 == main_#t~mem211#1 % 4294967296; 2291#L743-77 assume !main_#t~short212#1;havoc main_#t~mem209#1;havoc main_#t~mem208#1;havoc main_#t~mem210#1.base, main_#t~mem210#1.offset;havoc main_#t~mem211#1;havoc main_#t~short212#1; 2285#L743-116 goto; 2286#L743-118 goto; 2401#L743-120 goto; 2589#L743-122 goto; 2266#L733-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 2267#L733-4
[2021-11-13 18:10:19,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:19,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times
[2021-11-13 18:10:19,947 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:19,947 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249834780]
[2021-11-13 18:10:19,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:19,948 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:19,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:19,974 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2021-11-13 18:10:19,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:20,011 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2021-11-13 18:10:20,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:20,012 INFO L85 PathProgramCache]: Analyzing trace with hash -346476132, now seen corresponding path program 1 times
[2021-11-13 18:10:20,012 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:20,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843242364]
[2021-11-13 18:10:20,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:20,013 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:20,028 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2021-11-13 18:10:20,028 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [686054062]
[2021-11-13 18:10:20,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:20,029 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2021-11-13 18:10:20,029 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3
[2021-11-13 18:10:20,031 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2021-11-13 18:10:20,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2021-11-13 18:10:20,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2021-11-13 18:10:20,291 INFO L263 TraceCheckSpWp]: Trace formula consists of 309 conjuncts, 3 conjunts are in the unsatisfiable core
[2021-11-13 18:10:20,294 INFO L286 TraceCheckSpWp]: Computing forward predicates...
[2021-11-13 18:10:20,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2021-11-13 18:10:20,468 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2021-11-13 18:10:20,468 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2021-11-13 18:10:20,469 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843242364]
[2021-11-13 18:10:20,469 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown
[2021-11-13 18:10:20,471 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [686054062]
[2021-11-13 18:10:20,471 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [686054062] provided 1 perfect and 0 imperfect interpolant sequences
[2021-11-13 18:10:20,471 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2021-11-13 18:10:20,472 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2021-11-13 18:10:20,472 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799325953]
[2021-11-13 18:10:20,472 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2021-11-13 18:10:20,473 INFO L808 eck$LassoCheckResult]: loop already infeasible
[2021-11-13 18:10:20,474 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2021-11-13 18:10:20,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2021-11-13 18:10:20,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2021-11-13 18:10:20,475 INFO L87 Difference]: Start difference. First operand 504 states and 662 transitions. cyclomatic complexity: 169 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2021-11-13 18:10:20,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2021-11-13 18:10:20,645 INFO L93 Difference]: Finished difference Result 887 states and 1169 transitions.
[2021-11-13 18:10:20,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2021-11-13 18:10:20,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 887 states and 1169 transitions.
[2021-11-13 18:10:20,659 INFO L131 ngComponentsAnalysis]: Automaton has 22 accepting balls. 344
[2021-11-13 18:10:20,672 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 887 states to 887 states and 1169 transitions.
[2021-11-13 18:10:20,672 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 887
[2021-11-13 18:10:20,674 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 887
[2021-11-13 18:10:20,675 INFO L73 IsDeterministic]: Start isDeterministic. Operand 887 states and 1169 transitions.
[2021-11-13 18:10:20,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2021-11-13 18:10:20,677 INFO L681 BuchiCegarLoop]: Abstraction has 887 states and 1169 transitions.
[2021-11-13 18:10:20,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 887 states and 1169 transitions.
[2021-11-13 18:10:20,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 887 to 490.
[2021-11-13 18:10:20,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 490 states, 483 states have (on average 1.3022774327122153) internal successors, (629), 482 states have internal predecessors, (629), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2021-11-13 18:10:20,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 641 transitions.
[2021-11-13 18:10:20,698 INFO L704 BuchiCegarLoop]: Abstraction has 490 states and 641 transitions.
[2021-11-13 18:10:20,698 INFO L587 BuchiCegarLoop]: Abstraction has 490 states and 641 transitions.
[2021-11-13 18:10:20,699 INFO L425 BuchiCegarLoop]: ======== Iteration 4============
[2021-11-13 18:10:20,699 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 490 states and 641 transitions.
[2021-11-13 18:10:20,703 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 253
[2021-11-13 18:10:20,703 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2021-11-13 18:10:20,703 INFO L119 BuchiIsEmpty]: Starting construction of run
[2021-11-13 18:10:20,704 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1]
[2021-11-13 18:10:20,704 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2021-11-13 18:10:20,705 INFO L791 eck$LassoCheckResult]: Stem: 4177#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(22);~count_int_int~0 := 0; 4166#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem23#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc39#1.base, main_#t~malloc39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~memset~res42#1.base, main_#t~memset~res42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~memset~res55#1.base, main_#t~memset~res55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~post66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~post72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem77#1, main_#t~mem76#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~short80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~malloc83#1.base, main_#t~malloc83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~memset~res88#1.base, main_#t~memset~res88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem93#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem97#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~ite98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem109#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~pre112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~post117#1, main_#t~mem121#1, main_#t~mem119#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem120#1, main_#t~mem122#1, main_#t~post123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~post100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~ite143#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem148#1, main_#t~mem147#1, main_#t~mem149#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~switch159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc171#1.base, main_#t~malloc171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~memset~res174#1.base, main_#t~memset~res174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~malloc180#1.base, main_#t~malloc180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~memset~res187#1.base, main_#t~memset~res187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1, main_#t~post198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~post204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem209#1, main_#t~mem208#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1, main_#t~short212#1, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~malloc215#1.base, main_#t~malloc215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1, main_#t~memset~res220#1.base, main_#t~memset~res220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem225#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem229#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~ite230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem241#1, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~pre244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~post249#1, main_#t~mem253#1, main_#t~mem251#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem252#1, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~post232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem272#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~ite275#1, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_#t~mem277#1, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem280#1, main_#t~mem279#1, main_#t~mem281#1, main_#t~mem282#1, main_#t~mem284#1, main_#t~mem283#1, main_#t~mem285#1, main_#t~mem286#1, main_#t~mem288#1, main_#t~mem287#1, main_#t~mem289#1, main_#t~mem290#1, main_#t~switch291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_#t~mem301#1, main_#t~mem302#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~short315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~ret317#1, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem322#1, main_#t~mem324#1, main_#t~mem323#1, main_#t~mem325#1, main_#t~mem326#1, main_#t~mem328#1, main_#t~mem327#1, main_#t~mem329#1, main_#t~mem330#1, main_#t~mem332#1, main_#t~mem331#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~switch335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_#t~mem345#1, main_#t~mem346#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1.base, main_#t~mem354#1.offset, main_#t~mem355#1.base, main_#t~mem355#1.offset, main_#t~mem356#1, main_#t~mem357#1, main_#t~mem358#1, main_#t~short359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~ret361#1, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1.base, main_#t~mem363#1.offset, main_#t~mem364#1.base, main_#t~mem364#1.offset, main_#t~mem365#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem366#1, main_#t~mem368#1, main_#t~mem367#1, main_#t~mem369#1, main_#t~mem370#1, main_#t~mem372#1, main_#t~mem371#1, main_#t~mem373#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem375#1, main_#t~mem377#1, main_#t~mem378#1, main_#t~switch379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_#t~mem389#1, main_#t~mem390#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1.base, main_#t~mem398#1.offset, main_#t~mem399#1.base, main_#t~mem399#1.offset, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~short403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~ret405#1, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1.base, main_#t~mem407#1.offset, main_#t~mem408#1.base, main_#t~mem408#1.offset, main_#t~mem409#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem410#1, main_#t~mem412#1, main_#t~mem411#1, main_#t~mem413#1, main_#t~mem414#1, main_#t~mem416#1, main_#t~mem415#1, main_#t~mem417#1, main_#t~mem418#1, main_#t~mem420#1, main_#t~mem419#1, main_#t~mem421#1, main_#t~mem422#1, main_#t~switch423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_#t~mem433#1, main_#t~mem434#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1.base, main_#t~mem442#1.offset, main_#t~mem443#1.base, main_#t~mem443#1.offset, main_#t~mem444#1, main_#t~mem445#1, main_#t~mem446#1, main_#t~short447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~ret449#1, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1.base, main_#t~mem451#1.offset, main_#t~mem452#1.base, main_#t~mem452#1.offset, main_#t~mem453#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem454#1, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_#t~mem459#1.base, main_#t~mem459#1.offset, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~short461#1, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1.base, main_#t~mem468#1.offset, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1.base, main_#t~mem472#1.offset, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1.base, main_#t~mem478#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~mem481#1.base, main_#t~mem481#1.offset, main_#t~mem484#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1, main_#t~post488#1, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_#t~post499#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite458#1.base, main_#t~ite458#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3824#L733-4
[2021-11-13 18:10:20,705 INFO L793 eck$LassoCheckResult]: Loop: 3824#L733-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3691#L733-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 3693#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3897#L735-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1;call main_#t~mem14#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3898#L740 assume !(main_#t~mem14#1 < 10);havoc main_#t~mem14#1; 3820#L743-123 havoc main_~_ha_hashv~1#1; 3821#L743-48 goto; 3742#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 3743#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 3834#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch159#1 := 11 == main_~_hj_k~1#1; 3835#L743-9 assume !main_#t~switch159#1; 4149#L743-11 main_#t~switch159#1 := main_#t~switch159#1 || 10 == main_~_hj_k~1#1; 3960#L743-12 assume !main_#t~switch159#1; 3961#L743-14 main_#t~switch159#1 := main_#t~switch159#1 || 9 == main_~_hj_k~1#1; 4010#L743-15 assume !main_#t~switch159#1; 4055#L743-17 main_#t~switch159#1 := main_#t~switch159#1 || 8 == main_~_hj_k~1#1; 4056#L743-18 assume !main_#t~switch159#1; 4017#L743-20 main_#t~switch159#1 := main_#t~switch159#1 || 7 == main_~_hj_k~1#1; 4018#L743-21 assume !main_#t~switch159#1; 3966#L743-23 main_#t~switch159#1 := main_#t~switch159#1 || 6 == main_~_hj_k~1#1; 3967#L743-24 assume !main_#t~switch159#1; 4096#L743-26 main_#t~switch159#1 := main_#t~switch159#1 || 5 == main_~_hj_k~1#1; 3962#L743-27 assume !main_#t~switch159#1; 3963#L743-29 main_#t~switch159#1 := main_#t~switch159#1 || 4 == main_~_hj_k~1#1; 3721#L743-30 assume main_#t~switch159#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 3722#L743-32 main_#t~switch159#1 := main_#t~switch159#1 || 3 == main_~_hj_k~1#1; 3918#L743-33 assume main_#t~switch159#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem168#1 % 256);havoc main_#t~mem168#1; 4133#L743-35 main_#t~switch159#1 := main_#t~switch159#1 || 2 == main_~_hj_k~1#1; 4038#L743-36 assume main_#t~switch159#1;call main_#t~mem169#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem169#1 % 256);havoc main_#t~mem169#1; 4039#L743-38 main_#t~switch159#1 := main_#t~switch159#1 || 1 == main_~_hj_k~1#1; 3950#L743-39 assume main_#t~switch159#1;call main_#t~mem170#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem170#1 % 256;havoc main_#t~mem170#1; 3951#L743-41 havoc main_#t~switch159#1; 4073#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32);main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := ~bitwiseXor(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8);main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := ~bitwiseXor(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := ~bitwiseXor(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768); 4074#L743-43 goto; 4101#L743-45 goto; 3791#L743-47 goto; 3782#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 3783#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem188#1.base, main_#t~mem188#1.offset; 4021#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1.base, main_#t~mem190#1.offset := read~$Pointer$(main_#t~mem189#1.base, 16 + main_#t~mem189#1.offset, 4);call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1 := read~int(main_#t~mem191#1.base, 20 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_#t~mem190#1.base, main_#t~mem190#1.offset - main_#t~mem192#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1.base, main_#t~mem190#1.offset;havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem194#1.base, 8 + main_#t~mem194#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset;havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;call main_#t~mem195#1.base, main_#t~mem195#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem195#1.base, 16 + main_#t~mem195#1.offset, 4);havoc main_#t~mem195#1.base, main_#t~mem195#1.offset; 4022#L743-65 goto; 3816#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem196#1.base, main_#t~mem196#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem197#1 := read~int(main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);main_#t~post198#1 := main_#t~mem197#1;call write~int(1 + main_#t~post198#1, main_#t~mem196#1.base, 12 + main_#t~mem196#1.offset, 4);havoc main_#t~mem196#1.base, main_#t~mem196#1.offset;havoc main_#t~mem197#1;havoc main_#t~post198#1; 3817#L743-70 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1 := read~int(main_#t~mem199#1.base, 4 + main_#t~mem199#1.offset, 4);main_~_ha_bkt~1#1 := ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem200#1 - 1);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1; 3778#L743-69 goto; 3779#L743-117 call main_#t~mem201#1.base, main_#t~mem201#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem202#1.base, main_#t~mem202#1.offset := read~$Pointer$(main_#t~mem201#1.base, main_#t~mem201#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem202#1.base, main_#t~mem202#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem201#1.base, main_#t~mem201#1.offset;havoc main_#t~mem202#1.base, main_#t~mem202#1.offset;call main_#t~mem203#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post204#1 := main_#t~mem203#1;call write~int(1 + main_#t~post204#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem203#1;havoc main_#t~post204#1;call main_#t~mem205#1.base, main_#t~mem205#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem205#1.base, main_#t~mem205#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem205#1.base, main_#t~mem205#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem206#1.base, main_#t~mem206#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3945#L743-72 assume !(main_#t~mem206#1.base != 0 || main_#t~mem206#1.offset != 0);havoc main_#t~mem206#1.base, main_#t~mem206#1.offset; 3929#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem209#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem208#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short212#1 := main_#t~mem209#1 % 4294967296 >= 10 * (1 + main_#t~mem208#1) % 4294967296; 3847#L743-75 assume main_#t~short212#1;call main_#t~mem210#1.base, main_#t~mem210#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem211#1 := read~int(main_#t~mem210#1.base, 36 + main_#t~mem210#1.offset, 4);main_#t~short212#1 := 0 == main_#t~mem211#1 % 4294967296; 3848#L743-77 assume !main_#t~short212#1;havoc main_#t~mem209#1;havoc main_#t~mem208#1;havoc main_#t~mem210#1.base, main_#t~mem210#1.offset;havoc main_#t~mem211#1;havoc main_#t~short212#1; 3842#L743-116 goto; 3843#L743-118 goto; 3958#L743-120 goto; 4148#L743-122 goto; 3823#L733-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 3824#L733-4
[2021-11-13 18:10:20,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:20,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times
[2021-11-13 18:10:20,706 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:20,707 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164481895]
[2021-11-13 18:10:20,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:20,707 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:20,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:20,729 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2021-11-13 18:10:20,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2021-11-13 18:10:20,763 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2021-11-13 18:10:20,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier
[2021-11-13 18:10:20,764 INFO L85 PathProgramCache]: Analyzing trace with hash 2074116778, now seen corresponding path program 1 times
[2021-11-13 18:10:20,764 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2021-11-13 18:10:20,764 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73542523]
[2021-11-13 18:10:20,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:20,765 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2021-11-13 18:10:20,778 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2021-11-13 18:10:20,778 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1781033864]
[2021-11-13 18:10:20,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2021-11-13 18:10:20,779 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2021-11-13 18:10:20,779 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3
[2021-11-13 18:10:20,806 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2021-11-13 18:10:20,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c9c9e42d-4a4a-460b-b4a7-8e985b02fffb/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process