./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 63182f13 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3b6a7e09bdf002daf4e1e371c35be311dd644a61b41d9b32022b9ee835751b90 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-63182f1 [2021-11-13 17:38:01,596 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-13 17:38:01,599 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-13 17:38:01,644 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-13 17:38:01,645 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-13 17:38:01,647 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-13 17:38:01,649 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-13 17:38:01,652 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-13 17:38:01,656 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-13 17:38:01,657 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-13 17:38:01,659 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-13 17:38:01,661 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-13 17:38:01,662 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-13 17:38:01,664 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-13 17:38:01,666 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-13 17:38:01,668 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-13 17:38:01,670 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-13 17:38:01,672 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-13 17:38:01,675 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-13 17:38:01,678 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-13 17:38:01,684 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-13 17:38:01,687 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-13 17:38:01,690 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-13 17:38:01,694 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-13 17:38:01,702 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-13 17:38:01,709 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-13 17:38:01,710 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-13 17:38:01,711 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-13 17:38:01,713 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-13 17:38:01,715 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-13 17:38:01,717 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-13 17:38:01,719 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-13 17:38:01,721 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-13 17:38:01,723 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-13 17:38:01,726 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-13 17:38:01,726 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-13 17:38:01,727 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-13 17:38:01,728 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-13 17:38:01,728 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-13 17:38:01,732 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-13 17:38:01,733 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-13 17:38:01,735 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-13 17:38:01,806 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-13 17:38:01,806 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-13 17:38:01,808 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-13 17:38:01,808 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-13 17:38:01,811 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-13 17:38:01,811 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-13 17:38:01,812 INFO L138 SettingsManager]: * Use SBE=true [2021-11-13 17:38:01,812 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-13 17:38:01,812 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-13 17:38:01,813 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-13 17:38:01,814 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-13 17:38:01,815 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-13 17:38:01,815 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-13 17:38:01,816 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-13 17:38:01,816 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-13 17:38:01,816 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-13 17:38:01,817 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-13 17:38:01,817 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-13 17:38:01,817 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-13 17:38:01,818 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-13 17:38:01,818 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-13 17:38:01,818 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-13 17:38:01,819 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-13 17:38:01,819 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-13 17:38:01,820 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-13 17:38:01,820 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-13 17:38:01,822 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-13 17:38:01,823 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-13 17:38:01,823 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-13 17:38:01,823 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-13 17:38:01,824 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-13 17:38:01,824 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-13 17:38:01,826 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-13 17:38:01,827 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3b6a7e09bdf002daf4e1e371c35be311dd644a61b41d9b32022b9ee835751b90 [2021-11-13 17:38:02,108 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-13 17:38:02,142 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-13 17:38:02,145 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-13 17:38:02,147 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-13 17:38:02,148 INFO L275 PluginConnector]: CDTParser initialized [2021-11-13 17:38:02,149 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i [2021-11-13 17:38:02,256 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/data/de9837061/fffe748b1f1e4b058b2ca2b823528c08/FLAG9532ba523 [2021-11-13 17:38:02,928 INFO L306 CDTParser]: Found 1 translation units. [2021-11-13 17:38:02,928 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i [2021-11-13 17:38:02,972 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/data/de9837061/fffe748b1f1e4b058b2ca2b823528c08/FLAG9532ba523 [2021-11-13 17:38:03,132 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/data/de9837061/fffe748b1f1e4b058b2ca2b823528c08 [2021-11-13 17:38:03,135 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-13 17:38:03,136 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-13 17:38:03,139 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-13 17:38:03,139 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-13 17:38:03,142 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-13 17:38:03,142 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 05:38:03" (1/1) ... [2021-11-13 17:38:03,144 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56ae42e6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:03, skipping insertion in model container [2021-11-13 17:38:03,144 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 05:38:03" (1/1) ... [2021-11-13 17:38:03,156 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-13 17:38:03,231 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-13 17:38:03,753 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i[33021,33034] [2021-11-13 17:38:03,908 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i[45234,45247] [2021-11-13 17:38:03,916 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 17:38:03,931 INFO L203 MainTranslator]: Completed pre-run [2021-11-13 17:38:03,964 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i[33021,33034] [2021-11-13 17:38:04,074 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test8-1.i[45234,45247] [2021-11-13 17:38:04,091 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 17:38:04,142 INFO L208 MainTranslator]: Completed translation [2021-11-13 17:38:04,143 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04 WrapperNode [2021-11-13 17:38:04,143 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-13 17:38:04,144 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-13 17:38:04,144 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-13 17:38:04,144 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-13 17:38:04,164 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,220 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,326 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-13 17:38:04,327 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-13 17:38:04,327 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-13 17:38:04,328 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-13 17:38:04,337 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,338 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,348 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,349 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,412 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,442 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,448 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,473 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-13 17:38:04,474 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-13 17:38:04,474 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-13 17:38:04,475 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-13 17:38:04,476 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (1/1) ... [2021-11-13 17:38:04,487 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-13 17:38:04,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 17:38:04,524 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-13 17:38:04,548 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-13 17:38:04,581 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-13 17:38:04,582 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-13 17:38:04,582 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-13 17:38:04,582 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-13 17:38:04,582 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-13 17:38:04,583 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-13 17:38:04,583 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-13 17:38:04,584 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-13 17:38:04,584 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-13 17:38:04,585 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-13 17:38:04,585 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-13 17:38:04,585 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-13 17:38:04,585 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-13 17:38:04,920 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-13 17:38:06,401 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-13 17:38:06,402 INFO L299 CfgBuilder]: Removed 62 assume(true) statements. [2021-11-13 17:38:06,406 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 05:38:06 BoogieIcfgContainer [2021-11-13 17:38:06,406 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-13 17:38:06,411 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-13 17:38:06,411 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-13 17:38:06,415 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-13 17:38:06,416 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 17:38:06,416 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 05:38:03" (1/3) ... [2021-11-13 17:38:06,418 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2aff66a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 05:38:06, skipping insertion in model container [2021-11-13 17:38:06,418 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 17:38:06,419 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 05:38:04" (2/3) ... [2021-11-13 17:38:06,419 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2aff66a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 05:38:06, skipping insertion in model container [2021-11-13 17:38:06,419 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 17:38:06,420 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 05:38:06" (3/3) ... [2021-11-13 17:38:06,427 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test8-1.i [2021-11-13 17:38:06,478 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-13 17:38:06,478 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-13 17:38:06,480 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-13 17:38:06,480 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-13 17:38:06,480 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-13 17:38:06,480 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-13 17:38:06,480 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-13 17:38:06,480 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-13 17:38:06,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 275 states, 270 states have (on average 1.6703703703703703) internal successors, (451), 270 states have internal predecessors, (451), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 17:38:06,548 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 264 [2021-11-13 17:38:06,549 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 17:38:06,549 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 17:38:06,557 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 17:38:06,557 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 17:38:06,558 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-13 17:38:06,559 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 275 states, 270 states have (on average 1.6703703703703703) internal successors, (451), 270 states have internal predecessors, (451), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 17:38:06,574 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 264 [2021-11-13 17:38:06,574 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 17:38:06,574 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 17:38:06,575 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 17:38:06,576 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 17:38:06,583 INFO L791 eck$LassoCheckResult]: Stem: 265#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 188#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem159#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~switch162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem173#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~short186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~ret188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~short195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem218#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~post233#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~mem148#1, main_#t~mem149#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 76#L765-4true [2021-11-13 17:38:06,583 INFO L793 eck$LassoCheckResult]: Loop: 76#L765-4true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 223#L765-1true assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 248#L767true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 176#L767-2true call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 35#L772-124true assume !true; 145#L772-125true call main_#t~mem146#1.base, main_#t~mem146#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem147#1 := read~int(main_#t~mem146#1.base, 12 + main_#t~mem146#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem147#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147#1 % 4294967296 % 4294967296 else main_#t~mem147#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5#1, test_int_#t~switch6#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post5#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5#1;test_int_#t~switch6#1 := 0 == test_int_#t~post5#1; 121#L709true assume test_int_#t~switch6#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 174#L702true assume 0 == __VERIFIER_assert_~cond#1;assume false; 268#L701true assume { :end_inline___VERIFIER_assert } true; 9#L708true havoc test_int_#t~post5#1;havoc test_int_#t~switch6#1; 221#L707true assume { :end_inline_test_int } true;havoc main_#t~mem146#1.base, main_#t~mem146#1.offset;havoc main_#t~mem147#1; 201#L765-3true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 76#L765-4true [2021-11-13 17:38:06,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:06,589 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-13 17:38:06,598 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:06,598 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33008059] [2021-11-13 17:38:06,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:06,600 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:06,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:06,716 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 17:38:06,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:06,785 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 17:38:06,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:06,789 INFO L85 PathProgramCache]: Analyzing trace with hash -2032843363, now seen corresponding path program 1 times [2021-11-13 17:38:06,789 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:06,789 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146143336] [2021-11-13 17:38:06,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:06,790 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:06,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 17:38:06,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 17:38:06,851 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 17:38:06,851 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146143336] [2021-11-13 17:38:06,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [146143336] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 17:38:06,852 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 17:38:06,853 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-13 17:38:06,853 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [193419645] [2021-11-13 17:38:06,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 17:38:06,859 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 17:38:06,861 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 17:38:06,900 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-13 17:38:06,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-13 17:38:06,904 INFO L87 Difference]: Start difference. First operand has 275 states, 270 states have (on average 1.6703703703703703) internal successors, (451), 270 states have internal predecessors, (451), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 17:38:06,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 17:38:06,936 INFO L93 Difference]: Finished difference Result 275 states and 360 transitions. [2021-11-13 17:38:06,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-13 17:38:06,943 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 275 states and 360 transitions. [2021-11-13 17:38:06,952 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 264 [2021-11-13 17:38:06,963 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 275 states to 271 states and 356 transitions. [2021-11-13 17:38:06,964 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 271 [2021-11-13 17:38:06,966 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 271 [2021-11-13 17:38:06,967 INFO L73 IsDeterministic]: Start isDeterministic. Operand 271 states and 356 transitions. [2021-11-13 17:38:06,971 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 17:38:06,971 INFO L681 BuchiCegarLoop]: Abstraction has 271 states and 356 transitions. [2021-11-13 17:38:06,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states and 356 transitions. [2021-11-13 17:38:07,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 271. [2021-11-13 17:38:07,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 271 states, 267 states have (on average 1.3108614232209739) internal successors, (350), 266 states have internal predecessors, (350), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 17:38:07,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 356 transitions. [2021-11-13 17:38:07,023 INFO L704 BuchiCegarLoop]: Abstraction has 271 states and 356 transitions. [2021-11-13 17:38:07,023 INFO L587 BuchiCegarLoop]: Abstraction has 271 states and 356 transitions. [2021-11-13 17:38:07,023 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-13 17:38:07,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 271 states and 356 transitions. [2021-11-13 17:38:07,026 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 264 [2021-11-13 17:38:07,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 17:38:07,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 17:38:07,029 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 17:38:07,029 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 17:38:07,029 INFO L791 eck$LassoCheckResult]: Stem: 827#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 802#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem159#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~switch162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem173#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~short186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~ret188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~short195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem218#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~post233#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~mem148#1, main_#t~mem149#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 683#L765-4 [2021-11-13 17:38:07,031 INFO L793 eck$LassoCheckResult]: Loop: 683#L765-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 684#L765-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 817#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 794#L767-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 622#L772-124 havoc main_~_ha_hashv~0#1; 623#L772-49 goto; 730#L772-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 795#L772-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 568#L772-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 569#L772-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 583#L772-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 646#L772-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 642#L772-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 570#L772-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 571#L772-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 751#L772-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 766#L772-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 767#L772-22 assume !main_#t~switch26#1; 689#L772-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 690#L772-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 773#L772-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 774#L772-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 783#L772-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 784#L772-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 792#L772-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 763#L772-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 687#L772-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 629#L772-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 630#L772-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 731#L772-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 732#L772-42 havoc main_#t~switch26#1; 790#L772-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 745#L772-44 goto; 579#L772-46 goto; 580#L772-48 goto; 584#L772-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 585#L772-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 824#L772-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 780#L772-66 goto; 781#L772-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 818#L772-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 756#L772-70 goto; 757#L772-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 769#L772-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 639#L772-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 640#L772-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 643#L772-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 645#L772-117 goto; 675#L772-119 goto; 676#L772-121 goto; 581#L772-123 goto; 582#L772-125 call main_#t~mem146#1.base, main_#t~mem146#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem147#1 := read~int(main_#t~mem146#1.base, 12 + main_#t~mem146#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem147#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147#1 % 4294967296 % 4294967296 else main_#t~mem147#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5#1, test_int_#t~switch6#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post5#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5#1;test_int_#t~switch6#1 := 0 == test_int_#t~post5#1; 742#L709 assume test_int_#t~switch6#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 744#L702 assume !(0 == __VERIFIER_assert_~cond#1); 793#L701 assume { :end_inline___VERIFIER_assert } true; 572#L708 havoc test_int_#t~post5#1;havoc test_int_#t~switch6#1; 573#L707 assume { :end_inline_test_int } true;havoc main_#t~mem146#1.base, main_#t~mem146#1.offset;havoc main_#t~mem147#1; 808#L765-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 683#L765-4 [2021-11-13 17:38:07,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:07,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-13 17:38:07,033 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:07,033 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544578085] [2021-11-13 17:38:07,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:07,033 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:07,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:07,058 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 17:38:07,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:07,102 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 17:38:07,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:07,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1304581792, now seen corresponding path program 1 times [2021-11-13 17:38:07,110 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:07,111 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247925550] [2021-11-13 17:38:07,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:07,111 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:07,153 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 17:38:07,166 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1590198454] [2021-11-13 17:38:07,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:07,166 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 17:38:07,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 17:38:07,186 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 17:38:07,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-13 17:38:07,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 17:38:07,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 340 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 17:38:07,424 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 17:38:07,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 17:38:07,653 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 17:38:07,653 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 17:38:07,656 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247925550] [2021-11-13 17:38:07,656 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 17:38:07,656 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1590198454] [2021-11-13 17:38:07,657 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1590198454] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 17:38:07,658 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 17:38:07,658 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-13 17:38:07,658 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684585339] [2021-11-13 17:38:07,659 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 17:38:07,660 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 17:38:07,661 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 17:38:07,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-13 17:38:07,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-13 17:38:07,664 INFO L87 Difference]: Start difference. First operand 271 states and 356 transitions. cyclomatic complexity: 88 Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 17:38:07,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 17:38:07,855 INFO L93 Difference]: Finished difference Result 292 states and 377 transitions. [2021-11-13 17:38:07,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-13 17:38:07,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 292 states and 377 transitions. [2021-11-13 17:38:07,861 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 285 [2021-11-13 17:38:07,870 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 292 states to 292 states and 377 transitions. [2021-11-13 17:38:07,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 292 [2021-11-13 17:38:07,877 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 292 [2021-11-13 17:38:07,877 INFO L73 IsDeterministic]: Start isDeterministic. Operand 292 states and 377 transitions. [2021-11-13 17:38:07,880 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 17:38:07,880 INFO L681 BuchiCegarLoop]: Abstraction has 292 states and 377 transitions. [2021-11-13 17:38:07,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states and 377 transitions. [2021-11-13 17:38:07,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 291. [2021-11-13 17:38:07,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 287 states have (on average 1.289198606271777) internal successors, (370), 286 states have internal predecessors, (370), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 17:38:07,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 376 transitions. [2021-11-13 17:38:07,902 INFO L704 BuchiCegarLoop]: Abstraction has 291 states and 376 transitions. [2021-11-13 17:38:07,902 INFO L587 BuchiCegarLoop]: Abstraction has 291 states and 376 transitions. [2021-11-13 17:38:07,902 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-13 17:38:07,902 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 291 states and 376 transitions. [2021-11-13 17:38:07,905 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 284 [2021-11-13 17:38:07,905 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 17:38:07,905 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 17:38:07,907 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 17:38:07,907 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 17:38:07,908 INFO L791 eck$LassoCheckResult]: Stem: 1576#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 1546#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem159#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~switch162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem173#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~short186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~ret188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~short195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem218#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~post233#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~mem148#1, main_#t~mem149#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1426#L765-4 [2021-11-13 17:38:07,908 INFO L793 eck$LassoCheckResult]: Loop: 1426#L765-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1427#L765-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 1563#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1538#L767-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 1368#L772-124 havoc main_~_ha_hashv~0#1; 1369#L772-49 goto; 1474#L772-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1539#L772-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1308#L772-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 1309#L772-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1323#L772-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 1387#L772-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1383#L772-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 1310#L772-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1311#L772-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 1493#L772-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 1509#L772-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 1510#L772-22 assume main_#t~switch26#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 1557#L772-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 1575#L772-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1516#L772-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 1517#L772-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 1526#L772-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 1527#L772-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1549#L772-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 1505#L772-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 1506#L772-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 1370#L772-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 1371#L772-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 1472#L772-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 1473#L772-42 havoc main_#t~switch26#1; 1533#L772-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 1487#L772-44 goto; 1318#L772-46 goto; 1319#L772-48 goto; 1325#L772-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1326#L772-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 1570#L772-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 1522#L772-66 goto; 1523#L772-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 1564#L772-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 1497#L772-70 goto; 1498#L772-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1512#L772-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1380#L772-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 1381#L772-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 1384#L772-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 1386#L772-117 goto; 1416#L772-119 goto; 1417#L772-121 goto; 1321#L772-123 goto; 1322#L772-125 call main_#t~mem146#1.base, main_#t~mem146#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem147#1 := read~int(main_#t~mem146#1.base, 12 + main_#t~mem146#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem147#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147#1 % 4294967296 % 4294967296 else main_#t~mem147#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5#1, test_int_#t~switch6#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post5#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5#1;test_int_#t~switch6#1 := 0 == test_int_#t~post5#1; 1484#L709 assume test_int_#t~switch6#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 1486#L702 assume !(0 == __VERIFIER_assert_~cond#1); 1537#L701 assume { :end_inline___VERIFIER_assert } true; 1312#L708 havoc test_int_#t~post5#1;havoc test_int_#t~switch6#1; 1313#L707 assume { :end_inline_test_int } true;havoc main_#t~mem146#1.base, main_#t~mem146#1.offset;havoc main_#t~mem147#1; 1553#L765-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 1426#L765-4 [2021-11-13 17:38:07,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:07,909 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-13 17:38:07,910 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:07,910 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473507317] [2021-11-13 17:38:07,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:07,910 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:07,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:07,934 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 17:38:07,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:07,989 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 17:38:07,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:07,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1728228514, now seen corresponding path program 1 times [2021-11-13 17:38:07,994 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:07,995 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951664650] [2021-11-13 17:38:07,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:07,996 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:08,012 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 17:38:08,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2107425688] [2021-11-13 17:38:08,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:08,014 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 17:38:08,014 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 17:38:08,016 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 17:38:08,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-13 17:38:08,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 17:38:08,305 INFO L263 TraceCheckSpWp]: Trace formula consists of 346 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 17:38:08,308 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 17:38:08,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 17:38:08,521 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 17:38:08,521 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 17:38:08,522 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951664650] [2021-11-13 17:38:08,522 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 17:38:08,523 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2107425688] [2021-11-13 17:38:08,523 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2107425688] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 17:38:08,523 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 17:38:08,524 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-13 17:38:08,524 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929816907] [2021-11-13 17:38:08,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 17:38:08,525 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 17:38:08,525 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 17:38:08,526 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-13 17:38:08,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-13 17:38:08,527 INFO L87 Difference]: Start difference. First operand 291 states and 376 transitions. cyclomatic complexity: 88 Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 17:38:08,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 17:38:08,663 INFO L93 Difference]: Finished difference Result 413 states and 534 transitions. [2021-11-13 17:38:08,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-13 17:38:08,664 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 413 states and 534 transitions. [2021-11-13 17:38:08,670 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 398 [2021-11-13 17:38:08,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 413 states to 413 states and 534 transitions. [2021-11-13 17:38:08,677 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2021-11-13 17:38:08,678 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2021-11-13 17:38:08,678 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 534 transitions. [2021-11-13 17:38:08,681 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 17:38:08,681 INFO L681 BuchiCegarLoop]: Abstraction has 413 states and 534 transitions. [2021-11-13 17:38:08,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 534 transitions. [2021-11-13 17:38:08,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 277. [2021-11-13 17:38:08,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 277 states, 273 states have (on average 1.2783882783882783) internal successors, (349), 272 states have internal predecessors, (349), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 17:38:08,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 355 transitions. [2021-11-13 17:38:08,732 INFO L704 BuchiCegarLoop]: Abstraction has 277 states and 355 transitions. [2021-11-13 17:38:08,732 INFO L587 BuchiCegarLoop]: Abstraction has 277 states and 355 transitions. [2021-11-13 17:38:08,732 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-13 17:38:08,732 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 277 states and 355 transitions. [2021-11-13 17:38:08,735 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 270 [2021-11-13 17:38:08,735 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 17:38:08,735 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 17:38:08,737 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 17:38:08,737 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 17:38:08,737 INFO L791 eck$LassoCheckResult]: Stem: 2457#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 2429#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~mem159#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~switch162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~mem172#1, main_#t~mem173#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~short186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~ret188#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~short195#1, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem218#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_#t~post222#1, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~post233#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~mem148#1, main_#t~mem149#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2307#L765-4 [2021-11-13 17:38:08,738 INFO L793 eck$LassoCheckResult]: Loop: 2307#L765-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2308#L765-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 2445#L767 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2421#L767-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 2250#L772-124 havoc main_~_ha_hashv~0#1; 2251#L772-49 goto; 2355#L772-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2422#L772-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2192#L772-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 2193#L772-10 assume !main_#t~switch26#1; 2207#L772-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 2270#L772-13 assume !main_#t~switch26#1; 2266#L772-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 2194#L772-16 assume !main_#t~switch26#1; 2195#L772-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 2377#L772-19 assume !main_#t~switch26#1; 2392#L772-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 2393#L772-22 assume !main_#t~switch26#1; 2314#L772-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 2315#L772-25 assume !main_#t~switch26#1; 2399#L772-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 2400#L772-28 assume !main_#t~switch26#1; 2409#L772-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 2410#L772-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 2432#L772-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 2388#L772-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 2389#L772-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 2253#L772-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 2254#L772-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 2356#L772-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 2357#L772-42 havoc main_#t~switch26#1; 2416#L772-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 2370#L772-44 goto; 2203#L772-46 goto; 2204#L772-48 goto; 2208#L772-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2209#L772-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 2452#L772-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 2405#L772-66 goto; 2406#L772-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 2446#L772-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 2380#L772-70 goto; 2381#L772-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2397#L772-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2263#L772-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 2264#L772-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 2267#L772-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 2269#L772-117 goto; 2299#L772-119 goto; 2300#L772-121 goto; 2205#L772-123 goto; 2206#L772-125 call main_#t~mem146#1.base, main_#t~mem146#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem147#1 := read~int(main_#t~mem146#1.base, 12 + main_#t~mem146#1.offset, 4);assume { :begin_inline_test_int } true;test_int_#in~a#1 := (if main_#t~mem147#1 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147#1 % 4294967296 % 4294967296 else main_#t~mem147#1 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5#1, test_int_#t~switch6#1, test_int_~a#1;test_int_~a#1 := test_int_#in~a#1;test_int_#t~post5#1 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5#1;test_int_#t~switch6#1 := 0 == test_int_#t~post5#1; 2367#L709 assume test_int_#t~switch6#1;assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if 1 == test_int_~a#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 2369#L702 assume !(0 == __VERIFIER_assert_~cond#1); 2420#L701 assume { :end_inline___VERIFIER_assert } true; 2196#L708 havoc test_int_#t~post5#1;havoc test_int_#t~switch6#1; 2197#L707 assume { :end_inline_test_int } true;havoc main_#t~mem146#1.base, main_#t~mem146#1.offset;havoc main_#t~mem147#1; 2436#L765-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 2307#L765-4 [2021-11-13 17:38:08,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:08,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-13 17:38:08,739 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:08,739 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816869538] [2021-11-13 17:38:08,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:08,740 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:08,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:08,760 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 17:38:08,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 17:38:08,785 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 17:38:08,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 17:38:08,786 INFO L85 PathProgramCache]: Analyzing trace with hash 1432035820, now seen corresponding path program 1 times [2021-11-13 17:38:08,786 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 17:38:08,787 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882723863] [2021-11-13 17:38:08,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:08,787 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 17:38:08,800 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 17:38:08,800 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [939563647] [2021-11-13 17:38:08,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 17:38:08,801 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 17:38:08,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 17:38:08,833 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 17:38:08,850 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a572af5-4938-4eca-8c0e-4bbb6a5739d1/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process