./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version dbf71c69 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-dbf71c6-m [2022-10-17 10:20:07,378 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-17 10:20:07,380 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-17 10:20:07,419 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-17 10:20:07,419 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-17 10:20:07,421 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-17 10:20:07,423 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-17 10:20:07,425 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-17 10:20:07,428 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-17 10:20:07,429 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-17 10:20:07,430 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-17 10:20:07,432 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-17 10:20:07,433 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-17 10:20:07,434 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-17 10:20:07,436 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-17 10:20:07,438 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-17 10:20:07,439 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-17 10:20:07,440 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-17 10:20:07,443 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-17 10:20:07,446 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-17 10:20:07,448 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-17 10:20:07,450 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-17 10:20:07,451 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-17 10:20:07,452 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-17 10:20:07,457 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-17 10:20:07,458 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-17 10:20:07,458 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-17 10:20:07,459 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-17 10:20:07,460 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-17 10:20:07,461 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-17 10:20:07,461 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-17 10:20:07,462 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-17 10:20:07,463 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-17 10:20:07,464 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-17 10:20:07,465 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-17 10:20:07,466 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-17 10:20:07,467 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-17 10:20:07,467 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-17 10:20:07,468 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-17 10:20:07,481 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-17 10:20:07,482 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-17 10:20:07,483 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-10-17 10:20:07,525 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-17 10:20:07,525 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-17 10:20:07,525 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-17 10:20:07,526 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-17 10:20:07,526 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * Use SBE=true [2022-10-17 10:20:07,527 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * Use old map elimination=false [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-10-17 10:20:07,527 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-10-17 10:20:07,528 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-10-17 10:20:07,528 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-17 10:20:07,528 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-17 10:20:07,528 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-17 10:20:07,528 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-10-17 10:20:07,529 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-17 10:20:07,530 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-17 10:20:07,530 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-10-17 10:20:07,530 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-17 10:20:07,530 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-10-17 10:20:07,530 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-17 10:20:07,531 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-17 10:20:07,531 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-17 10:20:07,531 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-17 10:20:07,532 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-10-17 10:20:07,532 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2022-10-17 10:20:07,875 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-17 10:20:07,898 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-17 10:20:07,903 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-17 10:20:07,904 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-17 10:20:07,905 INFO L275 PluginConnector]: CDTParser initialized [2022-10-17 10:20:07,907 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/../../sv-benchmarks/c/loops/eureka_05.i [2022-10-17 10:20:07,986 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/data/a2f5fafb3/8c09592b2e9043ef9a7db21c416ffd93/FLAGad1c12221 [2022-10-17 10:20:08,586 INFO L306 CDTParser]: Found 1 translation units. [2022-10-17 10:20:08,588 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/sv-benchmarks/c/loops/eureka_05.i [2022-10-17 10:20:08,598 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/data/a2f5fafb3/8c09592b2e9043ef9a7db21c416ffd93/FLAGad1c12221 [2022-10-17 10:20:08,929 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/data/a2f5fafb3/8c09592b2e9043ef9a7db21c416ffd93 [2022-10-17 10:20:08,934 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-17 10:20:08,937 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-10-17 10:20:08,942 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-17 10:20:08,942 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-17 10:20:08,946 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-17 10:20:08,947 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:20:08" (1/1) ... [2022-10-17 10:20:08,949 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7233510a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:08, skipping insertion in model container [2022-10-17 10:20:08,950 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:20:08" (1/1) ... [2022-10-17 10:20:08,957 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-17 10:20:08,975 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-17 10:20:09,187 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-10-17 10:20:09,213 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:20:09,224 INFO L203 MainTranslator]: Completed pre-run [2022-10-17 10:20:09,242 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-10-17 10:20:09,266 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:20:09,284 INFO L208 MainTranslator]: Completed translation [2022-10-17 10:20:09,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09 WrapperNode [2022-10-17 10:20:09,286 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-17 10:20:09,287 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-17 10:20:09,288 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-17 10:20:09,288 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-17 10:20:09,297 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,320 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,360 INFO L138 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2022-10-17 10:20:09,360 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-17 10:20:09,361 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-17 10:20:09,361 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-17 10:20:09,362 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-17 10:20:09,372 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,372 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,378 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,379 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,397 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,402 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,407 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,408 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,410 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-17 10:20:09,411 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-17 10:20:09,411 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-17 10:20:09,412 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-17 10:20:09,416 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (1/1) ... [2022-10-17 10:20:09,424 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:09,437 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:09,457 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:09,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-10-17 10:20:09,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-17 10:20:09,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-17 10:20:09,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-10-17 10:20:09,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-10-17 10:20:09,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-17 10:20:09,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-17 10:20:09,503 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-10-17 10:20:09,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-10-17 10:20:09,576 INFO L235 CfgBuilder]: Building ICFG [2022-10-17 10:20:09,578 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-17 10:20:09,898 INFO L276 CfgBuilder]: Performing block encoding [2022-10-17 10:20:09,906 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-17 10:20:09,906 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-10-17 10:20:09,908 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:20:09 BoogieIcfgContainer [2022-10-17 10:20:09,908 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-17 10:20:09,910 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-10-17 10:20:09,921 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-10-17 10:20:09,930 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-10-17 10:20:09,931 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:20:09,931 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.10 10:20:08" (1/3) ... [2022-10-17 10:20:09,933 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@186f028a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:20:09, skipping insertion in model container [2022-10-17 10:20:09,933 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:20:09,933 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:20:09" (2/3) ... [2022-10-17 10:20:09,933 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@186f028a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:20:09, skipping insertion in model container [2022-10-17 10:20:09,934 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:20:09,934 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:20:09" (3/3) ... [2022-10-17 10:20:09,935 INFO L332 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2022-10-17 10:20:10,049 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-10-17 10:20:10,049 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-10-17 10:20:10,050 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-10-17 10:20:10,050 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-10-17 10:20:10,050 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-10-17 10:20:10,050 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-10-17 10:20:10,050 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-10-17 10:20:10,051 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-10-17 10:20:10,057 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:10,095 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-10-17 10:20:10,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:10,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:10,103 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 10:20:10,103 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-10-17 10:20:10,103 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-10-17 10:20:10,104 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:10,108 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-10-17 10:20:10,108 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:10,108 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:10,109 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 10:20:10,109 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-10-17 10:20:10,117 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 13#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6#L44-3true [2022-10-17 10:20:10,118 INFO L750 eck$LassoCheckResult]: Loop: 6#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 18#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6#L44-3true [2022-10-17 10:20:10,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:10,130 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-10-17 10:20:10,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:10,142 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810953678] [2022-10-17 10:20:10,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:10,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:10,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,313 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:10,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,373 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:10,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:10,377 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-10-17 10:20:10,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:10,379 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284331429] [2022-10-17 10:20:10,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:10,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:10,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,414 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:10,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,431 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:10,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:10,441 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-10-17 10:20:10,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:10,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655570121] [2022-10-17 10:20:10,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:10,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:10,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,487 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:10,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:10,524 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:11,137 INFO L210 LassoAnalysis]: Preferences: [2022-10-17 10:20:11,138 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-10-17 10:20:11,138 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-10-17 10:20:11,138 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-10-17 10:20:11,138 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-10-17 10:20:11,138 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:11,139 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-10-17 10:20:11,139 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-10-17 10:20:11,139 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2022-10-17 10:20:11,139 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-10-17 10:20:11,139 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-10-17 10:20:11,159 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,170 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,174 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,177 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,180 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,685 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,689 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:11,692 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:20:12,066 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-10-17 10:20:12,071 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-10-17 10:20:12,073 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,073 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,078 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,088 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,097 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,097 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-10-17 10:20:12,098 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,098 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,098 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,100 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-10-17 10:20:12,100 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-10-17 10:20:12,100 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-10-17 10:20:12,104 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,150 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,154 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,155 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-10-17 10:20:12,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,163 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,163 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,163 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,164 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,167 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,168 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,194 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,228 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,230 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-10-17 10:20:12,238 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,246 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,246 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,246 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,246 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,250 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,250 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,265 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,304 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,309 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,333 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,344 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,344 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-10-17 10:20:12,344 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,344 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,345 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,346 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-10-17 10:20:12,346 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-10-17 10:20:12,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-10-17 10:20:12,357 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,394 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,397 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-10-17 10:20:12,402 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,411 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,411 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,412 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,412 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,415 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,416 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,430 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,464 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,464 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,466 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-10-17 10:20:12,468 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,475 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,475 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,475 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,475 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,482 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,482 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,509 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,550 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,550 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,552 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,561 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,571 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,571 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,571 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,571 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,575 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,575 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-10-17 10:20:12,592 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,630 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,630 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,630 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,633 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-10-17 10:20:12,638 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,647 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,648 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,648 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,648 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,653 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,653 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,669 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,713 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,713 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,715 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,716 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-10-17 10:20:12,717 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,725 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,725 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,725 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,726 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,728 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,729 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,733 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,758 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,759 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,759 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,761 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,763 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-10-17 10:20:12,770 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,770 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,771 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,771 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,773 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,774 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,789 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,828 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,829 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,830 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,841 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,842 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-10-17 10:20:12,849 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,849 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,849 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,849 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,852 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,852 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,871 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-10-17 10:20:12,913 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:12,913 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:12,913 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:12,914 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:12,925 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-10-17 10:20:12,934 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-10-17 10:20:12,934 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-10-17 10:20:12,934 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-10-17 10:20:12,934 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-10-17 10:20:12,951 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-10-17 10:20:12,952 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-10-17 10:20:12,964 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-10-17 10:20:12,977 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-10-17 10:20:13,068 INFO L443 ModelExtractionUtils]: Simplification made 20 calls to the SMT solver. [2022-10-17 10:20:13,068 INFO L444 ModelExtractionUtils]: 1 out of 16 variables were initially zero. Simplification set additionally 12 variables to zero. [2022-10-17 10:20:13,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:20:13,070 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:13,093 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:20:13,157 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-10-17 10:20:13,157 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-10-17 10:20:13,181 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-10-17 10:20:13,181 INFO L513 LassoAnalysis]: Proved termination. [2022-10-17 10:20:13,181 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2022-10-17 10:20:13,248 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:13,306 INFO L156 tatePredicateManager]: 17 out of 17 supporting invariants were superfluous and have been removed [2022-10-17 10:20:13,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:13,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:13,365 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-17 10:20:13,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:13,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:13,391 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-17 10:20:13,392 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:13,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:13,480 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-10-17 10:20:13,482 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:13,562 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2022-10-17 10:20:13,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-10-17 10:20:13,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:13,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2022-10-17 10:20:13,572 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2022-10-17 10:20:13,572 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-10-17 10:20:13,572 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2022-10-17 10:20:13,572 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-10-17 10:20:13,572 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2022-10-17 10:20:13,572 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-10-17 10:20:13,573 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2022-10-17 10:20:13,577 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-10-17 10:20:13,580 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2022-10-17 10:20:13,581 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-10-17 10:20:13,581 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-10-17 10:20:13,582 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2022-10-17 10:20:13,582 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:13,583 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-10-17 10:20:13,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2022-10-17 10:20:13,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-10-17 10:20:13,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:13,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2022-10-17 10:20:13,604 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-10-17 10:20:13,604 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-10-17 10:20:13,604 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-10-17 10:20:13,604 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2022-10-17 10:20:13,605 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-10-17 10:20:13,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:13,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:13,605 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-10-17 10:20:13,605 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-10-17 10:20:13,606 INFO L748 eck$LassoCheckResult]: Stem: 180#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 181#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 182#L44-3 assume !(main_~i~1#1 >= 0); 183#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 179#L30-3 [2022-10-17 10:20:13,606 INFO L750 eck$LassoCheckResult]: Loop: 179#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 192#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 193#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 178#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 179#L30-3 [2022-10-17 10:20:13,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:13,607 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-10-17 10:20:13,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:13,607 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605748098] [2022-10-17 10:20:13,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:13,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:13,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:13,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:13,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:13,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605748098] [2022-10-17 10:20:13,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [605748098] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:20:13,666 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:20:13,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 10:20:13,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912274681] [2022-10-17 10:20:13,667 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:20:13,669 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:13,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:13,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2022-10-17 10:20:13,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:13,670 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886297612] [2022-10-17 10:20:13,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:13,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:13,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:13,681 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:13,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:13,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:13,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:13,812 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 10:20:13,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 10:20:13,814 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:13,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:13,833 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-10-17 10:20:13,833 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2022-10-17 10:20:13,834 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:13,835 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2022-10-17 10:20:13,835 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-10-17 10:20:13,835 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-10-17 10:20:13,835 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-10-17 10:20:13,836 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:13,836 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-10-17 10:20:13,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-10-17 10:20:13,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-10-17 10:20:13,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:13,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-10-17 10:20:13,838 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-10-17 10:20:13,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 10:20:13,840 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-10-17 10:20:13,840 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-10-17 10:20:13,840 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-10-17 10:20:13,841 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:13,841 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:13,841 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:13,842 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-10-17 10:20:13,842 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-10-17 10:20:13,842 INFO L748 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 223#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 224#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 225#L44-3 assume !(main_~i~1#1 >= 0); 226#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2022-10-17 10:20:13,842 INFO L750 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 234#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 235#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2022-10-17 10:20:13,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:13,843 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-10-17 10:20:13,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:13,843 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627597772] [2022-10-17 10:20:13,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:13,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:13,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:13,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:13,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:13,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627597772] [2022-10-17 10:20:13,957 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627597772] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:13,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [881140174] [2022-10-17 10:20:13,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:13,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:13,958 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:13,958 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:13,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-10-17 10:20:14,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:14,005 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-17 10:20:14,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:14,014 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:14,015 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:14,034 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:14,035 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [881140174] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:14,035 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:14,035 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2022-10-17 10:20:14,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681390194] [2022-10-17 10:20:14,036 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:14,036 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:14,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2022-10-17 10:20:14,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683844739] [2022-10-17 10:20:14,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,046 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:14,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,054 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:14,176 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-10-17 10:20:14,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:14,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-17 10:20:14,197 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-10-17 10:20:14,197 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:14,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:14,241 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-10-17 10:20:14,241 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2022-10-17 10:20:14,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:14,243 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2022-10-17 10:20:14,243 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-10-17 10:20:14,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-10-17 10:20:14,244 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2022-10-17 10:20:14,244 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:14,244 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-10-17 10:20:14,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2022-10-17 10:20:14,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2022-10-17 10:20:14,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:14,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-10-17 10:20:14,247 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-10-17 10:20:14,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-17 10:20:14,249 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-10-17 10:20:14,249 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-10-17 10:20:14,249 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2022-10-17 10:20:14,250 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:14,250 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:14,250 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:14,251 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-10-17 10:20:14,251 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-10-17 10:20:14,252 INFO L748 eck$LassoCheckResult]: Stem: 304#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 305#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 306#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 307#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 308#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 309#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 324#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 323#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 322#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 321#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 320#L44-3 assume !(main_~i~1#1 >= 0); 310#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 303#L30-3 [2022-10-17 10:20:14,252 INFO L750 eck$LassoCheckResult]: Loop: 303#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 318#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 319#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 302#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 303#L30-3 [2022-10-17 10:20:14,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,252 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-10-17 10:20:14,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,253 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659430133] [2022-10-17 10:20:14,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:14,372 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:14,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:14,373 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [659430133] [2022-10-17 10:20:14,373 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [659430133] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:14,373 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1683982796] [2022-10-17 10:20:14,374 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-17 10:20:14,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:14,374 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:14,378 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:14,393 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-10-17 10:20:14,444 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-17 10:20:14,444 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-17 10:20:14,445 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-17 10:20:14,446 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:14,466 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:14,466 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:14,498 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:14,498 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1683982796] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:14,499 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:14,499 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2022-10-17 10:20:14,499 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258450825] [2022-10-17 10:20:14,499 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:14,500 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:14,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,500 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2022-10-17 10:20:14,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808816391] [2022-10-17 10:20:14,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,509 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:14,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,516 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:14,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:14,635 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-10-17 10:20:14,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-10-17 10:20:14,636 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:14,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:14,705 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2022-10-17 10:20:14,706 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2022-10-17 10:20:14,707 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:14,708 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2022-10-17 10:20:14,708 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-10-17 10:20:14,709 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-10-17 10:20:14,709 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2022-10-17 10:20:14,709 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:14,709 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-10-17 10:20:14,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2022-10-17 10:20:14,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2022-10-17 10:20:14,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:14,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-10-17 10:20:14,712 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-10-17 10:20:14,713 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-17 10:20:14,714 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-10-17 10:20:14,714 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-10-17 10:20:14,714 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2022-10-17 10:20:14,715 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:14,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:14,715 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:14,716 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2022-10-17 10:20:14,716 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-10-17 10:20:14,716 INFO L748 eck$LassoCheckResult]: Stem: 444#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 445#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 446#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 447#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 448#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 449#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 466#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 465#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 464#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 463#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 462#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 461#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 460#L44-3 assume !(main_~i~1#1 >= 0); 450#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 443#L30-3 [2022-10-17 10:20:14,717 INFO L750 eck$LassoCheckResult]: Loop: 443#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 458#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 459#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 442#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 443#L30-3 [2022-10-17 10:20:14,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,717 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2022-10-17 10:20:14,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513946130] [2022-10-17 10:20:14,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,757 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,804 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:14,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,811 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2022-10-17 10:20:14,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045613948] [2022-10-17 10:20:14,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,824 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:14,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:14,834 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:14,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:14,837 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2022-10-17 10:20:14,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:14,837 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656050412] [2022-10-17 10:20:14,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:14,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:14,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:15,041 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-10-17 10:20:15,042 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:15,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656050412] [2022-10-17 10:20:15,042 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656050412] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:20:15,043 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:20:15,043 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 10:20:15,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939474769] [2022-10-17 10:20:15,043 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:20:15,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:15,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-17 10:20:15,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-17 10:20:15,162 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:15,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:15,217 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2022-10-17 10:20:15,217 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2022-10-17 10:20:15,218 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-10-17 10:20:15,221 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2022-10-17 10:20:15,222 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-10-17 10:20:15,222 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-10-17 10:20:15,222 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2022-10-17 10:20:15,222 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:15,223 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-10-17 10:20:15,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2022-10-17 10:20:15,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2022-10-17 10:20:15,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:15,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2022-10-17 10:20:15,230 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-10-17 10:20:15,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 10:20:15,233 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-10-17 10:20:15,233 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-10-17 10:20:15,233 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2022-10-17 10:20:15,234 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:15,234 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:15,235 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:15,236 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:15,236 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:15,236 INFO L748 eck$LassoCheckResult]: Stem: 515#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 516#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 517#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 518#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 519#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 520#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 539#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 538#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 537#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 536#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 535#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 534#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 533#L44-3 assume !(main_~i~1#1 >= 0); 521#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 522#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 531#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-10-17 10:20:15,236 INFO L750 eck$LassoCheckResult]: Loop: 527#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 528#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 530#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-10-17 10:20:15,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:15,237 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2022-10-17 10:20:15,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:15,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841344724] [2022-10-17 10:20:15,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:15,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:15,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:15,273 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:15,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:15,310 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:15,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:15,312 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2022-10-17 10:20:15,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:15,313 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653182640] [2022-10-17 10:20:15,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:15,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:15,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:15,321 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:15,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:15,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:15,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:15,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2022-10-17 10:20:15,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:15,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978470264] [2022-10-17 10:20:15,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:15,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:15,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:16,464 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:20:16,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:16,465 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978470264] [2022-10-17 10:20:16,465 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1978470264] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:16,465 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1248679958] [2022-10-17 10:20:16,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:16,466 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:16,466 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:16,494 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:16,500 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-10-17 10:20:16,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:16,578 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 26 conjunts are in the unsatisfiable core [2022-10-17 10:20:16,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:16,670 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:16,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:16,731 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:16,786 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:16,829 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:16,877 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:16,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:17,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:17,080 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-17 10:20:17,081 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:17,082 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-17 10:20:17,083 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 13 [2022-10-17 10:20:17,111 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-17 10:20:17,111 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:17,235 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_122) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 4)) 1)))) is different from false [2022-10-17 10:20:17,381 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2022-10-17 10:20:17,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1248679958] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:17,382 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:17,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 23 [2022-10-17 10:20:17,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103132850] [2022-10-17 10:20:17,386 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:17,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:17,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-10-17 10:20:17,474 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=424, Unknown=1, NotChecked=42, Total=552 [2022-10-17 10:20:17,474 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 24 states, 24 states have (on average 1.7083333333333333) internal successors, (41), 23 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:18,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:18,374 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-10-17 10:20:18,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2022-10-17 10:20:18,376 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-10-17 10:20:18,376 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2022-10-17 10:20:18,376 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-10-17 10:20:18,377 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-10-17 10:20:18,377 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2022-10-17 10:20:18,377 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:18,377 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2022-10-17 10:20:18,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2022-10-17 10:20:18,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2022-10-17 10:20:18,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:18,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-10-17 10:20:18,380 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-10-17 10:20:18,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-10-17 10:20:18,386 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-10-17 10:20:18,386 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-10-17 10:20:18,386 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-10-17 10:20:18,388 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:18,388 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:18,388 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:18,389 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:18,389 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:18,389 INFO L748 eck$LassoCheckResult]: Stem: 733#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 734#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 735#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 736#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 737#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 738#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 757#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 756#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 755#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 754#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 753#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 752#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 751#L44-3 assume !(main_~i~1#1 >= 0); 739#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 740#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 749#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 745#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 746#L32-2 [2022-10-17 10:20:18,389 INFO L750 eck$LassoCheckResult]: Loop: 746#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 748#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 758#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 746#L32-2 [2022-10-17 10:20:18,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:18,390 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2022-10-17 10:20:18,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:18,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484073631] [2022-10-17 10:20:18,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:18,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:18,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:18,420 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:18,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:18,450 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:18,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:18,453 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2022-10-17 10:20:18,453 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:18,453 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236415831] [2022-10-17 10:20:18,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:18,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:18,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:18,466 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:18,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:18,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:18,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:18,473 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2022-10-17 10:20:18,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:18,474 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089028539] [2022-10-17 10:20:18,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:18,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:18,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:19,064 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-17 10:20:19,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:19,064 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089028539] [2022-10-17 10:20:19,065 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089028539] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:19,065 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1389030677] [2022-10-17 10:20:19,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:19,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:19,065 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:19,077 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:19,108 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-10-17 10:20:19,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:19,186 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 34 conjunts are in the unsatisfiable core [2022-10-17 10:20:19,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:19,248 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:19,251 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:19,288 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:19,354 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:19,413 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:19,438 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:19,467 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:19,705 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-17 10:20:19,740 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-17 10:20:19,740 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:19,922 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_163 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_163) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 8)) 1)))) is different from false [2022-10-17 10:20:19,976 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~#array~1#1.base_55| Int) (v_ArrVal_163 (Array Int Int))) (or (let ((.cse0 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_55| v_ArrVal_163) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 8)) 1))) (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_55|) 0)))) is different from false [2022-10-17 10:20:19,977 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2022-10-17 10:20:19,978 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1389030677] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:19,978 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:19,978 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 7] total 25 [2022-10-17 10:20:19,979 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947987905] [2022-10-17 10:20:19,979 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:20,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:20,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-10-17 10:20:20,057 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=526, Unknown=2, NotChecked=94, Total=702 [2022-10-17 10:20:20,057 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:21,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:21,085 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-10-17 10:20:21,085 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,088 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2022-10-17 10:20:21,093 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-10-17 10:20:21,093 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-10-17 10:20:21,094 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-10-17 10:20:21,094 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,096 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:21,097 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-10-17 10:20:21,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2022-10-17 10:20:21,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:21,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2022-10-17 10:20:21,111 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-10-17 10:20:21,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-17 10:20:21,113 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-10-17 10:20:21,114 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-10-17 10:20:21,115 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2022-10-17 10:20:21,115 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:21,115 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:21,115 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:21,117 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:21,117 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-10-17 10:20:21,118 INFO L748 eck$LassoCheckResult]: Stem: 983#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 984#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 985#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 986#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 987#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 988#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1004#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1003#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1002#L44-3 assume !(main_~i~1#1 >= 0); 989#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 990#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 999#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1000#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1011#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1010#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1001#L32-4 [2022-10-17 10:20:21,118 INFO L750 eck$LassoCheckResult]: Loop: 1001#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 981#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 982#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 998#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1001#L32-4 [2022-10-17 10:20:21,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:21,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2022-10-17 10:20:21,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:21,119 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256232941] [2022-10-17 10:20:21,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:21,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:21,206 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-10-17 10:20:21,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:21,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256232941] [2022-10-17 10:20:21,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256232941] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:21,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638285716] [2022-10-17 10:20:21,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,207 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:21,207 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:21,210 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:21,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-10-17 10:20:21,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:21,280 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-17 10:20:21,281 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:21,350 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-10-17 10:20:21,351 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:21,425 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-10-17 10:20:21,426 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [638285716] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:21,426 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:21,426 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2022-10-17 10:20:21,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372746607] [2022-10-17 10:20:21,427 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:21,427 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:21,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:21,428 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2022-10-17 10:20:21,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:21,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698796863] [2022-10-17 10:20:21,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:21,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,441 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:21,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,448 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:21,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:21,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-10-17 10:20:21,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-10-17 10:20:21,569 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:21,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:21,749 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-10-17 10:20:21,749 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,750 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-10-17 10:20:21,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-10-17 10:20:21,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-10-17 10:20:21,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-10-17 10:20:21,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:21,752 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-10-17 10:20:21,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-10-17 10:20:21,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2022-10-17 10:20:21,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:21,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2022-10-17 10:20:21,759 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-10-17 10:20:21,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-17 10:20:21,760 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-10-17 10:20:21,761 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-10-17 10:20:21,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2022-10-17 10:20:21,761 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-10-17 10:20:21,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:21,762 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:21,762 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2022-10-17 10:20:21,763 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:21,763 INFO L748 eck$LassoCheckResult]: Stem: 1205#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1206#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1207#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1208#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1209#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1210#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1237#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1235#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1232#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1230#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1229#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1226#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1225#L44-3 assume !(main_~i~1#1 >= 0); 1211#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1212#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1247#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1246#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1245#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1244#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1243#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1242#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1241#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1240#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1239#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1238#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1234#L33 [2022-10-17 10:20:21,763 INFO L750 eck$LassoCheckResult]: Loop: 1234#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1236#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1233#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1234#L33 [2022-10-17 10:20:21,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:21,763 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2022-10-17 10:20:21,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:21,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171143940] [2022-10-17 10:20:21,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:21,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,790 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:21,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,809 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:21,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:21,810 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2022-10-17 10:20:21,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:21,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958814338] [2022-10-17 10:20:21,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:21,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:21,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:21,819 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:21,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:21,820 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2022-10-17 10:20:21,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:21,820 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72521088] [2022-10-17 10:20:21,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:21,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:21,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:21,979 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-10-17 10:20:21,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:21,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72521088] [2022-10-17 10:20:21,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72521088] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:20:21,980 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:20:21,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-10-17 10:20:21,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455621903] [2022-10-17 10:20:21,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:20:22,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:22,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-10-17 10:20:22,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-10-17 10:20:22,075 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:22,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:22,175 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2022-10-17 10:20:22,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2022-10-17 10:20:22,176 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:22,176 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2022-10-17 10:20:22,176 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2022-10-17 10:20:22,177 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2022-10-17 10:20:22,177 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2022-10-17 10:20:22,177 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:22,177 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-10-17 10:20:22,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2022-10-17 10:20:22,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-10-17 10:20:22,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:22,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-10-17 10:20:22,181 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-10-17 10:20:22,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-10-17 10:20:22,182 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-10-17 10:20:22,182 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-10-17 10:20:22,182 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2022-10-17 10:20:22,183 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:22,183 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:22,183 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:22,184 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:22,184 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:22,184 INFO L748 eck$LassoCheckResult]: Stem: 1323#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1324#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1325#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1326#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1327#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1328#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1354#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1353#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1351#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1349#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1347#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1343#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1342#L44-3 assume !(main_~i~1#1 >= 0); 1329#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1330#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1341#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1366#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1338#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1339#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1335#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1336#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1365#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1364#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1363#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1362#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1361#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1360#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1359#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1340#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1321#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1322#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1358#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1357#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1356#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1355#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1350#L33 [2022-10-17 10:20:22,184 INFO L750 eck$LassoCheckResult]: Loop: 1350#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1352#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1345#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1350#L33 [2022-10-17 10:20:22,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:22,185 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2022-10-17 10:20:22,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:22,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042692636] [2022-10-17 10:20:22,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:22,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:22,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:22,210 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:22,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:22,239 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:22,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:22,241 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2022-10-17 10:20:22,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:22,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824820087] [2022-10-17 10:20:22,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:22,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:22,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:22,248 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:22,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:22,254 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:22,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:22,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2022-10-17 10:20:22,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:22,255 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905211434] [2022-10-17 10:20:22,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:22,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:22,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:23,283 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-10-17 10:20:23,284 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:23,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905211434] [2022-10-17 10:20:23,284 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905211434] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:23,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [53059205] [2022-10-17 10:20:23,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:23,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:23,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:23,294 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:23,332 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-10-17 10:20:23,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:23,431 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 32 conjunts are in the unsatisfiable core [2022-10-17 10:20:23,435 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:23,495 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:23,496 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:23,561 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-17 10:20:23,585 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-17 10:20:23,617 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-17 10:20:23,645 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-17 10:20:23,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-17 10:20:24,007 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:24,008 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:24,009 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2022-10-17 10:20:24,211 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-17 10:20:24,243 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-10-17 10:20:24,243 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:24,666 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_264 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_264) |c_~#array~0.base|))) (< (select .cse0 (+ |c_~#array~0.offset| 4)) (+ (select .cse0 (+ |c_~#array~0.offset| 12)) 1)))) is different from false [2022-10-17 10:20:24,771 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-10-17 10:20:24,771 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [53059205] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:24,772 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:24,772 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 30 [2022-10-17 10:20:24,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214836804] [2022-10-17 10:20:24,775 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:24,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:24,866 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-10-17 10:20:24,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=778, Unknown=1, NotChecked=56, Total=930 [2022-10-17 10:20:24,867 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 31 states, 31 states have (on average 2.096774193548387) internal successors, (65), 30 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:26,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:26,261 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-10-17 10:20:26,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 68 states and 78 transitions. [2022-10-17 10:20:26,262 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-10-17 10:20:26,263 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 68 states to 68 states and 78 transitions. [2022-10-17 10:20:26,263 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2022-10-17 10:20:26,263 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 58 [2022-10-17 10:20:26,263 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 78 transitions. [2022-10-17 10:20:26,264 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:26,264 INFO L218 hiAutomatonCegarLoop]: Abstraction has 68 states and 78 transitions. [2022-10-17 10:20:26,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 78 transitions. [2022-10-17 10:20:26,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 59. [2022-10-17 10:20:26,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.1355932203389831) internal successors, (67), 58 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:26,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 67 transitions. [2022-10-17 10:20:26,269 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59 states and 67 transitions. [2022-10-17 10:20:26,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-10-17 10:20:26,277 INFO L428 stractBuchiCegarLoop]: Abstraction has 59 states and 67 transitions. [2022-10-17 10:20:26,277 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-10-17 10:20:26,277 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 67 transitions. [2022-10-17 10:20:26,278 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:26,278 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:26,278 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:26,279 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:26,279 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:26,280 INFO L748 eck$LassoCheckResult]: Stem: 1725#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1726#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1727#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1728#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1729#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1730#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1758#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1757#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1756#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1755#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1753#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1749#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1748#L44-3 assume !(main_~i~1#1 >= 0); 1731#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1732#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1776#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1775#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1774#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1773#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1772#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1771#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1770#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1768#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1769#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1781#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1763#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1764#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1759#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1760#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1723#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1724#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1780#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1777#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1778#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1742#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1743#L33 [2022-10-17 10:20:26,280 INFO L750 eck$LassoCheckResult]: Loop: 1743#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1738#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1751#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1743#L33 [2022-10-17 10:20:26,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:26,283 INFO L85 PathProgramCache]: Analyzing trace with hash 322622039, now seen corresponding path program 2 times [2022-10-17 10:20:26,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:26,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795805286] [2022-10-17 10:20:26,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:26,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:26,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:27,319 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-10-17 10:20:27,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:27,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795805286] [2022-10-17 10:20:27,320 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1795805286] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:27,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1433548216] [2022-10-17 10:20:27,321 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-17 10:20:27,321 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:27,321 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:27,329 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:27,334 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-10-17 10:20:27,447 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-17 10:20:27,447 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-17 10:20:27,449 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 30 conjunts are in the unsatisfiable core [2022-10-17 10:20:27,452 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:27,507 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:27,507 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:27,551 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:27,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:27,610 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:27,640 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:27,665 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:27,976 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-17 10:20:27,994 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2022-10-17 10:20:28,029 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-10-17 10:20:28,029 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:28,243 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_302 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_302) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 12)) 1)))) is different from false [2022-10-17 10:20:28,332 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 9 not checked. [2022-10-17 10:20:28,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1433548216] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:28,332 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:28,333 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 27 [2022-10-17 10:20:28,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875249504] [2022-10-17 10:20:28,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:28,334 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:28,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:28,334 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2022-10-17 10:20:28,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:28,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702883604] [2022-10-17 10:20:28,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:28,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:28,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:28,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:28,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:28,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:28,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:28,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-10-17 10:20:28,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=599, Unknown=1, NotChecked=50, Total=756 [2022-10-17 10:20:28,442 INFO L87 Difference]: Start difference. First operand 59 states and 67 transitions. cyclomatic complexity: 11 Second operand has 28 states, 28 states have (on average 2.0714285714285716) internal successors, (58), 27 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:29,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:29,080 INFO L93 Difference]: Finished difference Result 58 states and 64 transitions. [2022-10-17 10:20:29,081 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 64 transitions. [2022-10-17 10:20:29,082 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-10-17 10:20:29,083 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 64 transitions. [2022-10-17 10:20:29,083 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2022-10-17 10:20:29,084 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2022-10-17 10:20:29,084 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 64 transitions. [2022-10-17 10:20:29,085 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:29,086 INFO L218 hiAutomatonCegarLoop]: Abstraction has 58 states and 64 transitions. [2022-10-17 10:20:29,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 64 transitions. [2022-10-17 10:20:29,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-10-17 10:20:29,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.1071428571428572) internal successors, (62), 55 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:29,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 62 transitions. [2022-10-17 10:20:29,097 INFO L240 hiAutomatonCegarLoop]: Abstraction has 56 states and 62 transitions. [2022-10-17 10:20:29,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-17 10:20:29,099 INFO L428 stractBuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2022-10-17 10:20:29,100 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-10-17 10:20:29,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 62 transitions. [2022-10-17 10:20:29,100 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:29,101 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:29,101 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:29,107 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:29,107 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:29,110 INFO L748 eck$LassoCheckResult]: Stem: 2094#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2095#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2096#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2097#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2098#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2099#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2125#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2124#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2122#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2120#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2118#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2114#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2113#L44-3 assume !(main_~i~1#1 >= 0); 2100#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2101#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2147#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2146#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2109#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2110#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2145#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2144#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2143#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2142#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2141#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2140#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2139#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2137#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2136#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2112#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2092#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2093#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2111#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2106#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2107#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2129#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2121#L33 [2022-10-17 10:20:29,112 INFO L750 eck$LassoCheckResult]: Loop: 2121#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2123#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2116#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2121#L33 [2022-10-17 10:20:29,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:29,113 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 3 times [2022-10-17 10:20:29,113 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:29,113 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520570700] [2022-10-17 10:20:29,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:29,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:29,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:30,134 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-10-17 10:20:30,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:30,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520570700] [2022-10-17 10:20:30,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1520570700] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:30,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1837063145] [2022-10-17 10:20:30,135 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-10-17 10:20:30,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:30,136 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:30,141 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:30,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-10-17 10:20:30,262 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-10-17 10:20:30,262 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-17 10:20:30,264 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 33 conjunts are in the unsatisfiable core [2022-10-17 10:20:30,266 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:30,331 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:30,332 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:30,379 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:30,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:30,450 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:30,487 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:30,530 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:30,812 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-17 10:20:30,813 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 33 [2022-10-17 10:20:31,055 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 19 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-10-17 10:20:31,055 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-17 10:20:31,471 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_337 (Array Int Int)) (|ULTIMATE.start_SelectionSort_~i~0#1| Int)) (or (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_337) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ (* |ULTIMATE.start_SelectionSort_~i~0#1| 4) |c_~#array~0.offset|)) 1))) (not (< |ULTIMATE.start_SelectionSort_~i~0#1| c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 1) c_~n~0))) is different from false [2022-10-17 10:20:31,663 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 10 refuted. 0 times theorem prover too weak. 29 trivial. 9 not checked. [2022-10-17 10:20:31,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1837063145] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-17 10:20:31,664 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-17 10:20:31,664 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9, 9] total 29 [2022-10-17 10:20:31,664 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594805226] [2022-10-17 10:20:31,664 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-17 10:20:31,665 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:20:31,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:31,666 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 6 times [2022-10-17 10:20:31,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:31,666 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528688315] [2022-10-17 10:20:31,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:31,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:31,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:31,671 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:31,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:31,675 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:31,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:20:31,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-10-17 10:20:31,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=723, Unknown=1, NotChecked=54, Total=870 [2022-10-17 10:20:31,770 INFO L87 Difference]: Start difference. First operand 56 states and 62 transitions. cyclomatic complexity: 9 Second operand has 30 states, 30 states have (on average 1.9666666666666666) internal successors, (59), 29 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:33,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:20:33,065 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-10-17 10:20:33,065 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 57 transitions. [2022-10-17 10:20:33,066 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-10-17 10:20:33,067 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 57 transitions. [2022-10-17 10:20:33,067 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-10-17 10:20:33,067 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-10-17 10:20:33,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 57 transitions. [2022-10-17 10:20:33,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:20:33,068 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 57 transitions. [2022-10-17 10:20:33,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 57 transitions. [2022-10-17 10:20:33,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 47. [2022-10-17 10:20:33,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0851063829787233) internal successors, (51), 46 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:20:33,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2022-10-17 10:20:33,071 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-10-17 10:20:33,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-10-17 10:20:33,072 INFO L428 stractBuchiCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-10-17 10:20:33,073 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-10-17 10:20:33,073 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 51 transitions. [2022-10-17 10:20:33,073 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-10-17 10:20:33,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:20:33,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:20:33,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:20:33,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-10-17 10:20:33,075 INFO L748 eck$LassoCheckResult]: Stem: 2468#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2469#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2470#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2471#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2472#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2473#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2497#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2496#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2495#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2494#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2492#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2488#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2487#L44-3 assume !(main_~i~1#1 >= 0); 2474#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2475#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2510#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2509#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2508#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2507#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2506#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2505#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2504#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2503#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2502#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2501#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2500#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2499#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2498#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2485#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2466#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2467#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2486#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2512#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2483#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2484#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2480#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2481#L32-2 [2022-10-17 10:20:33,075 INFO L750 eck$LassoCheckResult]: Loop: 2481#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2490#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2511#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2481#L32-2 [2022-10-17 10:20:33,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:33,076 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2022-10-17 10:20:33,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:33,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867631793] [2022-10-17 10:20:33,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:33,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:33,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:33,102 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:33,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:33,126 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:33,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:33,127 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 7 times [2022-10-17 10:20:33,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:33,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915248750] [2022-10-17 10:20:33,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:33,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:33,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:33,132 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:20:33,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:20:33,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:20:33,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:20:33,138 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 4 times [2022-10-17 10:20:33,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:20:33,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611813779] [2022-10-17 10:20:33,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:20:33,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:20:33,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:20:34,327 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-10-17 10:20:34,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:20:34,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611813779] [2022-10-17 10:20:34,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [611813779] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-17 10:20:34,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1123342165] [2022-10-17 10:20:34,328 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-10-17 10:20:34,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 10:20:34,328 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:20:34,337 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 10:20:34,380 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_490aaec4-a1b0-4ad4-b2f9-36ae4cc5dcbd/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-10-17 10:20:34,561 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-10-17 10:20:34,561 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-17 10:20:34,564 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 46 conjunts are in the unsatisfiable core [2022-10-17 10:20:34,569 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 10:20:34,633 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-10-17 10:20:34,634 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-10-17 10:20:34,687 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:34,727 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:34,766 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:34,801 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:34,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-17 10:20:35,640 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:35,641 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-17 10:20:35,642 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:35,643 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-17 10:20:35,645 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-10-17 10:20:36,202 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-17 10:20:36,202 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-10-17 10:20:36,269 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 74 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-17 10:20:36,269 INFO L328 TraceCheckSpWp]: Computing backward predicates...