./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version dbf71c69 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0a05a45e59c4449e0f919ee265abbb6a4949f64a9be713d749d79d0baffd63df --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-dbf71c6-m [2022-10-17 11:01:58,150 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-17 11:01:58,153 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-17 11:01:58,218 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-17 11:01:58,219 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-17 11:01:58,224 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-17 11:01:58,227 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-17 11:01:58,232 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-17 11:01:58,235 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-17 11:01:58,241 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-17 11:01:58,243 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-17 11:01:58,246 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-17 11:01:58,247 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-17 11:01:58,250 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-17 11:01:58,252 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-17 11:01:58,255 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-17 11:01:58,257 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-17 11:01:58,258 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-17 11:01:58,260 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-17 11:01:58,269 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-17 11:01:58,271 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-17 11:01:58,272 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-17 11:01:58,276 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-17 11:01:58,278 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-17 11:01:58,289 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-17 11:01:58,290 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-17 11:01:58,290 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-17 11:01:58,292 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-17 11:01:58,293 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-17 11:01:58,294 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-17 11:01:58,296 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-17 11:01:58,297 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-17 11:01:58,300 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-17 11:01:58,301 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-17 11:01:58,303 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-17 11:01:58,303 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-17 11:01:58,304 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-17 11:01:58,304 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-17 11:01:58,305 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-17 11:01:58,306 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-17 11:01:58,307 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-17 11:01:58,308 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-10-17 11:01:58,353 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-17 11:01:58,353 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-17 11:01:58,354 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-17 11:01:58,354 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-17 11:01:58,356 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-17 11:01:58,356 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-17 11:01:58,356 INFO L138 SettingsManager]: * Use SBE=true [2022-10-17 11:01:58,356 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-10-17 11:01:58,357 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-10-17 11:01:58,357 INFO L138 SettingsManager]: * Use old map elimination=false [2022-10-17 11:01:58,358 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-10-17 11:01:58,358 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-10-17 11:01:58,358 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-10-17 11:01:58,359 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-17 11:01:58,359 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-17 11:01:58,359 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-17 11:01:58,359 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-17 11:01:58,360 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-17 11:01:58,360 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-17 11:01:58,360 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-10-17 11:01:58,360 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-10-17 11:01:58,361 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-10-17 11:01:58,361 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-17 11:01:58,362 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-17 11:01:58,363 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-10-17 11:01:58,363 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-17 11:01:58,363 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-10-17 11:01:58,364 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-17 11:01:58,364 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-17 11:01:58,364 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-17 11:01:58,364 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-17 11:01:58,366 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-10-17 11:01:58,366 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0a05a45e59c4449e0f919ee265abbb6a4949f64a9be713d749d79d0baffd63df [2022-10-17 11:01:58,715 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-17 11:01:58,740 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-17 11:01:58,744 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-17 11:01:58,745 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-17 11:01:58,746 INFO L275 PluginConnector]: CDTParser initialized [2022-10-17 11:01:58,748 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c [2022-10-17 11:01:58,841 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/data/2cfdb4f64/0de9ea57a46547f692ee2647ed38ab79/FLAG236c17c9c [2022-10-17 11:01:59,400 INFO L306 CDTParser]: Found 1 translation units. [2022-10-17 11:01:59,401 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c [2022-10-17 11:01:59,420 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/data/2cfdb4f64/0de9ea57a46547f692ee2647ed38ab79/FLAG236c17c9c [2022-10-17 11:01:59,700 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/data/2cfdb4f64/0de9ea57a46547f692ee2647ed38ab79 [2022-10-17 11:01:59,703 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-17 11:01:59,706 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-10-17 11:01:59,711 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-17 11:01:59,712 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-17 11:01:59,715 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-17 11:01:59,716 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 11:01:59" (1/1) ... [2022-10-17 11:01:59,719 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a46dfa2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:01:59, skipping insertion in model container [2022-10-17 11:01:59,719 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 11:01:59" (1/1) ... [2022-10-17 11:01:59,729 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-17 11:01:59,797 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-17 11:02:00,117 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c[14577,14590] [2022-10-17 11:02:00,117 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 11:02:00,128 INFO L203 MainTranslator]: Completed pre-run [2022-10-17 11:02:00,198 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c[14577,14590] [2022-10-17 11:02:00,198 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 11:02:00,216 INFO L208 MainTranslator]: Completed translation [2022-10-17 11:02:00,217 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00 WrapperNode [2022-10-17 11:02:00,217 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-17 11:02:00,218 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-17 11:02:00,218 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-17 11:02:00,218 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-17 11:02:00,225 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,241 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,306 INFO L138 Inliner]: procedures = 32, calls = 47, calls flagged for inlining = 42, calls inlined = 60, statements flattened = 923 [2022-10-17 11:02:00,307 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-17 11:02:00,307 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-17 11:02:00,308 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-17 11:02:00,308 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-17 11:02:00,318 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,319 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,326 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,327 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,347 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,361 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,365 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,385 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,393 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-17 11:02:00,394 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-17 11:02:00,394 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-17 11:02:00,395 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-17 11:02:00,409 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (1/1) ... [2022-10-17 11:02:00,416 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 11:02:00,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:00,443 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 11:02:00,463 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_abd37f8b-1faa-4e40-9a0f-0f6cb46ed4fa/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-10-17 11:02:00,508 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-17 11:02:00,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-17 11:02:00,509 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-17 11:02:00,509 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-17 11:02:00,682 INFO L235 CfgBuilder]: Building ICFG [2022-10-17 11:02:00,684 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-17 11:02:01,852 INFO L276 CfgBuilder]: Performing block encoding [2022-10-17 11:02:01,873 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-17 11:02:01,873 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-10-17 11:02:01,878 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 11:02:01 BoogieIcfgContainer [2022-10-17 11:02:01,879 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-17 11:02:01,880 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-10-17 11:02:01,881 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-10-17 11:02:01,885 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-10-17 11:02:01,886 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:01,886 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.10 11:01:59" (1/3) ... [2022-10-17 11:02:01,888 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@249dce5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 11:02:01, skipping insertion in model container [2022-10-17 11:02:01,888 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:01,888 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:00" (2/3) ... [2022-10-17 11:02:01,889 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@249dce5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 11:02:01, skipping insertion in model container [2022-10-17 11:02:01,889 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:01,889 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 11:02:01" (3/3) ... [2022-10-17 11:02:01,893 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c [2022-10-17 11:02:01,999 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-10-17 11:02:01,999 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-10-17 11:02:01,999 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-10-17 11:02:01,999 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-10-17 11:02:01,999 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-10-17 11:02:02,000 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-10-17 11:02:02,000 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-10-17 11:02:02,000 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-10-17 11:02:02,012 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 273 states have (on average 1.6117216117216118) internal successors, (440), 273 states have internal predecessors, (440), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:02,055 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 253 [2022-10-17 11:02:02,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:02,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:02,067 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,068 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,068 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-10-17 11:02:02,069 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 273 states have (on average 1.6117216117216118) internal successors, (440), 273 states have internal predecessors, (440), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:02,086 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 253 [2022-10-17 11:02:02,087 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:02,087 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:02,091 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,091 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,100 INFO L748 eck$LassoCheckResult]: Stem: 269#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 176#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 68#L197true assume 0 != ~side1Failed_History_0~0 % 256;init_#res#1 := 0; 61#L233true main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 175#L58true assume !(0 == assume_abort_if_not_~cond#1); 135#L57true assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 112#L578-2true [2022-10-17 11:02:02,103 INFO L750 eck$LassoCheckResult]: Loop: 112#L578-2true assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 201#L170true assume { :end_inline_write_manual_selection_history } true; 167#L258true assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 211#L258-2true ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 204#L259true assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 259#L259-2true ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 138#L261true assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 148#L80true assume { :end_inline_write_side1_failed_history } true; 128#L277true assume 0 != ~side1Failed~0 % 256; 137#L278true assume ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~nomsg~0; 142#L278-2true ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 49#L279true assume ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~nomsg~0; 30#L279-2true ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 233#L280true assume ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~nomsg~0; 102#L280-2true ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 249#L314true assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 66#L110true assume { :end_inline_write_side2_failed_history } true; 45#L330true assume 0 != ~side2Failed~0 % 256; 149#L331true assume ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~nomsg~0; 114#L331-2true ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 166#L332true assume ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~nomsg~0; 83#L332-2true ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 197#L333true assume ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0;Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~nomsg~0; 207#L333-2true ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 198#L371true assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 27#L148true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 154#L158true Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 232#L390true assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 108#L404true assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 52#L140true assume { :end_inline_write_active_side_history } true; 271#L414true assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 56#L443true assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 57#L446-2true assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 152#L58-2true assume 0 == assume_abort_if_not_~cond#1;assume false; 16#L57-1true assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 26#L178true assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 18#L188true check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 182#L453true assume !(0 == check_~tmp___0~0#1); 170#L453-1true assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 13#L88-2true assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 222#L98-2true check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 239#L483true assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 53#L118-2true assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 275#L128-2true check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 92#L485true assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 244#L148-1true assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 231#L158-1true check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 155#L487true assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 121#L533true main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 235#L612-44true assume !(0 == assert_~arg#1 % 256); 65#L607-22true assume { :end_inline_assert } true; 112#L578-2true [2022-10-17 11:02:02,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:02,111 INFO L85 PathProgramCache]: Analyzing trace with hash 889563392, now seen corresponding path program 1 times [2022-10-17 11:02:02,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:02,122 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074383597] [2022-10-17 11:02:02,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:02,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:02,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:02,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:02,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:02,491 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074383597] [2022-10-17 11:02:02,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1074383597] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:02,492 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:02,493 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 11:02:02,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139352384] [2022-10-17 11:02:02,496 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:02,501 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 11:02:02,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:02,504 INFO L85 PathProgramCache]: Analyzing trace with hash 2084702382, now seen corresponding path program 1 times [2022-10-17 11:02:02,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:02,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503893661] [2022-10-17 11:02:02,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:02,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:02,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:02,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:02,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:02,634 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503893661] [2022-10-17 11:02:02,634 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503893661] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:02,634 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:02,634 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-17 11:02:02,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606714605] [2022-10-17 11:02:02,635 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:02,636 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:02,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:02,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-17 11:02:02,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-17 11:02:02,679 INFO L87 Difference]: Start difference. First operand has 274 states, 273 states have (on average 1.6117216117216118) internal successors, (440), 273 states have internal predecessors, (440), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:02,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:02,823 INFO L93 Difference]: Finished difference Result 272 states and 405 transitions. [2022-10-17 11:02:02,825 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 272 states and 405 transitions. [2022-10-17 11:02:02,840 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 230 [2022-10-17 11:02:02,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 272 states to 247 states and 369 transitions. [2022-10-17 11:02:02,856 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 247 [2022-10-17 11:02:02,861 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 247 [2022-10-17 11:02:02,862 INFO L73 IsDeterministic]: Start isDeterministic. Operand 247 states and 369 transitions. [2022-10-17 11:02:02,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:02,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 247 states and 369 transitions. [2022-10-17 11:02:02,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states and 369 transitions. [2022-10-17 11:02:02,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2022-10-17 11:02:02,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 247 states, 247 states have (on average 1.4939271255060729) internal successors, (369), 246 states have internal predecessors, (369), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:02,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 369 transitions. [2022-10-17 11:02:02,920 INFO L240 hiAutomatonCegarLoop]: Abstraction has 247 states and 369 transitions. [2022-10-17 11:02:02,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-17 11:02:02,931 INFO L428 stractBuchiCegarLoop]: Abstraction has 247 states and 369 transitions. [2022-10-17 11:02:02,934 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-10-17 11:02:02,934 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 247 states and 369 transitions. [2022-10-17 11:02:02,937 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 230 [2022-10-17 11:02:02,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:02,939 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:02,942 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,946 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:02,946 INFO L748 eck$LassoCheckResult]: Stem: 804#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 783#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 677#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 678#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 600#L203 assume !(-2 != ~active_side_History_0~0); 601#L206 assume !(0 != ~manual_selection_History_0~0); 617#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 796#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 756#L215 assume !(-2 != ~active_side_History_1~0); 757#L218 assume !(0 != ~manual_selection_History_1~0); 784#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 798#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 718#L227 assume !(-2 != ~active_side_History_2~0); 719#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 667#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 668#L58 assume !(0 == assume_abort_if_not_~cond#1); 758#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 674#L578-2 [2022-10-17 11:02:02,947 INFO L750 eck$LassoCheckResult]: Loop: 674#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 734#L170 assume { :end_inline_write_manual_selection_history } true; 778#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 779#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 794#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 795#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 762#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 763#L80 assume { :end_inline_write_side1_failed_history } true; 750#L277 assume 0 != ~side1Failed~0 % 256; 751#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 761#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 648#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 612#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 613#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 723#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 691#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 676#L110 assume { :end_inline_write_side2_failed_history } true; 641#L330 assume 0 != ~side2Failed~0 % 256; 642#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 737#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 738#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 702#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 703#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 790#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 689#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 605#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 606#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 770#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 697#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 651#L140 assume { :end_inline_write_active_side_history } true; 652#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 660#L443 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 661#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 663#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 586#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 587#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 590#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 591#L453 assume !(0 == check_~tmp___0~0#1); 560#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 581#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 582#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 799#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 653#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 595#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 714#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 715#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 574#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 771#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 593#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 744#L612-44 assume !(0 == assert_~arg#1 % 256); 673#L607-22 assume { :end_inline_assert } true; 674#L578-2 [2022-10-17 11:02:02,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:02,951 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 1 times [2022-10-17 11:02:02,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:02,952 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696465754] [2022-10-17 11:02:02,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:02,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:03,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,108 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:03,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:03,109 INFO L85 PathProgramCache]: Analyzing trace with hash -47045716, now seen corresponding path program 1 times [2022-10-17 11:02:03,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:03,109 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054242987] [2022-10-17 11:02:03,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:03,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:03,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:03,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:03,307 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054242987] [2022-10-17 11:02:03,307 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2054242987] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:03,307 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:03,307 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:03,308 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705947747] [2022-10-17 11:02:03,308 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:03,308 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:03,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:03,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:03,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:03,310 INFO L87 Difference]: Start difference. First operand 247 states and 369 transitions. cyclomatic complexity: 123 Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:03,374 INFO L93 Difference]: Finished difference Result 457 states and 690 transitions. [2022-10-17 11:02:03,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 457 states and 690 transitions. [2022-10-17 11:02:03,380 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 440 [2022-10-17 11:02:03,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 457 states to 457 states and 690 transitions. [2022-10-17 11:02:03,391 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 457 [2022-10-17 11:02:03,395 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 457 [2022-10-17 11:02:03,395 INFO L73 IsDeterministic]: Start isDeterministic. Operand 457 states and 690 transitions. [2022-10-17 11:02:03,402 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:03,402 INFO L218 hiAutomatonCegarLoop]: Abstraction has 457 states and 690 transitions. [2022-10-17 11:02:03,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 457 states and 690 transitions. [2022-10-17 11:02:03,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 457 to 288. [2022-10-17 11:02:03,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 288 states, 288 states have (on average 1.4930555555555556) internal successors, (430), 287 states have internal predecessors, (430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 430 transitions. [2022-10-17 11:02:03,439 INFO L240 hiAutomatonCegarLoop]: Abstraction has 288 states and 430 transitions. [2022-10-17 11:02:03,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:03,441 INFO L428 stractBuchiCegarLoop]: Abstraction has 288 states and 430 transitions. [2022-10-17 11:02:03,442 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-10-17 11:02:03,442 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 288 states and 430 transitions. [2022-10-17 11:02:03,444 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 271 [2022-10-17 11:02:03,445 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:03,445 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:03,449 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,449 INFO L748 eck$LassoCheckResult]: Stem: 1534#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 1508#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 1388#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 1389#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 1310#L203 assume !(-2 != ~active_side_History_0~0); 1311#L206 assume !(0 != ~manual_selection_History_0~0); 1328#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 1522#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 1474#L215 assume !(-2 != ~active_side_History_1~0); 1475#L218 assume !(0 != ~manual_selection_History_1~0); 1509#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 1524#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 1431#L227 assume !(-2 != ~active_side_History_2~0); 1432#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 1381#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1382#L58 assume !(0 == assume_abort_if_not_~cond#1); 1478#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 1384#L578-2 [2022-10-17 11:02:03,450 INFO L750 eck$LassoCheckResult]: Loop: 1384#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 1450#L170 assume { :end_inline_write_manual_selection_history } true; 1499#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 1500#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 1519#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 1520#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 1480#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 1481#L80 assume { :end_inline_write_side1_failed_history } true; 1468#L277 assume 0 != ~side1Failed~0 % 256; 1469#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 1479#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 1360#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 1322#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 1323#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 1436#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 1437#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 1387#L110 assume { :end_inline_write_side2_failed_history } true; 1352#L330 assume 0 != ~side2Failed~0 % 256; 1353#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 1454#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 1455#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 1413#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 1414#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 1515#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 1542#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1539#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1489#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 1490#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 1443#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 1444#L140 assume { :end_inline_write_active_side_history } true; 1536#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 1371#L443 assume !(0 == ~side1Failed~0 % 256); 1372#L446 assume 0 == ~side2Failed~0 % 256;check_~tmp~3#1 := 1; 1373#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1374#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 1296#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 1297#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 1300#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 1301#L453 assume !(0 == check_~tmp___0~0#1); 1270#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 1291#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 1292#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 1525#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 1364#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 1305#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 1426#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 1427#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 1284#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 1488#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 1303#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1460#L612-44 assume !(0 == assert_~arg#1 % 256); 1383#L607-22 assume { :end_inline_assert } true; 1384#L578-2 [2022-10-17 11:02:03,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:03,452 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 2 times [2022-10-17 11:02:03,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:03,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101694587] [2022-10-17 11:02:03,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:03,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,506 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:03,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,534 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:03,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:03,535 INFO L85 PathProgramCache]: Analyzing trace with hash -277062368, now seen corresponding path program 1 times [2022-10-17 11:02:03,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:03,536 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688980483] [2022-10-17 11:02:03,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:03,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:03,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:03,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:03,633 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688980483] [2022-10-17 11:02:03,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [688980483] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:03,633 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:03,633 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:03,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024648638] [2022-10-17 11:02:03,634 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:03,634 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:03,635 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:03,635 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:03,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:03,636 INFO L87 Difference]: Start difference. First operand 288 states and 430 transitions. cyclomatic complexity: 143 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:03,664 INFO L93 Difference]: Finished difference Result 513 states and 774 transitions. [2022-10-17 11:02:03,665 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 774 transitions. [2022-10-17 11:02:03,670 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 496 [2022-10-17 11:02:03,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 774 transitions. [2022-10-17 11:02:03,677 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 513 [2022-10-17 11:02:03,678 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 513 [2022-10-17 11:02:03,678 INFO L73 IsDeterministic]: Start isDeterministic. Operand 513 states and 774 transitions. [2022-10-17 11:02:03,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:03,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 513 states and 774 transitions. [2022-10-17 11:02:03,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states and 774 transitions. [2022-10-17 11:02:03,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 323. [2022-10-17 11:02:03,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 323 states have (on average 1.498452012383901) internal successors, (484), 322 states have internal predecessors, (484), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 484 transitions. [2022-10-17 11:02:03,698 INFO L240 hiAutomatonCegarLoop]: Abstraction has 323 states and 484 transitions. [2022-10-17 11:02:03,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:03,699 INFO L428 stractBuchiCegarLoop]: Abstraction has 323 states and 484 transitions. [2022-10-17 11:02:03,699 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-10-17 11:02:03,700 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 323 states and 484 transitions. [2022-10-17 11:02:03,702 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 306 [2022-10-17 11:02:03,703 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:03,703 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:03,704 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,705 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,705 INFO L748 eck$LassoCheckResult]: Stem: 2338#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 2308#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 2196#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 2197#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 2117#L203 assume !(-2 != ~active_side_History_0~0); 2118#L206 assume !(0 != ~manual_selection_History_0~0); 2134#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 2322#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 2276#L215 assume !(-2 != ~active_side_History_1~0); 2277#L218 assume !(0 != ~manual_selection_History_1~0); 2309#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 2324#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 2237#L227 assume !(-2 != ~active_side_History_2~0); 2238#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 2186#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2187#L58 assume !(0 == assume_abort_if_not_~cond#1); 2278#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 2193#L578-2 [2022-10-17 11:02:03,706 INFO L750 eck$LassoCheckResult]: Loop: 2193#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 2254#L170 assume { :end_inline_write_manual_selection_history } true; 2299#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 2300#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 2319#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 2320#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 2282#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 2283#L80 assume { :end_inline_write_side1_failed_history } true; 2270#L277 assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0; 2272#L290 assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1; 2225#L301 assume !(Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite11#1 := ~s1s1_new~0; 2226#L310-1 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite11#1; 2154#L311 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite12#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 2155#L311-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite12#1; 2239#L312 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite13#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 2209#L312-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite13#1;~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 2210#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 2334#L110 assume { :end_inline_write_side2_failed_history } true; 2379#L330 assume 0 != ~side2Failed~0 % 256; 2378#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 2377#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 2376#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 2375#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 2374#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 2373#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 2367#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2361#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2360#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 2353#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 2346#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 2344#L140 assume { :end_inline_write_active_side_history } true; 2342#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 2340#L443 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 2180#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2181#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 2103#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 2104#L178 assume 0 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_0~0; 2107#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 2108#L453 assume !(0 == check_~tmp___0~0#1); 2077#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 2098#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 2099#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 2325#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 2171#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 2112#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 2233#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 2234#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2091#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 2291#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 2110#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 2264#L612-44 assume !(0 == assert_~arg#1 % 256); 2192#L607-22 assume { :end_inline_assert } true; 2193#L578-2 [2022-10-17 11:02:03,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:03,707 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 3 times [2022-10-17 11:02:03,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:03,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069759620] [2022-10-17 11:02:03,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:03,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,727 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:03,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:03,751 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:03,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:03,752 INFO L85 PathProgramCache]: Analyzing trace with hash 872118534, now seen corresponding path program 1 times [2022-10-17 11:02:03,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:03,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116257410] [2022-10-17 11:02:03,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:03,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:03,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:03,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:03,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:03,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2116257410] [2022-10-17 11:02:03,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2116257410] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:03,918 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:03,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:03,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332033106] [2022-10-17 11:02:03,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:03,919 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:03,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:03,920 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:03,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:03,921 INFO L87 Difference]: Start difference. First operand 323 states and 484 transitions. cyclomatic complexity: 162 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:03,947 INFO L93 Difference]: Finished difference Result 471 states and 701 transitions. [2022-10-17 11:02:03,947 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 471 states and 701 transitions. [2022-10-17 11:02:03,968 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 454 [2022-10-17 11:02:03,974 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 471 states to 471 states and 701 transitions. [2022-10-17 11:02:03,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 471 [2022-10-17 11:02:03,975 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 471 [2022-10-17 11:02:03,976 INFO L73 IsDeterministic]: Start isDeterministic. Operand 471 states and 701 transitions. [2022-10-17 11:02:03,977 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:03,977 INFO L218 hiAutomatonCegarLoop]: Abstraction has 471 states and 701 transitions. [2022-10-17 11:02:03,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 471 states and 701 transitions. [2022-10-17 11:02:03,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 471 to 320. [2022-10-17 11:02:03,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 320 states have (on average 1.49375) internal successors, (478), 319 states have internal predecessors, (478), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:03,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 478 transitions. [2022-10-17 11:02:03,991 INFO L240 hiAutomatonCegarLoop]: Abstraction has 320 states and 478 transitions. [2022-10-17 11:02:03,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:03,993 INFO L428 stractBuchiCegarLoop]: Abstraction has 320 states and 478 transitions. [2022-10-17 11:02:03,993 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-10-17 11:02:03,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 320 states and 478 transitions. [2022-10-17 11:02:03,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 303 [2022-10-17 11:02:03,997 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:03,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:03,999 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,999 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:03,999 INFO L748 eck$LassoCheckResult]: Stem: 3124#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 3101#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 2994#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 2995#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 2917#L203 assume !(-2 != ~active_side_History_0~0); 2918#L206 assume !(0 != ~manual_selection_History_0~0); 2934#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 3115#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 3073#L215 assume !(-2 != ~active_side_History_1~0); 3074#L218 assume !(0 != ~manual_selection_History_1~0); 3102#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 3117#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 3033#L227 assume !(-2 != ~active_side_History_2~0); 3034#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 2984#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2985#L58 assume !(0 == assume_abort_if_not_~cond#1); 3075#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 2991#L578-2 [2022-10-17 11:02:04,000 INFO L750 eck$LassoCheckResult]: Loop: 2991#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3050#L170 assume { :end_inline_write_manual_selection_history } true; 3096#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 3097#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 3112#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 3113#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 3079#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 3080#L80 assume { :end_inline_write_side1_failed_history } true; 3068#L277 assume 0 != ~side1Failed~0 % 256; 3069#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 3078#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 2965#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 2929#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 2930#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 3038#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 3039#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 3173#L110 assume { :end_inline_write_side2_failed_history } true; 3171#L330 assume 0 != ~side2Failed~0 % 256; 3170#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 3169#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 3163#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 3161#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 3160#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 3159#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 3158#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3153#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3152#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 3145#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 3135#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 3132#L140 assume { :end_inline_write_active_side_history } true; 3129#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 3126#L443 assume !(0 == ~side1Failed~0 % 256); 3122#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 2979#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 2980#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 2903#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 2904#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 2921#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 2907#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 2908#L453 assume !(0 == check_~tmp___0~0#1); 2877#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 2898#L88-2 assume 0 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_0~0; 2899#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 3118#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 2970#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 2912#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 3029#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3030#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 2891#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 3088#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 2910#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 3060#L612-44 assume !(0 == assert_~arg#1 % 256); 2990#L607-22 assume { :end_inline_assert } true; 2991#L578-2 [2022-10-17 11:02:04,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,002 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 4 times [2022-10-17 11:02:04,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,002 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405610669] [2022-10-17 11:02:04,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,024 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:04,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,049 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:04,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,050 INFO L85 PathProgramCache]: Analyzing trace with hash 1839399947, now seen corresponding path program 1 times [2022-10-17 11:02:04,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,050 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218195680] [2022-10-17 11:02:04,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:04,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:04,204 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:04,204 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218195680] [2022-10-17 11:02:04,205 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1218195680] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:04,205 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:04,205 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:04,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419364858] [2022-10-17 11:02:04,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:04,206 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:04,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:04,207 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:04,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:04,208 INFO L87 Difference]: Start difference. First operand 320 states and 478 transitions. cyclomatic complexity: 159 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:04,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:04,294 INFO L93 Difference]: Finished difference Result 479 states and 706 transitions. [2022-10-17 11:02:04,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 479 states and 706 transitions. [2022-10-17 11:02:04,300 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 462 [2022-10-17 11:02:04,305 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 479 states to 479 states and 706 transitions. [2022-10-17 11:02:04,305 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 479 [2022-10-17 11:02:04,306 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 479 [2022-10-17 11:02:04,307 INFO L73 IsDeterministic]: Start isDeterministic. Operand 479 states and 706 transitions. [2022-10-17 11:02:04,308 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:04,308 INFO L218 hiAutomatonCegarLoop]: Abstraction has 479 states and 706 transitions. [2022-10-17 11:02:04,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states and 706 transitions. [2022-10-17 11:02:04,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 308. [2022-10-17 11:02:04,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 308 states have (on average 1.474025974025974) internal successors, (454), 307 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:04,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 454 transitions. [2022-10-17 11:02:04,319 INFO L240 hiAutomatonCegarLoop]: Abstraction has 308 states and 454 transitions. [2022-10-17 11:02:04,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:04,320 INFO L428 stractBuchiCegarLoop]: Abstraction has 308 states and 454 transitions. [2022-10-17 11:02:04,321 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-10-17 11:02:04,321 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 308 states and 454 transitions. [2022-10-17 11:02:04,323 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 291 [2022-10-17 11:02:04,324 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:04,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:04,325 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:04,325 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:04,326 INFO L748 eck$LassoCheckResult]: Stem: 3919#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 3896#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 3794#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 3795#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 3721#L203 assume !(-2 != ~active_side_History_0~0); 3722#L206 assume !(0 != ~manual_selection_History_0~0); 3738#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 3911#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 3866#L215 assume !(-2 != ~active_side_History_1~0); 3867#L218 assume !(0 != ~manual_selection_History_1~0); 3897#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 3913#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 3832#L227 assume !(-2 != ~active_side_History_2~0); 3833#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 3784#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3785#L58 assume !(0 == assume_abort_if_not_~cond#1); 3868#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 3791#L578-2 [2022-10-17 11:02:04,326 INFO L750 eck$LassoCheckResult]: Loop: 3791#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 3846#L170 assume { :end_inline_write_manual_selection_history } true; 3891#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 3892#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 3909#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 3910#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 3872#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 3873#L80 assume { :end_inline_write_side1_failed_history } true; 3861#L277 assume 0 != ~side1Failed~0 % 256; 3862#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 3871#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 3767#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 3733#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 3734#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 3837#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 3838#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 3976#L110 assume { :end_inline_write_side2_failed_history } true; 3975#L330 assume 0 != ~side2Failed~0 % 256; 3878#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 3849#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 3850#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 3815#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 3816#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 3903#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 3904#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3905#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3977#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 3917#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 3812#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 3770#L140 assume { :end_inline_write_active_side_history } true; 3771#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 3777#L443 assume !(0 == ~side1Failed~0 % 256); 3778#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 3779#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 3780#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 3707#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 3708#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 3725#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 3711#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 3712#L453 assume !(0 == check_~tmp___0~0#1); 3682#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 3703#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 3704#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 3789#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 3914#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 3772#L118-2 assume 0 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_0~0; 3716#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 3828#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 3829#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 3696#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 3882#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 3714#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 3855#L612-44 assume !(0 == assert_~arg#1 % 256); 3790#L607-22 assume { :end_inline_assert } true; 3791#L578-2 [2022-10-17 11:02:04,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,327 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 5 times [2022-10-17 11:02:04,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445774376] [2022-10-17 11:02:04,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,343 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:04,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,360 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:04,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,361 INFO L85 PathProgramCache]: Analyzing trace with hash -1391001106, now seen corresponding path program 1 times [2022-10-17 11:02:04,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599611004] [2022-10-17 11:02:04,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:04,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:04,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:04,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1599611004] [2022-10-17 11:02:04,529 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1599611004] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:04,530 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:04,530 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:04,531 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411363424] [2022-10-17 11:02:04,531 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:04,532 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:04,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:04,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:04,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:04,534 INFO L87 Difference]: Start difference. First operand 308 states and 454 transitions. cyclomatic complexity: 147 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:04,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:04,603 INFO L93 Difference]: Finished difference Result 497 states and 723 transitions. [2022-10-17 11:02:04,603 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 497 states and 723 transitions. [2022-10-17 11:02:04,609 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 480 [2022-10-17 11:02:04,614 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 497 states to 497 states and 723 transitions. [2022-10-17 11:02:04,615 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 497 [2022-10-17 11:02:04,616 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 497 [2022-10-17 11:02:04,616 INFO L73 IsDeterministic]: Start isDeterministic. Operand 497 states and 723 transitions. [2022-10-17 11:02:04,617 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:04,617 INFO L218 hiAutomatonCegarLoop]: Abstraction has 497 states and 723 transitions. [2022-10-17 11:02:04,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states and 723 transitions. [2022-10-17 11:02:04,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 296. [2022-10-17 11:02:04,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 296 states, 296 states have (on average 1.4527027027027026) internal successors, (430), 295 states have internal predecessors, (430), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:04,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 430 transitions. [2022-10-17 11:02:04,632 INFO L240 hiAutomatonCegarLoop]: Abstraction has 296 states and 430 transitions. [2022-10-17 11:02:04,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:04,634 INFO L428 stractBuchiCegarLoop]: Abstraction has 296 states and 430 transitions. [2022-10-17 11:02:04,634 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-10-17 11:02:04,635 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 296 states and 430 transitions. [2022-10-17 11:02:04,637 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 279 [2022-10-17 11:02:04,638 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:04,639 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:04,640 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:04,640 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:04,641 INFO L748 eck$LassoCheckResult]: Stem: 4718#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 4695#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 4597#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 4598#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 4526#L203 assume !(-2 != ~active_side_History_0~0); 4527#L206 assume !(0 != ~manual_selection_History_0~0); 4543#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 4710#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 4664#L215 assume !(-2 != ~active_side_History_1~0); 4665#L218 assume !(0 != ~manual_selection_History_1~0); 4696#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 4712#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 4631#L227 assume !(-2 != ~active_side_History_2~0); 4632#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 4590#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4591#L58 assume !(0 == assume_abort_if_not_~cond#1); 4668#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 4594#L578-2 [2022-10-17 11:02:04,641 INFO L750 eck$LassoCheckResult]: Loop: 4594#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 4644#L170 assume { :end_inline_write_manual_selection_history } true; 4690#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 4691#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 4707#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 4708#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 4670#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 4671#L80 assume { :end_inline_write_side1_failed_history } true; 4659#L277 assume 0 != ~side1Failed~0 % 256; 4660#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 4669#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 4573#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 4538#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 4539#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 4635#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 4636#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 4596#L110 assume { :end_inline_write_side2_failed_history } true; 4567#L330 assume 0 != ~side2Failed~0 % 256; 4568#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 4781#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 4780#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 4779#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 4778#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 4777#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 4776#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4771#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4770#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 4769#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 4763#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 4762#L140 assume { :end_inline_write_active_side_history } true; 4761#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 4582#L443 assume !(0 == ~side1Failed~0 % 256); 4583#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 4584#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 4585#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 4516#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 4517#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 4530#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 4518#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 4519#L453 assume !(0 == check_~tmp___0~0#1); 4493#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 4512#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 4513#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 4592#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 4713#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 4577#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 4578#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 4676#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 4627#L485 assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 4628#L148-1 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 4505#L158-1 check_#t~ret30#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret30#1;havoc check_#t~ret30#1; 4681#L487 assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0; 4521#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 4653#L612-44 assume !(0 == assert_~arg#1 % 256); 4593#L607-22 assume { :end_inline_assert } true; 4594#L578-2 [2022-10-17 11:02:04,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,642 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 6 times [2022-10-17 11:02:04,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,643 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383774977] [2022-10-17 11:02:04,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,664 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:04,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:04,704 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:04,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:04,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1930284282, now seen corresponding path program 1 times [2022-10-17 11:02:04,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:04,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259755724] [2022-10-17 11:02:04,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:04,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:04,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:04,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:04,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:04,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259755724] [2022-10-17 11:02:04,991 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259755724] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:04,991 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:04,991 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 11:02:04,992 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116229763] [2022-10-17 11:02:04,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:04,993 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:04,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:04,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-17 11:02:04,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-17 11:02:05,000 INFO L87 Difference]: Start difference. First operand 296 states and 430 transitions. cyclomatic complexity: 135 Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:05,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:05,112 INFO L93 Difference]: Finished difference Result 282 states and 399 transitions. [2022-10-17 11:02:05,113 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 282 states and 399 transitions. [2022-10-17 11:02:05,116 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 247 [2022-10-17 11:02:05,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 282 states to 264 states and 374 transitions. [2022-10-17 11:02:05,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 264 [2022-10-17 11:02:05,122 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 264 [2022-10-17 11:02:05,122 INFO L73 IsDeterministic]: Start isDeterministic. Operand 264 states and 374 transitions. [2022-10-17 11:02:05,123 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:05,123 INFO L218 hiAutomatonCegarLoop]: Abstraction has 264 states and 374 transitions. [2022-10-17 11:02:05,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states and 374 transitions. [2022-10-17 11:02:05,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 264. [2022-10-17 11:02:05,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 264 states, 264 states have (on average 1.4166666666666667) internal successors, (374), 263 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:05,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 374 transitions. [2022-10-17 11:02:05,131 INFO L240 hiAutomatonCegarLoop]: Abstraction has 264 states and 374 transitions. [2022-10-17 11:02:05,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 11:02:05,132 INFO L428 stractBuchiCegarLoop]: Abstraction has 264 states and 374 transitions. [2022-10-17 11:02:05,133 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-10-17 11:02:05,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 264 states and 374 transitions. [2022-10-17 11:02:05,135 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 247 [2022-10-17 11:02:05,135 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:05,135 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:05,137 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:05,137 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:05,137 INFO L748 eck$LassoCheckResult]: Stem: 5273#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 5255#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 5171#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 5172#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 5104#L203 assume !(-2 != ~active_side_History_0~0); 5105#L206 assume !(0 != ~manual_selection_History_0~0); 5121#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 5266#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 5230#L215 assume !(-2 != ~active_side_History_1~0); 5231#L218 assume !(0 != ~manual_selection_History_1~0); 5256#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 5268#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 5203#L227 assume !(-2 != ~active_side_History_2~0); 5204#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 5161#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5162#L58 assume !(0 == assume_abort_if_not_~cond#1); 5232#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 5168#L578-2 [2022-10-17 11:02:05,138 INFO L750 eck$LassoCheckResult]: Loop: 5168#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 5216#L170 assume { :end_inline_write_manual_selection_history } true; 5250#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 5251#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 5263#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 5264#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 5235#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 5236#L80 assume { :end_inline_write_side1_failed_history } true; 5226#L277 assume 0 != ~side1Failed~0 % 256; 5227#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 5234#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 5147#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 5116#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 5117#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 5207#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 5208#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 5169#L110 assume { :end_inline_write_side2_failed_history } true; 5142#L330 assume 0 != ~side2Failed~0 % 256; 5143#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 5219#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 5220#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 5187#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 5188#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 5259#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 5260#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5109#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 5110#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 5241#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 5184#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 5150#L140 assume { :end_inline_write_active_side_history } true; 5151#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 5156#L443 assume !(0 == ~side1Failed~0 % 256); 5157#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 5158#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 5159#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 5096#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 5097#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 5108#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 5098#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 5099#L453 assume !(0 == check_~tmp___0~0#1); 5080#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5092#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 5093#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5166#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 5269#L483 assume !(0 != check_~tmp___7~0#1 % 256); 5085#L483-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 5186#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 5225#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 5205#L98-3 check_#t~ret32#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret32#1;havoc check_#t~ret32#1; 5132#L499 assume !(0 == check_~tmp___11~0#1 % 256); 5113#L499-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 5131#L148-3 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 5155#L158-3 check_#t~ret36#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret36#1;havoc check_#t~ret36#1; 5129#L515 assume !(check_~tmp___20~0#1 > -2); 5100#L515-1 check_#res#1 := 1; 5101#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 5222#L612-44 assume !(0 == assert_~arg#1 % 256); 5167#L607-22 assume { :end_inline_assert } true; 5168#L578-2 [2022-10-17 11:02:05,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:05,139 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 7 times [2022-10-17 11:02:05,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:05,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605098836] [2022-10-17 11:02:05,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:05,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:05,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:05,153 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:05,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:05,169 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:05,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:05,170 INFO L85 PathProgramCache]: Analyzing trace with hash 926488691, now seen corresponding path program 1 times [2022-10-17 11:02:05,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:05,170 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871526440] [2022-10-17 11:02:05,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:05,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:05,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:05,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:05,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:05,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1871526440] [2022-10-17 11:02:05,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1871526440] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:05,416 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:05,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-10-17 11:02:05,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96697210] [2022-10-17 11:02:05,420 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:05,420 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:05,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:05,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-17 11:02:05,423 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-10-17 11:02:05,423 INFO L87 Difference]: Start difference. First operand 264 states and 374 transitions. cyclomatic complexity: 111 Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:05,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:05,711 INFO L93 Difference]: Finished difference Result 1099 states and 1555 transitions. [2022-10-17 11:02:05,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1099 states and 1555 transitions. [2022-10-17 11:02:05,723 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1082 [2022-10-17 11:02:05,735 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1099 states to 1099 states and 1555 transitions. [2022-10-17 11:02:05,735 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1099 [2022-10-17 11:02:05,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1099 [2022-10-17 11:02:05,737 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1099 states and 1555 transitions. [2022-10-17 11:02:05,739 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:05,739 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1099 states and 1555 transitions. [2022-10-17 11:02:05,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states and 1555 transitions. [2022-10-17 11:02:05,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 357. [2022-10-17 11:02:05,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 357 states have (on average 1.392156862745098) internal successors, (497), 356 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:05,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 497 transitions. [2022-10-17 11:02:05,757 INFO L240 hiAutomatonCegarLoop]: Abstraction has 357 states and 497 transitions. [2022-10-17 11:02:05,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-10-17 11:02:05,762 INFO L428 stractBuchiCegarLoop]: Abstraction has 357 states and 497 transitions. [2022-10-17 11:02:05,763 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-10-17 11:02:05,763 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 357 states and 497 transitions. [2022-10-17 11:02:05,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 340 [2022-10-17 11:02:05,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:05,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:05,768 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:05,768 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:05,769 INFO L748 eck$LassoCheckResult]: Stem: 6697#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 6660#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 6567#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 6568#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 6499#L203 assume !(-2 != ~active_side_History_0~0); 6500#L206 assume !(0 != ~manual_selection_History_0~0); 6516#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 6682#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 6632#L215 assume !(-2 != ~active_side_History_1~0); 6633#L218 assume !(0 != ~manual_selection_History_1~0); 6661#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 6684#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 6602#L227 assume !(-2 != ~active_side_History_2~0); 6603#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 6557#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6558#L58 assume !(0 == assume_abort_if_not_~cond#1); 6634#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 6564#L578-2 [2022-10-17 11:02:05,769 INFO L750 eck$LassoCheckResult]: Loop: 6564#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 6619#L170 assume { :end_inline_write_manual_selection_history } true; 6655#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 6656#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 6676#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 6677#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 6637#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 6638#L80 assume { :end_inline_write_side1_failed_history } true; 6628#L277 assume 0 != ~side1Failed~0 % 256; 6629#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 6636#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 6544#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 6511#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 6512#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 6606#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 6607#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 6565#L110 assume { :end_inline_write_side2_failed_history } true; 6538#L330 assume 0 != ~side2Failed~0 % 256; 6539#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 6796#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 6795#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 6794#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 6789#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 6786#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 6785#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6782#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 6781#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 6780#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 6774#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 6773#L140 assume { :end_inline_write_active_side_history } true; 6698#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 6552#L443 assume !(0 == ~side1Failed~0 % 256); 6553#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 6554#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 6555#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 6491#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 6492#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 6503#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 6599#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 6663#L453 assume !(0 == check_~tmp___0~0#1); 6475#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6487#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 6488#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6562#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 6686#L483 assume !(0 != check_~tmp___7~0#1 % 256); 6583#L483-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 6584#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 6626#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 6627#L98-3 check_#t~ret32#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret32#1;havoc check_#t~ret32#1; 6709#L499 assume !(0 == check_~tmp___11~0#1 % 256); 6526#L499-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 6527#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 6609#L151-3 assume 1 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_1~0; 6551#L158-3 check_#t~ret36#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret36#1;havoc check_#t~ret36#1; 6662#L515 assume !(check_~tmp___20~0#1 > -2); 6495#L515-1 check_#res#1 := 1; 6496#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 6623#L612-44 assume !(0 == assert_~arg#1 % 256); 6563#L607-22 assume { :end_inline_assert } true; 6564#L578-2 [2022-10-17 11:02:05,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:05,773 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 8 times [2022-10-17 11:02:05,773 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:05,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460772968] [2022-10-17 11:02:05,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:05,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:05,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:05,789 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:05,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:05,810 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:05,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:05,811 INFO L85 PathProgramCache]: Analyzing trace with hash 1627735184, now seen corresponding path program 1 times [2022-10-17 11:02:05,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:05,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644980383] [2022-10-17 11:02:05,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:05,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:05,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:05,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:05,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:05,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644980383] [2022-10-17 11:02:05,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644980383] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:05,962 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:05,962 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:05,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [982241310] [2022-10-17 11:02:05,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:05,963 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:05,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:05,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:05,964 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:05,964 INFO L87 Difference]: Start difference. First operand 357 states and 497 transitions. cyclomatic complexity: 141 Second operand has 3 states, 3 states have (on average 19.666666666666668) internal successors, (59), 3 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:06,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:06,030 INFO L93 Difference]: Finished difference Result 437 states and 607 transitions. [2022-10-17 11:02:06,030 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 437 states and 607 transitions. [2022-10-17 11:02:06,037 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 420 [2022-10-17 11:02:06,042 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 437 states to 437 states and 607 transitions. [2022-10-17 11:02:06,042 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 437 [2022-10-17 11:02:06,043 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 437 [2022-10-17 11:02:06,043 INFO L73 IsDeterministic]: Start isDeterministic. Operand 437 states and 607 transitions. [2022-10-17 11:02:06,044 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:06,044 INFO L218 hiAutomatonCegarLoop]: Abstraction has 437 states and 607 transitions. [2022-10-17 11:02:06,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states and 607 transitions. [2022-10-17 11:02:06,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 264. [2022-10-17 11:02:06,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 264 states, 264 states have (on average 1.4090909090909092) internal successors, (372), 263 states have internal predecessors, (372), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:06,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 372 transitions. [2022-10-17 11:02:06,053 INFO L240 hiAutomatonCegarLoop]: Abstraction has 264 states and 372 transitions. [2022-10-17 11:02:06,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:06,055 INFO L428 stractBuchiCegarLoop]: Abstraction has 264 states and 372 transitions. [2022-10-17 11:02:06,055 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-10-17 11:02:06,055 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 264 states and 372 transitions. [2022-10-17 11:02:06,057 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 247 [2022-10-17 11:02:06,058 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:06,058 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:06,059 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:06,059 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:06,059 INFO L748 eck$LassoCheckResult]: Stem: 7471#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 7451#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 7366#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 7367#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 7299#L203 assume !(-2 != ~active_side_History_0~0); 7300#L206 assume !(0 != ~manual_selection_History_0~0); 7316#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 7462#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 7425#L215 assume !(-2 != ~active_side_History_1~0); 7426#L218 assume !(0 != ~manual_selection_History_1~0); 7452#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 7464#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 7398#L227 assume !(-2 != ~active_side_History_2~0); 7399#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 7356#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7357#L58 assume !(0 == assume_abort_if_not_~cond#1); 7427#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 7362#L578-2 [2022-10-17 11:02:06,060 INFO L750 eck$LassoCheckResult]: Loop: 7362#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 7411#L170 assume { :end_inline_write_manual_selection_history } true; 7446#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 7447#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 7459#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 7460#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 7430#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 7431#L80 assume { :end_inline_write_side1_failed_history } true; 7421#L277 assume 0 != ~side1Failed~0 % 256; 7422#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 7429#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 7342#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 7311#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 7312#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 7402#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 7403#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 7365#L110 assume { :end_inline_write_side2_failed_history } true; 7337#L330 assume 0 != ~side2Failed~0 % 256; 7338#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 7414#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 7415#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 7445#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 7519#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 7518#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 7517#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7514#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 7513#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 7468#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 7379#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 7345#L140 assume { :end_inline_write_active_side_history } true; 7346#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 7351#L443 assume !(0 == ~side1Failed~0 % 256); 7352#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 7353#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 7354#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 7291#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 7292#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 7303#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 7293#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 7294#L453 assume !(0 == check_~tmp___0~0#1); 7275#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7287#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 7288#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7363#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 7465#L483 assume !(0 != check_~tmp___7~0#1 % 256); 7280#L483-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 7381#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 7420#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 7400#L98-3 check_#t~ret32#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret32#1;havoc check_#t~ret32#1; 7327#L499 assume !(0 == check_~tmp___11~0#1 % 256); 7308#L499-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 7326#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 7404#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 7349#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 7350#L158-3 check_#t~ret36#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret36#1;havoc check_#t~ret36#1; 7324#L515 assume !(check_~tmp___20~0#1 > -2); 7295#L515-1 check_#res#1 := 1; 7296#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 7417#L612-44 assume !(0 == assert_~arg#1 % 256); 7361#L607-22 assume { :end_inline_assert } true; 7362#L578-2 [2022-10-17 11:02:06,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:06,061 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 9 times [2022-10-17 11:02:06,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:06,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146880561] [2022-10-17 11:02:06,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:06,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:06,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:06,079 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:06,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:06,094 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:06,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:06,096 INFO L85 PathProgramCache]: Analyzing trace with hash 2034091096, now seen corresponding path program 1 times [2022-10-17 11:02:06,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:06,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226063560] [2022-10-17 11:02:06,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:06,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:06,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:06,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:06,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:06,383 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226063560] [2022-10-17 11:02:06,384 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [226063560] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:06,384 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:06,384 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-10-17 11:02:06,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [842043612] [2022-10-17 11:02:06,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:06,385 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:06,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:06,385 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-10-17 11:02:06,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-10-17 11:02:06,386 INFO L87 Difference]: Start difference. First operand 264 states and 372 transitions. cyclomatic complexity: 109 Second operand has 7 states, 7 states have (on average 8.571428571428571) internal successors, (60), 7 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:06,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:06,718 INFO L93 Difference]: Finished difference Result 716 states and 1016 transitions. [2022-10-17 11:02:06,718 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 716 states and 1016 transitions. [2022-10-17 11:02:06,724 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 692 [2022-10-17 11:02:06,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 716 states to 716 states and 1016 transitions. [2022-10-17 11:02:06,732 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 716 [2022-10-17 11:02:06,733 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 716 [2022-10-17 11:02:06,733 INFO L73 IsDeterministic]: Start isDeterministic. Operand 716 states and 1016 transitions. [2022-10-17 11:02:06,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:06,735 INFO L218 hiAutomatonCegarLoop]: Abstraction has 716 states and 1016 transitions. [2022-10-17 11:02:06,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states and 1016 transitions. [2022-10-17 11:02:06,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 269. [2022-10-17 11:02:06,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 269 states have (on average 1.4014869888475836) internal successors, (377), 268 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:06,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 377 transitions. [2022-10-17 11:02:06,747 INFO L240 hiAutomatonCegarLoop]: Abstraction has 269 states and 377 transitions. [2022-10-17 11:02:06,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-17 11:02:06,749 INFO L428 stractBuchiCegarLoop]: Abstraction has 269 states and 377 transitions. [2022-10-17 11:02:06,749 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-10-17 11:02:06,749 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 269 states and 377 transitions. [2022-10-17 11:02:06,751 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 252 [2022-10-17 11:02:06,751 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:06,752 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:06,753 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:06,753 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:06,753 INFO L748 eck$LassoCheckResult]: Stem: 8490#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 8467#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 8378#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 8379#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 8311#L203 assume !(-2 != ~active_side_History_0~0); 8312#L206 assume !(0 != ~manual_selection_History_0~0); 8328#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 8481#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 8441#L215 assume !(-2 != ~active_side_History_1~0); 8442#L218 assume !(0 != ~manual_selection_History_1~0); 8468#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 8483#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 8411#L227 assume !(-2 != ~active_side_History_2~0); 8412#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 8368#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8369#L58 assume !(0 == assume_abort_if_not_~cond#1); 8443#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 8375#L578-2 [2022-10-17 11:02:06,754 INFO L750 eck$LassoCheckResult]: Loop: 8375#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 8426#L170 assume { :end_inline_write_manual_selection_history } true; 8462#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 8463#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 8476#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 8477#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 8446#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 8447#L80 assume { :end_inline_write_side1_failed_history } true; 8437#L277 assume 0 != ~side1Failed~0 % 256; 8438#L278 assume !(~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite8#1 := ~s1s1_new~0; 8445#L278-2 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite8#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite8#1; 8354#L279 assume !(~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite9#1 := ~s1s2_new~0; 8323#L279-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite9#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite9#1; 8324#L280 assume !(~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite10#1 := ~s1p_new~0; 8416#L280-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite10#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite10#1;~side1_written~0 := ~nomsg~0; 8417#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 8376#L110 assume { :end_inline_write_side2_failed_history } true; 8349#L330 assume 0 != ~side2Failed~0 % 256; 8350#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 8550#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 8549#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 8542#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 8471#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 8472#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 8473#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 8316#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 8317#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 8453#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 8422#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 8356#L140 assume { :end_inline_write_active_side_history } true; 8357#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 8363#L443 assume !(0 == ~side1Failed~0 % 256); 8364#L446 assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0; 8365#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8366#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 8303#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 8304#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 8315#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 8305#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 8306#L453 assume !(0 == check_~tmp___0~0#1); 8287#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8299#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 8300#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 8373#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 8484#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 8359#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 8360#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 8450#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 8407#L485 assume !(0 == check_~tmp___8~0#1 % 256); 8292#L483-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8478#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 8479#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 8413#L98-3 check_#t~ret32#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret32#1;havoc check_#t~ret32#1; 8414#L499 assume !(0 == check_~tmp___11~0#1 % 256); 8320#L499-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 8338#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 8418#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 8361#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 8362#L158-3 check_#t~ret36#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret36#1;havoc check_#t~ret36#1; 8336#L515 assume !(check_~tmp___20~0#1 > -2); 8307#L515-1 check_#res#1 := 1; 8308#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 8432#L612-44 assume !(0 == assert_~arg#1 % 256); 8374#L607-22 assume { :end_inline_assert } true; 8375#L578-2 [2022-10-17 11:02:06,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:06,755 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 10 times [2022-10-17 11:02:06,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:06,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904900921] [2022-10-17 11:02:06,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:06,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:06,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:06,797 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:06,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:06,817 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:06,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:06,818 INFO L85 PathProgramCache]: Analyzing trace with hash -758076526, now seen corresponding path program 1 times [2022-10-17 11:02:06,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:06,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104887090] [2022-10-17 11:02:06,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:06,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:06,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:07,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:07,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:07,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104887090] [2022-10-17 11:02:07,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104887090] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:07,077 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:07,077 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 11:02:07,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169204288] [2022-10-17 11:02:07,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:07,078 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:07,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:07,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-17 11:02:07,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-17 11:02:07,079 INFO L87 Difference]: Start difference. First operand 269 states and 377 transitions. cyclomatic complexity: 109 Second operand has 4 states, 4 states have (on average 16.0) internal successors, (64), 4 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:07,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:07,103 INFO L93 Difference]: Finished difference Result 271 states and 378 transitions. [2022-10-17 11:02:07,104 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 271 states and 378 transitions. [2022-10-17 11:02:07,107 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 230 [2022-10-17 11:02:07,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 271 states to 247 states and 344 transitions. [2022-10-17 11:02:07,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 247 [2022-10-17 11:02:07,110 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 247 [2022-10-17 11:02:07,110 INFO L73 IsDeterministic]: Start isDeterministic. Operand 247 states and 344 transitions. [2022-10-17 11:02:07,111 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:07,111 INFO L218 hiAutomatonCegarLoop]: Abstraction has 247 states and 344 transitions. [2022-10-17 11:02:07,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states and 344 transitions. [2022-10-17 11:02:07,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2022-10-17 11:02:07,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 247 states, 247 states have (on average 1.3927125506072875) internal successors, (344), 246 states have internal predecessors, (344), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:07,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 344 transitions. [2022-10-17 11:02:07,118 INFO L240 hiAutomatonCegarLoop]: Abstraction has 247 states and 344 transitions. [2022-10-17 11:02:07,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-17 11:02:07,119 INFO L428 stractBuchiCegarLoop]: Abstraction has 247 states and 344 transitions. [2022-10-17 11:02:07,120 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-10-17 11:02:07,120 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 247 states and 344 transitions. [2022-10-17 11:02:07,122 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 230 [2022-10-17 11:02:07,122 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:07,122 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:07,123 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:07,123 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:07,124 INFO L748 eck$LassoCheckResult]: Stem: 9030#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0; 9011#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~nondet47#1, main_#t~nondet48#1, main_#t~nondet49#1, main_#t~nondet50#1, main_#t~nondet51#1, main_#t~nondet52#1, main_#t~nondet53#1, main_#t~nondet54#1, main_#t~nondet55#1, main_#t~nondet56#1, main_#t~nondet57#1, main_#t~nondet58#1, main_#t~nondet59#1, main_#t~ret60#1, main_#t~ret61#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~side1Failed~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;~side2Failed~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;~side1_written~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;~side2_written~0 := main_#t~nondet47#1;havoc main_#t~nondet47#1;~side1Failed_History_0~0 := main_#t~nondet48#1;havoc main_#t~nondet48#1;~side1Failed_History_1~0 := main_#t~nondet49#1;havoc main_#t~nondet49#1;~side1Failed_History_2~0 := main_#t~nondet50#1;havoc main_#t~nondet50#1;~side2Failed_History_0~0 := main_#t~nondet51#1;havoc main_#t~nondet51#1;~side2Failed_History_1~0 := main_#t~nondet52#1;havoc main_#t~nondet52#1;~side2Failed_History_2~0 := main_#t~nondet53#1;havoc main_#t~nondet53#1;~active_side_History_0~0 := main_#t~nondet54#1;havoc main_#t~nondet54#1;~active_side_History_1~0 := main_#t~nondet55#1;havoc main_#t~nondet55#1;~active_side_History_2~0 := main_#t~nondet56#1;havoc main_#t~nondet56#1;~manual_selection_History_0~0 := main_#t~nondet57#1;havoc main_#t~nondet57#1;~manual_selection_History_1~0 := main_#t~nondet58#1;havoc main_#t~nondet58#1;~manual_selection_History_2~0 := main_#t~nondet59#1;havoc main_#t~nondet59#1;assume { :begin_inline_init } true;havoc init_#res#1; 8925#L197 assume !(0 != ~side1Failed_History_0~0 % 256); 8926#L200 assume !(0 != ~side2Failed_History_0~0 % 256); 8860#L203 assume !(-2 != ~active_side_History_0~0); 8861#L206 assume !(0 != ~manual_selection_History_0~0); 8877#L209 assume !(0 != ~side1Failed_History_1~0 % 256); 9022#L212 assume !(0 != ~side2Failed_History_1~0 % 256); 8985#L215 assume !(-2 != ~active_side_History_1~0); 8986#L218 assume !(0 != ~manual_selection_History_1~0); 9012#L221 assume !(0 != ~side1Failed_History_2~0 % 256); 9024#L224 assume !(0 != ~side2Failed_History_2~0 % 256); 8958#L227 assume !(-2 != ~active_side_History_2~0); 8959#L230 assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1; 8918#L233 main_#t~ret60#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret60#1;havoc main_#t~ret60#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8919#L58 assume !(0 == assume_abort_if_not_~cond#1); 8988#L57 assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 8922#L578-2 [2022-10-17 11:02:07,124 INFO L750 eck$LassoCheckResult]: Loop: 8922#L578-2 assume !false;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_#t~ite5#1, Console_task_each_pals_period_#t~ite6#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1; 8973#L170 assume { :end_inline_write_manual_selection_history } true; 9006#L258 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite5#1 := Console_task_each_pals_period_~manual_selection~0#1; 9007#L258-2 ~cs1_new~0 := (if Console_task_each_pals_period_#t~ite5#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite5#1 % 256 else Console_task_each_pals_period_#t~ite5#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite5#1; 9018#L259 assume Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0;Console_task_each_pals_period_#t~ite6#1 := Console_task_each_pals_period_~manual_selection~0#1; 9019#L259-2 ~cs2_new~0 := (if Console_task_each_pals_period_#t~ite6#1 % 256 <= 127 then Console_task_each_pals_period_#t~ite6#1 % 256 else Console_task_each_pals_period_#t~ite6#1 % 256 - 256);havoc Console_task_each_pals_period_#t~ite6#1;Console_task_each_pals_period_~manual_selection~0#1 := 0; 8990#L261 assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1, Side1_activestandby_task_each_pals_period_#t~ite8#1, Side1_activestandby_task_each_pals_period_#t~ite9#1, Side1_activestandby_task_each_pals_period_#t~ite10#1, Side1_activestandby_task_each_pals_period_#t~ite11#1, Side1_activestandby_task_each_pals_period_#t~ite12#1, Side1_activestandby_task_each_pals_period_#t~ite13#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;~side1Failed~0 := Side1_activestandby_task_each_pals_period_#t~nondet7#1;havoc Side1_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := ~side1Failed~0;havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := ~side1Failed_History_1~0;~side1Failed_History_1~0 := ~side1Failed_History_0~0;~side1Failed_History_0~0 := write_side1_failed_history_~val#1; 8991#L80 assume { :end_inline_write_side1_failed_history } true; 8981#L277 assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0; 8983#L290 assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1; 8947#L301 assume !(Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0);Side1_activestandby_task_each_pals_period_#t~ite11#1 := ~s1s1_new~0; 8948#L310-1 ~s1s1_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite11#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite11#1; 8896#L311 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite12#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 8897#L311-2 ~s1s2_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite12#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite12#1; 8961#L312 assume Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0;Side1_activestandby_task_each_pals_period_#t~ite13#1 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 8933#L312-2 ~s1p_new~0 := (if Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 <= 127 then Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 else Side1_activestandby_task_each_pals_period_#t~ite13#1 % 256 - 256);havoc Side1_activestandby_task_each_pals_period_#t~ite13#1;~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1; 8934#L314 assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1, Side2_activestandby_task_each_pals_period_#t~ite15#1, Side2_activestandby_task_each_pals_period_#t~ite16#1, Side2_activestandby_task_each_pals_period_#t~ite17#1, Side2_activestandby_task_each_pals_period_#t~ret18#1, Side2_activestandby_task_each_pals_period_#t~ite19#1, Side2_activestandby_task_each_pals_period_#t~ite20#1, Side2_activestandby_task_each_pals_period_#t~ite21#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;~side2Failed~0 := Side2_activestandby_task_each_pals_period_#t~nondet14#1;havoc Side2_activestandby_task_each_pals_period_#t~nondet14#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := ~side2Failed~0;havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := ~side2Failed_History_1~0;~side2Failed_History_1~0 := ~side2Failed_History_0~0;~side2Failed_History_0~0 := write_side2_failed_history_~val#1; 9047#L110 assume { :end_inline_write_side2_failed_history } true; 9045#L330 assume 0 != ~side2Failed~0 % 256; 8995#L331 assume !(~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite15#1 := ~s2s1_new~0; 8974#L331-2 ~s2s1_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite15#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite15#1; 8975#L332 assume !(~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite16#1 := ~s2s2_new~0; 8942#L332-2 ~s2s2_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite16#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite16#1; 8943#L333 assume !(~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0);Side2_activestandby_task_each_pals_period_#t~ite17#1 := ~s2p_new~0; 9015#L333-2 ~s2p_new~0 := (if Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 <= 127 then Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 else Side2_activestandby_task_each_pals_period_#t~ite17#1 % 256 - 256);havoc Side2_activestandby_task_each_pals_period_#t~ite17#1;~side2_written~0 := ~nomsg~0; 9021#L371 assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 9042#L148 assume 0 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_0~0; 9041#L158 Pendulum_prism_task_each_pals_period_#t~ret22#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret22#1;havoc Pendulum_prism_task_each_pals_period_#t~ret22#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0; 9040#L390 assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1; 9034#L404 assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1; 9033#L140 assume { :end_inline_write_active_side_history } true; 9032#L414 assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_#t~ret31#1, check_#t~ret32#1, check_#t~ret33#1, check_#t~ret34#1, check_#t~ret35#1, check_#t~ret36#1, check_#t~ret37#1, check_#t~ret38#1, check_#t~ret39#1, check_#t~ret40#1, check_#t~ret41#1, check_#t~ret42#1, check_#t~ret43#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1; 8911#L443 assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1; 8912#L446-2 assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == check_~tmp~3#1 then 0 else 1) % 256;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8913#L58-2 assume !(0 == assume_abort_if_not_~cond#1); 8852#L57-1 assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1; 8853#L178 assume !(0 == read_manual_selection_history_~index#1 % 256); 8864#L181 assume 1 == read_manual_selection_history_~index#1 % 256;read_manual_selection_history_#res#1 := ~manual_selection_History_1~0; 8854#L188 check_#t~ret23#1 := read_manual_selection_history_#res#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1; 8855#L453 assume !(0 == check_~tmp___0~0#1); 8836#L453-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 8848#L88-2 assume !(0 == read_side1_failed_history_~index#1 % 256); 8849#L91-2 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 8920#L98-2 check_#t~ret28#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := check_#t~ret28#1;havoc check_#t~ret28#1; 9025#L483 assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1; 8907#L118-2 assume !(0 == read_side2_failed_history_~index#1 % 256); 8908#L121-2 assume 1 == read_side2_failed_history_~index#1 % 256;read_side2_failed_history_#res#1 := ~side2Failed_History_1~0; 8994#L128-2 check_#t~ret29#1 := read_side2_failed_history_#res#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := check_#t~ret29#1;havoc check_#t~ret29#1; 8954#L485 assume !(0 == check_~tmp___8~0#1 % 256); 8841#L483-1 assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1; 9080#L88-3 assume !(0 == read_side1_failed_history_~index#1 % 256); 9079#L91-3 assume 1 == read_side1_failed_history_~index#1 % 256;read_side1_failed_history_#res#1 := ~side1Failed_History_1~0; 9078#L98-3 check_#t~ret32#1 := read_side1_failed_history_#res#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := check_#t~ret32#1;havoc check_#t~ret32#1; 9077#L499 assume !(0 == check_~tmp___11~0#1 % 256); 8869#L499-1 assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1; 8887#L148-3 assume !(0 == read_active_side_history_~index#1 % 256); 8964#L151-3 assume !(1 == read_active_side_history_~index#1 % 256); 8909#L154-3 assume 2 == read_active_side_history_~index#1 % 256;read_active_side_history_#res#1 := ~active_side_History_2~0; 8910#L158-3 check_#t~ret36#1 := read_active_side_history_#res#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret36#1;havoc check_#t~ret36#1; 8885#L515 assume !(check_~tmp___20~0#1 > -2); 8856#L515-1 check_#res#1 := 1; 8857#L533 main_#t~ret61#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret61#1;havoc main_#t~ret61#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 8977#L612-44 assume !(0 == assert_~arg#1 % 256); 8921#L607-22 assume { :end_inline_assert } true; 8922#L578-2 [2022-10-17 11:02:07,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:07,125 INFO L85 PathProgramCache]: Analyzing trace with hash -613005151, now seen corresponding path program 11 times [2022-10-17 11:02:07,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:07,125 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695253530] [2022-10-17 11:02:07,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:07,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:07,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:07,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:07,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:07,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:07,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:07,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1540791994, now seen corresponding path program 1 times [2022-10-17 11:02:07,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:07,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [746862007] [2022-10-17 11:02:07,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:07,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:07,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:07,205 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:07,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:07,267 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:07,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:07,268 INFO L85 PathProgramCache]: Analyzing trace with hash -122165414, now seen corresponding path program 1 times [2022-10-17 11:02:07,268 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:07,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922903184] [2022-10-17 11:02:07,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:07,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:07,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:07,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:07,475 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:07,475 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922903184] [2022-10-17 11:02:07,476 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1922903184] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:07,476 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:07,476 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 11:02:07,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076051732] [2022-10-17 11:02:07,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:12,979 INFO L210 LassoAnalysis]: Preferences: [2022-10-17 11:02:12,980 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-10-17 11:02:12,981 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-10-17 11:02:12,981 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-10-17 11:02:12,981 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-10-17 11:02:12,981 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 11:02:12,982 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-10-17 11:02:12,982 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-10-17 11:02:12,982 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_STARTPALS_ActiveStandby.5.ufo.UNBOUNDED.pals.c_Iteration12_Loop [2022-10-17 11:02:12,982 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-10-17 11:02:12,982 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-10-17 11:02:13,027 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,045 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,048 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,050 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,054 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,057 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,059 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,066 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,069 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,072 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,074 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,077 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,079 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,083 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,086 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,089 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,091 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,093 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,095 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,098 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,100 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,102 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,698 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,710 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,711 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,713 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,727 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,730 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,732 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,734 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,735 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,739 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,742 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,744 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,745 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,756 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,758 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,760 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,762 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,767 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,770 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,772 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,774 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,779 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,781 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,782 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,784 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,789 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,791 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,815 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,816 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,818 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,821 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,824 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,826 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,828 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,832 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,835 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,836 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,838 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,839 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,841 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,844 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,845 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,864 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,866 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,868 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,870 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,872 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,873 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,875 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:13,879 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 11:02:15,540 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2022-10-17 11:02:16,058 WARN L176 XnfTransformerHelper]: Simplifying disjunction of 6480 conjuctions. This might take some time... [2022-10-17 11:02:28,196 INFO L192 XnfTransformerHelper]: Simplified to disjunction of 3888 conjuctions.