./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version dbf71c69 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-dbf71c6-m [2022-10-17 10:25:47,819 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-17 10:25:47,823 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-17 10:25:47,894 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-17 10:25:47,894 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-17 10:25:47,900 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-17 10:25:47,903 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-17 10:25:47,909 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-17 10:25:47,913 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-17 10:25:47,920 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-17 10:25:47,921 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-17 10:25:47,923 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-17 10:25:47,923 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-17 10:25:47,925 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-17 10:25:47,927 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-17 10:25:47,929 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-17 10:25:47,930 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-17 10:25:47,931 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-17 10:25:47,934 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-17 10:25:47,937 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-17 10:25:47,939 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-17 10:25:47,941 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-17 10:25:47,943 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-17 10:25:47,944 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-17 10:25:47,950 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-17 10:25:47,951 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-17 10:25:47,952 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-17 10:25:47,953 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-17 10:25:47,954 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-17 10:25:47,955 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-17 10:25:47,956 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-17 10:25:47,957 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-17 10:25:47,958 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-17 10:25:47,960 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-17 10:25:47,961 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-17 10:25:47,962 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-17 10:25:47,963 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-17 10:25:47,963 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-17 10:25:47,964 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-17 10:25:47,965 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-17 10:25:47,966 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-17 10:25:47,967 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-10-17 10:25:47,998 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-17 10:25:47,999 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-17 10:25:47,999 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-17 10:25:48,000 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-17 10:25:48,001 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-17 10:25:48,001 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-17 10:25:48,001 INFO L138 SettingsManager]: * Use SBE=true [2022-10-17 10:25:48,002 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-10-17 10:25:48,002 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-10-17 10:25:48,002 INFO L138 SettingsManager]: * Use old map elimination=false [2022-10-17 10:25:48,003 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-10-17 10:25:48,003 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-10-17 10:25:48,003 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-10-17 10:25:48,004 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-17 10:25:48,004 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-17 10:25:48,004 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-17 10:25:48,004 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-17 10:25:48,005 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-17 10:25:48,005 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-17 10:25:48,005 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-10-17 10:25:48,005 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-10-17 10:25:48,006 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-10-17 10:25:48,006 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-17 10:25:48,006 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-17 10:25:48,006 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-10-17 10:25:48,007 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-17 10:25:48,007 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-10-17 10:25:48,007 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-17 10:25:48,008 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-17 10:25:48,008 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-17 10:25:48,008 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-17 10:25:48,009 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-10-17 10:25:48,010 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 71881827e42af7e93d8d7789f21cf70c42c80b5b7128690239afcf02ba9daf37 [2022-10-17 10:25:48,365 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-17 10:25:48,412 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-17 10:25:48,415 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-17 10:25:48,416 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-17 10:25:48,417 INFO L275 PluginConnector]: CDTParser initialized [2022-10-17 10:25:48,419 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2022-10-17 10:25:48,525 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/data/4d76e6d6a/b7e7bf7c03ed4607ad35a9975c8b8669/FLAG5d5cc9ff1 [2022-10-17 10:25:49,220 INFO L306 CDTParser]: Found 1 translation units. [2022-10-17 10:25:49,222 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c [2022-10-17 10:25:49,234 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/data/4d76e6d6a/b7e7bf7c03ed4607ad35a9975c8b8669/FLAG5d5cc9ff1 [2022-10-17 10:25:49,491 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/data/4d76e6d6a/b7e7bf7c03ed4607ad35a9975c8b8669 [2022-10-17 10:25:49,494 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-17 10:25:49,496 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-10-17 10:25:49,498 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-17 10:25:49,498 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-17 10:25:49,503 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-17 10:25:49,504 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:25:49" (1/1) ... [2022-10-17 10:25:49,506 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c4ecf77 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:49, skipping insertion in model container [2022-10-17 10:25:49,507 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:25:49" (1/1) ... [2022-10-17 10:25:49,515 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-17 10:25:49,586 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-17 10:25:49,908 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c[15103,15116] [2022-10-17 10:25:49,909 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:25:49,923 INFO L203 MainTranslator]: Completed pre-run [2022-10-17 10:25:50,011 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.UNBOUNDED.pals.c[15103,15116] [2022-10-17 10:25:50,012 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:25:50,042 INFO L208 MainTranslator]: Completed translation [2022-10-17 10:25:50,045 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50 WrapperNode [2022-10-17 10:25:50,045 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-17 10:25:50,047 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-17 10:25:50,048 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-17 10:25:50,049 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-17 10:25:50,058 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,090 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,131 INFO L138 Inliner]: procedures = 26, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 370 [2022-10-17 10:25:50,131 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-17 10:25:50,132 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-17 10:25:50,132 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-17 10:25:50,133 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-17 10:25:50,144 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,144 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,149 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,149 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,171 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,203 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,206 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,209 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,213 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-17 10:25:50,214 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-17 10:25:50,215 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-17 10:25:50,215 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-17 10:25:50,219 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (1/1) ... [2022-10-17 10:25:50,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:25:50,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:25:50,253 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:25:50,270 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f86aac79-e27d-4b41-8d51-6a8f30b78e38/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-10-17 10:25:50,306 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-17 10:25:50,306 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-17 10:25:50,307 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-17 10:25:50,307 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-17 10:25:50,420 INFO L235 CfgBuilder]: Building ICFG [2022-10-17 10:25:50,423 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-17 10:25:51,102 INFO L276 CfgBuilder]: Performing block encoding [2022-10-17 10:25:51,114 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-17 10:25:51,114 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-10-17 10:25:51,117 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:25:51 BoogieIcfgContainer [2022-10-17 10:25:51,117 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-17 10:25:51,119 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-10-17 10:25:51,119 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-10-17 10:25:51,124 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-10-17 10:25:51,125 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:25:51,125 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.10 10:25:49" (1/3) ... [2022-10-17 10:25:51,126 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7d3f3ae9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:25:51, skipping insertion in model container [2022-10-17 10:25:51,127 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:25:51,127 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:25:50" (2/3) ... [2022-10-17 10:25:51,127 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7d3f3ae9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:25:51, skipping insertion in model container [2022-10-17 10:25:51,128 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:25:51,128 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:25:51" (3/3) ... [2022-10-17 10:25:51,129 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.UNBOUNDED.pals.c [2022-10-17 10:25:51,200 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-10-17 10:25:51,200 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-10-17 10:25:51,201 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-10-17 10:25:51,201 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-10-17 10:25:51,201 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-10-17 10:25:51,201 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-10-17 10:25:51,201 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-10-17 10:25:51,202 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-10-17 10:25:51,207 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 111 states, 110 states have (on average 1.7272727272727273) internal successors, (190), 110 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:51,239 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-10-17 10:25:51,239 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:25:51,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:25:51,250 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:51,250 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:51,250 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-10-17 10:25:51,251 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 111 states, 110 states have (on average 1.7272727272727273) internal successors, (190), 110 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:51,263 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-10-17 10:25:51,263 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:25:51,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:25:51,266 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:51,267 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:51,277 INFO L748 eck$LassoCheckResult]: Stem: 100#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 36#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~id1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~st1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~send1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~mode1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id2~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~id3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~st3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~send3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~mode3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~id4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~st4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~send4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~mode4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~id5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~st5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~send5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~mode5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 77#L231true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 40#L231-1true init_#res#1 := init_~tmp~0#1; 42#L392true main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 38#L22true assume !(0 == assume_abort_if_not_~cond#1); 88#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 32#L470-2true [2022-10-17 10:25:51,279 INFO L750 eck$LassoCheckResult]: Loop: 32#L470-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 19#L78true assume !(0 != ~mode1~0 % 256); 85#L95true assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 90#L95-2true ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 39#L78-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 106#L107true assume !(0 != ~mode2~0 % 256); 41#L120true assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 29#L120-2true ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 62#L107-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 107#L132true assume !(0 != ~mode3~0 % 256); 54#L145true assume ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0;node3_#t~ite6#1 := ~send3~0; 50#L145-2true ~p3_new~0 := (if node3_#t~ite6#1 % 256 <= 127 then node3_#t~ite6#1 % 256 else node3_#t~ite6#1 % 256 - 256);havoc node3_#t~ite6#1;~mode3~0 := 1; 80#L132-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 5#L157true assume !(0 != ~mode4~0 % 256); 65#L170true assume ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0;node4_#t~ite7#1 := ~send4~0; 44#L170-2true ~p4_new~0 := (if node4_#t~ite7#1 % 256 <= 127 then node4_#t~ite7#1 % 256 else node4_#t~ite7#1 % 256 - 256);havoc node4_#t~ite7#1;~mode4~0 := 1; 43#L157-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 91#L182true assume !(0 != ~mode5~0 % 256); 96#L195true assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 73#L195-2true ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 17#L182-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 72#L207true assume !(0 != ~mode6~0 % 256); 60#L220true assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 45#L220-2true ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 84#L207-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 74#L400true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 68#L400-1true check_#res#1 := check_~tmp~1#1; 35#L420true main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 37#L502true assume !(0 == assert_~arg#1 % 256); 102#L497true assume { :end_inline_assert } true; 32#L470-2true [2022-10-17 10:25:51,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:51,287 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-10-17 10:25:51,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:51,299 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21460653] [2022-10-17 10:25:51,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:51,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:51,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:25:51,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:25:51,734 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:25:51,736 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21460653] [2022-10-17 10:25:51,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21460653] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:25:51,738 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:25:51,739 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:25:51,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574250556] [2022-10-17 10:25:51,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:25:51,748 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:25:51,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:51,755 INFO L85 PathProgramCache]: Analyzing trace with hash 973861706, now seen corresponding path program 1 times [2022-10-17 10:25:51,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:51,757 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245481863] [2022-10-17 10:25:51,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:51,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:51,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:25:52,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:25:52,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:25:52,323 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245481863] [2022-10-17 10:25:52,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245481863] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:25:52,324 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:25:52,324 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:25:52,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822487239] [2022-10-17 10:25:52,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:25:52,326 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:25:52,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:25:52,377 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-17 10:25:52,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-17 10:25:52,383 INFO L87 Difference]: Start difference. First operand has 111 states, 110 states have (on average 1.7272727272727273) internal successors, (190), 110 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:52,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:25:52,594 INFO L93 Difference]: Finished difference Result 110 states and 185 transitions. [2022-10-17 10:25:52,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 185 transitions. [2022-10-17 10:25:52,613 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-10-17 10:25:52,628 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 106 states and 142 transitions. [2022-10-17 10:25:52,631 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 106 [2022-10-17 10:25:52,634 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 106 [2022-10-17 10:25:52,635 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 142 transitions. [2022-10-17 10:25:52,636 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:25:52,637 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 142 transitions. [2022-10-17 10:25:52,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 142 transitions. [2022-10-17 10:25:52,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-10-17 10:25:52,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 106 states have (on average 1.3396226415094339) internal successors, (142), 105 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:52,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 142 transitions. [2022-10-17 10:25:52,689 INFO L240 hiAutomatonCegarLoop]: Abstraction has 106 states and 142 transitions. [2022-10-17 10:25:52,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 10:25:52,707 INFO L428 stractBuchiCegarLoop]: Abstraction has 106 states and 142 transitions. [2022-10-17 10:25:52,708 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-10-17 10:25:52,708 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 106 states and 142 transitions. [2022-10-17 10:25:52,710 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-10-17 10:25:52,711 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:25:52,711 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:25:52,713 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:52,714 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:52,715 INFO L748 eck$LassoCheckResult]: Stem: 344#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 295#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~id1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~st1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~send1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~mode1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id2~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~id3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~st3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~send3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~mode3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~id4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~st4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~send4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~mode4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~id5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~st5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~send5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~mode5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 296#L231 assume 0 == ~r1~0 % 256; 335#L232 assume ~id1~0 >= 0; 324#L233 assume 0 == ~st1~0; 325#L234 assume ~send1~0 == ~id1~0; 331#L235 assume 0 == ~mode1~0 % 256; 315#L236 assume ~id2~0 >= 0; 316#L237 assume 0 == ~st2~0; 281#L238 assume ~send2~0 == ~id2~0; 282#L239 assume 0 == ~mode2~0 % 256; 279#L240 assume ~id3~0 >= 0; 280#L241 assume 0 == ~st3~0; 284#L242 assume ~send3~0 == ~id3~0; 334#L243 assume 0 == ~mode3~0 % 256; 247#L244 assume ~id4~0 >= 0; 248#L245 assume 0 == ~st4~0; 283#L246 assume ~send4~0 == ~id4~0; 319#L247 assume 0 == ~mode4~0 % 256; 343#L248 assume ~id5~0 >= 0; 242#L249 assume 0 == ~st5~0; 243#L250 assume ~send5~0 == ~id5~0; 337#L251 assume 0 == ~mode5~0 % 256; 307#L252 assume ~id6~0 >= 0; 308#L253 assume 0 == ~st6~0; 311#L254 assume ~send6~0 == ~id6~0; 266#L255 assume 0 == ~mode6~0 % 256; 267#L256 assume ~id1~0 != ~id2~0; 309#L257 assume ~id1~0 != ~id3~0; 287#L258 assume ~id1~0 != ~id4~0; 288#L259 assume ~id1~0 != ~id5~0; 326#L260 assume ~id1~0 != ~id6~0; 327#L261 assume ~id2~0 != ~id3~0; 312#L262 assume ~id2~0 != ~id4~0; 313#L263 assume ~id2~0 != ~id5~0; 317#L264 assume ~id2~0 != ~id6~0; 318#L265 assume ~id3~0 != ~id4~0; 257#L266 assume ~id3~0 != ~id5~0; 258#L267 assume ~id3~0 != ~id6~0; 272#L268 assume ~id4~0 != ~id5~0; 273#L269 assume ~id4~0 != ~id6~0; 252#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 253#L231-1 init_#res#1 := init_~tmp~0#1; 302#L392 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 298#L22 assume !(0 == assume_abort_if_not_~cond#1); 299#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 290#L470-2 [2022-10-17 10:25:52,716 INFO L750 eck$LassoCheckResult]: Loop: 290#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 276#L78 assume !(0 != ~mode1~0 % 256); 277#L95 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 338#L95-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 300#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 301#L107 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 329#L110 assume !(node2_~m2~0#1 != ~nomsg~0); 268#L110-1 ~mode2~0 := 0; 269#L107-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 328#L132 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 342#L135 assume !(node3_~m3~0#1 != ~nomsg~0); 262#L135-1 ~mode3~0 := 0; 263#L132-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 244#L157 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 245#L160 assume !(node4_~m4~0#1 != ~nomsg~0); 260#L160-1 ~mode4~0 := 0; 289#L157-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 304#L182 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 339#L185 assume !(node5_~m5~0#1 != ~nomsg~0); 321#L185-1 ~mode5~0 := 0; 274#L182-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 275#L207 assume !(0 != ~mode6~0 % 256); 323#L220 assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 306#L220-2 ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 285#L207-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 333#L400 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 330#L400-1 check_#res#1 := check_~tmp~1#1; 293#L420 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 294#L502 assume !(0 == assert_~arg#1 % 256); 297#L497 assume { :end_inline_assert } true; 290#L470-2 [2022-10-17 10:25:52,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:52,717 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-10-17 10:25:52,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:52,717 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037315556] [2022-10-17 10:25:52,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:52,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:52,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:52,755 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:25:52,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:52,867 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:25:52,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:52,868 INFO L85 PathProgramCache]: Analyzing trace with hash 620999538, now seen corresponding path program 1 times [2022-10-17 10:25:52,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:52,869 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225450033] [2022-10-17 10:25:52,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:52,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:52,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:25:53,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:25:53,099 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:25:53,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225450033] [2022-10-17 10:25:53,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225450033] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:25:53,101 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:25:53,102 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:25:53,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983475495] [2022-10-17 10:25:53,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:25:53,103 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:25:53,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:25:53,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-17 10:25:53,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-17 10:25:53,106 INFO L87 Difference]: Start difference. First operand 106 states and 142 transitions. cyclomatic complexity: 37 Second operand has 5 states, 5 states have (on average 6.0) internal successors, (30), 5 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:53,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:25:53,167 INFO L93 Difference]: Finished difference Result 109 states and 144 transitions. [2022-10-17 10:25:53,167 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 109 states and 144 transitions. [2022-10-17 10:25:53,169 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-10-17 10:25:53,171 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 109 states to 106 states and 139 transitions. [2022-10-17 10:25:53,175 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 106 [2022-10-17 10:25:53,177 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 106 [2022-10-17 10:25:53,177 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 139 transitions. [2022-10-17 10:25:53,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:25:53,180 INFO L218 hiAutomatonCegarLoop]: Abstraction has 106 states and 139 transitions. [2022-10-17 10:25:53,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 139 transitions. [2022-10-17 10:25:53,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-10-17 10:25:53,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 106 states have (on average 1.3113207547169812) internal successors, (139), 105 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:53,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 139 transitions. [2022-10-17 10:25:53,219 INFO L240 hiAutomatonCegarLoop]: Abstraction has 106 states and 139 transitions. [2022-10-17 10:25:53,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 10:25:53,220 INFO L428 stractBuchiCegarLoop]: Abstraction has 106 states and 139 transitions. [2022-10-17 10:25:53,221 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-10-17 10:25:53,221 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 106 states and 139 transitions. [2022-10-17 10:25:53,223 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-10-17 10:25:53,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:25:53,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:25:53,230 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:53,230 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:53,231 INFO L748 eck$LassoCheckResult]: Stem: 571#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 522#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~id1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~st1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~send1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~mode1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id2~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~id3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~st3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~send3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~mode3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~id4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~st4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~send4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~mode4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~id5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~st5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~send5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~mode5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 523#L231 assume 0 == ~r1~0 % 256; 562#L232 assume ~id1~0 >= 0; 551#L233 assume 0 == ~st1~0; 552#L234 assume ~send1~0 == ~id1~0; 558#L235 assume 0 == ~mode1~0 % 256; 542#L236 assume ~id2~0 >= 0; 543#L237 assume 0 == ~st2~0; 508#L238 assume ~send2~0 == ~id2~0; 509#L239 assume 0 == ~mode2~0 % 256; 506#L240 assume ~id3~0 >= 0; 507#L241 assume 0 == ~st3~0; 511#L242 assume ~send3~0 == ~id3~0; 561#L243 assume 0 == ~mode3~0 % 256; 474#L244 assume ~id4~0 >= 0; 475#L245 assume 0 == ~st4~0; 510#L246 assume ~send4~0 == ~id4~0; 546#L247 assume 0 == ~mode4~0 % 256; 570#L248 assume ~id5~0 >= 0; 469#L249 assume 0 == ~st5~0; 470#L250 assume ~send5~0 == ~id5~0; 564#L251 assume 0 == ~mode5~0 % 256; 534#L252 assume ~id6~0 >= 0; 535#L253 assume 0 == ~st6~0; 538#L254 assume ~send6~0 == ~id6~0; 493#L255 assume 0 == ~mode6~0 % 256; 494#L256 assume ~id1~0 != ~id2~0; 536#L257 assume ~id1~0 != ~id3~0; 514#L258 assume ~id1~0 != ~id4~0; 515#L259 assume ~id1~0 != ~id5~0; 553#L260 assume ~id1~0 != ~id6~0; 554#L261 assume ~id2~0 != ~id3~0; 539#L262 assume ~id2~0 != ~id4~0; 540#L263 assume ~id2~0 != ~id5~0; 544#L264 assume ~id2~0 != ~id6~0; 545#L265 assume ~id3~0 != ~id4~0; 484#L266 assume ~id3~0 != ~id5~0; 485#L267 assume ~id3~0 != ~id6~0; 499#L268 assume ~id4~0 != ~id5~0; 500#L269 assume ~id4~0 != ~id6~0; 479#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 480#L231-1 init_#res#1 := init_~tmp~0#1; 529#L392 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 525#L22 assume !(0 == assume_abort_if_not_~cond#1); 526#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 517#L470-2 [2022-10-17 10:25:53,231 INFO L750 eck$LassoCheckResult]: Loop: 517#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 503#L78 assume !(0 != ~mode1~0 % 256); 504#L95 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 565#L95-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 527#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 528#L107 assume !(0 != ~mode2~0 % 256); 530#L120 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 513#L120-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 496#L107-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 555#L132 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 569#L135 assume !(node3_~m3~0#1 != ~nomsg~0); 489#L135-1 ~mode3~0 := 0; 490#L132-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 471#L157 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 472#L160 assume !(node4_~m4~0#1 != ~nomsg~0); 487#L160-1 ~mode4~0 := 0; 516#L157-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 531#L182 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 566#L185 assume !(node5_~m5~0#1 != ~nomsg~0); 548#L185-1 ~mode5~0 := 0; 501#L182-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 502#L207 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 481#L210 assume !(node6_~m6~0#1 != ~nomsg~0); 482#L210-1 ~mode6~0 := 0; 512#L207-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 560#L400 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 476#L401 assume ~r1~0 % 256 >= 6; 477#L405 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 557#L400-1 check_#res#1 := check_~tmp~1#1; 520#L420 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 521#L502 assume !(0 == assert_~arg#1 % 256); 524#L497 assume { :end_inline_assert } true; 517#L470-2 [2022-10-17 10:25:53,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:53,234 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-10-17 10:25:53,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:53,235 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488318127] [2022-10-17 10:25:53,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:53,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:53,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,293 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:25:53,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:25:53,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:53,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1160925474, now seen corresponding path program 1 times [2022-10-17 10:25:53,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:53,352 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477437507] [2022-10-17 10:25:53,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:53,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:53,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:25:53,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:25:53,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:25:53,408 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477437507] [2022-10-17 10:25:53,408 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477437507] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:25:53,409 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:25:53,410 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 10:25:53,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051031869] [2022-10-17 10:25:53,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:25:53,411 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:25:53,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:25:53,416 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 10:25:53,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 10:25:53,417 INFO L87 Difference]: Start difference. First operand 106 states and 139 transitions. cyclomatic complexity: 34 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:53,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:25:53,487 INFO L93 Difference]: Finished difference Result 160 states and 221 transitions. [2022-10-17 10:25:53,487 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 160 states and 221 transitions. [2022-10-17 10:25:53,491 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2022-10-17 10:25:53,496 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 160 states to 160 states and 221 transitions. [2022-10-17 10:25:53,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 160 [2022-10-17 10:25:53,498 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 160 [2022-10-17 10:25:53,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 160 states and 221 transitions. [2022-10-17 10:25:53,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:25:53,503 INFO L218 hiAutomatonCegarLoop]: Abstraction has 160 states and 221 transitions. [2022-10-17 10:25:53,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states and 221 transitions. [2022-10-17 10:25:53,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 158. [2022-10-17 10:25:53,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 158 states have (on average 1.379746835443038) internal successors, (218), 157 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:25:53,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 218 transitions. [2022-10-17 10:25:53,513 INFO L240 hiAutomatonCegarLoop]: Abstraction has 158 states and 218 transitions. [2022-10-17 10:25:53,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 10:25:53,515 INFO L428 stractBuchiCegarLoop]: Abstraction has 158 states and 218 transitions. [2022-10-17 10:25:53,515 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-10-17 10:25:53,516 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 158 states and 218 transitions. [2022-10-17 10:25:53,517 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2022-10-17 10:25:53,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:25:53,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:25:53,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:53,520 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:25:53,520 INFO L748 eck$LassoCheckResult]: Stem: 850#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 795#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~id1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~st1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~send1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~mode1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~id2~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~st2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~send2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~mode2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~id3~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~st3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~send3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~mode3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~id4~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~st4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~send4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~mode4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~id5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~st5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~send5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~mode5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~mode6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 796#L231 assume 0 == ~r1~0 % 256; 837#L232 assume ~id1~0 >= 0; 825#L233 assume 0 == ~st1~0; 826#L234 assume ~send1~0 == ~id1~0; 832#L235 assume 0 == ~mode1~0 % 256; 815#L236 assume ~id2~0 >= 0; 816#L237 assume 0 == ~st2~0; 779#L238 assume ~send2~0 == ~id2~0; 780#L239 assume 0 == ~mode2~0 % 256; 777#L240 assume ~id3~0 >= 0; 778#L241 assume 0 == ~st3~0; 782#L242 assume ~send3~0 == ~id3~0; 836#L243 assume 0 == ~mode3~0 % 256; 746#L244 assume ~id4~0 >= 0; 747#L245 assume 0 == ~st4~0; 781#L246 assume ~send4~0 == ~id4~0; 819#L247 assume 0 == ~mode4~0 % 256; 847#L248 assume ~id5~0 >= 0; 741#L249 assume 0 == ~st5~0; 742#L250 assume ~send5~0 == ~id5~0; 839#L251 assume 0 == ~mode5~0 % 256; 807#L252 assume ~id6~0 >= 0; 808#L253 assume 0 == ~st6~0; 811#L254 assume ~send6~0 == ~id6~0; 764#L255 assume 0 == ~mode6~0 % 256; 765#L256 assume ~id1~0 != ~id2~0; 809#L257 assume ~id1~0 != ~id3~0; 786#L258 assume ~id1~0 != ~id4~0; 787#L259 assume ~id1~0 != ~id5~0; 827#L260 assume ~id1~0 != ~id6~0; 828#L261 assume ~id2~0 != ~id3~0; 812#L262 assume ~id2~0 != ~id4~0; 813#L263 assume ~id2~0 != ~id5~0; 817#L264 assume ~id2~0 != ~id6~0; 818#L265 assume ~id3~0 != ~id4~0; 755#L266 assume ~id3~0 != ~id5~0; 756#L267 assume ~id3~0 != ~id6~0; 770#L268 assume ~id4~0 != ~id5~0; 771#L269 assume ~id4~0 != ~id6~0; 750#L270 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 751#L231-1 init_#res#1 := init_~tmp~0#1; 802#L392 main_#t~ret35#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 798#L22 assume !(0 == assume_abort_if_not_~cond#1); 799#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 790#L470-2 [2022-10-17 10:25:53,520 INFO L750 eck$LassoCheckResult]: Loop: 790#L470-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 774#L78 assume !(0 != ~mode1~0 % 256); 775#L95 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 841#L95-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 800#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 801#L107 assume !(0 != ~mode2~0 % 256); 803#L120 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 785#L120-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 767#L107-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 829#L132 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 846#L135 assume !(node3_~m3~0#1 != ~nomsg~0); 760#L135-1 ~mode3~0 := 0; 761#L132-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 743#L157 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 744#L160 assume !(node4_~m4~0#1 != ~nomsg~0); 788#L160-1 ~mode4~0 := 0; 789#L157-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 804#L182 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 843#L185 assume !(node5_~m5~0#1 != ~nomsg~0); 821#L185-1 ~mode5~0 := 0; 834#L182-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 855#L207 assume !(0 != ~mode6~0 % 256); 854#L220 assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 806#L220-2 ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 784#L207-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 853#L400 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 852#L401 assume !(~r1~0 % 256 >= 6); 848#L404 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 849#L405 assume ~r1~0 % 256 < 6;check_~tmp~1#1 := 1; 831#L400-1 check_#res#1 := check_~tmp~1#1; 793#L420 main_#t~ret36#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 794#L502 assume !(0 == assert_~arg#1 % 256); 797#L497 assume { :end_inline_assert } true; 790#L470-2 [2022-10-17 10:25:53,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:53,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-10-17 10:25:53,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:53,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694354663] [2022-10-17 10:25:53,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:53,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:53,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,552 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:25:53,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,615 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:25:53,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:53,616 INFO L85 PathProgramCache]: Analyzing trace with hash 99831319, now seen corresponding path program 1 times [2022-10-17 10:25:53,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:53,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599755125] [2022-10-17 10:25:53,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:53,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:53,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,633 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:25:53,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:25:53,650 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:25:53,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:25:53,652 INFO L85 PathProgramCache]: Analyzing trace with hash -1491346635, now seen corresponding path program 1 times [2022-10-17 10:25:53,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:25:53,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002644712] [2022-10-17 10:25:53,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:25:53,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:25:53,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:25:53,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:25:53,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:25:53,759 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002644712] [2022-10-17 10:25:53,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1002644712] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:25:53,761 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:25:53,761 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 10:25:53,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622485866] [2022-10-17 10:25:53,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:25:55,745 INFO L210 LassoAnalysis]: Preferences: [2022-10-17 10:25:55,746 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-10-17 10:25:55,746 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-10-17 10:25:55,746 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-10-17 10:25:55,746 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-10-17 10:25:55,746 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:25:55,747 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-10-17 10:25:55,747 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-10-17 10:25:55,747 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-10-17 10:25:55,747 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-10-17 10:25:55,747 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-10-17 10:25:55,774 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:55,791 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:55,799 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:55,803 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,113 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,117 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,120 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,126 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,135 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,141 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,144 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,147 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,150 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,157 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,160 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,171 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,175 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:56,180 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:25:57,341 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 9