./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version dbf71c69 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-dbf71c6-m [2022-10-17 10:31:53,035 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-17 10:31:53,037 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-17 10:31:53,076 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-17 10:31:53,077 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-17 10:31:53,078 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-17 10:31:53,081 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-17 10:31:53,084 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-17 10:31:53,087 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-17 10:31:53,089 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-17 10:31:53,090 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-17 10:31:53,092 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-17 10:31:53,093 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-17 10:31:53,095 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-17 10:31:53,097 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-17 10:31:53,099 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-17 10:31:53,100 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-17 10:31:53,101 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-17 10:31:53,104 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-17 10:31:53,107 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-17 10:31:53,109 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-17 10:31:53,111 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-17 10:31:53,113 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-17 10:31:53,115 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-17 10:31:53,121 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-17 10:31:53,122 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-17 10:31:53,122 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-17 10:31:53,124 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-17 10:31:53,124 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-17 10:31:53,126 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-17 10:31:53,126 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-17 10:31:53,128 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-17 10:31:53,129 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-17 10:31:53,130 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-17 10:31:53,132 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-17 10:31:53,132 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-17 10:31:53,133 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-17 10:31:53,134 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-17 10:31:53,134 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-17 10:31:53,136 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-17 10:31:53,137 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-17 10:31:53,138 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-10-17 10:31:53,169 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-17 10:31:53,170 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-17 10:31:53,171 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-17 10:31:53,171 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-17 10:31:53,173 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-17 10:31:53,173 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-17 10:31:53,174 INFO L138 SettingsManager]: * Use SBE=true [2022-10-17 10:31:53,174 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-10-17 10:31:53,175 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-10-17 10:31:53,175 INFO L138 SettingsManager]: * Use old map elimination=false [2022-10-17 10:31:53,175 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-10-17 10:31:53,176 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-10-17 10:31:53,176 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-10-17 10:31:53,176 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-17 10:31:53,177 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-17 10:31:53,177 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-17 10:31:53,177 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-17 10:31:53,178 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-17 10:31:53,178 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-17 10:31:53,179 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-10-17 10:31:53,179 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-10-17 10:31:53,179 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-10-17 10:31:53,180 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-17 10:31:53,180 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-17 10:31:53,180 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-10-17 10:31:53,181 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-17 10:31:53,181 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-10-17 10:31:53,199 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-17 10:31:53,200 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-17 10:31:53,200 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-17 10:31:53,201 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-17 10:31:53,202 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-10-17 10:31:53,202 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 [2022-10-17 10:31:53,474 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-17 10:31:53,504 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-17 10:31:53,507 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-17 10:31:53,509 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-17 10:31:53,510 INFO L275 PluginConnector]: CDTParser initialized [2022-10-17 10:31:53,511 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-10-17 10:31:53,592 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/data/ac37c9467/23e57279ccc446e783ada523fb81effb/FLAGa2248fe76 [2022-10-17 10:31:54,214 INFO L306 CDTParser]: Found 1 translation units. [2022-10-17 10:31:54,215 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-10-17 10:31:54,227 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/data/ac37c9467/23e57279ccc446e783ada523fb81effb/FLAGa2248fe76 [2022-10-17 10:31:54,506 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/data/ac37c9467/23e57279ccc446e783ada523fb81effb [2022-10-17 10:31:54,509 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-17 10:31:54,512 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-10-17 10:31:54,516 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-17 10:31:54,517 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-17 10:31:54,521 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-17 10:31:54,522 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:31:54" (1/1) ... [2022-10-17 10:31:54,524 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59b82a6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:54, skipping insertion in model container [2022-10-17 10:31:54,526 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 10:31:54" (1/1) ... [2022-10-17 10:31:54,536 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-17 10:31:54,605 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-17 10:31:54,949 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-10-17 10:31:54,950 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:31:54,965 INFO L203 MainTranslator]: Completed pre-run [2022-10-17 10:31:55,052 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-10-17 10:31:55,053 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 10:31:55,071 INFO L208 MainTranslator]: Completed translation [2022-10-17 10:31:55,072 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55 WrapperNode [2022-10-17 10:31:55,072 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-17 10:31:55,074 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-17 10:31:55,074 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-17 10:31:55,074 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-17 10:31:55,083 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,097 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,173 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 428 [2022-10-17 10:31:55,173 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-17 10:31:55,174 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-17 10:31:55,174 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-17 10:31:55,174 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-17 10:31:55,185 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,185 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,191 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,191 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,203 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,212 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,216 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,219 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,224 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-17 10:31:55,225 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-17 10:31:55,225 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-17 10:31:55,226 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-17 10:31:55,227 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (1/1) ... [2022-10-17 10:31:55,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:31:55,278 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 10:31:55,321 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 10:31:55,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4350d408-4d72-4d83-97d4-dddab5f2d96b/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-10-17 10:31:55,392 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-17 10:31:55,393 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-17 10:31:55,393 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-17 10:31:55,394 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-17 10:31:55,511 INFO L235 CfgBuilder]: Building ICFG [2022-10-17 10:31:55,513 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-17 10:31:56,305 INFO L276 CfgBuilder]: Performing block encoding [2022-10-17 10:31:56,316 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-17 10:31:56,317 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-10-17 10:31:56,319 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:31:56 BoogieIcfgContainer [2022-10-17 10:31:56,320 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-17 10:31:56,321 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-10-17 10:31:56,321 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-10-17 10:31:56,326 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-10-17 10:31:56,327 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:31:56,327 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.10 10:31:54" (1/3) ... [2022-10-17 10:31:56,328 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26844f27 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:31:56, skipping insertion in model container [2022-10-17 10:31:56,329 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:31:56,329 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 10:31:55" (2/3) ... [2022-10-17 10:31:56,329 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26844f27 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 10:31:56, skipping insertion in model container [2022-10-17 10:31:56,330 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 10:31:56,330 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 10:31:56" (3/3) ... [2022-10-17 10:31:56,332 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-10-17 10:31:56,398 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-10-17 10:31:56,399 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-10-17 10:31:56,399 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-10-17 10:31:56,399 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-10-17 10:31:56,399 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-10-17 10:31:56,400 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-10-17 10:31:56,400 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-10-17 10:31:56,400 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-10-17 10:31:56,406 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 129 states, 128 states have (on average 1.7421875) internal successors, (223), 128 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:56,439 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2022-10-17 10:31:56,439 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:31:56,440 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:31:56,450 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:56,450 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:56,450 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-10-17 10:31:56,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 129 states, 128 states have (on average 1.7421875) internal successors, (223), 128 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:56,463 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2022-10-17 10:31:56,463 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:31:56,463 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:31:56,466 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:56,466 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:56,476 INFO L748 eck$LassoCheckResult]: Stem: 114#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~ret40#1, main_#t~ret41#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~id1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~st1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~send1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~mode1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~id2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~st2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~send2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~mode2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~id4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~st4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~send4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~mode4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~id5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~st5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~send5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~mode5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~id6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~st6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~send6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~mode6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~id7~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~st7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~send7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~mode7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 120#L263true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 127#L263-1true init_#res#1 := init_~tmp~0#1; 104#L464true main_#t~ret40#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret40#1;havoc main_#t~ret40#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 40#L22true assume !(0 == assume_abort_if_not_~cond#1); 97#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 11#L548-2true [2022-10-17 10:31:56,478 INFO L750 eck$LassoCheckResult]: Loop: 11#L548-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 34#L85true assume !(0 != ~mode1~0 % 256); 44#L102true assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 43#L102-2true ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 6#L85-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 53#L114true assume !(0 != ~mode2~0 % 256); 116#L127true assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 59#L127-2true ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 38#L114-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 26#L139true assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 101#L142true assume !(node3_~m3~0#1 != ~nomsg~0); 71#L142-1true ~mode3~0 := 0; 16#L139-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 81#L164true assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 17#L167true assume !(node4_~m4~0#1 != ~nomsg~0); 110#L167-1true ~mode4~0 := 0; 57#L164-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 85#L189true assume !(0 != ~mode5~0 % 256); 82#L202true assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 103#L202-2true ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 49#L189-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 119#L214true assume !(0 != ~mode6~0 % 256); 96#L227true assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 36#L227-2true ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 13#L214-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 24#L239true assume !(0 != ~mode7~0 % 256); 51#L252true assume ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0;node7_#t~ite10#1 := ~send7~0; 126#L252-2true ~p7_new~0 := (if node7_#t~ite10#1 % 256 <= 127 then node7_#t~ite10#1 % 256 else node7_#t~ite10#1 % 256 - 256);havoc node7_#t~ite10#1;~mode7~0 := 1; 47#L239-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 32#L472true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 98#L472-1true check_#res#1 := check_~tmp~1#1; 112#L492true main_#t~ret41#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret41#1;havoc main_#t~ret41#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 93#L583true assume !(0 == assert_~arg#1 % 256); 46#L578true assume { :end_inline_assert } true; 11#L548-2true [2022-10-17 10:31:56,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:56,485 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-10-17 10:31:56,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:56,497 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770871248] [2022-10-17 10:31:56,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:56,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:56,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:31:56,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:31:56,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:31:56,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770871248] [2022-10-17 10:31:56,895 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [770871248] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:31:56,895 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:31:56,896 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:31:56,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510724254] [2022-10-17 10:31:56,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:31:56,905 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-10-17 10:31:56,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:56,912 INFO L85 PathProgramCache]: Analyzing trace with hash 400549401, now seen corresponding path program 1 times [2022-10-17 10:31:56,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:56,913 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762392270] [2022-10-17 10:31:56,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:56,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:57,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:31:57,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:31:57,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:31:57,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762392270] [2022-10-17 10:31:57,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [762392270] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:31:57,432 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:31:57,432 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:31:57,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691390427] [2022-10-17 10:31:57,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:31:57,434 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:31:57,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:31:57,467 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-17 10:31:57,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-17 10:31:57,470 INFO L87 Difference]: Start difference. First operand has 129 states, 128 states have (on average 1.7421875) internal successors, (223), 128 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:57,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:31:57,649 INFO L93 Difference]: Finished difference Result 128 states and 218 transitions. [2022-10-17 10:31:57,651 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 128 states and 218 transitions. [2022-10-17 10:31:57,657 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2022-10-17 10:31:57,664 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 128 states to 124 states and 165 transitions. [2022-10-17 10:31:57,671 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2022-10-17 10:31:57,673 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2022-10-17 10:31:57,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 165 transitions. [2022-10-17 10:31:57,677 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:31:57,678 INFO L218 hiAutomatonCegarLoop]: Abstraction has 124 states and 165 transitions. [2022-10-17 10:31:57,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 165 transitions. [2022-10-17 10:31:57,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2022-10-17 10:31:57,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 124 states have (on average 1.3306451612903225) internal successors, (165), 123 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:57,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 165 transitions. [2022-10-17 10:31:57,719 INFO L240 hiAutomatonCegarLoop]: Abstraction has 124 states and 165 transitions. [2022-10-17 10:31:57,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 10:31:57,724 INFO L428 stractBuchiCegarLoop]: Abstraction has 124 states and 165 transitions. [2022-10-17 10:31:57,732 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-10-17 10:31:57,732 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 124 states and 165 transitions. [2022-10-17 10:31:57,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2022-10-17 10:31:57,736 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:31:57,736 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:31:57,739 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:57,740 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:57,741 INFO L748 eck$LassoCheckResult]: Stem: 396#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 335#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~ret40#1, main_#t~ret41#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~id1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~st1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~send1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~mode1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~id2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~st2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~send2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~mode2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~id4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~st4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~send4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~mode4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~id5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~st5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~send5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~mode5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~id6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~st6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~send6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~mode6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~id7~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~st7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~send7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~mode7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 336#L263 assume 0 == ~r1~0 % 256; 364#L264 assume ~id1~0 >= 0; 365#L265 assume 0 == ~st1~0; 299#L266 assume ~send1~0 == ~id1~0; 300#L267 assume 0 == ~mode1~0 % 256; 305#L268 assume ~id2~0 >= 0; 306#L269 assume 0 == ~st2~0; 291#L270 assume ~send2~0 == ~id2~0; 292#L271 assume 0 == ~mode2~0 % 256; 324#L272 assume ~id3~0 >= 0; 342#L273 assume 0 == ~st3~0; 362#L274 assume ~send3~0 == ~id3~0; 386#L275 assume 0 == ~mode3~0 % 256; 277#L276 assume ~id4~0 >= 0; 278#L277 assume 0 == ~st4~0; 397#L278 assume ~send4~0 == ~id4~0; 355#L279 assume 0 == ~mode4~0 % 256; 356#L280 assume ~id5~0 >= 0; 301#L281 assume 0 == ~st5~0; 279#L282 assume ~send5~0 == ~id5~0; 280#L283 assume 0 == ~mode5~0 % 256; 366#L284 assume ~id6~0 >= 0; 367#L285 assume 0 == ~st6~0; 381#L286 assume ~send6~0 == ~id6~0; 371#L287 assume 0 == ~mode6~0 % 256; 315#L288 assume ~id7~0 >= 0; 316#L289 assume 0 == ~st7~0; 328#L290 assume ~send7~0 == ~id7~0; 377#L291 assume 0 == ~mode7~0 % 256; 378#L292 assume ~id1~0 != ~id2~0; 387#L293 assume ~id1~0 != ~id3~0; 395#L294 assume ~id1~0 != ~id4~0; 286#L295 assume ~id1~0 != ~id5~0; 287#L296 assume ~id1~0 != ~id6~0; 325#L297 assume ~id1~0 != ~id7~0; 321#L298 assume ~id2~0 != ~id3~0; 322#L299 assume ~id2~0 != ~id4~0; 333#L300 assume ~id2~0 != ~id5~0; 372#L301 assume ~id2~0 != ~id6~0; 379#L302 assume ~id2~0 != ~id7~0; 380#L303 assume ~id3~0 != ~id4~0; 391#L304 assume ~id3~0 != ~id5~0; 368#L305 assume ~id3~0 != ~id6~0; 369#L306 assume ~id3~0 != ~id7~0; 375#L307 assume ~id4~0 != ~id5~0; 295#L308 assume ~id4~0 != ~id6~0; 296#L309 assume ~id4~0 != ~id7~0; 373#L310 assume ~id5~0 != ~id6~0; 349#L311 assume ~id5~0 != ~id7~0; 350#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 398#L263-1 init_#res#1 := init_~tmp~0#1; 393#L464 main_#t~ret40#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret40#1;havoc main_#t~ret40#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 340#L22 assume !(0 == assume_abort_if_not_~cond#1); 341#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 293#L548-2 [2022-10-17 10:31:57,741 INFO L750 eck$LassoCheckResult]: Loop: 293#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 294#L85 assume !(0 != ~mode1~0 % 256); 332#L102 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 343#L102-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 281#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 282#L114 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 288#L117 assume !(node2_~m2~0#1 != ~nomsg~0); 289#L117-1 ~mode2~0 := 0; 337#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 318#L139 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 320#L142 assume !(node3_~m3~0#1 != ~nomsg~0); 374#L142-1 ~mode3~0 := 0; 302#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 303#L164 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 304#L167 assume !(node4_~m4~0#1 != ~nomsg~0); 284#L167-1 ~mode4~0 := 0; 360#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 361#L189 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 385#L192 assume !(node5_~m5~0#1 != ~nomsg~0); 358#L192-1 ~mode5~0 := 0; 347#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 348#L214 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 307#L217 assume !(node6_~m6~0#1 != ~nomsg~0); 308#L217-1 ~mode6~0 := 0; 297#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 298#L239 assume 0 != ~mode7~0 % 256;node7_~m7~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 313#L242 assume !(node7_~m7~0#1 != ~nomsg~0); 346#L242-1 ~mode7~0 := 0; 345#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 326#L472 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 311#L472-1 check_#res#1 := check_~tmp~1#1; 390#L492 main_#t~ret41#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret41#1;havoc main_#t~ret41#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 388#L583 assume !(0 == assert_~arg#1 % 256); 344#L578 assume { :end_inline_assert } true; 293#L548-2 [2022-10-17 10:31:57,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:57,742 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-10-17 10:31:57,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:57,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178672353] [2022-10-17 10:31:57,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:57,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:57,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:57,786 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:31:57,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:57,898 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:31:57,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:57,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1180487745, now seen corresponding path program 1 times [2022-10-17 10:31:57,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:57,901 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840205603] [2022-10-17 10:31:57,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:57,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:57,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:31:58,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:31:58,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:31:58,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840205603] [2022-10-17 10:31:58,105 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840205603] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:31:58,106 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:31:58,106 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-17 10:31:58,106 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039135656] [2022-10-17 10:31:58,106 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:31:58,107 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:31:58,107 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:31:58,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-17 10:31:58,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-17 10:31:58,108 INFO L87 Difference]: Start difference. First operand 124 states and 165 transitions. cyclomatic complexity: 42 Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:58,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:31:58,166 INFO L93 Difference]: Finished difference Result 127 states and 167 transitions. [2022-10-17 10:31:58,166 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 167 transitions. [2022-10-17 10:31:58,176 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2022-10-17 10:31:58,181 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 124 states and 162 transitions. [2022-10-17 10:31:58,181 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2022-10-17 10:31:58,182 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2022-10-17 10:31:58,182 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 162 transitions. [2022-10-17 10:31:58,184 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:31:58,185 INFO L218 hiAutomatonCegarLoop]: Abstraction has 124 states and 162 transitions. [2022-10-17 10:31:58,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 162 transitions. [2022-10-17 10:31:58,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2022-10-17 10:31:58,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 124 states have (on average 1.3064516129032258) internal successors, (162), 123 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:58,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 162 transitions. [2022-10-17 10:31:58,201 INFO L240 hiAutomatonCegarLoop]: Abstraction has 124 states and 162 transitions. [2022-10-17 10:31:58,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-17 10:31:58,203 INFO L428 stractBuchiCegarLoop]: Abstraction has 124 states and 162 transitions. [2022-10-17 10:31:58,203 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-10-17 10:31:58,203 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 124 states and 162 transitions. [2022-10-17 10:31:58,206 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 68 [2022-10-17 10:31:58,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:31:58,206 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:31:58,214 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:58,214 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:58,214 INFO L748 eck$LassoCheckResult]: Stem: 659#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 598#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~ret40#1, main_#t~ret41#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~id1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~st1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~send1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~mode1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~id2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~st2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~send2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~mode2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~id4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~st4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~send4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~mode4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~id5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~st5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~send5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~mode5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~id6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~st6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~send6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~mode6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~id7~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~st7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~send7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~mode7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 599#L263 assume 0 == ~r1~0 % 256; 627#L264 assume ~id1~0 >= 0; 628#L265 assume 0 == ~st1~0; 562#L266 assume ~send1~0 == ~id1~0; 563#L267 assume 0 == ~mode1~0 % 256; 568#L268 assume ~id2~0 >= 0; 569#L269 assume 0 == ~st2~0; 554#L270 assume ~send2~0 == ~id2~0; 555#L271 assume 0 == ~mode2~0 % 256; 587#L272 assume ~id3~0 >= 0; 605#L273 assume 0 == ~st3~0; 625#L274 assume ~send3~0 == ~id3~0; 649#L275 assume 0 == ~mode3~0 % 256; 540#L276 assume ~id4~0 >= 0; 541#L277 assume 0 == ~st4~0; 660#L278 assume ~send4~0 == ~id4~0; 618#L279 assume 0 == ~mode4~0 % 256; 619#L280 assume ~id5~0 >= 0; 564#L281 assume 0 == ~st5~0; 542#L282 assume ~send5~0 == ~id5~0; 543#L283 assume 0 == ~mode5~0 % 256; 629#L284 assume ~id6~0 >= 0; 630#L285 assume 0 == ~st6~0; 644#L286 assume ~send6~0 == ~id6~0; 634#L287 assume 0 == ~mode6~0 % 256; 578#L288 assume ~id7~0 >= 0; 579#L289 assume 0 == ~st7~0; 591#L290 assume ~send7~0 == ~id7~0; 640#L291 assume 0 == ~mode7~0 % 256; 641#L292 assume ~id1~0 != ~id2~0; 650#L293 assume ~id1~0 != ~id3~0; 658#L294 assume ~id1~0 != ~id4~0; 549#L295 assume ~id1~0 != ~id5~0; 550#L296 assume ~id1~0 != ~id6~0; 588#L297 assume ~id1~0 != ~id7~0; 584#L298 assume ~id2~0 != ~id3~0; 585#L299 assume ~id2~0 != ~id4~0; 596#L300 assume ~id2~0 != ~id5~0; 635#L301 assume ~id2~0 != ~id6~0; 642#L302 assume ~id2~0 != ~id7~0; 643#L303 assume ~id3~0 != ~id4~0; 654#L304 assume ~id3~0 != ~id5~0; 631#L305 assume ~id3~0 != ~id6~0; 632#L306 assume ~id3~0 != ~id7~0; 638#L307 assume ~id4~0 != ~id5~0; 558#L308 assume ~id4~0 != ~id6~0; 559#L309 assume ~id4~0 != ~id7~0; 636#L310 assume ~id5~0 != ~id6~0; 612#L311 assume ~id5~0 != ~id7~0; 613#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 661#L263-1 init_#res#1 := init_~tmp~0#1; 656#L464 main_#t~ret40#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret40#1;havoc main_#t~ret40#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 603#L22 assume !(0 == assume_abort_if_not_~cond#1); 604#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 556#L548-2 [2022-10-17 10:31:58,215 INFO L750 eck$LassoCheckResult]: Loop: 556#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 557#L85 assume !(0 != ~mode1~0 % 256); 595#L102 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 606#L102-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 544#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 545#L114 assume !(0 != ~mode2~0 % 256); 615#L127 assume ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0;node2_#t~ite5#1 := ~send2~0; 626#L127-2 ~p2_new~0 := (if node2_#t~ite5#1 % 256 <= 127 then node2_#t~ite5#1 % 256 else node2_#t~ite5#1 % 256 - 256);havoc node2_#t~ite5#1;~mode2~0 := 1; 600#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 581#L139 assume !(0 != ~mode3~0 % 256); 582#L152 assume ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0;node3_#t~ite6#1 := ~send3~0; 586#L152-2 ~p3_new~0 := (if node3_#t~ite6#1 % 256 <= 127 then node3_#t~ite6#1 % 256 else node3_#t~ite6#1 % 256 - 256);havoc node3_#t~ite6#1;~mode3~0 := 1; 565#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 566#L164 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 567#L167 assume !(node4_~m4~0#1 != ~nomsg~0); 547#L167-1 ~mode4~0 := 0; 623#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 624#L189 assume !(0 != ~mode5~0 % 256); 645#L202 assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 646#L202-2 ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 610#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 611#L214 assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 570#L217 assume !(node6_~m6~0#1 != ~nomsg~0); 571#L217-1 ~mode6~0 := 0; 560#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 561#L239 assume 0 != ~mode7~0 % 256;node7_~m7~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 576#L242 assume !(node7_~m7~0#1 != ~nomsg~0); 609#L242-1 ~mode7~0 := 0; 608#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 589#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 590#L473 assume ~r1~0 % 256 >= 7; 580#L477 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 574#L472-1 check_#res#1 := check_~tmp~1#1; 653#L492 main_#t~ret41#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret41#1;havoc main_#t~ret41#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 651#L583 assume !(0 == assert_~arg#1 % 256); 607#L578 assume { :end_inline_assert } true; 556#L548-2 [2022-10-17 10:31:58,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:58,216 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-10-17 10:31:58,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:58,217 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392791868] [2022-10-17 10:31:58,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:58,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:58,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,263 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:31:58,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,348 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:31:58,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:58,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1560049331, now seen corresponding path program 1 times [2022-10-17 10:31:58,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:58,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174240729] [2022-10-17 10:31:58,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:58,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:58,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:31:58,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:31:58,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:31:58,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174240729] [2022-10-17 10:31:58,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [174240729] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:31:58,402 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:31:58,402 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 10:31:58,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063002211] [2022-10-17 10:31:58,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:31:58,403 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 10:31:58,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 10:31:58,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 10:31:58,406 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 10:31:58,407 INFO L87 Difference]: Start difference. First operand 124 states and 162 transitions. cyclomatic complexity: 39 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:58,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 10:31:58,448 INFO L93 Difference]: Finished difference Result 186 states and 257 transitions. [2022-10-17 10:31:58,448 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 257 transitions. [2022-10-17 10:31:58,453 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 130 [2022-10-17 10:31:58,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 257 transitions. [2022-10-17 10:31:58,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2022-10-17 10:31:58,458 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2022-10-17 10:31:58,458 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 257 transitions. [2022-10-17 10:31:58,464 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 10:31:58,464 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 257 transitions. [2022-10-17 10:31:58,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 257 transitions. [2022-10-17 10:31:58,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 184. [2022-10-17 10:31:58,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 184 states have (on average 1.3804347826086956) internal successors, (254), 183 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 10:31:58,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 254 transitions. [2022-10-17 10:31:58,479 INFO L240 hiAutomatonCegarLoop]: Abstraction has 184 states and 254 transitions. [2022-10-17 10:31:58,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 10:31:58,480 INFO L428 stractBuchiCegarLoop]: Abstraction has 184 states and 254 transitions. [2022-10-17 10:31:58,480 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-10-17 10:31:58,480 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 184 states and 254 transitions. [2022-10-17 10:31:58,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 128 [2022-10-17 10:31:58,482 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 10:31:58,482 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 10:31:58,483 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:58,483 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 10:31:58,484 INFO L748 eck$LassoCheckResult]: Stem: 978#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 915#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~ret40#1, main_#t~ret41#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~id1~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~st1~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~send1~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~mode1~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~id2~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~st2~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~send2~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~mode2~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~id3~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~st3~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~send3~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~mode3~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~id4~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~st4~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~send4~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~mode4~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~id5~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~st5~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~send5~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~mode5~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~id6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~st6~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~send6~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~mode6~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~id7~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;~st7~0 := main_#t~nondet37#1;havoc main_#t~nondet37#1;~send7~0 := main_#t~nondet38#1;havoc main_#t~nondet38#1;~mode7~0 := main_#t~nondet39#1;havoc main_#t~nondet39#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 916#L263 assume 0 == ~r1~0 % 256; 944#L264 assume ~id1~0 >= 0; 945#L265 assume 0 == ~st1~0; 878#L266 assume ~send1~0 == ~id1~0; 879#L267 assume 0 == ~mode1~0 % 256; 887#L268 assume ~id2~0 >= 0; 888#L269 assume 0 == ~st2~0; 870#L270 assume ~send2~0 == ~id2~0; 871#L271 assume 0 == ~mode2~0 % 256; 903#L272 assume ~id3~0 >= 0; 922#L273 assume 0 == ~st3~0; 942#L274 assume ~send3~0 == ~id3~0; 966#L275 assume 0 == ~mode3~0 % 256; 856#L276 assume ~id4~0 >= 0; 857#L277 assume 0 == ~st4~0; 979#L278 assume ~send4~0 == ~id4~0; 935#L279 assume 0 == ~mode4~0 % 256; 936#L280 assume ~id5~0 >= 0; 880#L281 assume 0 == ~st5~0; 858#L282 assume ~send5~0 == ~id5~0; 859#L283 assume 0 == ~mode5~0 % 256; 946#L284 assume ~id6~0 >= 0; 947#L285 assume 0 == ~st6~0; 961#L286 assume ~send6~0 == ~id6~0; 951#L287 assume 0 == ~mode6~0 % 256; 894#L288 assume ~id7~0 >= 0; 895#L289 assume 0 == ~st7~0; 907#L290 assume ~send7~0 == ~id7~0; 957#L291 assume 0 == ~mode7~0 % 256; 958#L292 assume ~id1~0 != ~id2~0; 967#L293 assume ~id1~0 != ~id3~0; 977#L294 assume ~id1~0 != ~id4~0; 865#L295 assume ~id1~0 != ~id5~0; 866#L296 assume ~id1~0 != ~id6~0; 904#L297 assume ~id1~0 != ~id7~0; 900#L298 assume ~id2~0 != ~id3~0; 901#L299 assume ~id2~0 != ~id4~0; 912#L300 assume ~id2~0 != ~id5~0; 952#L301 assume ~id2~0 != ~id6~0; 959#L302 assume ~id2~0 != ~id7~0; 960#L303 assume ~id3~0 != ~id4~0; 972#L304 assume ~id3~0 != ~id5~0; 948#L305 assume ~id3~0 != ~id6~0; 949#L306 assume ~id3~0 != ~id7~0; 955#L307 assume ~id4~0 != ~id5~0; 874#L308 assume ~id4~0 != ~id6~0; 875#L309 assume ~id4~0 != ~id7~0; 953#L310 assume ~id5~0 != ~id6~0; 929#L311 assume ~id5~0 != ~id7~0; 930#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 980#L263-1 init_#res#1 := init_~tmp~0#1; 975#L464 main_#t~ret40#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret40#1;havoc main_#t~ret40#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 920#L22 assume !(0 == assume_abort_if_not_~cond#1); 921#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 970#L548-2 [2022-10-17 10:31:58,484 INFO L750 eck$LassoCheckResult]: Loop: 970#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_#t~ite4#1, node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1033#L85 assume !(0 != ~mode1~0 % 256); 1032#L102 assume ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0;node1_#t~ite4#1 := ~send1~0; 1031#L102-2 ~p1_new~0 := (if node1_#t~ite4#1 % 256 <= 127 then node1_#t~ite4#1 % 256 else node1_#t~ite4#1 % 256 - 256);havoc node1_#t~ite4#1;~mode1~0 := 1; 974#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_#t~ite5#1, node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 1030#L114 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 1028#L117 assume !(node2_~m2~0#1 != ~nomsg~0); 1025#L117-1 ~mode2~0 := 0; 1023#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_#t~ite6#1, node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 1022#L139 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 1020#L142 assume !(node3_~m3~0#1 != ~nomsg~0); 1017#L142-1 ~mode3~0 := 0; 1015#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_#t~ite7#1, node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 1014#L164 assume !(0 != ~mode4~0 % 256); 1010#L177 assume ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0;node4_#t~ite7#1 := ~send4~0; 1009#L177-2 ~p4_new~0 := (if node4_#t~ite7#1 % 256 <= 127 then node4_#t~ite7#1 % 256 else node4_#t~ite7#1 % 256 - 256);havoc node4_#t~ite7#1;~mode4~0 := 1; 1007#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_#t~ite8#1, node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1006#L189 assume !(0 != ~mode5~0 % 256); 1002#L202 assume ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0;node5_#t~ite8#1 := ~send5~0; 1001#L202-2 ~p5_new~0 := (if node5_#t~ite8#1 % 256 <= 127 then node5_#t~ite8#1 % 256 else node5_#t~ite8#1 % 256 - 256);havoc node5_#t~ite8#1;~mode5~0 := 1; 999#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_#t~ite9#1, node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 998#L214 assume !(0 != ~mode6~0 % 256); 994#L227 assume ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0;node6_#t~ite9#1 := ~send6~0; 993#L227-2 ~p6_new~0 := (if node6_#t~ite9#1 % 256 <= 127 then node6_#t~ite9#1 % 256 else node6_#t~ite9#1 % 256 - 256);havoc node6_#t~ite9#1;~mode6~0 := 1; 991#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_#t~ite10#1, node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 990#L239 assume !(0 != ~mode7~0 % 256); 986#L252 assume ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0;node7_#t~ite10#1 := ~send7~0; 985#L252-2 ~p7_new~0 := (if node7_#t~ite10#1 % 256 <= 127 then node7_#t~ite10#1 % 256 else node7_#t~ite10#1 % 256 - 256);havoc node7_#t~ite10#1;~mode7~0 := 1; 983#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 982#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 981#L473 assume !(~r1~0 % 256 >= 7); 918#L476 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 919#L477 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 1037#L472-1 check_#res#1 := check_~tmp~1#1; 1036#L492 main_#t~ret41#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret41#1;havoc main_#t~ret41#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1035#L583 assume !(0 == assert_~arg#1 % 256); 1034#L578 assume { :end_inline_assert } true; 970#L548-2 [2022-10-17 10:31:58,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:58,485 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-10-17 10:31:58,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:58,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783074930] [2022-10-17 10:31:58,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:58,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:58,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,505 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:31:58,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:31:58,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:58,539 INFO L85 PathProgramCache]: Analyzing trace with hash -1335319549, now seen corresponding path program 1 times [2022-10-17 10:31:58,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:58,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690711525] [2022-10-17 10:31:58,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:58,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:58,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,554 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 10:31:58,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 10:31:58,574 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 10:31:58,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 10:31:58,575 INFO L85 PathProgramCache]: Analyzing trace with hash 1306912914, now seen corresponding path program 1 times [2022-10-17 10:31:58,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 10:31:58,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543406227] [2022-10-17 10:31:58,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 10:31:58,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 10:31:58,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 10:31:58,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 10:31:58,706 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 10:31:58,706 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543406227] [2022-10-17 10:31:58,707 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543406227] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 10:31:58,707 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 10:31:58,707 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 10:31:58,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626030046] [2022-10-17 10:31:58,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 10:32:01,034 INFO L210 LassoAnalysis]: Preferences: [2022-10-17 10:32:01,035 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-10-17 10:32:01,035 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-10-17 10:32:01,035 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-10-17 10:32:01,035 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-10-17 10:32:01,036 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 10:32:01,036 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-10-17 10:32:01,036 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-10-17 10:32:01,036 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-10-17 10:32:01,036 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-10-17 10:32:01,037 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-10-17 10:32:01,078 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,124 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,626 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,640 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,643 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,646 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,653 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,655 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,664 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,667 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,671 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,673 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,679 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,682 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,688 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,694 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,700 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,702 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,707 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:01,710 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-10-17 10:32:03,032 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2022-10-17 10:32:03,560 WARN L176 XnfTransformerHelper]: Simplifying disjunction of 7776 conjuctions. This might take some time... [2022-10-17 10:32:25,255 INFO L192 XnfTransformerHelper]: Simplified to disjunction of 7776 conjuctions.