./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version dbf71c69 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef232f94cb2adf03185aed5adfaef3f0eb9593ee06bfb5b3fbb6e4bc1dd6d041 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-dbf71c6-m [2022-10-17 11:02:32,573 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-17 11:02:32,575 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-17 11:02:32,607 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-17 11:02:32,607 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-17 11:02:32,609 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-17 11:02:32,610 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-17 11:02:32,613 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-17 11:02:32,619 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-17 11:02:32,620 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-17 11:02:32,621 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-17 11:02:32,622 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-17 11:02:32,623 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-17 11:02:32,629 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-17 11:02:32,632 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-17 11:02:32,634 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-17 11:02:32,636 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-17 11:02:32,638 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-17 11:02:32,642 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-17 11:02:32,649 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-17 11:02:32,651 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-17 11:02:32,652 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-17 11:02:32,654 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-17 11:02:32,655 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-17 11:02:32,659 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-17 11:02:32,660 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-17 11:02:32,660 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-17 11:02:32,661 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-17 11:02:32,662 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-17 11:02:32,663 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-17 11:02:32,663 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-17 11:02:32,664 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-17 11:02:32,665 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-17 11:02:32,666 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-17 11:02:32,667 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-17 11:02:32,668 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-17 11:02:32,668 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-17 11:02:32,669 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-17 11:02:32,669 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-17 11:02:32,670 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-17 11:02:32,670 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-17 11:02:32,671 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-10-17 11:02:32,705 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-17 11:02:32,708 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-17 11:02:32,708 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-17 11:02:32,709 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-17 11:02:32,710 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-17 11:02:32,710 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-17 11:02:32,710 INFO L138 SettingsManager]: * Use SBE=true [2022-10-17 11:02:32,711 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-10-17 11:02:32,711 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-10-17 11:02:32,711 INFO L138 SettingsManager]: * Use old map elimination=false [2022-10-17 11:02:32,712 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-10-17 11:02:32,713 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-10-17 11:02:32,713 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-10-17 11:02:32,713 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-17 11:02:32,713 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-17 11:02:32,714 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-17 11:02:32,714 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-17 11:02:32,714 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-17 11:02:32,714 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-17 11:02:32,714 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-10-17 11:02:32,715 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-10-17 11:02:32,715 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-10-17 11:02:32,715 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-17 11:02:32,717 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-17 11:02:32,717 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-10-17 11:02:32,717 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-17 11:02:32,717 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-10-17 11:02:32,718 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-17 11:02:32,718 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-17 11:02:32,718 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-17 11:02:32,719 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-17 11:02:32,720 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-10-17 11:02:32,720 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef232f94cb2adf03185aed5adfaef3f0eb9593ee06bfb5b3fbb6e4bc1dd6d041 [2022-10-17 11:02:32,972 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-17 11:02:32,999 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-17 11:02:33,002 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-17 11:02:33,003 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-17 11:02:33,004 INFO L275 PluginConnector]: CDTParser initialized [2022-10-17 11:02:33,006 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i [2022-10-17 11:02:33,092 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/data/97e338cbc/5c5febf32dcb4a6c8dfcf5179810233c/FLAG9eaacd835 [2022-10-17 11:02:33,784 INFO L306 CDTParser]: Found 1 translation units. [2022-10-17 11:02:33,785 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i [2022-10-17 11:02:33,814 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/data/97e338cbc/5c5febf32dcb4a6c8dfcf5179810233c/FLAG9eaacd835 [2022-10-17 11:02:33,968 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/data/97e338cbc/5c5febf32dcb4a6c8dfcf5179810233c [2022-10-17 11:02:33,973 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-17 11:02:33,975 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-10-17 11:02:33,981 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-17 11:02:33,982 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-17 11:02:33,985 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-17 11:02:33,987 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 11:02:33" (1/1) ... [2022-10-17 11:02:33,989 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3a742a79 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:33, skipping insertion in model container [2022-10-17 11:02:33,989 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.10 11:02:33" (1/1) ... [2022-10-17 11:02:33,998 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-17 11:02:34,089 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-17 11:02:34,546 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[33021,33034] [2022-10-17 11:02:34,680 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[44124,44137] [2022-10-17 11:02:34,682 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[44245,44258] [2022-10-17 11:02:34,701 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 11:02:34,711 INFO L203 MainTranslator]: Completed pre-run [2022-10-17 11:02:34,743 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[33021,33034] [2022-10-17 11:02:34,844 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[44124,44137] [2022-10-17 11:02:34,854 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test7-2.i[44245,44258] [2022-10-17 11:02:34,869 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-17 11:02:34,919 INFO L208 MainTranslator]: Completed translation [2022-10-17 11:02:34,920 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34 WrapperNode [2022-10-17 11:02:34,920 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-17 11:02:34,921 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-17 11:02:34,921 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-17 11:02:34,922 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-17 11:02:34,931 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:34,973 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,079 INFO L138 Inliner]: procedures = 176, calls = 328, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 1151 [2022-10-17 11:02:35,080 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-17 11:02:35,080 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-17 11:02:35,081 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-17 11:02:35,081 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-17 11:02:35,091 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,091 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,123 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,123 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,204 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,263 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,271 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,288 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,304 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-17 11:02:35,311 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-17 11:02:35,312 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-17 11:02:35,314 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-17 11:02:35,315 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (1/1) ... [2022-10-17 11:02:35,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-10-17 11:02:35,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:35,348 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-10-17 11:02:35,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-10-17 11:02:35,409 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-10-17 11:02:35,409 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-10-17 11:02:35,410 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-10-17 11:02:35,410 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-10-17 11:02:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-10-17 11:02:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-17 11:02:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-10-17 11:02:35,411 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-10-17 11:02:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-10-17 11:02:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-10-17 11:02:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-10-17 11:02:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-17 11:02:35,412 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-17 11:02:35,413 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-17 11:02:35,730 INFO L235 CfgBuilder]: Building ICFG [2022-10-17 11:02:35,733 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-17 11:02:35,738 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-17 11:02:37,807 INFO L276 CfgBuilder]: Performing block encoding [2022-10-17 11:02:37,816 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-17 11:02:37,816 INFO L300 CfgBuilder]: Removed 72 assume(true) statements. [2022-10-17 11:02:37,818 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 11:02:37 BoogieIcfgContainer [2022-10-17 11:02:37,819 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-17 11:02:37,820 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-10-17 11:02:37,820 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-10-17 11:02:37,824 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-10-17 11:02:37,825 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:37,826 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.10 11:02:33" (1/3) ... [2022-10-17 11:02:37,827 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25afe0d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 11:02:37, skipping insertion in model container [2022-10-17 11:02:37,827 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:37,828 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.10 11:02:34" (2/3) ... [2022-10-17 11:02:37,828 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25afe0d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.10 11:02:37, skipping insertion in model container [2022-10-17 11:02:37,828 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-10-17 11:02:37,828 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.10 11:02:37" (3/3) ... [2022-10-17 11:02:37,830 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test7-2.i [2022-10-17 11:02:37,893 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-10-17 11:02:37,893 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-10-17 11:02:37,893 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-10-17 11:02:37,894 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-10-17 11:02:37,894 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-10-17 11:02:37,894 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-10-17 11:02:37,894 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-10-17 11:02:37,895 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-10-17 11:02:37,900 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 212 states, 207 states have (on average 1.6908212560386473) internal successors, (350), 207 states have internal predecessors, (350), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-10-17 11:02:37,939 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 197 [2022-10-17 11:02:37,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:37,940 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:37,948 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 11:02:37,948 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-10-17 11:02:37,948 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-10-17 11:02:37,950 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 212 states, 207 states have (on average 1.6908212560386473) internal successors, (350), 207 states have internal predecessors, (350), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-10-17 11:02:37,962 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 197 [2022-10-17 11:02:37,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:37,963 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:37,963 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 11:02:37,963 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-10-17 11:02:37,972 INFO L748 eck$LassoCheckResult]: Stem: 203#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 139#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~switch22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc34#1.base, main_#t~malloc34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~memset~res37#1.base, main_#t~memset~res37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~malloc43#1.base, main_#t~malloc43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~memset~res50#1.base, main_#t~memset~res50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~post61#1, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~post67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem72#1, main_#t~mem71#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~short75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~malloc78#1.base, main_#t~malloc78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~memset~res83#1.base, main_#t~memset~res83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem88#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~ite93#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~pre107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem116#1, main_#t~mem114#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem115#1, main_#t~mem117#1, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~post95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~post128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~ite138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~short190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem213#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~post217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_#t~post228#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~ite231#1.base, main_#t~ite231#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~short236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem259#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite233#1.base, main_#t~ite233#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 183#L715-4true [2022-10-17 11:02:37,973 INFO L750 eck$LassoCheckResult]: Loop: 183#L715-4true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 169#L715-1true assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 26#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 85#L717-2true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 175#L722-124true assume !true; 50#L715-3true call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 183#L715-4true [2022-10-17 11:02:37,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:37,980 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-10-17 11:02:37,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:37,993 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565992198] [2022-10-17 11:02:37,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:37,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:38,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:38,122 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:38,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:38,199 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:38,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:38,203 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2022-10-17 11:02:38,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:38,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029535594] [2022-10-17 11:02:38,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:38,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:38,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:38,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:38,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029535594] [2022-10-17 11:02:38,299 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2022-10-17 11:02:38,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [939891928] [2022-10-17 11:02:38,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:38,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 11:02:38,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:38,306 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 11:02:38,309 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-10-17 11:02:38,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:38,438 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 1 conjunts are in the unsatisfiable core [2022-10-17 11:02:38,439 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 11:02:38,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:38,459 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-17 11:02:38,460 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [939891928] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:38,461 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:38,461 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-17 11:02:38,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971976833] [2022-10-17 11:02:38,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:38,467 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:38,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:38,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-10-17 11:02:38,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-10-17 11:02:38,506 INFO L87 Difference]: Start difference. First operand has 212 states, 207 states have (on average 1.6908212560386473) internal successors, (350), 207 states have internal predecessors, (350), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:38,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:38,530 INFO L93 Difference]: Finished difference Result 211 states and 277 transitions. [2022-10-17 11:02:38,531 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 211 states and 277 transitions. [2022-10-17 11:02:38,536 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 195 [2022-10-17 11:02:38,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 211 states to 207 states and 273 transitions. [2022-10-17 11:02:38,546 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 207 [2022-10-17 11:02:38,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 207 [2022-10-17 11:02:38,548 INFO L73 IsDeterministic]: Start isDeterministic. Operand 207 states and 273 transitions. [2022-10-17 11:02:38,551 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:38,551 INFO L218 hiAutomatonCegarLoop]: Abstraction has 207 states and 273 transitions. [2022-10-17 11:02:38,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states and 273 transitions. [2022-10-17 11:02:38,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2022-10-17 11:02:38,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 207 states, 203 states have (on average 1.3152709359605912) internal successors, (267), 202 states have internal predecessors, (267), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-10-17 11:02:38,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 273 transitions. [2022-10-17 11:02:38,596 INFO L240 hiAutomatonCegarLoop]: Abstraction has 207 states and 273 transitions. [2022-10-17 11:02:38,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-17 11:02:38,601 INFO L428 stractBuchiCegarLoop]: Abstraction has 207 states and 273 transitions. [2022-10-17 11:02:38,601 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-10-17 11:02:38,601 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 207 states and 273 transitions. [2022-10-17 11:02:38,604 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 195 [2022-10-17 11:02:38,604 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:38,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:38,606 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 11:02:38,606 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:38,607 INFO L748 eck$LassoCheckResult]: Stem: 652#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 628#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~switch22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc34#1.base, main_#t~malloc34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~memset~res37#1.base, main_#t~memset~res37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~malloc43#1.base, main_#t~malloc43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~memset~res50#1.base, main_#t~memset~res50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~post61#1, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~post67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem72#1, main_#t~mem71#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~short75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~malloc78#1.base, main_#t~malloc78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~memset~res83#1.base, main_#t~memset~res83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem88#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~ite93#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~pre107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem116#1, main_#t~mem114#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem115#1, main_#t~mem117#1, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~post95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~post128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~ite138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~short190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem213#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~post217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_#t~post228#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~ite231#1.base, main_#t~ite231#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~short236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem259#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite233#1.base, main_#t~ite233#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 536#L715-4 [2022-10-17 11:02:38,609 INFO L750 eck$LassoCheckResult]: Loop: 536#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 645#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 495#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 496#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 584#L722-124 havoc main_~_ha_hashv~0#1; 649#L722-49 goto; 626#L722-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 480#L722-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 481#L722-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch22#1 := 11 == main_~_hj_k~0#1; 530#L722-10 assume main_#t~switch22#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 539#L722-12 main_#t~switch22#1 := main_#t~switch22#1 || 10 == main_~_hj_k~0#1; 540#L722-13 assume main_#t~switch22#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 614#L722-15 main_#t~switch22#1 := main_#t~switch22#1 || 9 == main_~_hj_k~0#1; 632#L722-16 assume main_#t~switch22#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 642#L722-18 main_#t~switch22#1 := main_#t~switch22#1 || 8 == main_~_hj_k~0#1; 608#L722-19 assume main_#t~switch22#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 609#L722-21 main_#t~switch22#1 := main_#t~switch22#1 || 7 == main_~_hj_k~0#1; 644#L722-22 assume !main_#t~switch22#1; 564#L722-24 main_#t~switch22#1 := main_#t~switch22#1 || 6 == main_~_hj_k~0#1; 565#L722-25 assume main_#t~switch22#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 615#L722-27 main_#t~switch22#1 := main_#t~switch22#1 || 5 == main_~_hj_k~0#1; 616#L722-28 assume main_#t~switch22#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem29#1 % 256;havoc main_#t~mem29#1; 647#L722-30 main_#t~switch22#1 := main_#t~switch22#1 || 4 == main_~_hj_k~0#1; 648#L722-31 assume main_#t~switch22#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 629#L722-33 main_#t~switch22#1 := main_#t~switch22#1 || 3 == main_~_hj_k~0#1; 611#L722-34 assume main_#t~switch22#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 578#L722-36 main_#t~switch22#1 := main_#t~switch22#1 || 2 == main_~_hj_k~0#1; 549#L722-37 assume main_#t~switch22#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 550#L722-39 main_#t~switch22#1 := main_#t~switch22#1 || 1 == main_~_hj_k~0#1; 562#L722-40 assume main_#t~switch22#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 563#L722-42 havoc main_#t~switch22#1; 573#L722-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 574#L722-44 goto; 467#L722-46 goto; 468#L722-48 goto; 590#L722-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 598#L722-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem51#1.base, main_#t~mem51#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem51#1.base, main_#t~mem51#1.offset; 559#L722-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem52#1.base, main_#t~mem52#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_#t~mem52#1.base, 16 + main_#t~mem52#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1 := read~int(main_#t~mem54#1.base, 20 + main_#t~mem54#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset - main_#t~mem55#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem52#1.base, main_#t~mem52#1.offset;havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem57#1.base, 8 + main_#t~mem57#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset; 560#L722-66 goto; 575#L722-120 havoc main_~_ha_bkt~0#1;call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);main_#t~post61#1 := main_#t~mem60#1;call write~int(1 + main_#t~post61#1, main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1;havoc main_#t~post61#1; 526#L722-71 call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem63#1 := read~int(main_#t~mem62#1.base, 4 + main_#t~mem62#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem63#1 - 1 then 0 else (if 1 == main_#t~mem63#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem63#1 - 1 || 0 == main_#t~mem63#1 - 1 then main_#t~mem63#1 - 1 else (if main_#t~mem63#1 - 1 >= 0 then (main_#t~mem63#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))));havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;havoc main_#t~mem63#1; 527#L722-70 goto; 599#L722-118 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_#t~mem64#1.base, main_#t~mem64#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem65#1.base, main_#t~mem65#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call main_#t~mem66#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post67#1 := main_#t~mem66#1;call write~int(1 + main_#t~post67#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem66#1;havoc main_#t~post67#1;call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 471#L722-73 assume main_#t~mem69#1.base != 0 || main_#t~mem69#1.offset != 0;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem70#1.base, 12 + main_#t~mem70#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset; 472#L722-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem72#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short75#1 := main_#t~mem72#1 % 4294967296 >= 10 * (1 + main_#t~mem71#1) % 4294967296; 537#L722-76 assume main_#t~short75#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_#t~mem73#1.base, 36 + main_#t~mem73#1.offset, 4);main_#t~short75#1 := 0 == main_#t~mem74#1 % 4294967296; 538#L722-78 assume !main_#t~short75#1;havoc main_#t~mem72#1;havoc main_#t~mem71#1;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~short75#1; 517#L722-117 goto; 518#L722-119 goto; 531#L722-121 goto; 456#L722-123 goto; 457#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 536#L715-4 [2022-10-17 11:02:38,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:38,610 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-10-17 11:02:38,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:38,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672509937] [2022-10-17 11:02:38,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:38,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:38,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:38,631 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:38,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:38,667 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:38,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:38,668 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2022-10-17 11:02:38,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:38,670 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031784643] [2022-10-17 11:02:38,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:38,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:38,881 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-17 11:02:38,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [729760580] [2022-10-17 11:02:38,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:38,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 11:02:38,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:38,885 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 11:02:38,936 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-10-17 11:02:39,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:39,755 INFO L263 TraceCheckSpWp]: Trace formula consists of 1850 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-17 11:02:39,760 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 11:02:39,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:39,811 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-17 11:02:39,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:39,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031784643] [2022-10-17 11:02:39,812 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-17 11:02:39,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [729760580] [2022-10-17 11:02:39,812 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [729760580] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:39,813 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:39,813 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-17 11:02:39,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575922058] [2022-10-17 11:02:39,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:39,814 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:39,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:39,816 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-17 11:02:39,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-17 11:02:39,817 INFO L87 Difference]: Start difference. First operand 207 states and 273 transitions. cyclomatic complexity: 70 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:39,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:39,965 INFO L93 Difference]: Finished difference Result 228 states and 294 transitions. [2022-10-17 11:02:39,965 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 228 states and 294 transitions. [2022-10-17 11:02:39,970 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 216 [2022-10-17 11:02:39,976 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 228 states to 228 states and 294 transitions. [2022-10-17 11:02:39,977 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 228 [2022-10-17 11:02:39,979 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 228 [2022-10-17 11:02:39,979 INFO L73 IsDeterministic]: Start isDeterministic. Operand 228 states and 294 transitions. [2022-10-17 11:02:39,987 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:39,987 INFO L218 hiAutomatonCegarLoop]: Abstraction has 228 states and 294 transitions. [2022-10-17 11:02:39,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states and 294 transitions. [2022-10-17 11:02:40,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 227. [2022-10-17 11:02:40,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 227 states, 223 states have (on average 1.2869955156950672) internal successors, (287), 222 states have internal predecessors, (287), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-10-17 11:02:40,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 293 transitions. [2022-10-17 11:02:40,013 INFO L240 hiAutomatonCegarLoop]: Abstraction has 227 states and 293 transitions. [2022-10-17 11:02:40,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-17 11:02:40,015 INFO L428 stractBuchiCegarLoop]: Abstraction has 227 states and 293 transitions. [2022-10-17 11:02:40,015 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-10-17 11:02:40,015 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 227 states and 293 transitions. [2022-10-17 11:02:40,020 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 215 [2022-10-17 11:02:40,020 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:40,020 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:40,023 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 11:02:40,024 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:40,024 INFO L748 eck$LassoCheckResult]: Stem: 1256#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1224#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~switch22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc34#1.base, main_#t~malloc34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~memset~res37#1.base, main_#t~memset~res37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~malloc43#1.base, main_#t~malloc43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~memset~res50#1.base, main_#t~memset~res50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~post61#1, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~post67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem72#1, main_#t~mem71#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~short75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~malloc78#1.base, main_#t~malloc78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~memset~res83#1.base, main_#t~memset~res83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem88#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~ite93#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~pre107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem116#1, main_#t~mem114#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem115#1, main_#t~mem117#1, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~post95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~post128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~ite138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~short190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem213#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~post217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_#t~post228#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~ite231#1.base, main_#t~ite231#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~short236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem259#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite233#1.base, main_#t~ite233#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1130#L715-4 [2022-10-17 11:02:40,024 INFO L750 eck$LassoCheckResult]: Loop: 1130#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1245#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1089#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1090#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1179#L722-124 havoc main_~_ha_hashv~0#1; 1249#L722-49 goto; 1222#L722-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1074#L722-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1075#L722-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch22#1 := 11 == main_~_hj_k~0#1; 1124#L722-10 assume main_#t~switch22#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 1162#L722-12 main_#t~switch22#1 := main_#t~switch22#1 || 10 == main_~_hj_k~0#1; 1209#L722-13 assume main_#t~switch22#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 1210#L722-15 main_#t~switch22#1 := main_#t~switch22#1 || 9 == main_~_hj_k~0#1; 1239#L722-16 assume main_#t~switch22#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 1240#L722-18 main_#t~switch22#1 := main_#t~switch22#1 || 8 == main_~_hj_k~0#1; 1203#L722-19 assume main_#t~switch22#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 1204#L722-21 main_#t~switch22#1 := main_#t~switch22#1 || 7 == main_~_hj_k~0#1; 1243#L722-22 assume main_#t~switch22#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1244#L722-24 main_#t~switch22#1 := main_#t~switch22#1 || 6 == main_~_hj_k~0#1; 1241#L722-25 assume main_#t~switch22#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1211#L722-27 main_#t~switch22#1 := main_#t~switch22#1 || 5 == main_~_hj_k~0#1; 1212#L722-28 assume main_#t~switch22#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem29#1 % 256;havoc main_#t~mem29#1; 1247#L722-30 main_#t~switch22#1 := main_#t~switch22#1 || 4 == main_~_hj_k~0#1; 1248#L722-31 assume main_#t~switch22#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 1225#L722-33 main_#t~switch22#1 := main_#t~switch22#1 || 3 == main_~_hj_k~0#1; 1206#L722-34 assume main_#t~switch22#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 1173#L722-36 main_#t~switch22#1 := main_#t~switch22#1 || 2 == main_~_hj_k~0#1; 1144#L722-37 assume main_#t~switch22#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1145#L722-39 main_#t~switch22#1 := main_#t~switch22#1 || 1 == main_~_hj_k~0#1; 1156#L722-40 assume main_#t~switch22#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 1157#L722-42 havoc main_#t~switch22#1; 1168#L722-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1169#L722-44 goto; 1061#L722-46 goto; 1062#L722-48 goto; 1185#L722-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1193#L722-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem51#1.base, main_#t~mem51#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem51#1.base, main_#t~mem51#1.offset; 1153#L722-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem52#1.base, main_#t~mem52#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_#t~mem52#1.base, 16 + main_#t~mem52#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1 := read~int(main_#t~mem54#1.base, 20 + main_#t~mem54#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset - main_#t~mem55#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem52#1.base, main_#t~mem52#1.offset;havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem57#1.base, 8 + main_#t~mem57#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset; 1154#L722-66 goto; 1170#L722-120 havoc main_~_ha_bkt~0#1;call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);main_#t~post61#1 := main_#t~mem60#1;call write~int(1 + main_#t~post61#1, main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1;havoc main_#t~post61#1; 1120#L722-71 call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem63#1 := read~int(main_#t~mem62#1.base, 4 + main_#t~mem62#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem63#1 - 1 then 0 else (if 1 == main_#t~mem63#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem63#1 - 1 || 0 == main_#t~mem63#1 - 1 then main_#t~mem63#1 - 1 else (if main_#t~mem63#1 - 1 >= 0 then (main_#t~mem63#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))));havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;havoc main_#t~mem63#1; 1121#L722-70 goto; 1194#L722-118 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_#t~mem64#1.base, main_#t~mem64#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem65#1.base, main_#t~mem65#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call main_#t~mem66#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post67#1 := main_#t~mem66#1;call write~int(1 + main_#t~post67#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem66#1;havoc main_#t~post67#1;call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1065#L722-73 assume main_#t~mem69#1.base != 0 || main_#t~mem69#1.offset != 0;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem70#1.base, 12 + main_#t~mem70#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset; 1066#L722-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem72#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short75#1 := main_#t~mem72#1 % 4294967296 >= 10 * (1 + main_#t~mem71#1) % 4294967296; 1131#L722-76 assume main_#t~short75#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_#t~mem73#1.base, 36 + main_#t~mem73#1.offset, 4);main_#t~short75#1 := 0 == main_#t~mem74#1 % 4294967296; 1132#L722-78 assume !main_#t~short75#1;havoc main_#t~mem72#1;havoc main_#t~mem71#1;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~short75#1; 1111#L722-117 goto; 1112#L722-119 goto; 1125#L722-121 goto; 1050#L722-123 goto; 1051#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1130#L715-4 [2022-10-17 11:02:40,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:40,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-10-17 11:02:40,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:40,030 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052688383] [2022-10-17 11:02:40,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:40,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:40,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:40,068 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:40,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:40,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:40,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:40,128 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2022-10-17 11:02:40,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:40,129 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568970902] [2022-10-17 11:02:40,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:40,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:40,348 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-17 11:02:40,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [698558753] [2022-10-17 11:02:40,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:40,350 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 11:02:40,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:40,363 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 11:02:40,381 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-10-17 11:02:41,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-17 11:02:41,267 INFO L263 TraceCheckSpWp]: Trace formula consists of 1856 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-17 11:02:41,271 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-17 11:02:41,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-17 11:02:41,318 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-17 11:02:41,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-17 11:02:41,318 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568970902] [2022-10-17 11:02:41,318 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-17 11:02:41,318 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [698558753] [2022-10-17 11:02:41,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [698558753] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-17 11:02:41,319 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-17 11:02:41,319 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-17 11:02:41,319 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [377755690] [2022-10-17 11:02:41,320 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-17 11:02:41,320 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-10-17 11:02:41,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-17 11:02:41,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-17 11:02:41,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-17 11:02:41,321 INFO L87 Difference]: Start difference. First operand 227 states and 293 transitions. cyclomatic complexity: 70 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-17 11:02:41,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-17 11:02:41,448 INFO L93 Difference]: Finished difference Result 333 states and 431 transitions. [2022-10-17 11:02:41,448 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 333 states and 431 transitions. [2022-10-17 11:02:41,452 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 308 [2022-10-17 11:02:41,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 333 states to 333 states and 431 transitions. [2022-10-17 11:02:41,456 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 333 [2022-10-17 11:02:41,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 333 [2022-10-17 11:02:41,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 333 states and 431 transitions. [2022-10-17 11:02:41,461 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-10-17 11:02:41,462 INFO L218 hiAutomatonCegarLoop]: Abstraction has 333 states and 431 transitions. [2022-10-17 11:02:41,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states and 431 transitions. [2022-10-17 11:02:41,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 213. [2022-10-17 11:02:41,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 213 states, 209 states have (on average 1.2727272727272727) internal successors, (266), 208 states have internal predecessors, (266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-10-17 11:02:41,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 272 transitions. [2022-10-17 11:02:41,486 INFO L240 hiAutomatonCegarLoop]: Abstraction has 213 states and 272 transitions. [2022-10-17 11:02:41,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-17 11:02:41,492 INFO L428 stractBuchiCegarLoop]: Abstraction has 213 states and 272 transitions. [2022-10-17 11:02:41,493 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-10-17 11:02:41,493 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 213 states and 272 transitions. [2022-10-17 11:02:41,494 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 201 [2022-10-17 11:02:41,494 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-10-17 11:02:41,495 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-10-17 11:02:41,495 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-10-17 11:02:41,496 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-17 11:02:41,496 INFO L748 eck$LassoCheckResult]: Stem: 1971#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1946#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~switch22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc34#1.base, main_#t~malloc34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~memset~res37#1.base, main_#t~memset~res37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~malloc43#1.base, main_#t~malloc43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~memset~res50#1.base, main_#t~memset~res50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~post61#1, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~post67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem72#1, main_#t~mem71#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~short75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~malloc78#1.base, main_#t~malloc78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~memset~res83#1.base, main_#t~memset~res83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem88#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~ite93#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem104#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~pre107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~post112#1, main_#t~mem116#1, main_#t~mem114#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem115#1, main_#t~mem117#1, main_#t~post118#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~post95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~post128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~ite138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~short190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem213#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~post217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1, main_#t~post228#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~ite231#1.base, main_#t~ite231#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~short236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem259#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite233#1.base, main_#t~ite233#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1852#L715-4 [2022-10-17 11:02:41,496 INFO L750 eck$LassoCheckResult]: Loop: 1852#L715-4 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1964#L715-1 assume !!(main_#t~mem5#1 < 1000);havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1811#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1812#L717-2 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1; 1900#L722-124 havoc main_~_ha_hashv~0#1; 1968#L722-49 goto; 1944#L722-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1798#L722-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1799#L722-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch22#1 := 11 == main_~_hj_k~0#1; 1846#L722-10 assume !main_#t~switch22#1; 1855#L722-12 main_#t~switch22#1 := main_#t~switch22#1 || 10 == main_~_hj_k~0#1; 1856#L722-13 assume !main_#t~switch22#1; 1934#L722-15 main_#t~switch22#1 := main_#t~switch22#1 || 9 == main_~_hj_k~0#1; 1951#L722-16 assume !main_#t~switch22#1; 1961#L722-18 main_#t~switch22#1 := main_#t~switch22#1 || 8 == main_~_hj_k~0#1; 1927#L722-19 assume !main_#t~switch22#1; 1928#L722-21 main_#t~switch22#1 := main_#t~switch22#1 || 7 == main_~_hj_k~0#1; 1963#L722-22 assume !main_#t~switch22#1; 1880#L722-24 main_#t~switch22#1 := main_#t~switch22#1 || 6 == main_~_hj_k~0#1; 1881#L722-25 assume !main_#t~switch22#1; 1935#L722-27 main_#t~switch22#1 := main_#t~switch22#1 || 5 == main_~_hj_k~0#1; 1936#L722-28 assume !main_#t~switch22#1; 1966#L722-30 main_#t~switch22#1 := main_#t~switch22#1 || 4 == main_~_hj_k~0#1; 1967#L722-31 assume main_#t~switch22#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 1972#L722-33 main_#t~switch22#1 := main_#t~switch22#1 || 3 == main_~_hj_k~0#1; 1929#L722-34 assume main_#t~switch22#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 1894#L722-36 main_#t~switch22#1 := main_#t~switch22#1 || 2 == main_~_hj_k~0#1; 1866#L722-37 assume main_#t~switch22#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1867#L722-39 main_#t~switch22#1 := main_#t~switch22#1 || 1 == main_~_hj_k~0#1; 1878#L722-40 assume main_#t~switch22#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 1879#L722-42 havoc main_#t~switch22#1; 1887#L722-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1888#L722-44 goto; 1783#L722-46 goto; 1784#L722-48 goto; 1906#L722-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1914#L722-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem51#1.base, main_#t~mem51#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem51#1.base, main_#t~mem51#1.offset; 1873#L722-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem52#1.base, main_#t~mem52#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_#t~mem52#1.base, 16 + main_#t~mem52#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1 := read~int(main_#t~mem54#1.base, 20 + main_#t~mem54#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset - main_#t~mem55#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem52#1.base, main_#t~mem52#1.offset;havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem57#1.base, 8 + main_#t~mem57#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset; 1874#L722-66 goto; 1889#L722-120 havoc main_~_ha_bkt~0#1;call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);main_#t~post61#1 := main_#t~mem60#1;call write~int(1 + main_#t~post61#1, main_#t~mem59#1.base, 12 + main_#t~mem59#1.offset, 4);havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1;havoc main_#t~post61#1; 1842#L722-71 call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem63#1 := read~int(main_#t~mem62#1.base, 4 + main_#t~mem62#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem63#1 - 1 then 0 else (if 1 == main_#t~mem63#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem63#1 - 1 || 0 == main_#t~mem63#1 - 1 then main_#t~mem63#1 - 1 else (if main_#t~mem63#1 - 1 >= 0 then (main_#t~mem63#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem63#1 - 1))));havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;havoc main_#t~mem63#1; 1843#L722-70 goto; 1915#L722-118 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_#t~mem64#1.base, main_#t~mem64#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem65#1.base, main_#t~mem65#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call main_#t~mem66#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post67#1 := main_#t~mem66#1;call write~int(1 + main_#t~post67#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem66#1;havoc main_#t~post67#1;call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1785#L722-73 assume main_#t~mem69#1.base != 0 || main_#t~mem69#1.offset != 0;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem70#1.base, 12 + main_#t~mem70#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset; 1786#L722-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem72#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short75#1 := main_#t~mem72#1 % 4294967296 >= 10 * (1 + main_#t~mem71#1) % 4294967296; 1853#L722-76 assume main_#t~short75#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_#t~mem73#1.base, 36 + main_#t~mem73#1.offset, 4);main_#t~short75#1 := 0 == main_#t~mem74#1 % 4294967296; 1854#L722-78 assume !main_#t~short75#1;havoc main_#t~mem72#1;havoc main_#t~mem71#1;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~short75#1; 1831#L722-117 goto; 1832#L722-119 goto; 1847#L722-121 goto; 1770#L722-123 goto; 1771#L715-3 call main_#t~mem3#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post4#1 := main_#t~mem3#1;call write~int(1 + main_#t~post4#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem3#1;havoc main_#t~post4#1; 1852#L715-4 [2022-10-17 11:02:41,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:41,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-10-17 11:02:41,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:41,497 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391694215] [2022-10-17 11:02:41,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:41,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:41,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:41,541 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-17 11:02:41,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-17 11:02:41,589 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-17 11:02:41,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-17 11:02:41,590 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2022-10-17 11:02:41,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-17 11:02:41,595 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057267530] [2022-10-17 11:02:41,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:41,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-17 11:02:41,742 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-17 11:02:41,742 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [735500336] [2022-10-17 11:02:41,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-17 11:02:41,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-17 11:02:41,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 [2022-10-17 11:02:41,744 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-17 11:02:41,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50224de1-4c79-4b64-83c3-9cb378ba8c7b/bin/uautomizer-J5u9QxTXDZ/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process